Changeset 40 for anr/task-5.tex

Timestamp:

Jan 19, 2010, 5:03:37 PM (14 years ago)

Author:

coach

Message:

Paul task 4 to 6 and section 4.4

File:

• anr/task-5.tex (modified) (2 diffs)

anr/task-5.tex

@@ -32 +32 @@
         \global\edef\hpcCommApi{\name}
     \end{livrable}
-\item This \ST aims consists in helping the application partitioning help.
+\item This \ST consists in helping to partition the application.
     It is a library implementing the communication API with features to profile
-    the application partionning.
+    the partitioned application.
     \begin{livrable}
     \item{}{6}{12}{x}{\Supmc}{HPC partionning helper} A library implementing the communication
         API defined in the {\hpcCommApi} delivrable.
     \end{livrable}
-\item This \ST aims with the implementation of the communication API on the both sides (PC
+\item This \ST deals with the implementation of the communication API on the both sides (PC
     part and FPGA-SoC).
     \begin{livrable}
     \item{}{12}{21}{x}{\Supmc}{HPC API for Linux PC} The PC part of the HPC communication API
-        that comminicate with the FPGA-SOC, a library and probably a LINUX module.
+        that comminicates with the FPGA-SOC, a library and probably a LINUX module.
     \item{}{12}{21}{x}{\Supmc}{HPC API for MUTEK OS} The FPGA-SoC part of the communication API, a
         driver.\global\edef\hpcMutekDriver{\name}
     \item{}{21}{24}{x}{\Stima}{HPC API for DNA OS} Port of the {\hpcMutekDriver} driver on the DNA OS.
     \end{livrable}
-\item This \ST aims with the implementation of hardware required by the COACH
+\item This \ST deals with the implementation of hardware required by the COACH
     architectural template for using the PCI/X IP of \altera and \xilinx.
     \begin{livrable}
@@ -56 +56 @@
     \item{}{9}{18}{h}{\Saltera}{HPC hardware \altera}
         \setMacroInAuxFile{hpcAvalonBridge}
-        The synthesizable VHDL description of a AVALON/VCI bridge and its corresponding SystemC model.
+        The synthesizable VHDL description of an AVALON/VCI bridge and its corresponding SystemC model.
     \end{livrable}
-\item This \ST aims with the dynamic reconfiguration of FPGA.
+\item This \ST deals with the dynamic reconfiguration of an FPGA.
     \begin{livrable}
     \item{}{18}{30}{x}{\Stima}{dynamic reconfiguration \ganttlf DNA drivers}