Changeset 40 for anr/section-4.4.tex

Timestamp:

Jan 19, 2010, 5:03:37 PM (14 years ago)

Author:

coach

Message:

Paul task 4 to 6 and section 4.4

File:

• anr/section-4.4.tex (modified) (3 diffs)

anr/section-4.4.tex

@@ -53 +53 @@
 \item[\xcoachplus format (\novers{\specXcoachDoc},
       \novers{\specXcoachToSystemC}, \novers{\specXcoachToVhdl})]
-    Its aim is the generation of the coprocessors (hardware \& prototyping model),
-    By centralizing the coprocessor generation, it guarantees their operating
+    Its aim is the generation of the coprocessors (hardware \& prototyping model).
+    By centralizing the coprocessor generation, it guarantees their functioning
     independently of the used HAS tools.
         Our experience with UGH and GAUT give us confidence in the succes of this
@@ -62 +62 @@
      The SocLib component library contains most of the SystemC models used for the
      prototyping description of the ALTERA and XILINX architectural templates.
-     Nevertheless, at this time we do'nt know how many are missing and if the existing
+     Nevertheless, at this time we do not know how many are missing and if the existing
      are really useables.
-     If the work of theses tasks is to important, they will be given up.
+     If the work of theses tasks is too important, they will be abandoned.
      In this case the work-arround to prototype the XILINX and ALTERA architectural
      templates is to use the COACH one. These architectures being very similar, the
@@ -71 +71 @@
 \item[VCI/AVALON \& VCI/PLB bridges (\novers{\hpcAvalonBridge}, \novers{\hpcPlbBridge})]
      If one of these tasks is impossible or too important or leads to inefficiency,
-     will be given up.
+     it will be abandoned.
      In this case, the COACH architectural template will not be available for HPC and
      a SystemC VCI model corresponding to the PCI/X IP will be developped to allow