- Timestamp:
- Apr 14, 2009, 8:39:12 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end
- Files:
-
- 33 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/Makefile.defs
r83 r113 7 7 # 8 8 9 ENTITY = Context_State 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Instruction/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Instruction 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Decod 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/test.cpp
r112 r113 51 51 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 52 52 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 53 54 sc_signal<Tcontrol_t > *** in_IFETCH_VAL ;//[nb_context][nb_inst_fetch] 55 sc_signal<Tcontrol_t > *** out_IFETCH_ACK ;//[nb_context][nb_inst_fetch] 56 sc_signal<Tinstruction_t > *** in_IFETCH_INSTRUCTION ;//[nb_context][nb_inst_fetch] 57 sc_signal<Tcontext_t > ** in_IFETCH_CONTEXT_ID ;//[nb_context] 58 sc_signal<Tgeneral_address_t > ** in_IFETCH_ADDRESS ;//[nb_context] 59 //sc_signal<Tgeneral_address_t > ** in_IFETCH_ADDRESS_NEXT ;//[nb_context] 60 sc_signal<Tinst_ifetch_ptr_t > ** in_IFETCH_INST_IFETCH_PTR ;//[nb_context] 61 sc_signal<Tbranch_state_t > ** in_IFETCH_BRANCH_STATE ;//[nb_context] 62 sc_signal<Tprediction_ptr_t > ** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context] 63 sc_signal<Texception_t > ** in_IFETCH_EXCEPTION ;//[nb_context] 64 sc_signal<Tcontrol_t > ** out_DECOD_VAL ;//[nb_inst_decod] 65 sc_signal<Tcontrol_t > ** in_DECOD_ACK ;//[nb_inst_decod] 66 sc_signal<Tcontext_t > ** out_DECOD_CONTEXT_ID ;//[nb_inst_decod] 67 sc_signal<Tdepth_t > ** out_DECOD_DEPTH ;//[nb_inst_decod] 68 sc_signal<Ttype_t > ** out_DECOD_TYPE ;//[nb_inst_decod] 69 sc_signal<Toperation_t > ** out_DECOD_OPERATION ;//[nb_inst_decod] 70 sc_signal<Tcontrol_t > ** out_DECOD_NO_EXECUTE ;//[nb_inst_decod] 71 sc_signal<Tcontrol_t > ** out_DECOD_IS_DELAY_SLOT ;//[nb_inst_decod] 72 sc_signal<Tgeneral_data_t > ** out_DECOD_ADDRESS ;//[nb_inst_decod] 73 sc_signal<Tgeneral_data_t > ** out_DECOD_ADDRESS_NEXT ;//[nb_inst_decod] 74 sc_signal<Tcontrol_t > ** out_DECOD_HAS_IMMEDIAT ;//[nb_inst_decod] 75 sc_signal<Tgeneral_data_t > ** out_DECOD_IMMEDIAT ;//[nb_inst_decod] 76 sc_signal<Tcontrol_t > ** out_DECOD_READ_RA ;//[nb_inst_decod] 77 sc_signal<Tgeneral_address_t > ** out_DECOD_NUM_REG_RA ;//[nb_inst_decod] 78 sc_signal<Tcontrol_t > ** out_DECOD_READ_RB ;//[nb_inst_decod] 79 sc_signal<Tgeneral_address_t > ** out_DECOD_NUM_REG_RB ;//[nb_inst_decod] 80 sc_signal<Tcontrol_t > ** out_DECOD_READ_RC ;//[nb_inst_decod] 81 sc_signal<Tspecial_address_t > ** out_DECOD_NUM_REG_RC ;//[nb_inst_decod] 82 sc_signal<Tcontrol_t > ** out_DECOD_WRITE_RD ;//[nb_inst_decod] 83 sc_signal<Tgeneral_address_t > ** out_DECOD_NUM_REG_RD ;//[nb_inst_decod] 84 sc_signal<Tcontrol_t > ** out_DECOD_WRITE_RE ;//[nb_inst_decod] 85 sc_signal<Tspecial_address_t > ** out_DECOD_NUM_REG_RE ;//[nb_inst_decod] 86 sc_signal<Texception_t > ** out_DECOD_EXCEPTION_USE ;//[nb_inst_decod] 87 sc_signal<Texception_t > ** out_DECOD_EXCEPTION ;//[nb_inst_decod] 88 sc_signal<Tcontrol_t > ** out_PREDICT_VAL ;//[nb_inst_decod] 89 sc_signal<Tcontrol_t > ** in_PREDICT_ACK ;//[nb_inst_decod] 90 sc_signal<Tcontext_t > ** out_PREDICT_CONTEXT_ID ;//[nb_inst_decod] 91 sc_signal<Tcontrol_t > ** out_PREDICT_MATCH_INST_IFETCH_PTR ;//[nb_inst_decod] 92 sc_signal<Tbranch_state_t > ** out_PREDICT_BRANCH_STATE ;//[nb_inst_decod] 93 sc_signal<Tprediction_ptr_t > ** out_PREDICT_BRANCH_UPDATE_PREDICTION_ID;//[nb_inst_decod] 94 sc_signal<Tbranch_condition_t> ** out_PREDICT_BRANCH_CONDITION ;//[nb_inst_decod] 95 //sc_signal<Tcontrol_t > ** out_PREDICT_BRANCH_STACK_WRITE ;//[nb_inst_decod] 96 sc_signal<Tcontrol_t > ** out_PREDICT_BRANCH_DIRECTION ;//[nb_inst_decod] 97 sc_signal<Tgeneral_data_t > ** out_PREDICT_ADDRESS_SRC ;//[nb_inst_decod] 98 sc_signal<Tgeneral_data_t > ** out_PREDICT_ADDRESS_DEST ;//[nb_inst_decod] 99 sc_signal<Tcontrol_t > ** in_PREDICT_CAN_CONTINUE ;//[nb_inst_decod] 100 sc_signal<Tcontrol_t > ** in_CONTEXT_DECOD_ENABLE ;//[nb_context] 101 sc_signal<Tcontrol_t > ** in_CONTEXT_DEPTH_VAL ;//[nb_context] 102 sc_signal<Tdepth_t > ** in_CONTEXT_DEPTH ;//[nb_context] 103 sc_signal<Tcontrol_t > * out_CONTEXT_EVENT_VAL ; 104 sc_signal<Tcontrol_t > * in_CONTEXT_EVENT_ACK ; 105 sc_signal<Tcontext_t > * out_CONTEXT_EVENT_CONTEXT_ID ; 106 sc_signal<Tdepth_t > * out_CONTEXT_EVENT_DEPTH ; 107 sc_signal<Tevent_type_t > * out_CONTEXT_EVENT_TYPE ; 108 sc_signal<Tcontrol_t > * out_CONTEXT_EVENT_IS_DELAY_SLOT ; 109 sc_signal<Tgeneral_data_t > * out_CONTEXT_EVENT_ADDRESS ; 110 sc_signal<Tgeneral_data_t > * out_CONTEXT_EVENT_ADDRESS_EPCR ; 53 111 54 112 ALLOC2_SC_SIGNAL( in_IFETCH_VAL ," in_IFETCH_VAL ",Tcontrol_t ,_param->_nb_context,_param->_nb_inst_fetch[it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/Makefile.defs
r82 r113 7 7 # 8 8 9 ENTITY = Decod_queue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest/src/test.cpp
r111 r113 51 51 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 52 52 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 53 54 sc_signal<Tcontrol_t > ** in_DECOD_IN_VAL ;//[nb_inst_decod] 55 sc_signal<Tcontrol_t > ** out_DECOD_IN_ACK ;//[nb_inst_decod] 56 sc_signal<Tcontext_t > ** in_DECOD_IN_CONTEXT_ID ;//[nb_inst_decod] 57 sc_signal<Tdepth_t > ** in_DECOD_IN_DEPTH ;//[nb_inst_decod] 58 sc_signal<Ttype_t > ** in_DECOD_IN_TYPE ;//[nb_inst_decod] 59 sc_signal<Toperation_t > ** in_DECOD_IN_OPERATION ;//[nb_inst_decod] 60 sc_signal<Tcontrol_t > ** in_DECOD_IN_NO_EXECUTE ;//[nb_inst_decod] 61 sc_signal<Tcontrol_t > ** in_DECOD_IN_IS_DELAY_SLOT ;//[nb_inst_decod] 62 sc_signal<Tgeneral_data_t > ** in_DECOD_IN_ADDRESS ;//[nb_inst_decod] 63 sc_signal<Tgeneral_data_t > ** in_DECOD_IN_ADDRESS_NEXT ;//[nb_inst_decod] 64 sc_signal<Tcontrol_t > ** in_DECOD_IN_HAS_IMMEDIAT ;//[nb_inst_decod] 65 sc_signal<Tgeneral_data_t > ** in_DECOD_IN_IMMEDIAT ;//[nb_inst_decod] 66 sc_signal<Tcontrol_t > ** in_DECOD_IN_READ_RA ;//[nb_inst_decod] 67 sc_signal<Tgeneral_address_t > ** in_DECOD_IN_NUM_REG_RA ;//[nb_inst_decod] 68 sc_signal<Tcontrol_t > ** in_DECOD_IN_READ_RB ;//[nb_inst_decod] 69 sc_signal<Tgeneral_address_t > ** in_DECOD_IN_NUM_REG_RB ;//[nb_inst_decod] 70 sc_signal<Tcontrol_t > ** in_DECOD_IN_READ_RC ;//[nb_inst_decod] 71 sc_signal<Tspecial_address_t > ** in_DECOD_IN_NUM_REG_RC ;//[nb_inst_decod] 72 sc_signal<Tcontrol_t > ** in_DECOD_IN_WRITE_RD ;//[nb_inst_decod] 73 sc_signal<Tgeneral_address_t > ** in_DECOD_IN_NUM_REG_RD ;//[nb_inst_decod] 74 sc_signal<Tcontrol_t > ** in_DECOD_IN_WRITE_RE ;//[nb_inst_decod] 75 sc_signal<Tspecial_address_t > ** in_DECOD_IN_NUM_REG_RE ;//[nb_inst_decod] 76 sc_signal<Texception_t > ** in_DECOD_IN_EXCEPTION_USE ;//[nb_inst_decod] 77 sc_signal<Texception_t > ** in_DECOD_IN_EXCEPTION ;//[nb_inst_decod] 78 sc_signal<Tcontrol_t > ** out_DECOD_OUT_VAL ;//[nb_inst_decod] 79 sc_signal<Tcontrol_t > ** in_DECOD_OUT_ACK ;//[nb_inst_decod] 80 sc_signal<Tcontext_t > ** out_DECOD_OUT_CONTEXT_ID ;//[nb_inst_decod] 81 sc_signal<Tdepth_t > ** out_DECOD_OUT_DEPTH ;//[nb_inst_decod] 82 sc_signal<Ttype_t > ** out_DECOD_OUT_TYPE ;//[nb_inst_decod] 83 sc_signal<Toperation_t > ** out_DECOD_OUT_OPERATION ;//[nb_inst_decod] 84 sc_signal<Tcontrol_t > ** out_DECOD_OUT_NO_EXECUTE ;//[nb_inst_decod] 85 sc_signal<Tcontrol_t > ** out_DECOD_OUT_IS_DELAY_SLOT ;//[nb_inst_decod] 86 sc_signal<Tgeneral_data_t > ** out_DECOD_OUT_ADDRESS ;//[nb_inst_decod] 87 sc_signal<Tgeneral_data_t > ** out_DECOD_OUT_ADDRESS_NEXT ;//[nb_inst_decod] 88 sc_signal<Tcontrol_t > ** out_DECOD_OUT_HAS_IMMEDIAT ;//[nb_inst_decod] 89 sc_signal<Tgeneral_data_t > ** out_DECOD_OUT_IMMEDIAT ;//[nb_inst_decod] 90 sc_signal<Tcontrol_t > ** out_DECOD_OUT_READ_RA ;//[nb_inst_decod] 91 sc_signal<Tgeneral_address_t > ** out_DECOD_OUT_NUM_REG_RA ;//[nb_inst_decod] 92 sc_signal<Tcontrol_t > ** out_DECOD_OUT_READ_RB ;//[nb_inst_decod] 93 sc_signal<Tgeneral_address_t > ** out_DECOD_OUT_NUM_REG_RB ;//[nb_inst_decod] 94 sc_signal<Tcontrol_t > ** out_DECOD_OUT_READ_RC ;//[nb_inst_decod] 95 sc_signal<Tspecial_address_t > ** out_DECOD_OUT_NUM_REG_RC ;//[nb_inst_decod] 96 sc_signal<Tcontrol_t > ** out_DECOD_OUT_WRITE_RD ;//[nb_inst_decod] 97 sc_signal<Tgeneral_address_t > ** out_DECOD_OUT_NUM_REG_RD ;//[nb_inst_decod] 98 sc_signal<Tcontrol_t > ** out_DECOD_OUT_WRITE_RE ;//[nb_inst_decod] 99 sc_signal<Tspecial_address_t > ** out_DECOD_OUT_NUM_REG_RE ;//[nb_inst_decod] 100 sc_signal<Texception_t > ** out_DECOD_OUT_EXCEPTION_USE ;//[nb_inst_decod] 101 sc_signal<Texception_t > ** out_DECOD_OUT_EXCEPTION ;//[nb_inst_decod] 102 sc_signal<Tdepth_t > ** in_DEPTH_MIN ;//[nb_context] 103 sc_signal<Tdepth_t > ** in_DEPTH_MAX ;//[nb_context] 104 sc_signal<Tcontrol_t > ** in_DEPTH_FULL ;//[nb_context] 105 sc_signal<Tcounter_t > ** out_NB_INST_ALL ;//[nb_context] 53 106 54 107 ALLOC1_SC_SIGNAL( in_DECOD_IN_VAL ," in_DECOD_IN_VAL ",Tcontrol_t ,_param->_nb_inst_decod); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Makefile.defs
r83 r113 7 7 # 8 8 9 ENTITY = Decod_unit 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/Makefile.defs
r88 r113 7 7 # 8 8 9 ENTITY = Front_end_Glue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Address_management 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp
r112 r113 50 50 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 51 51 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 52 53 sc_signal<Tcontrol_t > * out_ADDRESS_VAL ; 54 sc_signal<Tcontrol_t > * in_ADDRESS_ACK ; //icache_req_ack and ifetch_queue_ack 55 sc_signal<Tgeneral_address_t> * out_ADDRESS_INSTRUCTION_ADDRESS ; 56 sc_signal<Tcontrol_t > ** out_ADDRESS_INSTRUCTION_ENABLE ; //[nb_instruction] 57 sc_signal<Tinst_ifetch_ptr_t> * out_ADDRESS_INST_IFETCH_PTR ; 58 sc_signal<Tbranch_state_t > * out_ADDRESS_BRANCH_STATE ; 59 sc_signal<Tprediction_ptr_t > * out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ; 60 sc_signal<Tcontrol_t > * out_PREDICT_VAL ; 61 sc_signal<Tcontrol_t > * in_PREDICT_ACK ; 62 sc_signal<Tgeneral_address_t> * out_PREDICT_PC_PREVIOUS ; 63 sc_signal<Tgeneral_address_t> * out_PREDICT_PC_CURRENT ; 64 sc_signal<Tcontrol_t > * out_PREDICT_PC_CURRENT_IS_DS_TAKE ; 65 sc_signal<Tgeneral_address_t> * in_PREDICT_PC_NEXT ; 66 sc_signal<Tcontrol_t > * in_PREDICT_PC_NEXT_IS_DS_TAKE ; 67 sc_signal<Tcontrol_t > ** in_PREDICT_INSTRUCTION_ENABLE ; //[nb_instruction] 68 //sc_signal<Tcontrol_t > * in_PREDICT_BRANCH_IS_CURRENT ; 69 sc_signal<Tbranch_state_t > * in_PREDICT_BRANCH_STATE ; 70 sc_signal<Tprediction_ptr_t > * in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ; 71 sc_signal<Tinst_ifetch_ptr_t> * in_PREDICT_INST_IFETCH_PTR ; 72 sc_signal<Tcontrol_t > * in_EVENT_VAL ; 73 sc_signal<Tcontrol_t > * out_EVENT_ACK ; 74 sc_signal<Tgeneral_address_t> * in_EVENT_ADDRESS ; 75 sc_signal<Tgeneral_address_t> * in_EVENT_ADDRESS_NEXT ; 76 sc_signal<Tcontrol_t > * in_EVENT_ADDRESS_NEXT_VAL ; 77 sc_signal<Tcontrol_t > * in_EVENT_IS_DS_TAKE ; 52 78 53 79 ALLOC0_SC_SIGNAL (out_ADDRESS_VAL ,"out_ADDRESS_VAL ",Tcontrol_t ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Ifetch_queue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/main.cpp
r88 r113 7 7 8 8 #include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/include/test.h" 9 9 #include "Behavioural/include/Selftest.h" 10 10 #define NB_PARAMS 4 11 11 … … 33 33 uint32_t x = 1; 34 34 35 string name = argv[x++]; 36 37 uint32_t _size_queue = fromString<uint32_t>(argv[x++]); 38 uint32_t _nb_instruction = fromString<uint32_t>(argv[x++]); 39 uint32_t _size_branch_update_prediction = fromString<uint32_t>(argv[x++]); 40 uint32_t _size_general_data = fromString<uint32_t>(argv[x++]); 35 string name; 36 uint32_t _size_queue ; 37 uint32_t _nb_instruction ; 38 uint32_t _size_branch_update_prediction; 39 uint32_t _size_general_data ; 40 41 SELFTEST0( name ,string ,argv,x); 42 SELFTEST0(_size_queue ,uint32_t,argv,x); 43 SELFTEST0(_nb_instruction ,uint32_t,argv,x); 44 SELFTEST0(_size_branch_update_prediction,uint32_t,argv,x); 45 SELFTEST0(_size_general_data ,uint32_t,argv,x); 41 46 42 47 int _return = EXIT_SUCCESS; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest/src/test.cpp
r112 r113 67 67 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 68 68 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 69 70 sc_signal<Tcontrol_t > * in_ADDRESS_VAL ; 71 sc_signal<Tcontrol_t > * out_ADDRESS_ACK ; 72 sc_signal<Tifetch_queue_ptr_t > * out_ADDRESS_IFETCH_QUEUE_ID ; 73 sc_signal<Tcontrol_t > ** in_ADDRESS_INSTRUCTION_ENABLE ;//[nb_instruction] 74 sc_signal<Tgeneral_address_t > * in_ADDRESS_INSTRUCTION_ADDRESS ; 75 sc_signal<Tinst_ifetch_ptr_t > * in_ADDRESS_INST_IFETCH_PTR ; 76 sc_signal<Tbranch_state_t > * in_ADDRESS_BRANCH_STATE ; 77 sc_signal<Tprediction_ptr_t > * in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ; 78 sc_signal<Tcontrol_t > ** out_DECOD_VAL ;//[nb_instruction] 79 sc_signal<Tcontrol_t > ** in_DECOD_ACK ;//[nb_instruction] 80 sc_signal<Tinstruction_t > ** out_DECOD_INSTRUCTION ;//[nb_instruction] 81 sc_signal<Tgeneral_address_t > * out_DECOD_ADDRESS ; 82 sc_signal<Tinst_ifetch_ptr_t > * out_DECOD_INST_IFETCH_PTR ; 83 sc_signal<Tbranch_state_t > * out_DECOD_BRANCH_STATE ; 84 sc_signal<Tprediction_ptr_t > * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; 85 sc_signal<Texception_t > * out_DECOD_EXCEPTION ; 86 sc_signal<Tcontrol_t > * in_ICACHE_RSP_VAL ; 87 sc_signal<Tcontrol_t > * out_ICACHE_RSP_ACK ; 88 sc_signal<Tpacket_t > * in_ICACHE_RSP_PACKET_ID ; 89 sc_signal<Ticache_instruction_t > ** in_ICACHE_RSP_INSTRUCTION ;//[nb_instruction] 90 sc_signal<Ticache_error_t > * in_ICACHE_RSP_ERROR ; 91 sc_signal<Tcontrol_t > * in_EVENT_RESET_VAL ;// val if : miss_speculation, exception, synchronization 92 sc_signal<Tcontrol_t > * out_EVENT_RESET_ACK ; 69 93 70 94 ALLOC0_SC_SIGNAL( in_ADDRESS_VAL ," in_ADDRESS_VAL ",Tcontrol_t ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp
r109 r113 18 18 namespace ifetch_queue { 19 19 20 21 20 #undef FUNCTION 22 21 #define FUNCTION "Ifetch_queue::msg_error" … … 28 27 29 28 if (not is_multiple (_nb_instruction_in_queue,_nb_instruction)) 30 test.error( "Size of ifetch queue must be a multiple of nb_instruction.\n");29 test.error(_("Size of ifetch queue must be a multiple of nb_instruction.\n")); 31 30 32 31 if (_size_queue == 1) 33 test.warning( "To best perfomance, size_queue must be > 1.\n");32 test.warning(_("To best perfomance, size_queue must be > 1.\n")); 34 33 35 34 log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Ifetch_unit_Glue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Ifetch_unit 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Makefile.defs
r88 r113 7 7 # 8 8 9 ENTITY = Front_end 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Branch_Target_Buffer_Glue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Branch_Target_Buffer_Register 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h
r82 r113 137 137 morpheo::behavioural::Tusage_t usage 138 138 ); 139 139 140 public : ~Branch_Target_Buffer_Register (void); 140 141 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register.cpp
r88 r113 8 8 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/include/Branch_Target_Buffer_Register.h" 9 9 10 namespace morpheo 10 namespace morpheo { 11 11 namespace behavioural { 12 12 namespace core { … … 16 16 namespace branch_target_buffer { 17 17 namespace branch_target_buffer_register { 18 19 18 20 19 #undef FUNCTION … … 33 32 morpheo::behavioural::Tusage_t usage 34 33 ): 35 _name 36 ,_param(param)37 ,_usage(usage)34 _name (name) 35 ,_param (param) 36 ,_usage (usage) 38 37 { 39 38 log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"Begin"); … … 160 159 } 161 160 162 # ifdef SYSTEMCASS_SPECIFIC163 // List dependency information164 for (uint32_t i=0; i<_param->_nb_inst_decod; i++)165 {166 (*(out_DECOD_HIT [i])) (*(in_DECOD_VAL [i]));167 (*(out_DECOD_HIT [i])) (*(in_DECOD_ADDRESS_SRC [i]));168 if (_param->_have_port_context_id)169 (*(out_DECOD_HIT [i])) (*(in_DECOD_CONTEXT_ID [i]));170 171 (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_VAL [i]));172 (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_ADDRESS_SRC [i]));173 if (_param->_have_port_context_id)174 (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_CONTEXT_ID [i]));175 }176 } 177 #endif 161 // # ifdef SYSTEMCASS_SPECIFIC 162 // // List dependency information 163 // for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 164 // { 165 // (*(out_DECOD_HIT [i])) (*(in_DECOD_VAL [i])); 166 // (*(out_DECOD_HIT [i])) (*(in_DECOD_ADDRESS_SRC [i])); 167 // if (_param->_have_port_context_id) 168 // (*(out_DECOD_HIT [i])) (*(in_DECOD_CONTEXT_ID [i])); 169 170 // (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_VAL [i])); 171 // (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_ADDRESS_SRC [i])); 172 // if (_param->_have_port_context_id) 173 // (*(out_DECOD_HIT_INDEX [i])) (*(in_DECOD_CONTEXT_ID [i])); 174 // } 175 // #endif 176 } 178 177 179 178 if (_param->_have_port_victim) … … 192 191 } 193 192 194 # ifdef SYSTEMCASS_SPECIFIC195 // List dependency information196 for (uint32_t i=0; i<_param->_nb_inst_update; i++)197 {198 (*(out_UPDATE_HIT [i])) (*(in_UPDATE_VAL [i]));199 (*(out_UPDATE_HIT [i])) (*(in_UPDATE_ADDRESS_SRC [i]));200 if (_param->_have_port_context_id)201 (*(out_UPDATE_HIT [i])) (*(in_UPDATE_CONTEXT_ID [i]));202 203 (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_VAL [i]));204 (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_ADDRESS_SRC [i]));205 if (_param->_have_port_context_id)206 (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_CONTEXT_ID [i]));207 }208 } 209 # endif 193 // # ifdef SYSTEMCASS_SPECIFIC 194 // // List dependency information 195 // for (uint32_t i=0; i<_param->_nb_inst_update; i++) 196 // { 197 // (*(out_UPDATE_HIT [i])) (*(in_UPDATE_VAL [i])); 198 // (*(out_UPDATE_HIT [i])) (*(in_UPDATE_ADDRESS_SRC [i])); 199 // if (_param->_have_port_context_id) 200 // (*(out_UPDATE_HIT [i])) (*(in_UPDATE_CONTEXT_ID [i])); 201 202 // (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_VAL [i])); 203 // (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_ADDRESS_SRC [i])); 204 // if (_param->_have_port_context_id) 205 // (*(out_UPDATE_HIT_INDEX [i])) (*(in_UPDATE_CONTEXT_ID [i])); 206 // } 207 // # endif 208 } 210 209 #endif 211 210 … … 229 228 log_printf(INFO,Branch_Target_Buffer_Register,FUNCTION,"Deallocation"); 230 229 deallocation (); 231 232 230 log_printf(FUNC,Branch_Target_Buffer_Register,FUNCTION,"End"); 233 231 }; … … 239 237 }; // end namespace multi_front_end 240 238 }; // end namespace core 241 242 239 }; // end namespace behavioural 243 }; // end namespace morpheo 240 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Branch_Target_Buffer 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Direction_Glue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Direction 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Makefile.defs
r110 r113 7 7 # 8 8 9 ENTITY = Meta_Predictor 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue/Makefile.defs
r110 r113 7 7 # 8 8 9 ENTITY = Meta_Predictor_Glue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/Makefile.defs
r110 r113 7 7 # 8 8 9 ENTITY = Two_Level_Branch_Predictor 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Prediction_unit 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Prediction_unit_Glue 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Return_Address_Stack 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile.defs
r81 r113 7 7 # 8 8 9 ENTITY = Update_Prediction_Table 10 9 11 #-----[ Directory ]---------------------------------------- 10 12 DIR_COMPONENT_MORPHEO = ../../../../../.. -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp
r112 r113 1276 1276 // TEST(Tcontrol_t ,out_UPDATE_RAS_FLUSH [port]->read(),0); 1277 1277 TEST(Tcontrol_t ,out_UPDATE_RAS_PUSH [port]->read(),push_ras (it_ufpt->condition)); 1278 LABEL("KANE : out_UPDATE_RAS_ADDRESS [port]->read() : %.8x",out_UPDATE_RAS_ADDRESS [port]->read());1279 LABEL("KANE : it_ufpt->ras_address : %.8x",it_ufpt->ras_address);1280 1281 1278 TEST(Taddress_t ,out_UPDATE_RAS_ADDRESS [port]->read(),it_ufpt->ras_address); 1282 1279 TEST(Tptr_t ,out_UPDATE_RAS_INDEX [port]->read(),it_ufpt->ras_index); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
r112 r113 117 117 << std::dec 118 118 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._good_take << " - " 119 << "[" << s c_simulation_time() << "] " << " "119 << "[" << simulation_cycle() << "] " << " " 120 120 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._miss_prediction << " " 121 121 << reg_UPDATE_PREDICTION_TABLE [i][bottom]._ifetch_prediction << " "
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