Ignore:
Timestamp:
Apr 5, 2007, 4:17:30 PM (17 years ago)
Author:
rosiere
Message:

Interface normalisé
Début du banc de registres multi niveaux

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp

    r3 r15  
    3030    // (because we have no control on the ordonnancer's policy)
    3131
     32    _vhdl_testbench->add_input  (PORT_READ( in_NRESET));
     33
    3234    for (uint32_t i=0; i<_param._nb_prediction; i++)
    3335      {
    3436        _vhdl_testbench->add_input  (PORT_READ( in_PREDICT_VAL     [i]));
    35         _vhdl_testbench->add_output (PORT_READ(out_PREDICT_ACK     [i]));
     37        _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_ACK  [i]));
    3638        _vhdl_testbench->add_input  (PORT_READ( in_PREDICT_ADDRESS [i]));
    3739        _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i]));
     
    4244       {
    4345         _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_VAL      [i]));
    44          _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_ACK      [i]));
     46         _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_WRITE_ACK [i]));
    4547         _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_ADDRESS  [i]));
    4648         _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_HISTORY  [i]));
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