Ignore:
Timestamp:
Dec 12, 2007, 5:02:47 PM (17 years ago)
Author:
rosiere
Message:

Station de reservation : systemC et VHDL ok

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural
Files:
1 added
1 deleted
21 edited
2 moved

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration.cfg

    r55 r69  
    11Reservation_station
    2 8       8       *2      # size_queue   
    3 4       4       *2      # nb_context         
    4 32      32      *2      # nb_packet         
     21       1       *2      # size_queue   
     31       1       *4      # nb_inst_retire
     41       1       *4      # nb_context         
     51       1       *4      # nb_front_end       
     64       4       *4      # nb_ooo_engine
     764      64      *2      # nb_packet         
    5816      16      +1      # size_general_data 
    6 8       8       +1      # size_special_data 
    7 16      16      *2      # nb_general_register
    8 16      16      +1      # nb_special_register
    9 40      40      +1      # nb_operation       
    10 6       6       +1      # nb_type           
    11 4       4       *2      # nb_gpr_write
    12 2       2       *2      # nb_spr_write
    13 4       4       *2      # nb_bypass_write
    14 2       2       *2      # nb_bypass_memory
     916      16      +1      # size_special_data 
     108       8       *2      # nb_general_register
     118       8       +1      # nb_special_register
     128       8       +1      # nb_operation       
     134       4       +1      # nb_type           
     141       1       *2      # nb_gpr_write
     151       1       *2      # nb_spr_write
     160       0       *2      # nb_bypass_write
     170       0       *2      # nb_bypass_memory

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/main.cpp

    r55 r69  
    88#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/include/test.h"
    99
    10 #define NB_PARAMS 0
     10#define NB_PARAMS 16
    1111
    1212void usage (int argc, char * argv[])
    … …  
    1515       << "list_params is :" << endl
    1616       << " - size_queue          (unsigned int)" << endl
     17       << " - nb_inst_retire      (unsigned int)" << endl
    1718       << " - nb_context          (unsigned int)" << endl
     19       << " - nb_front_end        (unsigned int)" << endl
     20       << " - nb_ooo_engine       (unsigned int)" << endl
    1821       << " - nb_packet           (unsigned int)" << endl
    1922       << " - size_general_data   (unsigned int)" << endl
    … …  
    4245#endif
    4346{
    44   if (argc < 2+NB_PARAMS)
     47  if (argc != 2+NB_PARAMS)
    4548    usage (argc, argv);
    4649
    47   const string   name      = argv[1];
    48   const uint32_t size_queue          = atoi(argv[ 2]);
    49   const uint32_t nb_context          = atoi(argv[ 3]);
    50   const uint32_t nb_packet           = atoi(argv[ 4]);
    51   const uint32_t size_general_data   = atoi(argv[ 5]);
    52   const uint32_t size_special_data   = atoi(argv[ 6]);
    53   const uint32_t nb_general_register = atoi(argv[ 7]);
    54   const uint32_t nb_special_register = atoi(argv[ 8]);
    55   const uint32_t nb_operation        = atoi(argv[ 9]);
    56   const uint32_t nb_type             = atoi(argv[10]);
    57   const uint32_t nb_gpr_write        = atoi(argv[11]);
    58   const uint32_t nb_spr_write        = atoi(argv[12]);
    59   const uint32_t nb_bypass_write     = atoi(argv[13]);
    60   const uint32_t nb_bypass_memory    = atoi(argv[14]);
     50  uint32_t x=1;
     51  const string   name                =      argv[x++];
     52  const uint32_t size_queue          = atoi(argv[x++]);
     53  const uint32_t nb_inst_retire      = atoi(argv[x++]);
     54  const uint32_t nb_context          = atoi(argv[x++]);
     55  const uint32_t nb_front_end        = atoi(argv[x++]);
     56  const uint32_t nb_ooo_engine       = atoi(argv[x++]);
     57  const uint32_t nb_packet           = atoi(argv[x++]);
     58  const uint32_t size_general_data   = atoi(argv[x++]);
     59  const uint32_t size_special_data   = atoi(argv[x++]);
     60  const uint32_t nb_general_register = atoi(argv[x++]);
     61  const uint32_t nb_special_register = atoi(argv[x++]);
     62  const uint32_t nb_operation        = atoi(argv[x++]);
     63  const uint32_t nb_type             = atoi(argv[x++]);
     64  const uint32_t nb_gpr_write        = atoi(argv[x++]);
     65  const uint32_t nb_spr_write        = atoi(argv[x++]);
     66  const uint32_t nb_bypass_write     = atoi(argv[x++]);
     67  const uint32_t nb_bypass_memory    = atoi(argv[x++]);
    6168 
    6269  try
    … …  
    6471      morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Parameters
    6572        (size_queue   
     73         ,nb_inst_retire     
    6674         ,nb_context         
     75         ,nb_front_end       
     76         ,nb_ooo_engine
    6777         ,nb_packet         
    6878         ,size_general_data 

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp

    r55 r69  
    1010#include "Common/include/Test.h"
    1111
    12 #define NB_ITERATION  16
    13 #define CYCLE_MAX     (512*NB_ITERATION)
     12#define NB_ITERATION  2
     13#define CYCLE_MAX     (2048*NB_ITERATION)
    1414
    1515#define LABEL(str)                                                                       \
    … …  
    6464  sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
    6565
    66   sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_VAL            = new sc_signal<Tcontrol_t        >;
    67   sc_signal<Tcontrol_t        > * out_RESERVATION_STATION_IN_ACK            = new sc_signal<Tcontrol_t        >;
    68   sc_signal<Tcontext_t        > *  in_RESERVATION_STATION_IN_CONTEXT_ID     = new sc_signal<Tcontext_t        >;
    69   sc_signal<Tpacket_t         > *  in_RESERVATION_STATION_IN_PACKET_ID      = new sc_signal<Tpacket_t         >;
    70   sc_signal<Toperation_t      > *  in_RESERVATION_STATION_IN_OPERATION      = new sc_signal<Toperation_t      >;
    71   sc_signal<Ttype_t           > *  in_RESERVATION_STATION_IN_TYPE           = new sc_signal<Ttype_t           >;
    72   sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_HAS_IMMEDIAT   = new sc_signal<Tcontrol_t        >;
    73   sc_signal<Tgeneral_data_t   > *  in_RESERVATION_STATION_IN_IMMEDIAT       = new sc_signal<Tgeneral_data_t   >;
    74 //sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_READ_RA        = new sc_signal<Tcontrol_t        >;
    75   sc_signal<Tgeneral_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RA     = new sc_signal<Tgeneral_address_t>;
    76   sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_DATA_RA_VAL    = new sc_signal<Tcontrol_t        >;
    77   sc_signal<Tgeneral_data_t   > *  in_RESERVATION_STATION_IN_DATA_RA        = new sc_signal<Tgeneral_data_t   >;
    78 //sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_READ_RB        = new sc_signal<Tcontrol_t        >;
    79   sc_signal<Tgeneral_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RB     = new sc_signal<Tgeneral_address_t>;
    80   sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_DATA_RB_VAL    = new sc_signal<Tcontrol_t        >;
    81   sc_signal<Tgeneral_data_t   > *  in_RESERVATION_STATION_IN_DATA_RB        = new sc_signal<Tgeneral_data_t   >;
    82 //sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_READ_RC        = new sc_signal<Tcontrol_t        >;
    83   sc_signal<Tspecial_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RC     = new sc_signal<Tspecial_address_t>;
    84   sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_DATA_RC_VAL    = new sc_signal<Tcontrol_t        >;
    85   sc_signal<Tspecial_data_t   > *  in_RESERVATION_STATION_IN_DATA_RC        = new sc_signal<Tspecial_data_t   >;
    86   sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_WRITE_RD       = new sc_signal<Tcontrol_t        >;
    87   sc_signal<Tgeneral_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RD     = new sc_signal<Tgeneral_address_t>;
    88   sc_signal<Tcontrol_t        > *  in_RESERVATION_STATION_IN_WRITE_RE       = new sc_signal<Tcontrol_t        >;
    89   sc_signal<Tspecial_address_t> *  in_RESERVATION_STATION_IN_NUM_REG_RE     = new sc_signal<Tspecial_address_t>;
    90 
    91   sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_VAL         = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
    92   sc_signal<Tcontrol_t        > **  in_RESERVATION_STATION_OUT_ACK         = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
    93   sc_signal<Tcontext_t        > ** out_RESERVATION_STATION_OUT_CONTEXT_ID  = new sc_signal<Tcontext_t        > * [_param->_size_queue];
    94   sc_signal<Tpacket_t         > ** out_RESERVATION_STATION_OUT_PACKET_ID   = new sc_signal<Tpacket_t         > * [_param->_size_queue];
    95   sc_signal<Toperation_t      > ** out_RESERVATION_STATION_OUT_OPERATION   = new sc_signal<Toperation_t      > * [_param->_size_queue];
    96   sc_signal<Ttype_t           > ** out_RESERVATION_STATION_OUT_TYPE        = new sc_signal<Ttype_t           > * [_param->_size_queue];
    97   sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_HAS_IMMEDIAT= new sc_signal<Tcontrol_t        > * [_param->_size_queue];
    98   sc_signal<Tgeneral_data_t   > ** out_RESERVATION_STATION_OUT_IMMEDIAT    = new sc_signal<Tgeneral_data_t   > * [_param->_size_queue];
    99   sc_signal<Tgeneral_data_t   > ** out_RESERVATION_STATION_OUT_DATA_RA     = new sc_signal<Tgeneral_data_t   > * [_param->_size_queue];
    100   sc_signal<Tgeneral_data_t   > ** out_RESERVATION_STATION_OUT_DATA_RB     = new sc_signal<Tgeneral_data_t   > * [_param->_size_queue];
    101   sc_signal<Tspecial_data_t   > ** out_RESERVATION_STATION_OUT_DATA_RC     = new sc_signal<Tspecial_data_t   > * [_param->_size_queue];
    102   sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_WRITE_RD    = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
    103   sc_signal<Tgeneral_address_t> ** out_RESERVATION_STATION_OUT_NUM_REG_RD  = new sc_signal<Tgeneral_address_t> * [_param->_size_queue];
    104   sc_signal<Tcontrol_t        > ** out_RESERVATION_STATION_OUT_WRITE_RE    = new sc_signal<Tcontrol_t        > * [_param->_size_queue];
    105   sc_signal<Tspecial_address_t> ** out_RESERVATION_STATION_OUT_NUM_REG_RE  = new sc_signal<Tspecial_address_t> * [_param->_size_queue];
     66  sc_signal<Tcontrol_t        > *  in_INSERT_VAL            = new sc_signal<Tcontrol_t        >;
     67  sc_signal<Tcontrol_t        > * out_INSERT_ACK            = new sc_signal<Tcontrol_t        >;
     68  sc_signal<Tcontext_t        > *  in_INSERT_CONTEXT_ID     = new sc_signal<Tcontext_t        >;
     69  sc_signal<Tcontext_t        > *  in_INSERT_FRONT_END_ID   = new sc_signal<Tcontext_t        >;
     70  sc_signal<Tcontext_t        > *  in_INSERT_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        >;
     71  sc_signal<Tpacket_t         > *  in_INSERT_ROB_ID         = new sc_signal<Tpacket_t         >;
     72  sc_signal<Toperation_t      > *  in_INSERT_OPERATION      = new sc_signal<Toperation_t      >;
     73  sc_signal<Ttype_t           > *  in_INSERT_TYPE           = new sc_signal<Ttype_t           >;
     74  sc_signal<Tcontrol_t        > *  in_INSERT_HAS_IMMEDIAT   = new sc_signal<Tcontrol_t        >;
     75  sc_signal<Tgeneral_data_t   > *  in_INSERT_IMMEDIAT       = new sc_signal<Tgeneral_data_t   >;
     76//sc_signal<Tcontrol_t        > *  in_INSERT_READ_RA        = new sc_signal<Tcontrol_t        >;
     77  sc_signal<Tgeneral_address_t> *  in_INSERT_NUM_REG_RA     = new sc_signal<Tgeneral_address_t>;
     78  sc_signal<Tcontrol_t        > *  in_INSERT_DATA_RA_VAL    = new sc_signal<Tcontrol_t        >;
     79  sc_signal<Tgeneral_data_t   > *  in_INSERT_DATA_RA        = new sc_signal<Tgeneral_data_t   >;
     80//sc_signal<Tcontrol_t        > *  in_INSERT_READ_RB        = new sc_signal<Tcontrol_t        >;
     81  sc_signal<Tgeneral_address_t> *  in_INSERT_NUM_REG_RB     = new sc_signal<Tgeneral_address_t>;
     82  sc_signal<Tcontrol_t        > *  in_INSERT_DATA_RB_VAL    = new sc_signal<Tcontrol_t        >;
     83  sc_signal<Tgeneral_data_t   > *  in_INSERT_DATA_RB        = new sc_signal<Tgeneral_data_t   >;
     84//sc_signal<Tcontrol_t        > *  in_INSERT_READ_RC        = new sc_signal<Tcontrol_t        >;
     85  sc_signal<Tspecial_address_t> *  in_INSERT_NUM_REG_RC     = new sc_signal<Tspecial_address_t>;
     86  sc_signal<Tcontrol_t        > *  in_INSERT_DATA_RC_VAL    = new sc_signal<Tcontrol_t        >;
     87  sc_signal<Tspecial_data_t   > *  in_INSERT_DATA_RC        = new sc_signal<Tspecial_data_t   >;
     88  sc_signal<Tcontrol_t        > *  in_INSERT_WRITE_RD       = new sc_signal<Tcontrol_t        >;
     89  sc_signal<Tgeneral_address_t> *  in_INSERT_NUM_REG_RD     = new sc_signal<Tgeneral_address_t>;
     90  sc_signal<Tcontrol_t        > *  in_INSERT_WRITE_RE       = new sc_signal<Tcontrol_t        >;
     91  sc_signal<Tspecial_address_t> *  in_INSERT_NUM_REG_RE     = new sc_signal<Tspecial_address_t>;
     92
     93  sc_signal<Tcontrol_t        > ** out_RETIRE_VAL            = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
     94  sc_signal<Tcontrol_t        > **  in_RETIRE_ACK            = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
     95  sc_signal<Tcontext_t        > ** out_RETIRE_CONTEXT_ID     = new sc_signal<Tcontext_t        > * [_param->_nb_inst_retire];
     96  sc_signal<Tcontext_t        > ** out_RETIRE_FRONT_END_ID   = new sc_signal<Tcontext_t        > * [_param->_nb_inst_retire];
     97  sc_signal<Tcontext_t        > ** out_RETIRE_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_inst_retire];
     98  sc_signal<Tpacket_t         > ** out_RETIRE_ROB_ID         = new sc_signal<Tpacket_t         > * [_param->_nb_inst_retire];
     99  sc_signal<Toperation_t      > ** out_RETIRE_OPERATION      = new sc_signal<Toperation_t      > * [_param->_nb_inst_retire];
     100  sc_signal<Ttype_t           > ** out_RETIRE_TYPE           = new sc_signal<Ttype_t           > * [_param->_nb_inst_retire];
     101  sc_signal<Tcontrol_t        > ** out_RETIRE_HAS_IMMEDIAT   = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
     102  sc_signal<Tgeneral_data_t   > ** out_RETIRE_IMMEDIAT       = new sc_signal<Tgeneral_data_t   > * [_param->_nb_inst_retire];
     103  sc_signal<Tgeneral_data_t   > ** out_RETIRE_DATA_RA        = new sc_signal<Tgeneral_data_t   > * [_param->_nb_inst_retire];
     104  sc_signal<Tgeneral_data_t   > ** out_RETIRE_DATA_RB        = new sc_signal<Tgeneral_data_t   > * [_param->_nb_inst_retire];
     105  sc_signal<Tspecial_data_t   > ** out_RETIRE_DATA_RC        = new sc_signal<Tspecial_data_t   > * [_param->_nb_inst_retire];
     106  sc_signal<Tcontrol_t        > ** out_RETIRE_WRITE_RD       = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
     107  sc_signal<Tgeneral_address_t> ** out_RETIRE_NUM_REG_RD     = new sc_signal<Tgeneral_address_t> * [_param->_nb_inst_retire];
     108  sc_signal<Tcontrol_t        > ** out_RETIRE_WRITE_RE       = new sc_signal<Tcontrol_t        > * [_param->_nb_inst_retire];
     109  sc_signal<Tspecial_address_t> ** out_RETIRE_NUM_REG_RE     = new sc_signal<Tspecial_address_t> * [_param->_nb_inst_retire];
    106110   
    107   for (uint32_t i=0; i<_param->_size_queue; i++)
     111  for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
    108112    {
    109       out_RESERVATION_STATION_OUT_VAL          [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    110        in_RESERVATION_STATION_OUT_ACK          [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    111       out_RESERVATION_STATION_OUT_CONTEXT_ID   [i] = new sc_signal<Tcontext_t        > (rename.c_str());
    112       out_RESERVATION_STATION_OUT_PACKET_ID    [i] = new sc_signal<Tpacket_t         > (rename.c_str());
    113       out_RESERVATION_STATION_OUT_OPERATION    [i] = new sc_signal<Toperation_t      > (rename.c_str());
    114       out_RESERVATION_STATION_OUT_TYPE         [i] = new sc_signal<Ttype_t           > (rename.c_str());
    115       out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    116       out_RESERVATION_STATION_OUT_IMMEDIAT     [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    117       out_RESERVATION_STATION_OUT_DATA_RA      [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    118       out_RESERVATION_STATION_OUT_DATA_RB      [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    119       out_RESERVATION_STATION_OUT_DATA_RC      [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
    120       out_RESERVATION_STATION_OUT_WRITE_RD     [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    121       out_RESERVATION_STATION_OUT_NUM_REG_RD   [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
    122       out_RESERVATION_STATION_OUT_WRITE_RE     [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    123       out_RESERVATION_STATION_OUT_NUM_REG_RE   [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
     113      out_RETIRE_VAL             [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     114       in_RETIRE_ACK             [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     115      out_RETIRE_CONTEXT_ID      [i] = new sc_signal<Tcontext_t        > (rename.c_str());
     116      out_RETIRE_FRONT_END_ID    [i] = new sc_signal<Tcontext_t        > (rename.c_str());
     117      out_RETIRE_OOO_ENGINE_ID   [i] = new sc_signal<Tcontext_t        > (rename.c_str());
     118      out_RETIRE_ROB_ID          [i] = new sc_signal<Tpacket_t         > (rename.c_str());
     119      out_RETIRE_OPERATION       [i] = new sc_signal<Toperation_t      > (rename.c_str());
     120      out_RETIRE_TYPE            [i] = new sc_signal<Ttype_t           > (rename.c_str());
     121      out_RETIRE_HAS_IMMEDIAT    [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     122      out_RETIRE_IMMEDIAT        [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     123      out_RETIRE_DATA_RA         [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     124      out_RETIRE_DATA_RB         [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     125      out_RETIRE_DATA_RC         [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
     126      out_RETIRE_WRITE_RD        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     127      out_RETIRE_NUM_REG_RD      [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
     128      out_RETIRE_WRITE_RE        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     129      out_RETIRE_NUM_REG_RE      [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
    124130    }
    125131
    126   sc_signal<Tcontrol_t        > ** in_GPR_WRITE_VAL        = new sc_signal<Tcontrol_t        > * [_param->_nb_gpr_write];
    127   sc_signal<Tcontext_t        > ** in_GPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t        > * [_param->_nb_gpr_write];
    128   sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG    = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
    129   sc_signal<Tgeneral_data_t   > ** in_GPR_WRITE_DATA       = new sc_signal<Tgeneral_data_t   > * [_param->_nb_gpr_write];
     132  sc_signal<Tcontrol_t        > ** in_GPR_WRITE_VAL           = new sc_signal<Tcontrol_t        > * [_param->_nb_gpr_write];
     133  sc_signal<Tcontext_t        > ** in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t        > * [_param->_nb_gpr_write];
     134  sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG       = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
     135  sc_signal<Tgeneral_data_t   > ** in_GPR_WRITE_DATA          = new sc_signal<Tgeneral_data_t   > * [_param->_nb_gpr_write];
    130136   
    131137  for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
    132138    {
    133       in_GPR_WRITE_VAL        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    134       in_GPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
    135       in_GPR_WRITE_NUM_REG    [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
    136       in_GPR_WRITE_DATA       [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     139      in_GPR_WRITE_VAL           [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     140      in_GPR_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
     141      in_GPR_WRITE_NUM_REG       [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
     142      in_GPR_WRITE_DATA          [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    137143    }
    138144 
    139   sc_signal<Tcontrol_t        > ** in_SPR_WRITE_VAL       = new sc_signal<Tcontrol_t        > * [_param->_nb_spr_write];
    140   sc_signal<Tcontext_t        > ** in_SPR_WRITE_CONTEXT_ID= new sc_signal<Tcontext_t        > * [_param->_nb_spr_write];
    141   sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG   = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
    142   sc_signal<Tspecial_data_t   > ** in_SPR_WRITE_DATA      = new sc_signal<Tspecial_data_t   > * [_param->_nb_spr_write];
     145  sc_signal<Tcontrol_t        > ** in_SPR_WRITE_VAL          = new sc_signal<Tcontrol_t        > * [_param->_nb_spr_write];
     146  sc_signal<Tcontext_t        > ** in_SPR_WRITE_OOO_ENGINE_ID= new sc_signal<Tcontext_t        > * [_param->_nb_spr_write];
     147  sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG      = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
     148  sc_signal<Tspecial_data_t   > ** in_SPR_WRITE_DATA         = new sc_signal<Tspecial_data_t   > * [_param->_nb_spr_write];
    143149   
    144150  for (uint32_t i=0; i<_param->_nb_spr_write; i++)
    145151    {
    146       in_SPR_WRITE_VAL        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    147       in_SPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
    148       in_SPR_WRITE_NUM_REG    [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
    149       in_SPR_WRITE_DATA       [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
     152      in_SPR_WRITE_VAL           [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     153      in_SPR_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
     154      in_SPR_WRITE_NUM_REG       [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
     155      in_SPR_WRITE_DATA          [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
    150156    }
    151157
    152   sc_signal<Tcontext_t        > ** in_BYPASS_WRITE_CONTEXT_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_write];
    153   sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_GPR_VAL     = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
    154   sc_signal<Tgeneral_address_t> ** in_BYPASS_WRITE_GPR_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_write];
    155   sc_signal<Tgeneral_data_t   > ** in_BYPASS_WRITE_GPR_DATA    = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_write];
    156   sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_SPR_VAL     = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
    157   sc_signal<Tspecial_address_t> ** in_BYPASS_WRITE_SPR_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_bypass_write];
    158   sc_signal<Tspecial_data_t   > ** in_BYPASS_WRITE_SPR_DATA    = new sc_signal<Tspecial_data_t   > * [_param->_nb_bypass_write];
     158  sc_signal<Tcontext_t        > ** in_BYPASS_WRITE_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_write];
     159  sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_GPR_VAL        = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
     160  sc_signal<Tgeneral_address_t> ** in_BYPASS_WRITE_GPR_NUM_REG    = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_write];
     161  sc_signal<Tgeneral_data_t   > ** in_BYPASS_WRITE_GPR_DATA       = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_write];
     162  sc_signal<Tcontrol_t        > ** in_BYPASS_WRITE_SPR_VAL        = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_write];
     163  sc_signal<Tspecial_address_t> ** in_BYPASS_WRITE_SPR_NUM_REG    = new sc_signal<Tspecial_address_t> * [_param->_nb_bypass_write];
     164  sc_signal<Tspecial_data_t   > ** in_BYPASS_WRITE_SPR_DATA       = new sc_signal<Tspecial_data_t   > * [_param->_nb_bypass_write];
    159165
    160166  for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
    161167    {
    162       in_BYPASS_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
    163       in_BYPASS_WRITE_GPR_VAL    [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    164       in_BYPASS_WRITE_GPR_NUM_REG[i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
    165       in_BYPASS_WRITE_GPR_DATA   [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    166       in_BYPASS_WRITE_SPR_VAL    [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    167       in_BYPASS_WRITE_SPR_NUM_REG[i] = new sc_signal<Tspecial_address_t> (rename.c_str());
    168       in_BYPASS_WRITE_SPR_DATA   [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
     168      in_BYPASS_WRITE_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
     169      in_BYPASS_WRITE_GPR_VAL       [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     170      in_BYPASS_WRITE_GPR_NUM_REG   [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
     171      in_BYPASS_WRITE_GPR_DATA      [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     172      in_BYPASS_WRITE_SPR_VAL       [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     173      in_BYPASS_WRITE_SPR_NUM_REG   [i] = new sc_signal<Tspecial_address_t> (rename.c_str());
     174      in_BYPASS_WRITE_SPR_DATA      [i] = new sc_signal<Tspecial_data_t   > (rename.c_str());
    169175    }
    170   sc_signal<Tcontrol_t        > ** in_BYPASS_MEMORY_VAL         = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
    171   sc_signal<Tcontext_t        > ** in_BYPASS_MEMORY_CONTEXT_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
    172   sc_signal<Tgeneral_address_t> ** in_BYPASS_MEMORY_NUM_REG     = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
    173   sc_signal<Tgeneral_data_t   > ** in_BYPASS_MEMORY_DATA        = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
     176  sc_signal<Tcontrol_t        > ** in_BYPASS_MEMORY_VAL            = new sc_signal<Tcontrol_t        > * [_param->_nb_bypass_memory];
     177  sc_signal<Tcontext_t        > ** in_BYPASS_MEMORY_OOO_ENGINE_ID  = new sc_signal<Tcontext_t        > * [_param->_nb_bypass_memory];
     178  sc_signal<Tgeneral_address_t> ** in_BYPASS_MEMORY_NUM_REG        = new sc_signal<Tgeneral_address_t> * [_param->_nb_bypass_memory];
     179  sc_signal<Tgeneral_data_t   > ** in_BYPASS_MEMORY_DATA           = new sc_signal<Tgeneral_data_t   > * [_param->_nb_bypass_memory];
    174180
    175181  for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
    176182    {
    177       in_BYPASS_MEMORY_VAL        [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
    178       in_BYPASS_MEMORY_CONTEXT_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
    179       in_BYPASS_MEMORY_NUM_REG    [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
    180       in_BYPASS_MEMORY_DATA       [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
     183      in_BYPASS_MEMORY_VAL           [i] = new sc_signal<Tcontrol_t        > (rename.c_str());
     184      in_BYPASS_MEMORY_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t        > (rename.c_str());
     185      in_BYPASS_MEMORY_NUM_REG       [i] = new sc_signal<Tgeneral_address_t> (rename.c_str());
     186      in_BYPASS_MEMORY_DATA          [i] = new sc_signal<Tgeneral_data_t   > (rename.c_str());
    181187    }
    182188   
    … …  
    190196  (*(_Reservation_station->in_NRESET))       (*(in_NRESET));
    191197
    192   (*(_Reservation_station-> in_RESERVATION_STATION_IN_VAL              )) (*( in_RESERVATION_STATION_IN_VAL              ));
    193   (*(_Reservation_station->out_RESERVATION_STATION_IN_ACK              )) (*(out_RESERVATION_STATION_IN_ACK              ));
    194   (*(_Reservation_station-> in_RESERVATION_STATION_IN_CONTEXT_ID       )) (*( in_RESERVATION_STATION_IN_CONTEXT_ID       ));
    195   (*(_Reservation_station-> in_RESERVATION_STATION_IN_PACKET_ID        )) (*( in_RESERVATION_STATION_IN_PACKET_ID        ));
    196   (*(_Reservation_station-> in_RESERVATION_STATION_IN_OPERATION        )) (*( in_RESERVATION_STATION_IN_OPERATION        ));
    197   (*(_Reservation_station-> in_RESERVATION_STATION_IN_TYPE             )) (*( in_RESERVATION_STATION_IN_TYPE             ));
    198   (*(_Reservation_station-> in_RESERVATION_STATION_IN_HAS_IMMEDIAT     )) (*( in_RESERVATION_STATION_IN_HAS_IMMEDIAT     ));
    199   (*(_Reservation_station-> in_RESERVATION_STATION_IN_IMMEDIAT         )) (*( in_RESERVATION_STATION_IN_IMMEDIAT         ));
    200 //   (*(_Reservation_station-> in_RESERVATION_STATION_IN_READ_RA          )) (*( in_RESERVATION_STATION_IN_READ_RA          ));
    201   (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RA       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RA       ));
    202   (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RA_VAL      )) (*( in_RESERVATION_STATION_IN_DATA_RA_VAL      ));
    203   (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RA          )) (*( in_RESERVATION_STATION_IN_DATA_RA          ));
    204 //   (*(_Reservation_station-> in_RESERVATION_STATION_IN_READ_RB          )) (*( in_RESERVATION_STATION_IN_READ_RB          ));
    205   (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RB       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RB       ));
    206   (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RB_VAL      )) (*( in_RESERVATION_STATION_IN_DATA_RB_VAL      ));
    207   (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RB          )) (*( in_RESERVATION_STATION_IN_DATA_RB          ));
    208 //   (*(_Reservation_station-> in_RESERVATION_STATION_IN_READ_RC          )) (*( in_RESERVATION_STATION_IN_READ_RC          ));
    209   (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RC       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RC       ));
    210   (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RC_VAL      )) (*( in_RESERVATION_STATION_IN_DATA_RC_VAL      ));
    211   (*(_Reservation_station-> in_RESERVATION_STATION_IN_DATA_RC          )) (*( in_RESERVATION_STATION_IN_DATA_RC          ));
    212   (*(_Reservation_station-> in_RESERVATION_STATION_IN_WRITE_RD         )) (*( in_RESERVATION_STATION_IN_WRITE_RD         ));
    213   (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RD       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RD       ));
    214   (*(_Reservation_station-> in_RESERVATION_STATION_IN_WRITE_RE         )) (*( in_RESERVATION_STATION_IN_WRITE_RE         ));
    215   (*(_Reservation_station-> in_RESERVATION_STATION_IN_NUM_REG_RE       )) (*( in_RESERVATION_STATION_IN_NUM_REG_RE       ));
    216 
    217     for (uint32_t i=0; i<_param->_size_queue; i++)
     198  (*(_Reservation_station-> in_INSERT_VAL              )) (*( in_INSERT_VAL              ));
     199  (*(_Reservation_station->out_INSERT_ACK              )) (*(out_INSERT_ACK              ));
     200  if (_param->_have_port_context_id)
     201  (*(_Reservation_station-> in_INSERT_CONTEXT_ID       )) (*( in_INSERT_CONTEXT_ID       ));
     202  if (_param->_have_port_front_end_id)
     203  (*(_Reservation_station-> in_INSERT_FRONT_END_ID     )) (*( in_INSERT_FRONT_END_ID     ));
     204  if (_param->_have_port_ooo_engine_id)
     205  (*(_Reservation_station-> in_INSERT_OOO_ENGINE_ID    )) (*( in_INSERT_OOO_ENGINE_ID    ));
     206  if (_param->_have_port_rob_id)
     207  (*(_Reservation_station-> in_INSERT_ROB_ID           )) (*( in_INSERT_ROB_ID           ));
     208  (*(_Reservation_station-> in_INSERT_OPERATION        )) (*( in_INSERT_OPERATION        ));
     209  (*(_Reservation_station-> in_INSERT_TYPE             )) (*( in_INSERT_TYPE             ));
     210  (*(_Reservation_station-> in_INSERT_HAS_IMMEDIAT     )) (*( in_INSERT_HAS_IMMEDIAT     ));
     211  (*(_Reservation_station-> in_INSERT_IMMEDIAT         )) (*( in_INSERT_IMMEDIAT         ));
     212//   (*(_Reservation_station-> in_INSERT_READ_RA          )) (*( in_INSERT_READ_RA          ));
     213  (*(_Reservation_station-> in_INSERT_NUM_REG_RA       )) (*( in_INSERT_NUM_REG_RA       ));
     214  (*(_Reservation_station-> in_INSERT_DATA_RA_VAL      )) (*( in_INSERT_DATA_RA_VAL      ));
     215  (*(_Reservation_station-> in_INSERT_DATA_RA          )) (*( in_INSERT_DATA_RA          ));
     216//   (*(_Reservation_station-> in_INSERT_READ_RB          )) (*( in_INSERT_READ_RB          ));
     217  (*(_Reservation_station-> in_INSERT_NUM_REG_RB       )) (*( in_INSERT_NUM_REG_RB       ));
     218  (*(_Reservation_station-> in_INSERT_DATA_RB_VAL      )) (*( in_INSERT_DATA_RB_VAL      ));
     219  (*(_Reservation_station-> in_INSERT_DATA_RB          )) (*( in_INSERT_DATA_RB          ));
     220//   (*(_Reservation_station-> in_INSERT_READ_RC          )) (*( in_INSERT_READ_RC          ));
     221  (*(_Reservation_station-> in_INSERT_NUM_REG_RC       )) (*( in_INSERT_NUM_REG_RC       ));
     222  (*(_Reservation_station-> in_INSERT_DATA_RC_VAL      )) (*( in_INSERT_DATA_RC_VAL      ));
     223  (*(_Reservation_station-> in_INSERT_DATA_RC          )) (*( in_INSERT_DATA_RC          ));
     224  (*(_Reservation_station-> in_INSERT_WRITE_RD         )) (*( in_INSERT_WRITE_RD         ));
     225  (*(_Reservation_station-> in_INSERT_NUM_REG_RD       )) (*( in_INSERT_NUM_REG_RD       ));
     226  (*(_Reservation_station-> in_INSERT_WRITE_RE         )) (*( in_INSERT_WRITE_RE         ));
     227  (*(_Reservation_station-> in_INSERT_NUM_REG_RE       )) (*( in_INSERT_NUM_REG_RE       ));
     228
     229    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
    218230      {
    219   (*(_Reservation_station->out_RESERVATION_STATION_OUT_VAL          [i])) (*(out_RESERVATION_STATION_OUT_VAL          [i]));
    220   (*(_Reservation_station-> in_RESERVATION_STATION_OUT_ACK          [i])) (*( in_RESERVATION_STATION_OUT_ACK          [i]));
    221   (*(_Reservation_station->out_RESERVATION_STATION_OUT_CONTEXT_ID   [i])) (*(out_RESERVATION_STATION_OUT_CONTEXT_ID   [i]));
    222   (*(_Reservation_station->out_RESERVATION_STATION_OUT_PACKET_ID    [i])) (*(out_RESERVATION_STATION_OUT_PACKET_ID    [i]));
    223   (*(_Reservation_station->out_RESERVATION_STATION_OUT_OPERATION    [i])) (*(out_RESERVATION_STATION_OUT_OPERATION    [i]));
    224   (*(_Reservation_station->out_RESERVATION_STATION_OUT_TYPE         [i])) (*(out_RESERVATION_STATION_OUT_TYPE         [i]));
    225   (*(_Reservation_station->out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i])) (*(out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i]));
    226   (*(_Reservation_station->out_RESERVATION_STATION_OUT_IMMEDIAT     [i])) (*(out_RESERVATION_STATION_OUT_IMMEDIAT     [i]));
    227   (*(_Reservation_station->out_RESERVATION_STATION_OUT_DATA_RA      [i])) (*(out_RESERVATION_STATION_OUT_DATA_RA      [i]));
    228   (*(_Reservation_station->out_RESERVATION_STATION_OUT_DATA_RB      [i])) (*(out_RESERVATION_STATION_OUT_DATA_RB      [i]));
    229   (*(_Reservation_station->out_RESERVATION_STATION_OUT_DATA_RC      [i])) (*(out_RESERVATION_STATION_OUT_DATA_RC      [i]));
    230   (*(_Reservation_station->out_RESERVATION_STATION_OUT_WRITE_RD     [i])) (*(out_RESERVATION_STATION_OUT_WRITE_RD     [i]));
    231   (*(_Reservation_station->out_RESERVATION_STATION_OUT_NUM_REG_RD   [i])) (*(out_RESERVATION_STATION_OUT_NUM_REG_RD   [i]));
    232   (*(_Reservation_station->out_RESERVATION_STATION_OUT_WRITE_RE     [i])) (*(out_RESERVATION_STATION_OUT_WRITE_RE     [i]));
    233   (*(_Reservation_station->out_RESERVATION_STATION_OUT_NUM_REG_RE   [i])) (*(out_RESERVATION_STATION_OUT_NUM_REG_RE   [i]));
     231  (*(_Reservation_station->out_RETIRE_VAL            [i])) (*(out_RETIRE_VAL            [i]));
     232  (*(_Reservation_station-> in_RETIRE_ACK            [i])) (*( in_RETIRE_ACK            [i]));
     233  if (_param->_have_port_context_id)
     234  (*(_Reservation_station->out_RETIRE_CONTEXT_ID     [i])) (*(out_RETIRE_CONTEXT_ID     [i]));
     235  if (_param->_have_port_front_end_id)
     236  (*(_Reservation_station->out_RETIRE_FRONT_END_ID   [i])) (*(out_RETIRE_FRONT_END_ID   [i]));
     237  if (_param->_have_port_ooo_engine_id)
     238  (*(_Reservation_station->out_RETIRE_OOO_ENGINE_ID  [i])) (*(out_RETIRE_OOO_ENGINE_ID  [i]));
     239  if (_param->_have_port_rob_id)
     240  (*(_Reservation_station->out_RETIRE_ROB_ID         [i])) (*(out_RETIRE_ROB_ID         [i]));
     241  (*(_Reservation_station->out_RETIRE_OPERATION      [i])) (*(out_RETIRE_OPERATION      [i]));
     242  (*(_Reservation_station->out_RETIRE_TYPE           [i])) (*(out_RETIRE_TYPE           [i]));
     243  (*(_Reservation_station->out_RETIRE_HAS_IMMEDIAT   [i])) (*(out_RETIRE_HAS_IMMEDIAT   [i]));
     244  (*(_Reservation_station->out_RETIRE_IMMEDIAT       [i])) (*(out_RETIRE_IMMEDIAT       [i]));
     245  (*(_Reservation_station->out_RETIRE_DATA_RA        [i])) (*(out_RETIRE_DATA_RA        [i]));
     246  (*(_Reservation_station->out_RETIRE_DATA_RB        [i])) (*(out_RETIRE_DATA_RB        [i]));
     247  (*(_Reservation_station->out_RETIRE_DATA_RC        [i])) (*(out_RETIRE_DATA_RC        [i]));
     248  (*(_Reservation_station->out_RETIRE_WRITE_RD       [i])) (*(out_RETIRE_WRITE_RD       [i]));
     249  (*(_Reservation_station->out_RETIRE_NUM_REG_RD     [i])) (*(out_RETIRE_NUM_REG_RD     [i]));
     250  (*(_Reservation_station->out_RETIRE_WRITE_RE       [i])) (*(out_RETIRE_WRITE_RE       [i]));
     251  (*(_Reservation_station->out_RETIRE_NUM_REG_RE     [i])) (*(out_RETIRE_NUM_REG_RE     [i]));
    234252      }
    235253    for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
    236254      {
    237255  (*(_Reservation_station-> in_GPR_WRITE_VAL                        [i])) (*( in_GPR_WRITE_VAL                        [i]));
    238   (*(_Reservation_station-> in_GPR_WRITE_CONTEXT_ID                 [i])) (*( in_GPR_WRITE_CONTEXT_ID                 [i]));
     256  if (_param->_have_port_ooo_engine_id)
     257  (*(_Reservation_station-> in_GPR_WRITE_OOO_ENGINE_ID              [i])) (*( in_GPR_WRITE_OOO_ENGINE_ID              [i]));
    239258  (*(_Reservation_station-> in_GPR_WRITE_NUM_REG                    [i])) (*( in_GPR_WRITE_NUM_REG                    [i]));
    240259  (*(_Reservation_station-> in_GPR_WRITE_DATA                       [i])) (*( in_GPR_WRITE_DATA                       [i]));
    … …  
    243262      {
    244263  (*(_Reservation_station-> in_SPR_WRITE_VAL                        [i])) (*( in_SPR_WRITE_VAL                        [i]));
    245   (*(_Reservation_station-> in_SPR_WRITE_CONTEXT_ID                 [i])) (*( in_SPR_WRITE_CONTEXT_ID                 [i]));
     264  if (_param->_have_port_ooo_engine_id)
     265  (*(_Reservation_station-> in_SPR_WRITE_OOO_ENGINE_ID              [i])) (*( in_SPR_WRITE_OOO_ENGINE_ID              [i]));
    246266  (*(_Reservation_station-> in_SPR_WRITE_NUM_REG                    [i])) (*( in_SPR_WRITE_NUM_REG                    [i]));
    247267  (*(_Reservation_station-> in_SPR_WRITE_DATA                       [i])) (*( in_SPR_WRITE_DATA                       [i]));
    … …  
    249269    for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
    250270      {
    251   (*(_Reservation_station-> in_BYPASS_WRITE_CONTEXT_ID              [i])) (*( in_BYPASS_WRITE_CONTEXT_ID              [i]));
     271  if (_param->_have_port_ooo_engine_id)
     272  (*(_Reservation_station-> in_BYPASS_WRITE_OOO_ENGINE_ID           [i])) (*( in_BYPASS_WRITE_OOO_ENGINE_ID           [i]));
    252273  (*(_Reservation_station-> in_BYPASS_WRITE_GPR_VAL                 [i])) (*( in_BYPASS_WRITE_GPR_VAL                 [i]));
    253274  (*(_Reservation_station-> in_BYPASS_WRITE_GPR_NUM_REG             [i])) (*( in_BYPASS_WRITE_GPR_NUM_REG             [i]));
    … …  
    260281      {
    261282  (*(_Reservation_station-> in_BYPASS_MEMORY_VAL                    [i])) (*( in_BYPASS_MEMORY_VAL                    [i]));
    262   (*(_Reservation_station-> in_BYPASS_MEMORY_CONTEXT_ID             [i])) (*( in_BYPASS_MEMORY_CONTEXT_ID             [i]));
     283  if (_param->_have_port_ooo_engine_id)
     284  (*(_Reservation_station-> in_BYPASS_MEMORY_OOO_ENGINE_ID          [i])) (*( in_BYPASS_MEMORY_OOO_ENGINE_ID          [i]));
    263285  (*(_Reservation_station-> in_BYPASS_MEMORY_NUM_REG                [i])) (*( in_BYPASS_MEMORY_NUM_REG                [i]));
    264286  (*(_Reservation_station-> in_BYPASS_MEMORY_DATA                   [i])) (*( in_BYPASS_MEMORY_DATA                   [i]));
    … …  
    275297
    276298  const uint32_t nb_request = _param->_nb_packet;
    277 //const uint32_t seed = 0;
    278   const uint32_t seed = static_cast<uint32_t>(time(NULL));
     299  const uint32_t seed = 0;
     300//const uint32_t seed = static_cast<uint32_t>(time(NULL));
    279301  srand(seed);
    280302
    281   Tcontext_t         _context_id [nb_request];
     303  Tcontext_t         _ooo_engine_id [nb_request];
    282304  Tcontrol_t         _read_ra    [nb_request];
    283305  Tgeneral_address_t _num_reg_ra [nb_request];
    … …  
    288310
    289311  // emulation of registerFile
    290   Tcontrol_t         _gpr_val    [_param->_nb_general_register][_param->_nb_context];
    291   Tgeneral_data_t    _gpr        [_param->_nb_general_register][_param->_nb_context];
    292   Tcontrol_t         _spr_val    [_param->_nb_special_register][_param->_nb_context];
    293   Tspecial_data_t    _spr        [_param->_nb_special_register][_param->_nb_context];
     312  Tcontrol_t         _gpr_val    [_param->_nb_general_register][_param->_nb_ooo_engine];
     313  Tgeneral_data_t    _gpr        [_param->_nb_general_register][_param->_nb_ooo_engine];
     314  Tcontrol_t         _spr_val    [_param->_nb_special_register][_param->_nb_ooo_engine];
     315  Tspecial_data_t    _spr        [_param->_nb_special_register][_param->_nb_ooo_engine];
    294316
    295317  SC_START(0);
    296318
    297319  LABEL("Initialisation");
    298   in_RESERVATION_STATION_IN_VAL ->write(0);
    299   for (uint32_t i=0; i<_param->_size_queue      ; i++)
    300     in_RESERVATION_STATION_OUT_ACK [i]->write(0);
     320  in_INSERT_VAL ->write(0);
     321  for (uint32_t i=0; i<_param->_nb_inst_retire  ; i++)
     322    in_RETIRE_ACK [i]->write(0);
    301323  for (uint32_t i=0; i<_param->_nb_gpr_write    ; i++)
    302324    in_GPR_WRITE_VAL               [i]->write(0);
    … …  
    331353      for (uint32_t i=0; i<nb_request; i++)
    332354        {
    333           _context_id   [i] = rand()% _param->_nb_context            ;
     355          _ooo_engine_id   [i] = rand()% _param->_nb_ooo_engine            ;
    334356          _read_ra      [i] = rand()% 2                              ;
    335357          _num_reg_ra   [i] = rand()% _param->_nb_general_register   ;
    … …  
    341363     
    342364      // emulation of registerFile
    343       for (uint32_t j=0; j<_param->_nb_context; j++)
     365      for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
    344366        {
    345367          for (uint32_t i=0; i<_param->_nb_general_register; i++)
    346368            {
    347369              _gpr_val      [i][j] = ((rand()%100) < percent_registerfile_valid);
    348               _gpr          [i][j] = rand()%(1<<_param->_size_general_data);
     370              _gpr          [i][j] = rand()%((1<<_param->_size_general_data)-1);
    349371            }
    350372          for (uint32_t i=0; i<_param->_nb_special_register; i++)
    … …  
    362384      for (uint32_t i=0; i<nb_request; i++)
    363385        request_out_wait [i] = true;
     386     
     387      bool can_gpr_use [_param->_nb_ooo_engine][_param->_nb_general_register];
     388      bool can_spr_use [_param->_nb_ooo_engine][_param->_nb_special_register];
     389      bool need_gpr    [_param->_nb_ooo_engine][_param->_nb_general_register];
     390      bool need_spr    [_param->_nb_ooo_engine][_param->_nb_special_register];
     391
     392     
     393      for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
     394        {
     395          for (uint32_t i=0; i<_param->_nb_general_register; i++)
     396            need_gpr [j][i] = false;
     397          for (uint32_t i=0; i<_param->_nb_special_register; i++)
     398            need_spr [j][i] = false;
     399        }
    364400
    365401      while (request_out < nb_request)
    366402        {
    367           if ((request_in < nb_request) and
    368               ((rand()%100) < percent_transaction_queue_in))
     403          for (uint32_t j=0; j<_param->_nb_ooo_engine; j++)
     404            {
     405              for (uint32_t i=0; i<_param->_nb_general_register; i++)
     406                can_gpr_use [j][i] = true;
     407              for (uint32_t i=0; i<_param->_nb_special_register; i++)
     408                can_spr_use [j][i] = true;
     409            }
     410
     411          Tcontrol_t         insert_val = (request_in < nb_request) and ((rand()%100) < percent_transaction_queue_in);
     412          Tcontext_t         insert_ooo_engine_id;
     413          Tgeneral_address_t insert_num_reg_ra;
     414          Tgeneral_address_t insert_num_reg_rb;
     415          Tspecial_address_t insert_num_reg_rc;
     416
     417          in_INSERT_VAL         ->write(insert_val);
     418          if (insert_val)
    369419            {
    370420              bool               data_val;
    371               Tgeneral_address_t gpr_addr;
    372               Tspecial_address_t spr_addr;
    373               Tcontext_t         ctxt    = _context_id [request_in];
    374               in_RESERVATION_STATION_IN_VAL         ->write(1);
    375               in_RESERVATION_STATION_IN_CONTEXT_ID  ->write(ctxt);
    376               in_RESERVATION_STATION_IN_PACKET_ID   ->write(request_in);
    377               in_RESERVATION_STATION_IN_OPERATION   ->write(0);
    378               in_RESERVATION_STATION_IN_TYPE        ->write(0);
    379               in_RESERVATION_STATION_IN_HAS_IMMEDIAT->write(0);
    380               in_RESERVATION_STATION_IN_IMMEDIAT    ->write(0);
    381 //            in_RESERVATION_STATION_IN_READ_RA     ->write(_read_ra[request_in]);
    382               gpr_addr = _num_reg_ra [request_in];
    383               data_val = not(_read_ra[request_in]) or _gpr_val[gpr_addr][ctxt];
    384               in_RESERVATION_STATION_IN_NUM_REG_RA  ->write(gpr_addr);
    385               in_RESERVATION_STATION_IN_DATA_RA_VAL ->write(data_val);
    386               in_RESERVATION_STATION_IN_DATA_RA     ->write((data_val)?_gpr[gpr_addr][ctxt]:0);
    387 //            in_RESERVATION_STATION_IN_READ_RB     ->write(_read_rb[request_in]);
    388               gpr_addr = _num_reg_rb [request_in];
    389               data_val = not(_read_rb[request_in]) or _gpr_val[gpr_addr][ctxt];
    390               in_RESERVATION_STATION_IN_NUM_REG_RB  ->write(gpr_addr);                         
    391               in_RESERVATION_STATION_IN_DATA_RB_VAL ->write(data_val);                         
    392               in_RESERVATION_STATION_IN_DATA_RB     ->write((data_val)?_gpr[gpr_addr][ctxt]:0);
    393 //            in_RESERVATION_STATION_IN_READ_RC     ->write(_read_rc[request_in]);
    394               spr_addr = _num_reg_rc [request_in];
    395               data_val = not(_read_rc[request_in]) or _spr_val[spr_addr][ctxt];
    396               in_RESERVATION_STATION_IN_NUM_REG_RC  ->write(spr_addr);                         
    397               in_RESERVATION_STATION_IN_DATA_RC_VAL ->write(data_val);                         
    398               in_RESERVATION_STATION_IN_DATA_RC     ->write((data_val)?_spr[spr_addr][ctxt]:0);
    399               in_RESERVATION_STATION_IN_WRITE_RD    ->write(0);
    400               in_RESERVATION_STATION_IN_NUM_REG_RD  ->write(0);
    401               in_RESERVATION_STATION_IN_WRITE_RE    ->write(0);
    402               in_RESERVATION_STATION_IN_NUM_REG_RE  ->write(0);
    403             }
    404           else
    405             {
    406               in_RESERVATION_STATION_IN_VAL         ->write(0);
    407             }
    408 
    409           for (uint32_t i=0; i<_param->_size_queue      ; i++)
    410             in_RESERVATION_STATION_OUT_ACK[i]->write((rand()%100)<percent_transaction_queue_out);
    411 
     421              insert_ooo_engine_id = _ooo_engine_id [request_in];
     422              insert_num_reg_ra    = _num_reg_ra [request_in];
     423              insert_num_reg_rb    = _num_reg_rb [request_in];
     424              insert_num_reg_rc    = _num_reg_rc [request_in];
     425
     426              if (_param->_have_port_context_id)
     427              in_INSERT_CONTEXT_ID     ->write((2*insert_ooo_engine_id)%_param->_nb_context  );
     428              if (_param->_have_port_front_end_id)
     429              in_INSERT_FRONT_END_ID   ->write((3*insert_ooo_engine_id)%_param->_nb_front_end);
     430              if (_param->_have_port_ooo_engine_id)
     431              in_INSERT_OOO_ENGINE_ID  ->write(insert_ooo_engine_id);
     432              if (_param->_have_port_rob_id)
     433              in_INSERT_ROB_ID      ->write(request_in);
     434              in_INSERT_OPERATION   ->write(0);
     435              in_INSERT_TYPE        ->write(0);
     436              in_INSERT_HAS_IMMEDIAT->write(0);
     437              in_INSERT_IMMEDIAT    ->write(0);
     438//            in_INSERT_READ_RA     ->write(_read_ra[request_in]);
     439              data_val = not(_read_ra[request_in]) or _gpr_val[insert_num_reg_ra][insert_ooo_engine_id];
     440
     441              need_gpr [insert_ooo_engine_id][insert_num_reg_ra] |= not data_val;
     442
     443              in_INSERT_NUM_REG_RA  ->write(insert_num_reg_ra);
     444              in_INSERT_DATA_RA_VAL ->write(data_val);
     445              in_INSERT_DATA_RA     ->write((data_val)?_gpr[insert_num_reg_ra][insert_ooo_engine_id]:0);
     446//            in_INSERT_READ_RB     ->write(_read_rb[request_in]);
     447              data_val = not(_read_rb[request_in]) or _gpr_val[insert_num_reg_rb][insert_ooo_engine_id];
     448
     449              need_gpr [insert_ooo_engine_id][insert_num_reg_rb] |= not data_val;
     450
     451              in_INSERT_NUM_REG_RB  ->write(insert_num_reg_rb);                       
     452              in_INSERT_DATA_RB_VAL ->write(data_val);                         
     453              in_INSERT_DATA_RB     ->write((data_val)?_gpr[insert_num_reg_rb][insert_ooo_engine_id]:0);
     454//            in_INSERT_READ_RC     ->write(_read_rc[request_in]);
     455              data_val = not(_read_rc[request_in]) or _spr_val[insert_num_reg_rc][insert_ooo_engine_id];
     456
     457              need_spr [insert_ooo_engine_id][insert_num_reg_rc] |= not data_val;
     458
     459              in_INSERT_NUM_REG_RC  ->write(insert_num_reg_rc);                       
     460              in_INSERT_DATA_RC_VAL ->write(data_val);                         
     461              in_INSERT_DATA_RC     ->write((data_val)?_spr[insert_num_reg_rc][insert_ooo_engine_id]:0);
     462              in_INSERT_WRITE_RD    ->write(0);
     463              in_INSERT_NUM_REG_RD  ->write(0);
     464              in_INSERT_WRITE_RE    ->write(0);
     465              in_INSERT_NUM_REG_RE  ->write(0);
     466
     467              can_gpr_use [insert_ooo_engine_id][insert_num_reg_ra] = false;
     468              can_gpr_use [insert_ooo_engine_id][insert_num_reg_rb] = false;
     469              can_spr_use [insert_ooo_engine_id][insert_num_reg_rc] = false;
     470            }
     471                 
     472          for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     473            in_RETIRE_ACK[i]->write((rand()%100)<percent_transaction_queue_out);
    412474
    413475          LABEL("Bypass Network :");
    … …  
    415477            {
    416478              Tgeneral_address_t num_reg = rand()% _param->_nb_general_register;
    417               Tcontext_t         context = rand()% _param->_nb_context;
    418               Tcontrol_t         val     = (_gpr_val [num_reg][context]== 0)?((rand()%100) < percent_transaction_registerfile):0;
    419               Tgeneral_data_t    data    = rand()%(1<<_param->_size_general_data);
    420              
    421               in_GPR_WRITE_VAL        [i]->write(val);       
    422               in_GPR_WRITE_CONTEXT_ID [i]->write(context);
    423               in_GPR_WRITE_NUM_REG    [i]->write(num_reg);
    424               in_GPR_WRITE_DATA       [i]->write(data);
     479              Tcontext_t         ooo_engine = rand()% _param->_nb_ooo_engine;
     480              Tcontrol_t         val     = (_gpr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_registerfile):0;
     481              Tgeneral_data_t    data    = rand()%((1<<_param->_size_general_data)-1);
     482           
     483              val = (val and can_gpr_use [ooo_engine][num_reg] and need_gpr [ooo_engine][num_reg]);
     484
     485              in_GPR_WRITE_VAL            [i]->write(val);           
     486              if (_param->_have_port_ooo_engine_id)
     487              in_GPR_WRITE_OOO_ENGINE_ID  [i]->write(ooo_engine);
     488              in_GPR_WRITE_NUM_REG        [i]->write(num_reg);
     489              in_GPR_WRITE_DATA           [i]->write(data);
    425490
    426491              if (val)
    427492                {
    428                   LABEL(" * GPR_WRITE     ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(context)+"] <- "+toString(data));
    429                   _gpr     [num_reg][context] = data;
    430                   _gpr_val [num_reg][context] = 1;
     493                  LABEL(" * GPR_WRITE     ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
     494                  can_gpr_use [ooo_engine][num_reg] = false;
     495                  need_gpr [ooo_engine][num_reg]    = false;
     496
     497
     498                  _gpr     [num_reg][ooo_engine] = data;
     499                  _gpr_val [num_reg][ooo_engine] = 1;
    431500                }
    432501            }
    … …  
    434503            {
    435504              Tspecial_address_t num_reg = rand()% _param->_nb_special_register;
    436               Tcontext_t         context = rand()% _param->_nb_context;
    437               Tcontrol_t         val     = (_spr_val [num_reg][context]== 0)?((rand()%100) < percent_transaction_registerfile):0;
     505              Tcontext_t         ooo_engine = rand()% _param->_nb_ooo_engine;
     506              Tcontrol_t         val     = (_spr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_registerfile):0;
    438507              Tspecial_data_t    data    = rand()%(1<<_param->_size_special_data);
    439              
    440               in_SPR_WRITE_VAL        [i]->write(val);       
    441               in_SPR_WRITE_CONTEXT_ID [i]->write(context);
    442               in_SPR_WRITE_NUM_REG    [i]->write(num_reg);
    443               in_SPR_WRITE_DATA       [i]->write(data);
     508
     509              val = (val and can_spr_use [ooo_engine][num_reg] and need_spr[ooo_engine][num_reg]);
     510
     511              in_SPR_WRITE_VAL            [i]->write(val);           
     512              if (_param->_have_port_ooo_engine_id)
     513              in_SPR_WRITE_OOO_ENGINE_ID  [i]->write(ooo_engine);
     514              in_SPR_WRITE_NUM_REG        [i]->write(num_reg);
     515              in_SPR_WRITE_DATA           [i]->write(data);
    444516
    445517              if (val == 1)
    446518                {
    447                   LABEL(" * SPR_WRITE     ["+toString(i)+"] - spr["+toString(num_reg)+"]["+toString(context)+"] <- "+toString(data));
    448                   _spr     [num_reg][context] = data;
    449                   _spr_val [num_reg][context] = 1;
     519                  LABEL(" * SPR_WRITE     ["+toString(i)+"] - spr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
     520                  can_spr_use [ooo_engine][num_reg] = false;
     521                  need_spr[ooo_engine][num_reg]     = false;
     522
     523                  _spr     [num_reg][ooo_engine] = data;
     524                  _spr_val [num_reg][ooo_engine] = 1;
    450525                }
    451526            }
    … …  
    453528          for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
    454529            {
    455               Tcontext_t         context     = rand()% _param->_nb_context;
    456               in_BYPASS_WRITE_CONTEXT_ID [i]->write(context);
     530              Tcontext_t         ooo_engine     = rand()% _param->_nb_ooo_engine;
     531              if (_param->_have_port_ooo_engine_id)
     532              in_BYPASS_WRITE_OOO_ENGINE_ID [i]->write(ooo_engine);
    457533
    458534              Tgeneral_address_t gpr_num_reg = rand()% _param->_nb_general_register;
    459               Tcontrol_t         gpr_val     = (_gpr_val [gpr_num_reg][context]== 0)?((rand()%100) < percent_transaction_bypass):0;
    460               Tgeneral_data_t    gpr_data    = rand()%(1<<_param->_size_general_data);
     535              Tcontrol_t         gpr_val     = (_gpr_val [gpr_num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
     536              Tgeneral_data_t    gpr_data    = rand()%((1<<_param->_size_general_data)-1);
    461537             
     538              gpr_val = (gpr_val and can_gpr_use [ooo_engine][gpr_num_reg] and need_gpr[ooo_engine][gpr_num_reg]);
     539
    462540              in_BYPASS_WRITE_GPR_VAL    [i]->write(gpr_val);         
    463541              in_BYPASS_WRITE_GPR_NUM_REG[i]->write(gpr_num_reg);
    … …  
    466544              if (gpr_val)
    467545                {
    468                   LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - gpr["+toString(gpr_num_reg)+"]["+toString(context)+"] <- "+toString(gpr_data));
    469                   _gpr     [gpr_num_reg][context] = gpr_data;
    470                   _gpr_val [gpr_num_reg][context] = 1;
     546                  LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - gpr["+toString(gpr_num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(gpr_data));
     547                  can_gpr_use [ooo_engine][gpr_num_reg] = false;
     548                  need_gpr[ooo_engine][gpr_num_reg]     = false;
     549
     550                  _gpr     [gpr_num_reg][ooo_engine] = gpr_data;
     551                  _gpr_val [gpr_num_reg][ooo_engine] = 1;
    471552                }
    472553
    473554              Tspecial_address_t spr_num_reg = rand()% _param->_nb_special_register;
    474               Tcontrol_t         spr_val     = (_spr_val [spr_num_reg][context]== 0)?((rand()%100) < percent_transaction_bypass):0;
     555              Tcontrol_t         spr_val     = (_spr_val [spr_num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
    475556              Tspecial_data_t    spr_data    = rand()%(1<<_param->_size_special_data);
    476557             
     558              spr_val = (spr_val and can_spr_use [ooo_engine][spr_num_reg] and need_spr[ooo_engine][spr_num_reg]);
     559
    477560              in_BYPASS_WRITE_SPR_VAL    [i]->write(spr_val);         
    478561              in_BYPASS_WRITE_SPR_NUM_REG[i]->write(spr_num_reg);
    … …  
    481564              if (spr_val)
    482565                {
    483                   LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - spr["+toString(spr_num_reg)+"]["+toString(context)+"] <- "+toString(spr_data));
    484                   _spr     [spr_num_reg][context] = spr_data;
    485                   _spr_val [spr_num_reg][context] = 1;
     566                  LABEL(" * BYPASS_WRITE  ["+toString(i)+"] - spr["+toString(spr_num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(spr_data));
     567                  can_spr_use [ooo_engine][spr_num_reg] = false;
     568                  need_spr[ooo_engine][spr_num_reg]     = false;
     569
     570                  _spr     [spr_num_reg][ooo_engine] = spr_data;
     571                  _spr_val [spr_num_reg][ooo_engine] = 1;
    486572                }
    487573
    … …  
    490576          for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
    491577            {
    492               Tcontext_t         context     = rand()% _param->_nb_context;
    493               in_BYPASS_MEMORY_CONTEXT_ID [i]->write(context);
    494 
    495               Tgeneral_address_t gpr_num_reg = rand()% _param->_nb_general_register;
    496               Tcontrol_t         gpr_val     = (_gpr_val [gpr_num_reg][context]== 0)?((rand()%100) < percent_transaction_bypass):0;
    497               Tgeneral_data_t    gpr_data    = rand()%(1<<_param->_size_general_data);
     578              Tcontext_t         ooo_engine     = rand()% _param->_nb_ooo_engine;
     579              if (_param->_have_port_ooo_engine_id)
     580              in_BYPASS_MEMORY_OOO_ENGINE_ID [i]->write(ooo_engine);
     581
     582              Tgeneral_address_t num_reg = rand()% _param->_nb_general_register;
     583              Tcontrol_t         val     = (_gpr_val [num_reg][ooo_engine]== 0)?((rand()%100) < percent_transaction_bypass):0;
     584              Tgeneral_data_t    data    = rand()%((1<<_param->_size_general_data)-1);
    498585             
    499               in_BYPASS_MEMORY_VAL    [i]->write(gpr_val);           
    500               in_BYPASS_MEMORY_NUM_REG[i]->write(gpr_num_reg);
    501               in_BYPASS_MEMORY_DATA   [i]->write(gpr_data);
    502 
    503               if (gpr_val)
     586              val = (val and can_gpr_use [ooo_engine][num_reg] and need_gpr [ooo_engine][num_reg]);
     587
     588              in_BYPASS_MEMORY_VAL    [i]->write(val);       
     589              in_BYPASS_MEMORY_NUM_REG[i]->write(num_reg);
     590              in_BYPASS_MEMORY_DATA   [i]->write(data);
     591
     592              if (val)
    504593                {
    505                   LABEL(" * BYPASS_MEMORY ["+toString(i)+"] - gpr["+toString(gpr_num_reg)+"]["+toString(context)+"] <- "+toString(gpr_data));
    506                   _gpr     [gpr_num_reg][context] = gpr_data;
    507                   _gpr_val [gpr_num_reg][context] = 1;
     594                  LABEL(" * BYPASS_MEMORY ["+toString(i)+"] - gpr["+toString(num_reg)+"]["+toString(ooo_engine)+"] <- "+toString(data));
     595                  can_gpr_use [ooo_engine][num_reg] = false;
     596                  need_gpr [ooo_engine][num_reg] = false;
     597
     598                  _gpr     [num_reg][ooo_engine] = data;
     599                  _gpr_val [num_reg][ooo_engine] = 1;
    508600                }
    509601            }
    510602          SC_START(0); // to mealy function
    511603         
    512 //        LABEL("Test     RESERVATION_STATION_IN  : "+toString(in_RESERVATION_STATION_IN_VAL->read())+","+toString(out_RESERVATION_STATION_IN_ACK->read()));
    513           if (( in_RESERVATION_STATION_IN_VAL->read() == 1) and
    514               (out_RESERVATION_STATION_IN_ACK->read() == 1))
    515             {
    516               LABEL("Accepted RESERVATION_STATION_IN  n°"+toString(request_in));
     604//        LABEL("Test     INSERT  : "+toString(in_INSERT_VAL->read())+","+toString(out_INSERT_ACK->read()));
     605          if (( in_INSERT_VAL->read() == 1) and
     606              (out_INSERT_ACK->read() == 1))
     607            {
     608              LABEL("Accepted INSERT  number : "+toString(request_in));
    517609              request_in  ++;
    518610            }
    519611
    520           for (uint32_t i=0; i<_param->_size_queue      ; i++)
    521             {
    522               LABEL("Test     RESERVATION_STATION_OUT "+toString(i)+" : "+toString(out_RESERVATION_STATION_OUT_VAL[i]->read())+","+toString(in_RESERVATION_STATION_OUT_ACK[i]->read()));
    523               if ((out_RESERVATION_STATION_OUT_VAL [i]->read() == 1) and
    524                   ( in_RESERVATION_STATION_OUT_ACK [i]->read() == 1))
     612          for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     613            {
     614              LABEL("Test     RETIRE "+toString(i)+" : "+toString(out_RETIRE_VAL[i]->read())+","+toString(in_RETIRE_ACK[i]->read()));
     615              if ((out_RETIRE_VAL [i]->read() == 1) and
     616                  ( in_RETIRE_ACK [i]->read() == 1))
    525617                {
    526                   Tpacket_t  packet_id  = out_RESERVATION_STATION_OUT_PACKET_ID [i]->read();
    527 
    528                   LABEL("Accepted RESERVATION_STATION_OUT ["+toString(i)+"] n°"+toString(packet_id)+", request n°"+toString(request_out));
    529                   TEST(bool, request_out_wait [packet_id] , true);
     618                  Tpacket_t  rob_id;
     619                  if (_param->_have_port_rob_id)
     620                    rob_id = out_RETIRE_ROB_ID [i]->read();
     621                  else
     622                    rob_id = 0;
     623                  LABEL("Accepted RETIRE ["+toString(i)+"] number : "+toString(rob_id)+", request number : "+toString(request_out));
     624                  TEST(bool, request_out_wait [rob_id] , true);
    530625
    531626                  request_out ++;
    532                   request_out_wait [packet_id] = false;
    533 
    534                   Tcontext_t context_id = _context_id [packet_id];
     627                  request_out_wait [rob_id] = false;
     628
     629                  Tcontext_t ooo_engine_id = _ooo_engine_id [rob_id];
    535630                 
    536                   TEST(Tcontext_t        ,out_RESERVATION_STATION_OUT_CONTEXT_ID[i]->read(),context_id);
    537                   if (_read_ra [packet_id])
    538                   TEST(Tgeneral_data_t   ,out_RESERVATION_STATION_OUT_DATA_RA   [i]->read(),_gpr[_num_reg_ra[packet_id]][context_id]);
     631                  if (_param->_have_port_context_id)
     632                  TEST(Tcontext_t        ,out_RETIRE_CONTEXT_ID   [i]->read(),(2*ooo_engine_id)%_param->_nb_context  );
     633                  if (_param->_have_port_front_end_id)
     634                  TEST(Tcontext_t        ,out_RETIRE_FRONT_END_ID [i]->read(),(3*ooo_engine_id)%_param->_nb_front_end);
     635                  if (_param->_have_port_ooo_engine_id)
     636                  TEST(Tcontext_t        ,out_RETIRE_OOO_ENGINE_ID[i]->read(),ooo_engine_id);
     637
     638                  if (_read_ra [rob_id])
     639                  TEST(Tgeneral_data_t   ,out_RETIRE_DATA_RA   [i]->read(),_gpr[_num_reg_ra[rob_id]][ooo_engine_id]);
    539640                 
    540                   if (_read_rb [packet_id])
    541                   TEST(Tgeneral_data_t   ,out_RESERVATION_STATION_OUT_DATA_RB   [i]->read(),_gpr[_num_reg_rb[packet_id]][context_id]);
     641                  if (_read_rb [rob_id])
     642                  TEST(Tgeneral_data_t   ,out_RETIRE_DATA_RB   [i]->read(),_gpr[_num_reg_rb[rob_id]][ooo_engine_id]);
    542643                 
    543                   if (_read_rc [packet_id])
    544                   TEST(Tspecial_data_t   ,out_RESERVATION_STATION_OUT_DATA_RC   [i]->read(),_spr[_num_reg_rc[packet_id]][context_id]);
     644                  if (_read_rc [rob_id])
     645                  TEST(Tspecial_data_t   ,out_RETIRE_DATA_RC   [i]->read(),_spr[_num_reg_rc[rob_id]][ooo_engine_id]);
     646
     647//                need_gpr [ooo_engine_id][_num_reg_ra[rob_id]]= true;
     648//                need_gpr [ooo_engine_id][_num_reg_rb[rob_id]]= true;
     649//                need_spr [ooo_engine_id][_num_reg_rc[rob_id]]= true;
    545650                }
    546651            }
    … …  
    561666  delete     in_NRESET;
    562667
    563   delete     in_RESERVATION_STATION_IN_VAL         ;
    564   delete    out_RESERVATION_STATION_IN_ACK         ;
    565   delete     in_RESERVATION_STATION_IN_CONTEXT_ID  ;
    566   delete     in_RESERVATION_STATION_IN_PACKET_ID   ;
    567   delete     in_RESERVATION_STATION_IN_OPERATION   ;
    568   delete     in_RESERVATION_STATION_IN_TYPE        ;
    569   delete     in_RESERVATION_STATION_IN_HAS_IMMEDIAT;
    570   delete     in_RESERVATION_STATION_IN_IMMEDIAT    ;
    571 //delete     in_RESERVATION_STATION_IN_READ_RA     ;
    572   delete     in_RESERVATION_STATION_IN_NUM_REG_RA  ;
    573   delete     in_RESERVATION_STATION_IN_DATA_RA_VAL ;
    574   delete     in_RESERVATION_STATION_IN_DATA_RA     ;
    575 //delete     in_RESERVATION_STATION_IN_READ_RB     ;
    576   delete     in_RESERVATION_STATION_IN_NUM_REG_RB  ;
    577   delete     in_RESERVATION_STATION_IN_DATA_RB_VAL ;
    578   delete     in_RESERVATION_STATION_IN_DATA_RB     ;
    579 //delete     in_RESERVATION_STATION_IN_READ_RC     ;
    580   delete     in_RESERVATION_STATION_IN_NUM_REG_RC  ;
    581   delete     in_RESERVATION_STATION_IN_DATA_RC_VAL ;
    582   delete     in_RESERVATION_STATION_IN_DATA_RC     ;
    583   delete     in_RESERVATION_STATION_IN_WRITE_RD    ;
    584   delete     in_RESERVATION_STATION_IN_NUM_REG_RD  ;
    585   delete     in_RESERVATION_STATION_IN_WRITE_RE    ;
    586   delete     in_RESERVATION_STATION_IN_NUM_REG_RE  ;
    587  
    588   delete [] out_RESERVATION_STATION_OUT_VAL         ;
    589   delete []  in_RESERVATION_STATION_OUT_ACK         ;
    590   delete [] out_RESERVATION_STATION_OUT_CONTEXT_ID  ;
    591   delete [] out_RESERVATION_STATION_OUT_PACKET_ID   ;
    592   delete [] out_RESERVATION_STATION_OUT_OPERATION   ;
    593   delete [] out_RESERVATION_STATION_OUT_TYPE        ;
    594   delete [] out_RESERVATION_STATION_OUT_HAS_IMMEDIAT;
    595   delete [] out_RESERVATION_STATION_OUT_IMMEDIAT    ;
    596   delete [] out_RESERVATION_STATION_OUT_DATA_RA     ;
    597   delete [] out_RESERVATION_STATION_OUT_DATA_RB     ;
    598   delete [] out_RESERVATION_STATION_OUT_DATA_RC     ;
    599   delete [] out_RESERVATION_STATION_OUT_WRITE_RD    ;
    600   delete [] out_RESERVATION_STATION_OUT_NUM_REG_RD  ;
    601   delete [] out_RESERVATION_STATION_OUT_WRITE_RE    ;
    602   delete [] out_RESERVATION_STATION_OUT_NUM_REG_RE  ;
     668  delete     in_INSERT_VAL         ;
     669  delete    out_INSERT_ACK         ;
     670  if (_param->_have_port_context_id) 
     671  delete     in_INSERT_CONTEXT_ID  ;
     672  if (_param->_have_port_front_end_id) 
     673  delete     in_INSERT_FRONT_END_ID   ;
     674  if (_param->_have_port_ooo_engine_id) 
     675  delete     in_INSERT_OOO_ENGINE_ID  ;
     676  if (_param->_have_port_rob_id) 
     677  delete     in_INSERT_ROB_ID      ;
     678  delete     in_INSERT_OPERATION   ;
     679  delete     in_INSERT_TYPE        ;
     680  delete     in_INSERT_HAS_IMMEDIAT;
     681  delete     in_INSERT_IMMEDIAT    ;
     682//delete     in_INSERT_READ_RA     ;
     683  delete     in_INSERT_NUM_REG_RA  ;
     684  delete     in_INSERT_DATA_RA_VAL ;
     685  delete     in_INSERT_DATA_RA     ;
     686//delete     in_INSERT_READ_RB     ;
     687  delete     in_INSERT_NUM_REG_RB  ;
     688  delete     in_INSERT_DATA_RB_VAL ;
     689  delete     in_INSERT_DATA_RB     ;
     690//delete     in_INSERT_READ_RC     ;
     691  delete     in_INSERT_NUM_REG_RC  ;
     692  delete     in_INSERT_DATA_RC_VAL ;
     693  delete     in_INSERT_DATA_RC     ;
     694  delete     in_INSERT_WRITE_RD    ;
     695  delete     in_INSERT_NUM_REG_RD  ;
     696  delete     in_INSERT_WRITE_RE    ;
     697  delete     in_INSERT_NUM_REG_RE  ;
     698 
     699  delete [] out_RETIRE_VAL         ;
     700  delete []  in_RETIRE_ACK         ;
     701  if (_param->_have_port_context_id) 
     702  delete [] out_RETIRE_CONTEXT_ID  ;
     703  if (_param->_have_port_front_end_id) 
     704  delete [] out_RETIRE_FRONT_END_ID;
     705  if (_param->_have_port_ooo_engine_id) 
     706  delete [] out_RETIRE_OOO_ENGINE_ID  ;
     707  if (_param->_have_port_rob_id) 
     708  delete [] out_RETIRE_ROB_ID   ;
     709  delete [] out_RETIRE_OPERATION   ;
     710  delete [] out_RETIRE_TYPE        ;
     711  delete [] out_RETIRE_HAS_IMMEDIAT;
     712  delete [] out_RETIRE_IMMEDIAT    ;
     713  delete [] out_RETIRE_DATA_RA     ;
     714  delete [] out_RETIRE_DATA_RB     ;
     715  delete [] out_RETIRE_DATA_RC     ;
     716  delete [] out_RETIRE_WRITE_RD    ;
     717  delete [] out_RETIRE_NUM_REG_RD  ;
     718  delete [] out_RETIRE_WRITE_RE    ;
     719  delete [] out_RETIRE_NUM_REG_RE  ;
    603720 
    604721  delete []  in_GPR_WRITE_VAL       ;
    605   delete []  in_GPR_WRITE_CONTEXT_ID;
     722  if (_param->_have_port_ooo_engine_id) 
     723  delete []  in_GPR_WRITE_OOO_ENGINE_ID;
    606724  delete []  in_GPR_WRITE_NUM_REG   ;
    607725  delete []  in_GPR_WRITE_DATA      ;
    608726 
    609727  delete []  in_SPR_WRITE_VAL       ;
    610   delete []  in_SPR_WRITE_CONTEXT_ID;
     728  if (_param->_have_port_ooo_engine_id) 
     729  delete []  in_SPR_WRITE_OOO_ENGINE_ID;
    611730  delete []  in_SPR_WRITE_NUM_REG   ;
    612731  delete []  in_SPR_WRITE_DATA      ;
    613732 
    614   delete []  in_BYPASS_WRITE_CONTEXT_ID ;
     733  if (_param->_have_port_ooo_engine_id) 
     734  delete []  in_BYPASS_WRITE_OOO_ENGINE_ID ;
    615735  delete []  in_BYPASS_WRITE_GPR_VAL    ;
    616736  delete []  in_BYPASS_WRITE_GPR_NUM_REG;
    … …  
    621741 
    622742  delete []  in_BYPASS_MEMORY_VAL       ;
    623   delete []  in_BYPASS_MEMORY_CONTEXT_ID;
     743  if (_param->_have_port_ooo_engine_id) 
     744  delete []  in_BYPASS_MEMORY_OOO_ENGINE_ID;
    624745  delete []  in_BYPASS_MEMORY_NUM_REG   ;
    625746  delete []  in_BYPASS_MEMORY_DATA      ;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h

    r55 r69  
    2727    //-----[ fields ]------------------------------------------------------------
    2828  public : const uint32_t    _size_queue           ;
     29  public : const uint32_t    _nb_inst_retire       ;
    2930  public : const uint32_t    _nb_context           ;
     31  public : const uint32_t    _nb_front_end         ;
     32  public : const uint32_t    _nb_ooo_engine        ;
    3033  public : const uint32_t    _nb_packet            ;
    3134  public : const uint32_t    _size_general_data    ;
    … …  
    4851    */
    4952  public : const uint32_t    _size_context_id      ;
    50   public : const uint32_t    _size_packet_id       ;
     53  public : const uint32_t    _size_front_end_id    ;
     54  public : const uint32_t    _size_ooo_engine_id   ;
     55  public : const uint32_t    _size_rob_id          ;
    5156  public : const uint32_t    _size_general_register;
    5257  public : const uint32_t    _size_special_register;
    … …  
    5459  public : const uint32_t    _size_type            ;
    5560
     61  public : const bool        _have_port_context_id   ;
     62  public : const bool        _have_port_front_end_id ;
     63  public : const bool        _have_port_ooo_engine_id;
     64  public : const bool        _have_port_rob_id       ;
     65
    5666    //-----[ methods ]-----------------------------------------------------------
    5767  public : Parameters  (uint32_t size_queue         ,
     68                        uint32_t nb_inst_retire     ,
    5869                        uint32_t nb_context         ,
     70                        uint32_t nb_front_end       ,
     71                        uint32_t nb_ooo_engine      ,
    5972                        uint32_t nb_packet          ,
    6073                        uint32_t size_general_data  ,

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h

    r56 r69  
    1717#include "Common/include/Debug.h"
    1818
     19#ifndef  SYSTEMC_VHDL_COMPATIBILITY
    1920#include "Behavioural/Generic/Queue_Control/include/Queue_Control.h"
     21#endif
    2022#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h"
    21 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h"
     23#include "Behavioural/include/Types.h"
    2224#ifdef STATISTICS
    2325#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Statistics.h"
    … …  
    4244  class Treservation_station_entry_t
    4345  {
    44   public    : Tcontext_t         _context_id  ;
    45   public    : Tpacket_t          _packet_id   ;
     46  public    : Tcontext_t         _context_id     ;
     47  public    : Tcontext_t         _front_end_id   ;
     48  public    : Tcontext_t         _ooo_engine_id  ;
     49  public    : Tpacket_t          _rob_id         ;
    4650  public    : Toperation_t       _operation   ;
    4751  public    : Ttype_t            _type        ;
    … …  
    6872                                morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Treservation_station_entry_t & x)
    6973    {
    70       output_stream << " * _context_id  : " << toString(x._context_id  ) << endl
    71                     << " * _packet_id   : " << toString(x._packet_id   ) << endl
    72                     << " * _operation   : " << toString(x._operation   ) << endl
    73                     << " * _type        : " << toString(x._type        ) << endl
    74                     << " * _has_immediat: " << toString(x._has_immediat) << endl
    75                     << " * _immediat    : " << toString(x._immediat    ) << endl
    76 //                  << " * _read_ra     : " << toString(x._read_ra     ) << endl
    77                     << " * _num_reg_ra  : " << toString(x._num_reg_ra  ) << endl
    78                     << " * _data_ra_val : " << toString(x._data_ra_val ) << endl
    79                     << " * _data_ra     : " << toString(x._data_ra     ) << endl
    80 //                  << " * _read_rb     : " << toString(x._read_rb     ) << endl
    81                     << " * _num_reg_rb  : " << toString(x._num_reg_rb  ) << endl
    82                     << " * _data_rb_val : " << toString(x._data_rb_val ) << endl
    83                     << " * _data_rb     : " << toString(x._data_rb     ) << endl
    84 //                  << " * _read_rc     : " << toString(x._read_rc     ) << endl
    85                     << " * _num_reg_rc  : " << toString(x._num_reg_rc  ) << endl
    86                     << " * _data_rc_val : " << toString(x._data_rc_val ) << endl
    87                     << " * _data_rc     : " << toString(x._data_rc     ) << endl
    88                     << " * _write_rd    : " << toString(x._write_rd    ) << endl
    89                     << " * _num_reg_rd  : " << toString(x._num_reg_rd  ) << endl
    90                     << " * _write_re    : " << toString(x._write_re    ) << endl
    91                     << " * _num_reg_re  : " << toString(x._num_reg_re  ) << endl;
     74      output_stream << " * _context_id     : " << toString(x._context_id     ) << endl
     75                    << " * _front_end_id   : " << toString(x._front_end_id   ) << endl
     76                    << " * _ooo_engine_id  : " << toString(x._ooo_engine_id  ) << endl
     77                    << " * _rob_id         : " << toString(x._rob_id         ) << endl
     78                    << " * _operation      : " << toString(x._operation      ) << endl
     79                    << " * _type           : " << toString(x._type           ) << endl
     80                    << " * _has_immediat   : " << toString(x._has_immediat   ) << endl
     81                    << " * _immediat       : " << toString(x._immediat       ) << endl
     82//                  << " * _read_ra        : " << toString(x._read_ra        ) << endl
     83                    << " * _num_reg_ra     : " << toString(x._num_reg_ra     ) << endl
     84                    << " * _data_ra_val    : " << toString(x._data_ra_val    ) << endl
     85                    << " * _data_ra        : " << toString(x._data_ra        ) << endl
     86//                  << " * _read_rb        : " << toString(x._read_rb        ) << endl
     87                    << " * _num_reg_rb     : " << toString(x._num_reg_rb     ) << endl
     88                    << " * _data_rb_val    : " << toString(x._data_rb_val    ) << endl
     89                    << " * _data_rb        : " << toString(x._data_rb        ) << endl
     90//                  << " * _read_rc        : " << toString(x._read_rc        ) << endl
     91                    << " * _num_reg_rc     : " << toString(x._num_reg_rc     ) << endl
     92                    << " * _data_rc_val    : " << toString(x._data_rc_val    ) << endl
     93                    << " * _data_rc        : " << toString(x._data_rc        ) << endl
     94                    << " * _write_rd       : " << toString(x._write_rd       ) << endl
     95                    << " * _num_reg_rd     : " << toString(x._num_reg_rd     ) << endl
     96                    << " * _write_re       : " << toString(x._write_re       ) << endl
     97                    << " * _num_reg_re     : " << toString(x._num_reg_re     ) << endl;
    9298
    9399      return output_stream;
    … …  
    123129  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
    124130
    125     // ~~~~~[ Interface "reservation_station_in" ]~~~~~~~~~~~~~~~~~~~~~~~~
    126   public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_VAL         ;
    127   public    : SC_OUT(Tcontrol_t        )    * out_RESERVATION_STATION_IN_ACK         ;
    128   public    : SC_IN (Tcontext_t        )    *  in_RESERVATION_STATION_IN_CONTEXT_ID  ;
    129   public    : SC_IN (Tpacket_t         )    *  in_RESERVATION_STATION_IN_PACKET_ID   ;
    130   public    : SC_IN (Toperation_t      )    *  in_RESERVATION_STATION_IN_OPERATION   ;
    131   public    : SC_IN (Ttype_t           )    *  in_RESERVATION_STATION_IN_TYPE        ;
    132   public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_HAS_IMMEDIAT;
    133   public    : SC_IN (Tgeneral_data_t   )    *  in_RESERVATION_STATION_IN_IMMEDIAT    ;
    134 //public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_READ_RA     ;
    135   public    : SC_IN (Tgeneral_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RA  ;
    136   public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_DATA_RA_VAL ;
    137   public    : SC_IN (Tgeneral_data_t   )    *  in_RESERVATION_STATION_IN_DATA_RA     ;
    138 //public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_READ_RB     ;
    139   public    : SC_IN (Tgeneral_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RB  ;
    140   public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_DATA_RB_VAL ;
    141   public    : SC_IN (Tgeneral_data_t   )    *  in_RESERVATION_STATION_IN_DATA_RB     ;
    142 //public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_READ_RC     ;
    143   public    : SC_IN (Tspecial_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RC  ;
    144   public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_DATA_RC_VAL ;
    145   public    : SC_IN (Tspecial_data_t   )    *  in_RESERVATION_STATION_IN_DATA_RC     ;
    146   public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_WRITE_RD    ;
    147   public    : SC_IN (Tgeneral_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RD  ;
    148   public    : SC_IN (Tcontrol_t        )    *  in_RESERVATION_STATION_IN_WRITE_RE    ;
    149   public    : SC_IN (Tspecial_address_t)    *  in_RESERVATION_STATION_IN_NUM_REG_RE  ;
    150 
    151     // ~~~~~[ Interface "reservation_station_out" ]~~~~~~~~~~~~~~~~~~~~~~~
    152   public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_VAL         ;
    153   public    : SC_IN (Tcontrol_t        )   **  in_RESERVATION_STATION_OUT_ACK         ;
    154   public    : SC_OUT(Tcontext_t        )   ** out_RESERVATION_STATION_OUT_CONTEXT_ID  ;
    155   public    : SC_OUT(Tpacket_t         )   ** out_RESERVATION_STATION_OUT_PACKET_ID   ;
    156   public    : SC_OUT(Toperation_t      )   ** out_RESERVATION_STATION_OUT_OPERATION   ;
    157   public    : SC_OUT(Ttype_t           )   ** out_RESERVATION_STATION_OUT_TYPE        ;
    158   public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_HAS_IMMEDIAT;
    159   public    : SC_OUT(Tgeneral_data_t   )   ** out_RESERVATION_STATION_OUT_IMMEDIAT    ;
    160   public    : SC_OUT(Tgeneral_data_t   )   ** out_RESERVATION_STATION_OUT_DATA_RA     ;
    161   public    : SC_OUT(Tgeneral_data_t   )   ** out_RESERVATION_STATION_OUT_DATA_RB     ;
    162   public    : SC_OUT(Tspecial_data_t   )   ** out_RESERVATION_STATION_OUT_DATA_RC     ;
    163   public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_WRITE_RD    ;
    164   public    : SC_OUT(Tgeneral_address_t)   ** out_RESERVATION_STATION_OUT_NUM_REG_RD  ;
    165   public    : SC_OUT(Tcontrol_t        )   ** out_RESERVATION_STATION_OUT_WRITE_RE    ;
    166   public    : SC_OUT(Tspecial_address_t)   ** out_RESERVATION_STATION_OUT_NUM_REG_RE  ;
     131    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~
     132  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_VAL            ;
     133  public    : SC_OUT(Tcontrol_t        )    * out_INSERT_ACK            ;
     134  public    : SC_IN (Tcontext_t        )    *  in_INSERT_CONTEXT_ID     ;
     135  public    : SC_IN (Tcontext_t        )    *  in_INSERT_FRONT_END_ID   ;
     136  public    : SC_IN (Tcontext_t        )    *  in_INSERT_OOO_ENGINE_ID  ;
     137  public    : SC_IN (Tpacket_t         )    *  in_INSERT_ROB_ID         ;
     138  public    : SC_IN (Toperation_t      )    *  in_INSERT_OPERATION      ;
     139  public    : SC_IN (Ttype_t           )    *  in_INSERT_TYPE           ;
     140  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_HAS_IMMEDIAT   ;
     141  public    : SC_IN (Tgeneral_data_t   )    *  in_INSERT_IMMEDIAT       ;
     142//public    : SC_IN (Tcontrol_t        )    *  in_INSERT_READ_RA        ;
     143  public    : SC_IN (Tgeneral_address_t)    *  in_INSERT_NUM_REG_RA     ;
     144  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_DATA_RA_VAL    ;
     145  public    : SC_IN (Tgeneral_data_t   )    *  in_INSERT_DATA_RA        ;
     146//public    : SC_IN (Tcontrol_t        )    *  in_INSERT_READ_RB        ;
     147  public    : SC_IN (Tgeneral_address_t)    *  in_INSERT_NUM_REG_RB     ;
     148  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_DATA_RB_VAL    ;
     149  public    : SC_IN (Tgeneral_data_t   )    *  in_INSERT_DATA_RB        ;
     150//public    : SC_IN (Tcontrol_t        )    *  in_INSERT_READ_RC        ;
     151  public    : SC_IN (Tspecial_address_t)    *  in_INSERT_NUM_REG_RC     ;
     152  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_DATA_RC_VAL    ;
     153  public    : SC_IN (Tspecial_data_t   )    *  in_INSERT_DATA_RC        ;
     154  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_WRITE_RD       ;
     155  public    : SC_IN (Tgeneral_address_t)    *  in_INSERT_NUM_REG_RD     ;
     156  public    : SC_IN (Tcontrol_t        )    *  in_INSERT_WRITE_RE       ;
     157  public    : SC_IN (Tspecial_address_t)    *  in_INSERT_NUM_REG_RE     ;
     158
     159    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~
     160  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_VAL            ;
     161  public    : SC_IN (Tcontrol_t        )   **  in_RETIRE_ACK            ;
     162  public    : SC_OUT(Tcontext_t        )   ** out_RETIRE_CONTEXT_ID     ;
     163  public    : SC_OUT(Tcontext_t        )   ** out_RETIRE_FRONT_END_ID   ;
     164  public    : SC_OUT(Tcontext_t        )   ** out_RETIRE_OOO_ENGINE_ID  ;
     165  public    : SC_OUT(Tpacket_t         )   ** out_RETIRE_ROB_ID         ;
     166  public    : SC_OUT(Toperation_t      )   ** out_RETIRE_OPERATION      ;
     167  public    : SC_OUT(Ttype_t           )   ** out_RETIRE_TYPE           ;
     168  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_HAS_IMMEDIAT   ;
     169  public    : SC_OUT(Tgeneral_data_t   )   ** out_RETIRE_IMMEDIAT       ;
     170  public    : SC_OUT(Tgeneral_data_t   )   ** out_RETIRE_DATA_RA        ;
     171  public    : SC_OUT(Tgeneral_data_t   )   ** out_RETIRE_DATA_RB        ;
     172  public    : SC_OUT(Tspecial_data_t   )   ** out_RETIRE_DATA_RC        ;
     173  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_WRITE_RD       ;
     174  public    : SC_OUT(Tgeneral_address_t)   ** out_RETIRE_NUM_REG_RD     ;
     175  public    : SC_OUT(Tcontrol_t        )   ** out_RETIRE_WRITE_RE       ;
     176  public    : SC_OUT(Tspecial_address_t)   ** out_RETIRE_NUM_REG_RE     ;
    167177
    168178    // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    169179
    170   public    : SC_IN (Tcontrol_t        )   **  in_GPR_WRITE_VAL       ; // val and ack
    171   public    : SC_IN (Tcontext_t        )   **  in_GPR_WRITE_CONTEXT_ID;
    172   public    : SC_IN (Tgeneral_address_t)   **  in_GPR_WRITE_NUM_REG   ;
    173   public    : SC_IN (Tgeneral_data_t   )   **  in_GPR_WRITE_DATA      ;
     180  public    : SC_IN (Tcontrol_t        )   **  in_GPR_WRITE_VAL          ; // val and ack
     181  public    : SC_IN (Tcontext_t        )   **  in_GPR_WRITE_OOO_ENGINE_ID;
     182  public    : SC_IN (Tgeneral_address_t)   **  in_GPR_WRITE_NUM_REG      ;
     183  public    : SC_IN (Tgeneral_data_t   )   **  in_GPR_WRITE_DATA         ;
    174184
    175185    // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    176186
    177   public    : SC_IN (Tcontrol_t        )   **  in_SPR_WRITE_VAL       ; // val and ack
    178   public    : SC_IN (Tcontext_t        )   **  in_SPR_WRITE_CONTEXT_ID;
    179   public    : SC_IN (Tspecial_address_t)   **  in_SPR_WRITE_NUM_REG   ;
    180   public    : SC_IN (Tspecial_data_t   )   **  in_SPR_WRITE_DATA      ;
     187  public    : SC_IN (Tcontrol_t        )   **  in_SPR_WRITE_VAL          ; // val and ack
     188  public    : SC_IN (Tcontext_t        )   **  in_SPR_WRITE_OOO_ENGINE_ID;
     189  public    : SC_IN (Tspecial_address_t)   **  in_SPR_WRITE_NUM_REG      ;
     190  public    : SC_IN (Tspecial_data_t   )   **  in_SPR_WRITE_DATA         ;
    181191
    182192    // ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    183193
    184   public    : SC_IN (Tcontext_t        )   **  in_BYPASS_WRITE_CONTEXT_ID ;
    185   public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_GPR_VAL    ;
    186   public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_WRITE_GPR_NUM_REG; // RD
    187   public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_WRITE_GPR_DATA   ;
    188   public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_SPR_VAL    ;
    189   public    : SC_IN (Tspecial_address_t)   **  in_BYPASS_WRITE_SPR_NUM_REG; // RE
    190   public    : SC_IN (Tspecial_data_t   )   **  in_BYPASS_WRITE_SPR_DATA   ;
     194  public    : SC_IN (Tcontext_t        )   **  in_BYPASS_WRITE_OOO_ENGINE_ID ;
     195  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_GPR_VAL       ;
     196  public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_WRITE_GPR_NUM_REG   ; // RD
     197  public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_WRITE_GPR_DATA      ;
     198  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_WRITE_SPR_VAL       ;
     199  public    : SC_IN (Tspecial_address_t)   **  in_BYPASS_WRITE_SPR_NUM_REG   ; // RE
     200  public    : SC_IN (Tspecial_data_t   )   **  in_BYPASS_WRITE_SPR_DATA      ;
    191201
    192202    // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    193203
    194   public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_MEMORY_VAL       ;
    195   public    : SC_IN (Tcontext_t        )   **  in_BYPASS_MEMORY_CONTEXT_ID;
    196   public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_MEMORY_NUM_REG   ;
    197   public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_MEMORY_DATA      ;
     204  public    : SC_IN (Tcontrol_t        )   **  in_BYPASS_MEMORY_VAL          ;
     205  public    : SC_IN (Tcontext_t        )   **  in_BYPASS_MEMORY_OOO_ENGINE_ID;
     206  public    : SC_IN (Tgeneral_address_t)   **  in_BYPASS_MEMORY_NUM_REG      ;
     207  public    : SC_IN (Tgeneral_data_t   )   **  in_BYPASS_MEMORY_DATA         ;
    198208
    199209
    … …  
    203213
    204214    // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     215#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     216  protected : bool                          *  _queue_valid;
     217  protected : uint32_t                         internal_INSERT_SLOT;
     218#else
    205219  protected : morpheo::behavioural::generic::queue_control::Queue_Control * _queue_control;
     220#endif
    206221  protected : Treservation_station_entry_t  *  _queue;
    207222
    208   protected : Tcontrol_t                       internal_RESERVATION_STATION_IN_ACK;
    209   protected : Tcontrol_t                    *  internal_RESERVATION_STATION_OUT_VAL;
     223  protected : Tcontrol_t                       internal_INSERT_ACK;
     224  protected : Tcontrol_t                    *  internal_RETIRE_VAL;
     225  protected : uint32_t                      *  internal_RETIRE_SLOT;
    210226#endif
    211227
    … …  
    244260#endif                                         
    245261                                               
    246 #ifdef VHDL_TESTBENCH                         
    247   private : void     vhdl_testbench_transition (void);
    248 #endif
     262  private : void     end_cycle                 (void);
    249263  };
    250264

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp

    r55 r69  
    2121#define FUNCTION "Reservation_station::Parameters"
    2222  Parameters::Parameters (uint32_t size_queue         ,
     23                          uint32_t nb_inst_retire     ,
    2324                          uint32_t nb_context         ,
     25                          uint32_t nb_front_end       ,
     26                          uint32_t nb_ooo_engine      ,
    2427                          uint32_t nb_packet          ,
    2528                          uint32_t size_general_data  ,
    … …  
    3437                          uint32_t nb_bypass_memory   ):
    3538    _size_queue            (size_queue           ),
     39    _nb_inst_retire        (nb_inst_retire       ),
    3640    _nb_context            (nb_context           ),
     41    _nb_front_end          (nb_front_end         ),
     42    _nb_ooo_engine         (nb_ooo_engine        ),
    3743    _nb_packet             (nb_packet            ),
    3844    _size_general_data     (size_general_data    ),
    … …  
    4854
    4955    _size_context_id       (static_cast<uint32_t>(log2(_nb_context         ))),
    50     _size_packet_id        (static_cast<uint32_t>(log2(_nb_packet          ))),
     56    _size_front_end_id     (static_cast<uint32_t>(log2(_nb_front_end       ))),
     57    _size_ooo_engine_id    (static_cast<uint32_t>(log2(_nb_ooo_engine      ))),
     58    _size_rob_id           (static_cast<uint32_t>(log2(_nb_packet          ))),
    5159    _size_general_register (static_cast<uint32_t>(log2(_nb_general_register))),
    5260    _size_special_register (static_cast<uint32_t>(log2(_nb_special_register))),
    5361    _size_operation        (static_cast<uint32_t>(log2(_nb_operation       ))),
    54     _size_type             (static_cast<uint32_t>(log2(_nb_type            )))
     62    _size_type             (static_cast<uint32_t>(log2(_nb_type            ))),
     63
     64    _have_port_context_id    (_size_context_id    > 0),
     65    _have_port_front_end_id  (_size_front_end_id  > 0),
     66    _have_port_ooo_engine_id (_size_ooo_engine_id > 0),
     67    _have_port_rob_id        (_size_rob_id        > 0)
    5568  {
    5669    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
    … …  
    6376  Parameters::Parameters (Parameters & param):
    6477    _size_queue            (param._size_queue            ),
     78    _nb_inst_retire        (param._nb_inst_retire        ),
    6579    _nb_context            (param._nb_context            ),
     80    _nb_front_end          (param._nb_front_end          ),
     81    _nb_ooo_engine         (param._nb_ooo_engine         ),
    6682    _nb_packet             (param._nb_packet             ),
    6783    _size_general_data     (param._size_general_data     ),
    … …  
    7793
    7894    _size_context_id       (param._size_context_id       ),
    79     _size_packet_id        (param._size_packet_id        ),
     95    _size_front_end_id     (param._size_front_end_id     ),
     96    _size_ooo_engine_id    (param._size_ooo_engine_id    ),
     97    _size_rob_id           (param._size_rob_id           ),
    8098    _size_general_register (param._size_general_register ),
    8199    _size_special_register (param._size_special_register ),
    82100    _size_operation        (param._size_operation        ),
    83     _size_type             (param._size_type             )
     101    _size_type             (param._size_type             ),
     102
     103    _have_port_context_id    (param._have_port_context_id   ),
     104    _have_port_front_end_id  (param._have_port_front_end_id ),
     105    _have_port_ooo_engine_id (param._have_port_ooo_engine_id),
     106    _have_port_rob_id        (param._have_port_rob_id       )
    84107  {
    85108    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_msg_error.cpp

    r55 r69  
    77
    88#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h"
    9 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h"
    109#include <sstream>
    1110using namespace std;
    … …  
    2928    string msg = "";
    3029
    31     if (_size_queue < 2)
     30//     if (_size_queue < 2)
     31//       {
     32//         msg += "  - The reservation_station must be have less a depth of 2";
     33//         msg += "    * size_queue                      : " + toString(_size_queue)    + "\n";
     34//       }
     35
     36    if (_size_queue < _nb_inst_retire)
    3237      {
    33         msg += "  - The reservation_station must be have less a depth of 2";
    34         msg += "    * size_queue                      : " + toString(_size_queue)    + "\n";
     38        msg += "  - The reservation_station can't have more retire port than entry in the queue.";
    3539      }
    36 
     40   
    3741    return msg;
    3842

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_print.cpp

    r55 r69  
    3030    xml.balise_open("reservation_station");
    3131    xml.singleton_begin("size_queue         "); xml.attribut("value",toString(_size_queue         )); xml.singleton_end();
     32    xml.singleton_begin("nb_inst_retire     "); xml.attribut("value",toString(_nb_inst_retire     )); xml.singleton_end();
    3233    xml.singleton_begin("nb_context         "); xml.attribut("value",toString(_nb_context         )); xml.singleton_end();
     34    xml.singleton_begin("nb_front_end       "); xml.attribut("value",toString(_nb_front_end       )); xml.singleton_end();
     35    xml.singleton_begin("nb_ooo_engine      "); xml.attribut("value",toString(_nb_ooo_engine      )); xml.singleton_end();
    3336    xml.singleton_begin("nb_packet          "); xml.attribut("value",toString(_nb_packet          )); xml.singleton_end();
    3437    xml.singleton_begin("size_general_data  "); xml.attribut("value",toString(_size_general_data  )); xml.singleton_end();
    … …  
    3841    xml.singleton_begin("nb_operation       "); xml.attribut("value",toString(_nb_operation       )); xml.singleton_end();
    3942    xml.singleton_begin("nb_type            "); xml.attribut("value",toString(_nb_type            )); xml.singleton_end();
    40     xml.singleton_begin("nb_gpr_write       "); xml.attribut("value",toString(_nb_gpr_write       )); xml.singleton_end();   
     43    xml.singleton_begin("nb_gpr_write       "); xml.attribut("value",toString(_nb_gpr_write       )); xml.singleton_end();
    4144    xml.singleton_begin("nb_spr_write       "); xml.attribut("value",toString(_nb_spr_write       )); xml.singleton_end();
    4245    xml.singleton_begin("nb_bypass_write    "); xml.attribut("value",toString(_nb_bypass_write    )); xml.singleton_end();

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp

    r56 r69  
    5252     in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
    5353
    54     // ~~~~~[ Interface : "reservation_station_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~
     54    // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~
    5555    {
    56       Interface_fifo * interface = _interfaces->set_interface("reservation_station_in"
     56      Interface_fifo * interface = _interfaces->set_interface("insert"
    5757#ifdef POSITION
    5858                                                               ,IN
    … …  
    6262                                                               );
    6363     
    64        in_RESERVATION_STATION_IN_VAL            = interface->set_signal_valack_in  (VAL);
    65       out_RESERVATION_STATION_IN_ACK            = interface->set_signal_valack_out (ACK);
    66        in_RESERVATION_STATION_IN_CONTEXT_ID     = interface->set_signal_in <Tcontext_t        > ("context_id"  ,_param->_size_context_id       );
    67        in_RESERVATION_STATION_IN_PACKET_ID      = interface->set_signal_in <Tpacket_t         > ("packet_id"   ,_param->_size_packet_id        );
    68        in_RESERVATION_STATION_IN_OPERATION      = interface->set_signal_in <Toperation_t      > ("operation"   ,_param->_size_operation        );
    69        in_RESERVATION_STATION_IN_TYPE           = interface->set_signal_in <Ttype_t           > ("type"        ,_param->_size_type             );
    70        in_RESERVATION_STATION_IN_HAS_IMMEDIAT   = interface->set_signal_in <Tcontrol_t        > ("has_immediat",1                             );
    71        in_RESERVATION_STATION_IN_IMMEDIAT       = interface->set_signal_in <Tgeneral_data_t   > ("immediat"    ,_param->_size_general_data     );
    72 //     in_RESERVATION_STATION_IN_READ_RA        = interface->set_signal_in <Tcontrol_t        > ("read_ra"     ,1                             );
    73        in_RESERVATION_STATION_IN_NUM_REG_RA     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_ra"  ,_param->_size_general_register );
    74        in_RESERVATION_STATION_IN_DATA_RA_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_ra_val" ,1                             );
    75        in_RESERVATION_STATION_IN_DATA_RA        = interface->set_signal_in <Tgeneral_data_t   > ("data_ra"     ,_param->_size_general_data     );
    76 //     in_RESERVATION_STATION_IN_READ_RB        = interface->set_signal_in <Tcontrol_t        > ("read_rb"     ,1                             );
    77        in_RESERVATION_STATION_IN_NUM_REG_RB     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rb"  ,_param->_size_general_register );
    78        in_RESERVATION_STATION_IN_DATA_RB_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rb_val" ,1                             );
    79        in_RESERVATION_STATION_IN_DATA_RB        = interface->set_signal_in <Tgeneral_data_t   > ("data_rb"     ,_param->_size_general_data     );
    80 //     in_RESERVATION_STATION_IN_READ_RC        = interface->set_signal_in <Tcontrol_t        > ("read_rc"     ,1                             );
    81        in_RESERVATION_STATION_IN_NUM_REG_RC     = interface->set_signal_in <Tspecial_address_t> ("num_reg_rc"  ,_param->_size_special_register );
    82        in_RESERVATION_STATION_IN_DATA_RC_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rc_val" ,1                             );
    83        in_RESERVATION_STATION_IN_DATA_RC        = interface->set_signal_in <Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data     );
    84        in_RESERVATION_STATION_IN_WRITE_RD       = interface->set_signal_in <Tcontrol_t        > ("write_rd"    ,1                             );
    85        in_RESERVATION_STATION_IN_NUM_REG_RD     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd"  ,_param->_size_general_register );
    86        in_RESERVATION_STATION_IN_WRITE_RE       = interface->set_signal_in <Tcontrol_t        > ("write_re"    ,1                             );
    87        in_RESERVATION_STATION_IN_NUM_REG_RE     = interface->set_signal_in <Tspecial_address_t> ("num_reg_re"  ,_param->_size_special_register );     
     64       in_INSERT_VAL            = interface->set_signal_valack_in  (VAL);
     65      out_INSERT_ACK            = interface->set_signal_valack_out (ACK);
     66      if (_param->_have_port_context_id)
     67       in_INSERT_CONTEXT_ID     = interface->set_signal_in <Tcontext_t        > ("context_id"     ,_param->_size_context_id       );
     68      if (_param->_have_port_front_end_id)
     69       in_INSERT_FRONT_END_ID   = interface->set_signal_in <Tcontext_t        > ("front_end_id"   ,_param->_size_front_end_id     );
     70      if (_param->_have_port_ooo_engine_id)
     71       in_INSERT_OOO_ENGINE_ID  = interface->set_signal_in <Tcontext_t        > ("ooo_engine_id"  ,_param->_size_ooo_engine_id    );
     72      if (_param->_have_port_rob_id)
     73       in_INSERT_ROB_ID         = interface->set_signal_in <Tpacket_t         > ("rob_id"         ,_param->_size_rob_id        );
     74       in_INSERT_OPERATION      = interface->set_signal_in <Toperation_t      > ("operation"      ,_param->_size_operation        );
     75       in_INSERT_TYPE           = interface->set_signal_in <Ttype_t           > ("type"           ,_param->_size_type             );
     76       in_INSERT_HAS_IMMEDIAT   = interface->set_signal_in <Tcontrol_t        > ("has_immediat"   ,1                             );
     77       in_INSERT_IMMEDIAT       = interface->set_signal_in <Tgeneral_data_t   > ("immediat"       ,_param->_size_general_data     );
     78//     in_INSERT_READ_RA        = interface->set_signal_in <Tcontrol_t        > ("read_ra"        ,1                             );
     79       in_INSERT_NUM_REG_RA     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_ra"     ,_param->_size_general_register );
     80       in_INSERT_DATA_RA_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_ra_val"    ,1                             );
     81       in_INSERT_DATA_RA        = interface->set_signal_in <Tgeneral_data_t   > ("data_ra"        ,_param->_size_general_data     );
     82//     in_INSERT_READ_RB        = interface->set_signal_in <Tcontrol_t        > ("read_rb"        ,1                             );
     83       in_INSERT_NUM_REG_RB     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rb"     ,_param->_size_general_register );
     84       in_INSERT_DATA_RB_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rb_val"    ,1                             );
     85       in_INSERT_DATA_RB        = interface->set_signal_in <Tgeneral_data_t   > ("data_rb"        ,_param->_size_general_data     );
     86//     in_INSERT_READ_RC        = interface->set_signal_in <Tcontrol_t        > ("read_rc"        ,1                             );
     87       in_INSERT_NUM_REG_RC     = interface->set_signal_in <Tspecial_address_t> ("num_reg_rc"     ,_param->_size_special_register );
     88       in_INSERT_DATA_RC_VAL    = interface->set_signal_in <Tcontrol_t        > ("data_rc_val"    ,1                             );
     89       in_INSERT_DATA_RC        = interface->set_signal_in <Tspecial_data_t   > ("data_rc"        ,_param->_size_special_data     );
     90       in_INSERT_WRITE_RD       = interface->set_signal_in <Tcontrol_t        > ("write_rd"       ,1                             );
     91       in_INSERT_NUM_REG_RD     = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd"     ,_param->_size_general_register );
     92       in_INSERT_WRITE_RE       = interface->set_signal_in <Tcontrol_t        > ("write_re"       ,1                             );
     93       in_INSERT_NUM_REG_RE     = interface->set_signal_in <Tspecial_address_t> ("num_reg_re"     ,_param->_size_special_register );     
    8894     }
    8995
    90     // ~~~~~[ Interface : "reservation_station_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~
    91     out_RESERVATION_STATION_OUT_VAL         = new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
    92      in_RESERVATION_STATION_OUT_ACK         = new SC_IN (Tcontrol_t        ) * [_param->_size_queue];
    93     out_RESERVATION_STATION_OUT_CONTEXT_ID  = new SC_OUT(Tcontext_t        ) * [_param->_size_queue];
    94     out_RESERVATION_STATION_OUT_PACKET_ID   = new SC_OUT(Tpacket_t         ) * [_param->_size_queue];
    95     out_RESERVATION_STATION_OUT_OPERATION   = new SC_OUT(Toperation_t      ) * [_param->_size_queue];
    96     out_RESERVATION_STATION_OUT_TYPE        = new SC_OUT(Ttype_t           ) * [_param->_size_queue];
    97     out_RESERVATION_STATION_OUT_HAS_IMMEDIAT= new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
    98     out_RESERVATION_STATION_OUT_IMMEDIAT    = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_queue];
    99     out_RESERVATION_STATION_OUT_DATA_RA     = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_queue];
    100     out_RESERVATION_STATION_OUT_DATA_RB     = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_queue];
    101     out_RESERVATION_STATION_OUT_DATA_RC     = new SC_OUT(Tspecial_data_t   ) * [_param->_size_queue];
    102     out_RESERVATION_STATION_OUT_WRITE_RD    = new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
    103     out_RESERVATION_STATION_OUT_NUM_REG_RD  = new SC_OUT(Tgeneral_address_t) * [_param->_size_queue];
    104     out_RESERVATION_STATION_OUT_WRITE_RE    = new SC_OUT(Tcontrol_t        ) * [_param->_size_queue];
    105     out_RESERVATION_STATION_OUT_NUM_REG_RE  = new SC_OUT(Tspecial_address_t) * [_param->_size_queue];
     96    // ~~~~~[ Interface : "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~
     97    out_RETIRE_VAL            = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
     98     in_RETIRE_ACK            = new SC_IN (Tcontrol_t        ) * [_param->_nb_inst_retire];
     99    if (_param->_have_port_context_id)
     100    out_RETIRE_CONTEXT_ID     = new SC_OUT(Tcontext_t        ) * [_param->_nb_inst_retire];
     101    if (_param->_have_port_front_end_id)
     102    out_RETIRE_FRONT_END_ID   = new SC_OUT(Tcontext_t        ) * [_param->_nb_inst_retire];
     103    if (_param->_have_port_ooo_engine_id)
     104    out_RETIRE_OOO_ENGINE_ID  = new SC_OUT(Tcontext_t        ) * [_param->_nb_inst_retire];
     105    if (_param->_have_port_rob_id)
     106    out_RETIRE_ROB_ID         = new SC_OUT(Tpacket_t         ) * [_param->_nb_inst_retire];
     107    out_RETIRE_OPERATION      = new SC_OUT(Toperation_t      ) * [_param->_nb_inst_retire];
     108    out_RETIRE_TYPE           = new SC_OUT(Ttype_t           ) * [_param->_nb_inst_retire];
     109    out_RETIRE_HAS_IMMEDIAT   = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
     110    out_RETIRE_IMMEDIAT       = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_inst_retire];
     111    out_RETIRE_DATA_RA        = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_inst_retire];
     112    out_RETIRE_DATA_RB        = new SC_OUT(Tgeneral_data_t   ) * [_param->_nb_inst_retire];
     113    out_RETIRE_DATA_RC        = new SC_OUT(Tspecial_data_t   ) * [_param->_nb_inst_retire];
     114    out_RETIRE_WRITE_RD       = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
     115    out_RETIRE_NUM_REG_RD     = new SC_OUT(Tgeneral_address_t) * [_param->_nb_inst_retire];
     116    out_RETIRE_WRITE_RE       = new SC_OUT(Tcontrol_t        ) * [_param->_nb_inst_retire];
     117    out_RETIRE_NUM_REG_RE     = new SC_OUT(Tspecial_address_t) * [_param->_nb_inst_retire];
    106118   
    107     for (uint32_t i=0; i<_param->_size_queue; i++)
    108       {
    109         Interface_fifo * interface = _interfaces->set_interface("reservation_station_out_"+toString(i)
     119    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     120      {
     121        Interface_fifo * interface = _interfaces->set_interface("retire_"+toString(i)
    110122#ifdef POSITION
    111123                                                                ,OUT
    … …  
    114126#endif
    115127                                                                );
    116         out_RESERVATION_STATION_OUT_VAL          [i] = interface->set_signal_valack_out(VAL);
    117          in_RESERVATION_STATION_OUT_ACK          [i] = interface->set_signal_valack_in (ACK);
    118         out_RESERVATION_STATION_OUT_CONTEXT_ID   [i] = interface->set_signal_out<Tcontext_t        > ("context_id"  ,_param->_size_context_id);
    119         out_RESERVATION_STATION_OUT_PACKET_ID    [i] = interface->set_signal_out<Tpacket_t         > ("packet_id"   ,_param->_size_packet_id);
    120         out_RESERVATION_STATION_OUT_OPERATION    [i] = interface->set_signal_out<Toperation_t      > ("operation"   ,_param->_size_operation);
    121         out_RESERVATION_STATION_OUT_TYPE         [i] = interface->set_signal_out<Ttype_t           > ("type"        ,_param->_size_type);
    122         out_RESERVATION_STATION_OUT_HAS_IMMEDIAT [i] = interface->set_signal_out<Tcontrol_t        > ("has_immediat",1);
    123         out_RESERVATION_STATION_OUT_IMMEDIAT     [i] = interface->set_signal_out<Tgeneral_data_t   > ("immediat"    ,_param->_size_general_data);
    124         out_RESERVATION_STATION_OUT_DATA_RA      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_ra"     ,_param->_size_general_data);
    125         out_RESERVATION_STATION_OUT_DATA_RB      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_rb"     ,_param->_size_general_data);
    126         out_RESERVATION_STATION_OUT_DATA_RC      [i] = interface->set_signal_out<Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data);
    127         out_RESERVATION_STATION_OUT_WRITE_RD     [i] = interface->set_signal_out<Tcontrol_t        > ("write_rd"    ,1);
    128         out_RESERVATION_STATION_OUT_NUM_REG_RD   [i] = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd"  ,_param->_size_general_register);
    129         out_RESERVATION_STATION_OUT_WRITE_RE     [i] = interface->set_signal_out<Tcontrol_t        > ("write_re"    ,1);
    130         out_RESERVATION_STATION_OUT_NUM_REG_RE   [i] = interface->set_signal_out<Tspecial_address_t> ("num_reg_re"  ,_param->_size_special_register);
     128        out_RETIRE_VAL          [i] = interface->set_signal_valack_out(VAL);
     129         in_RETIRE_ACK          [i] = interface->set_signal_valack_in (ACK);
     130        if (_param->_have_port_context_id)
     131        out_RETIRE_CONTEXT_ID   [i] = interface->set_signal_out<Tcontext_t        > ("context_id"   ,_param->_size_context_id);
     132        if (_param->_have_port_front_end_id)
     133        out_RETIRE_FRONT_END_ID [i] = interface->set_signal_out<Tcontext_t        > ("front_end_id" ,_param->_size_front_end_id);
     134        if (_param->_have_port_ooo_engine_id)
     135        out_RETIRE_OOO_ENGINE_ID[i] = interface->set_signal_out<Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
     136        if (_param->_have_port_rob_id)
     137        out_RETIRE_ROB_ID       [i] = interface->set_signal_out<Tpacket_t         > ("rob_id"       ,_param->_size_rob_id);
     138        out_RETIRE_OPERATION    [i] = interface->set_signal_out<Toperation_t      > ("operation"    ,_param->_size_operation);
     139        out_RETIRE_TYPE         [i] = interface->set_signal_out<Ttype_t           > ("type"         ,_param->_size_type);
     140        out_RETIRE_HAS_IMMEDIAT [i] = interface->set_signal_out<Tcontrol_t        > ("has_immediat" ,1);
     141        out_RETIRE_IMMEDIAT     [i] = interface->set_signal_out<Tgeneral_data_t   > ("immediat"     ,_param->_size_general_data);
     142        out_RETIRE_DATA_RA      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_ra"      ,_param->_size_general_data);
     143        out_RETIRE_DATA_RB      [i] = interface->set_signal_out<Tgeneral_data_t   > ("data_rb"      ,_param->_size_general_data);
     144        out_RETIRE_DATA_RC      [i] = interface->set_signal_out<Tspecial_data_t   > ("data_rc"      ,_param->_size_special_data);
     145        out_RETIRE_WRITE_RD     [i] = interface->set_signal_out<Tcontrol_t        > ("write_rd"     ,1);
     146        out_RETIRE_NUM_REG_RD   [i] = interface->set_signal_out<Tgeneral_address_t> ("num_reg_rd"   ,_param->_size_general_register);
     147        out_RETIRE_WRITE_RE     [i] = interface->set_signal_out<Tcontrol_t        > ("write_re"     ,1);
     148        out_RETIRE_NUM_REG_RE   [i] = interface->set_signal_out<Tspecial_address_t> ("num_reg_re"   ,_param->_size_special_register);
    131149      }
    132150
    133151    // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    134      in_GPR_WRITE_VAL       = new SC_IN (Tcontrol_t        ) * [_param->_nb_gpr_write];
    135      in_GPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_gpr_write];
    136      in_GPR_WRITE_NUM_REG   = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write];
    137      in_GPR_WRITE_DATA      = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_gpr_write];
     152     in_GPR_WRITE_VAL          = new SC_IN (Tcontrol_t        ) * [_param->_nb_gpr_write];
     153     if (_param->_have_port_ooo_engine_id)
     154     in_GPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_gpr_write];
     155     in_GPR_WRITE_NUM_REG      = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write];
     156     in_GPR_WRITE_DATA         = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_gpr_write];
    138157
    139158    for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
    … …  
    147166                                                                );
    148167
    149          in_GPR_WRITE_VAL        [i] = interface->set_signal_valack_in (VAL);
    150          in_GPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id",_param->_size_context_id);
    151          in_GPR_WRITE_NUM_REG    [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"   ,_param->_size_general_register);
    152          in_GPR_WRITE_DATA       [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"      ,_param->_size_general_data);
     168         in_GPR_WRITE_VAL           [i] = interface->set_signal_valack_in (VAL);
     169         if (_param->_have_port_ooo_engine_id)
     170         in_GPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
     171         in_GPR_WRITE_NUM_REG       [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"      ,_param->_size_general_register);
     172         in_GPR_WRITE_DATA          [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"         ,_param->_size_general_data);
    153173      }
    154174
    155175    // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    156      in_SPR_WRITE_VAL       = new SC_IN (Tcontrol_t        ) * [_param->_nb_spr_write];
    157      in_SPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_spr_write];
    158      in_SPR_WRITE_NUM_REG   = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write];
    159      in_SPR_WRITE_DATA      = new SC_IN (Tspecial_data_t   ) * [_param->_nb_spr_write];
     176     in_SPR_WRITE_VAL          = new SC_IN (Tcontrol_t        ) * [_param->_nb_spr_write];
     177     if (_param->_have_port_ooo_engine_id)
     178     in_SPR_WRITE_OOO_ENGINE_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_spr_write];
     179     in_SPR_WRITE_NUM_REG      = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write];
     180     in_SPR_WRITE_DATA         = new SC_IN (Tspecial_data_t   ) * [_param->_nb_spr_write];
    160181
    161182    for (uint32_t i=0; i<_param->_nb_spr_write; i++)
    … …  
    169190                                                                );
    170191
    171          in_SPR_WRITE_VAL        [i] = interface->set_signal_valack_in (VAL);
    172          in_SPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id",_param->_size_context_id);
    173          in_SPR_WRITE_NUM_REG    [i] = interface->set_signal_in  <Tspecial_address_t> ("num_reg"   ,_param->_size_special_register);
    174          in_SPR_WRITE_DATA       [i] = interface->set_signal_in  <Tspecial_data_t   > ("data"      ,_param->_size_special_data);
     192         in_SPR_WRITE_VAL           [i] = interface->set_signal_valack_in (VAL);
     193         if (_param->_have_port_ooo_engine_id)
     194         in_SPR_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
     195         in_SPR_WRITE_NUM_REG       [i] = interface->set_signal_in  <Tspecial_address_t> ("num_reg"      ,_param->_size_special_register);
     196         in_SPR_WRITE_DATA          [i] = interface->set_signal_in  <Tspecial_data_t   > ("data"         ,_param->_size_special_data);
    175197      }
    176198
    177199    // ~~~~~[ Interface : "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    178      in_BYPASS_WRITE_CONTEXT_ID  = new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_write];
    179      in_BYPASS_WRITE_GPR_VAL     = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
    180      in_BYPASS_WRITE_GPR_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_write];
    181      in_BYPASS_WRITE_GPR_DATA    = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_write];
    182      in_BYPASS_WRITE_SPR_VAL     = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
    183      in_BYPASS_WRITE_SPR_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_bypass_write];
    184      in_BYPASS_WRITE_SPR_DATA    = new SC_IN (Tspecial_data_t   ) * [_param->_nb_bypass_write];
     200     if (_param->_have_port_ooo_engine_id)
     201     in_BYPASS_WRITE_OOO_ENGINE_ID  = new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_write];
     202     in_BYPASS_WRITE_GPR_VAL        = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
     203     in_BYPASS_WRITE_GPR_NUM_REG    = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_write];
     204     in_BYPASS_WRITE_GPR_DATA       = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_write];
     205     in_BYPASS_WRITE_SPR_VAL        = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_write];
     206     in_BYPASS_WRITE_SPR_NUM_REG    = new SC_IN (Tspecial_address_t) * [_param->_nb_bypass_write];
     207     in_BYPASS_WRITE_SPR_DATA       = new SC_IN (Tspecial_data_t   ) * [_param->_nb_bypass_write];
    185208
    186209    for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
    … …  
    194217                                                                );
    195218
    196          in_BYPASS_WRITE_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id" ,_param->_size_context_id);
    197          in_BYPASS_WRITE_GPR_VAL    [i] = interface->set_signal_valack_in ("gpr_val",VAL);
    198          in_BYPASS_WRITE_GPR_NUM_REG[i] = interface->set_signal_in  <Tgeneral_address_t> ("gpr_num_reg",_param->_size_general_register);
    199          in_BYPASS_WRITE_GPR_DATA   [i] = interface->set_signal_in  <Tgeneral_data_t   > ("gpr_data"   ,_param->_size_general_data);
    200          in_BYPASS_WRITE_SPR_VAL    [i] = interface->set_signal_valack_in ("spr_val",VAL);
    201          in_BYPASS_WRITE_SPR_NUM_REG[i] = interface->set_signal_in  <Tspecial_address_t> ("spr_num_reg",_param->_size_general_register);
    202          in_BYPASS_WRITE_SPR_DATA   [i] = interface->set_signal_in  <Tspecial_data_t   > ("spr_data"   ,_param->_size_general_data);
     219         if (_param->_have_port_ooo_engine_id)
     220         in_BYPASS_WRITE_OOO_ENGINE_ID [i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id" ,_param->_size_ooo_engine_id);
     221         in_BYPASS_WRITE_GPR_VAL       [i] = interface->set_signal_valack_in ("gpr_val",VAL);               
     222         in_BYPASS_WRITE_GPR_NUM_REG   [i] = interface->set_signal_in  <Tgeneral_address_t> ("gpr_num_reg"   ,_param->_size_general_register);
     223         in_BYPASS_WRITE_GPR_DATA      [i] = interface->set_signal_in  <Tgeneral_data_t   > ("gpr_data"      ,_param->_size_general_data);
     224         in_BYPASS_WRITE_SPR_VAL       [i] = interface->set_signal_valack_in ("spr_val",VAL);               
     225         in_BYPASS_WRITE_SPR_NUM_REG   [i] = interface->set_signal_in  <Tspecial_address_t> ("spr_num_reg"   ,_param->_size_general_register);
     226         in_BYPASS_WRITE_SPR_DATA      [i] = interface->set_signal_in  <Tspecial_data_t   > ("spr_data"      ,_param->_size_general_data);
    203227      }
    204228
    205229    // ~~~~~[ Interface : "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    206      in_BYPASS_MEMORY_VAL         = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_memory];
    207      in_BYPASS_MEMORY_CONTEXT_ID  = new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_memory];
    208      in_BYPASS_MEMORY_NUM_REG     = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_memory];
    209      in_BYPASS_MEMORY_DATA        = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_memory];
     230     in_BYPASS_MEMORY_VAL          = new SC_IN (Tcontrol_t        ) * [_param->_nb_bypass_memory];
     231     if (_param->_have_port_ooo_engine_id)
     232     in_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_IN (Tcontext_t        ) * [_param->_nb_bypass_memory];
     233     in_BYPASS_MEMORY_NUM_REG      = new SC_IN (Tgeneral_address_t) * [_param->_nb_bypass_memory];
     234     in_BYPASS_MEMORY_DATA         = new SC_IN (Tgeneral_data_t   ) * [_param->_nb_bypass_memory];
    210235
    211236    for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
    … …  
    219244                                                                );
    220245
    221          in_BYPASS_MEMORY_VAL        [i] = interface->set_signal_valack_in (VAL);
    222          in_BYPASS_MEMORY_CONTEXT_ID [i] = interface->set_signal_in  <Tcontext_t        > ("context_id" ,_param->_size_context_id);
    223          in_BYPASS_MEMORY_NUM_REG    [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"    ,_param->_size_general_register);
    224          in_BYPASS_MEMORY_DATA       [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"       ,_param->_size_general_data);
     246         in_BYPASS_MEMORY_VAL          [i] = interface->set_signal_valack_in (VAL);
     247         if (_param->_have_port_ooo_engine_id)
     248         in_BYPASS_MEMORY_OOO_ENGINE_ID[i] = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id);
     249         in_BYPASS_MEMORY_NUM_REG      [i] = interface->set_signal_in  <Tgeneral_address_t> ("num_reg"      ,_param->_size_general_register);
     250         in_BYPASS_MEMORY_DATA         [i] = interface->set_signal_in  <Tgeneral_data_t   > ("data"         ,_param->_size_general_data);
    225251      }
    226252
    227253
    228254    // ~~~~~[ internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    229     internal_RESERVATION_STATION_OUT_VAL = new Tcontrol_t [_param->_size_queue];
     255    internal_RETIRE_VAL  = new Tcontrol_t [_param->_nb_inst_retire];
     256    internal_RETIRE_SLOT = new uint32_t   [_param->_nb_inst_retire];
    230257
    231258    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    … …  
    234261    _component->generate_file();
    235262#endif
     263#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     264    _queue_valid   = new bool [_param->_size_queue];
     265#else
    236266    _queue_control = new morpheo::behavioural::generic::queue_control::Queue_Control::Queue_Control(_param->_size_queue);
     267#endif
    237268    _queue         = new Treservation_station_entry_t [_param->_size_queue];
    238269

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp

    r55 r69  
    3131    delete     in_NRESET;
    3232
    33     delete     in_RESERVATION_STATION_IN_VAL         ;
    34     delete    out_RESERVATION_STATION_IN_ACK         ;
    35     delete     in_RESERVATION_STATION_IN_CONTEXT_ID  ;
    36     delete     in_RESERVATION_STATION_IN_PACKET_ID   ;
    37     delete     in_RESERVATION_STATION_IN_OPERATION   ;
    38     delete     in_RESERVATION_STATION_IN_TYPE        ;
    39     delete     in_RESERVATION_STATION_IN_HAS_IMMEDIAT;
    40     delete     in_RESERVATION_STATION_IN_IMMEDIAT    ;
    41 //     delete     in_RESERVATION_STATION_IN_READ_RA     ;
    42     delete     in_RESERVATION_STATION_IN_NUM_REG_RA  ;
    43     delete     in_RESERVATION_STATION_IN_DATA_RA_VAL ;
    44     delete     in_RESERVATION_STATION_IN_DATA_RA     ;
    45 //     delete     in_RESERVATION_STATION_IN_READ_RB     ;
    46     delete     in_RESERVATION_STATION_IN_NUM_REG_RB  ;
    47     delete     in_RESERVATION_STATION_IN_DATA_RB_VAL ;
    48     delete     in_RESERVATION_STATION_IN_DATA_RB     ;
    49 //     delete     in_RESERVATION_STATION_IN_READ_RC     ;
    50     delete     in_RESERVATION_STATION_IN_NUM_REG_RC  ;
    51     delete     in_RESERVATION_STATION_IN_DATA_RC_VAL ;
    52     delete     in_RESERVATION_STATION_IN_DATA_RC     ;
    53     delete     in_RESERVATION_STATION_IN_WRITE_RD    ;
    54     delete     in_RESERVATION_STATION_IN_NUM_REG_RD  ;
    55     delete     in_RESERVATION_STATION_IN_WRITE_RE    ;
    56     delete     in_RESERVATION_STATION_IN_NUM_REG_RE  ;
     33    delete     in_INSERT_VAL           ;
     34    delete    out_INSERT_ACK           ;
     35    if (_param->_have_port_context_id)
     36    delete     in_INSERT_CONTEXT_ID    ;
     37    if (_param->_have_port_front_end_id)
     38    delete     in_INSERT_FRONT_END_ID  ;
     39    if (_param->_have_port_ooo_engine_id)
     40    delete     in_INSERT_OOO_ENGINE_ID ;
     41    if (_param->_have_port_rob_id)
     42    delete     in_INSERT_ROB_ID        ;
     43    delete     in_INSERT_OPERATION     ;
     44    delete     in_INSERT_TYPE          ;
     45    delete     in_INSERT_HAS_IMMEDIAT  ;
     46    delete     in_INSERT_IMMEDIAT      ;
     47//  delete     in_INSERT_READ_RA       ;
     48    delete     in_INSERT_NUM_REG_RA    ;
     49    delete     in_INSERT_DATA_RA_VAL   ;
     50    delete     in_INSERT_DATA_RA       ;
     51//  delete     in_INSERT_READ_RB       ;
     52    delete     in_INSERT_NUM_REG_RB    ;
     53    delete     in_INSERT_DATA_RB_VAL   ;
     54    delete     in_INSERT_DATA_RB       ;
     55//  delete     in_INSERT_READ_RC       ;
     56    delete     in_INSERT_NUM_REG_RC    ;
     57    delete     in_INSERT_DATA_RC_VAL   ;
     58    delete     in_INSERT_DATA_RC       ;
     59    delete     in_INSERT_WRITE_RD      ;
     60    delete     in_INSERT_NUM_REG_RD    ;
     61    delete     in_INSERT_WRITE_RE      ;
     62    delete     in_INSERT_NUM_REG_RE    ;
    5763   
    58     delete [] out_RESERVATION_STATION_OUT_VAL         ;
    59     delete []  in_RESERVATION_STATION_OUT_ACK         ;
    60     delete [] out_RESERVATION_STATION_OUT_CONTEXT_ID  ;
    61     delete [] out_RESERVATION_STATION_OUT_PACKET_ID   ;
    62     delete [] out_RESERVATION_STATION_OUT_OPERATION   ;
    63     delete [] out_RESERVATION_STATION_OUT_TYPE        ;
    64     delete [] out_RESERVATION_STATION_OUT_HAS_IMMEDIAT;
    65     delete [] out_RESERVATION_STATION_OUT_IMMEDIAT    ;
    66     delete [] out_RESERVATION_STATION_OUT_DATA_RA     ;
    67     delete [] out_RESERVATION_STATION_OUT_DATA_RB     ;
    68     delete [] out_RESERVATION_STATION_OUT_DATA_RC     ;
    69     delete [] out_RESERVATION_STATION_OUT_WRITE_RD    ;
    70     delete [] out_RESERVATION_STATION_OUT_NUM_REG_RD  ;
    71     delete [] out_RESERVATION_STATION_OUT_WRITE_RE    ;
    72     delete [] out_RESERVATION_STATION_OUT_NUM_REG_RE  ;
     64    delete [] out_RETIRE_VAL           ;
     65    delete []  in_RETIRE_ACK           ;
     66    if (_param->_have_port_context_id)
     67    delete [] out_RETIRE_CONTEXT_ID    ;
     68    if (_param->_have_port_front_end_id)
     69    delete [] out_RETIRE_FRONT_END_ID  ;
     70    if (_param->_have_port_ooo_engine_id)
     71    delete [] out_RETIRE_OOO_ENGINE_ID ;
     72    if (_param->_have_port_rob_id)
     73    delete [] out_RETIRE_ROB_ID        ;
     74    delete [] out_RETIRE_OPERATION     ;
     75    delete [] out_RETIRE_TYPE          ;
     76    delete [] out_RETIRE_HAS_IMMEDIAT  ;
     77    delete [] out_RETIRE_IMMEDIAT      ;
     78    delete [] out_RETIRE_DATA_RA       ;
     79    delete [] out_RETIRE_DATA_RB       ;
     80    delete [] out_RETIRE_DATA_RC       ;
     81    delete [] out_RETIRE_WRITE_RD      ;
     82    delete [] out_RETIRE_NUM_REG_RD    ;
     83    delete [] out_RETIRE_WRITE_RE      ;
     84    delete [] out_RETIRE_NUM_REG_RE    ;
    7385   
    74     delete []  in_GPR_WRITE_VAL       ;
    75     delete []  in_GPR_WRITE_CONTEXT_ID;
    76     delete []  in_GPR_WRITE_NUM_REG   ;
    77     delete []  in_GPR_WRITE_DATA      ;
     86    delete []  in_GPR_WRITE_VAL         ;
     87    if (_param->_have_port_ooo_engine_id)
     88    delete []  in_GPR_WRITE_OOO_ENGINE_ID;
     89    delete []  in_GPR_WRITE_NUM_REG     ;
     90    delete []  in_GPR_WRITE_DATA        ;
    7891   
    7992    delete []  in_SPR_WRITE_VAL       ;
    80     delete []  in_SPR_WRITE_CONTEXT_ID;
     93    if (_param->_have_port_ooo_engine_id)
     94    delete []  in_SPR_WRITE_OOO_ENGINE_ID;
    8195    delete []  in_SPR_WRITE_NUM_REG   ;
    8296    delete []  in_SPR_WRITE_DATA      ;
    8397   
    84     delete []  in_BYPASS_WRITE_CONTEXT_ID ;
     98    if (_param->_have_port_ooo_engine_id)
     99    delete []  in_BYPASS_WRITE_OOO_ENGINE_ID;
    85100    delete []  in_BYPASS_WRITE_GPR_VAL    ;
    86101    delete []  in_BYPASS_WRITE_GPR_NUM_REG;
    … …  
    91106   
    92107    delete []  in_BYPASS_MEMORY_VAL       ;
    93     delete []  in_BYPASS_MEMORY_CONTEXT_ID;
     108    if (_param->_have_port_ooo_engine_id)
     109    delete []  in_BYPASS_MEMORY_OOO_ENGINE_ID;
    94110    delete []  in_BYPASS_MEMORY_NUM_REG   ;
    95111    delete []  in_BYPASS_MEMORY_DATA      ;
    96112   
    97113    // ~~~~~[ internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    98     delete []  internal_RESERVATION_STATION_OUT_VAL;
     114    delete []  internal_RETIRE_VAL;
    99115
    100116    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    101117
    102118    delete    _component;
     119#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     120    delete [] _queue_valid  ;
     121#else
    103122    delete    _queue_control;
     123#endif
    104124    delete [] _queue        ;
    105125

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_end_cycle.cpp

    r59 r69  
    1 #ifdef VHDL_TESTBENCH
    21/*
    32 * $Id$
    … …  
    2019
    2120#undef  FUNCTION
    22 #define FUNCTION "Reservation_station::vhdl_testbench_transition"
    23   void Reservation_station::vhdl_testbench_transition ()
     21#define FUNCTION "Reservation_station::end_cycle"
     22  void Reservation_station::end_cycle ()
    2423  {
    2524    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
    2625
     26#ifdef STATISTICS
     27    _stat->add();
     28#endif   
     29
     30#ifdef VHDL_TESTBENCH
    2731    // Evaluation before read the ouput signal
    2832//     sc_start(0);
    29 
    3033    _interfaces->testbench();
    31 
     34#endif
    3235    log_printf(FUNC,Reservation_station,FUNCTION,"End");
    3336  };
    … …  
    4245}; // end namespace behavioural
    4346}; // end namespace morpheo             
    44 #endif

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp

    r56 r69  
    2626    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
    2727
    28     // ~~~~~[ Interface "reservation_station_in" ]~~~~~~~~~~~~~~~~~~~~~~~~
     28    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~
    2929   
    3030    // accept a new instructions when reservation_station is not full
    31     internal_RESERVATION_STATION_IN_ACK = not _queue_control->full();
    32    
    33     PORT_WRITE(out_RESERVATION_STATION_IN_ACK, internal_RESERVATION_STATION_IN_ACK);
     31#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     32    for (internal_INSERT_SLOT=0; (internal_INSERT_SLOT<_param->_size_queue) and (_queue_valid[internal_INSERT_SLOT]==true); internal_INSERT_SLOT++);
     33    internal_INSERT_ACK = (internal_INSERT_SLOT<_param->_size_queue);
     34#else
     35    internal_INSERT_ACK = not _queue_control->full();
     36#endif   
     37    PORT_WRITE(out_INSERT_ACK, internal_INSERT_ACK);
    3438
    35     // ~~~~~[ Interface "reservation_station_out" ]~~~~~~~~~~~~~~~~~~~~~~~
     39    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~
    3640
    37     for (uint32_t i=0; i<_param->_size_queue; i++)
     41    uint32_t nb_slot_find = 0;
     42    for (uint32_t i=0; (
     43#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     44                        (i<_param->_size_queue)
     45#else
     46                        (i<_queue_control->nb_elt())
     47#endif
     48                        and (nb_slot_find < _param->_nb_inst_retire)
     49
     50                        )
     51                        ; i++)
    3852      {
    39         bool     val   = i <_queue_control->nb_elt();
    40         uint32_t index = (*_queue_control)[i];
    41        
     53        uint32_t index;
     54#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     55        index = i;
     56#else
     57        index = (*_queue_control)[i];
     58#endif
     59        bool     val   =
     60          (
     61#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     62           _queue_valid [i]           and
     63#endif
     64           _queue[index]._data_ra_val and
     65           _queue[index]._data_rb_val and
     66           _queue[index]._data_rc_val);
     67
    4268        if (val == true)
    4369          {
    44             // valid if all data is present
    45             val = (_queue[index]._data_ra_val and
    46                    _queue[index]._data_rb_val and
    47                    _queue[index]._data_rc_val);
     70            internal_RETIRE_SLOT [nb_slot_find] = i;
     71            nb_slot_find ++;
     72          }
     73      }
    4874
    49             PORT_WRITE(out_RESERVATION_STATION_OUT_CONTEXT_ID  [index],_queue[index]._context_id);
    50             PORT_WRITE(out_RESERVATION_STATION_OUT_PACKET_ID   [index],_queue[index]._packet_id);
    51             PORT_WRITE(out_RESERVATION_STATION_OUT_OPERATION   [index],_queue[index]._operation);
    52             PORT_WRITE(out_RESERVATION_STATION_OUT_TYPE        [index],_queue[index]._type);
    53             PORT_WRITE(out_RESERVATION_STATION_OUT_HAS_IMMEDIAT[index],_queue[index]._has_immediat);
    54             PORT_WRITE(out_RESERVATION_STATION_OUT_IMMEDIAT    [index],_queue[index]._immediat);
    55             PORT_WRITE(out_RESERVATION_STATION_OUT_DATA_RA     [index],_queue[index]._data_ra);
    56             PORT_WRITE(out_RESERVATION_STATION_OUT_DATA_RB     [index],_queue[index]._data_rb);
    57             PORT_WRITE(out_RESERVATION_STATION_OUT_DATA_RC     [index],_queue[index]._data_rc);
    58             PORT_WRITE(out_RESERVATION_STATION_OUT_WRITE_RD    [index],_queue[index]._write_rd);
    59             PORT_WRITE(out_RESERVATION_STATION_OUT_NUM_REG_RD  [index],_queue[index]._num_reg_rd);
    60             PORT_WRITE(out_RESERVATION_STATION_OUT_WRITE_RE    [index],_queue[index]._write_re);
    61             PORT_WRITE(out_RESERVATION_STATION_OUT_NUM_REG_RE  [index],_queue[index]._num_reg_re);
     75    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     76      {
     77        bool val                = i<nb_slot_find;
     78        internal_RETIRE_VAL [i] = val;
     79
     80        PORT_WRITE(out_RETIRE_VAL [i], val);
     81
     82        if (val)
     83          {
     84            uint32_t index;
     85#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     86            index = internal_RETIRE_SLOT [i];
     87#else
     88            index = (*_queue_control)[internal_RETIRE_SLOT [i]];
     89#endif
     90            if (_param->_have_port_context_id)
     91            PORT_WRITE(out_RETIRE_CONTEXT_ID    [i],_queue[index]._context_id);
     92            if (_param->_have_port_front_end_id)
     93            PORT_WRITE(out_RETIRE_FRONT_END_ID  [i],_queue[index]._front_end_id);
     94            if (_param->_have_port_ooo_engine_id)
     95            PORT_WRITE(out_RETIRE_OOO_ENGINE_ID [i],_queue[index]._ooo_engine_id);
     96            if (_param->_have_port_rob_id)
     97            PORT_WRITE(out_RETIRE_ROB_ID        [i],_queue[index]._rob_id);
     98            PORT_WRITE(out_RETIRE_OPERATION     [i],_queue[index]._operation);
     99            PORT_WRITE(out_RETIRE_TYPE          [i],_queue[index]._type);
     100            PORT_WRITE(out_RETIRE_HAS_IMMEDIAT  [i],_queue[index]._has_immediat);
     101            PORT_WRITE(out_RETIRE_IMMEDIAT      [i],_queue[index]._immediat);
     102            PORT_WRITE(out_RETIRE_DATA_RA       [i],_queue[index]._data_ra);
     103            PORT_WRITE(out_RETIRE_DATA_RB       [i],_queue[index]._data_rb);
     104            PORT_WRITE(out_RETIRE_DATA_RC       [i],_queue[index]._data_rc);
     105            PORT_WRITE(out_RETIRE_WRITE_RD      [i],_queue[index]._write_rd);
     106            PORT_WRITE(out_RETIRE_NUM_REG_RD    [i],_queue[index]._num_reg_rd);
     107            PORT_WRITE(out_RETIRE_WRITE_RE      [i],_queue[index]._write_re);
     108            PORT_WRITE(out_RETIRE_NUM_REG_RE    [i],_queue[index]._num_reg_re);
    62109          }
    63        
    64         internal_RESERVATION_STATION_OUT_VAL [index] = val;
    65         PORT_WRITE(out_RESERVATION_STATION_OUT_VAL [index], internal_RESERVATION_STATION_OUT_VAL [index]);
    66110      }
    67111

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp

    r56 r69  
    1919namespace reservation_station {
    2020
     21#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     22#define dump_queue() \
     23  do\
     24  {\
     25   log_printf(TRACE,Reservation_station,FUNCTION," * dump queue");\
     26   log_printf(TRACE,Reservation_station,FUNCTION,"   * nb_elt : %d",_queue_nb_elt);\
     27   for (uint32_t j=0;j<_param->_size_queue; j++)\
     28   {\
     29     cout << "\t"\
     30          << "[" << j << "] "\
     31          << "{" << _queue[j]._rob_id << " - "<< _queue[j]._context_id << "} " << " - "<< _queue[j]._front_end_id << "} " << " - "<< _queue[j]._ooo_engine_id << "} "\
     32          << _queue[j]._data_ra_val << ", "\
     33          << _queue[j]._num_reg_ra  << " - "\
     34          << _queue[j]._data_rb_val << ","\
     35          << _queue[j]._num_reg_rb  << " - "\
     36          << _queue[j]._data_rc_val << ","\
     37          << _queue[j]._num_reg_rc  \
     38          << endl;\
     39    }\
     40  } while (0)
     41#else
    2142#define dump_queue() \
    2243  do\
    … …  
    2849     cout << "\t"\
    2950          << "[" << (*_queue_control)[j] << "] "\
    30           << "{" << _queue[(*_queue_control)[j]]._packet_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} "\
     51          << "{" << _queue[(*_queue_control)[j]]._rob_id << " - "<< _queue[(*_queue_control)[j]]._context_id << "} " << " - "<< _queue[(*_queue_control)[j]]._front_end_id << "} " << " - "<< _queue[(*_queue_control)[j]]._ooo_engine_id << "} "\
    3152          << _queue[(*_queue_control)[j]]._data_ra_val << ", "\
    3253          << _queue[(*_queue_control)[j]]._num_reg_ra  << " - "\
    … …  
    3859    }\
    3960  } while (0)
     61#endif
    4062
    4163#undef  FUNCTION
    … …  
    4769    if (PORT_READ(in_NRESET) == 0)
    4870      {
     71#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     72        for (uint32_t i=0; i<_param->_size_queue; i++)
     73          _queue_valid [i] = false;
     74#else
    4975        _queue_control->clear();
     76#endif
    5077      }
    5178    else
    5279      {
    53         // ***** PUSH to reservation station
    54         if ((PORT_READ(in_RESERVATION_STATION_IN_VAL) == 1) and
    55             (    internal_RESERVATION_STATION_IN_ACK  == 1))
     80        // ***** POP from reservation station
     81
     82        // scan in reverse order, because when we pop the queue there are an auto reorder
     83        //for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--)
     84        for (int32_t i=(static_cast<int32_t>(_param->_nb_inst_retire))-1;i>=0; i--)
    5685          {
    57             log_printf(TRACE,Reservation_station,FUNCTION,"PUSH");
    58 
    59             // Write in reservation station
    60             uint32_t index = _queue_control->push();
    61 
    62             log_printf(TRACE,Reservation_station,FUNCTION," * index         : %d",index);
    63 
    64             _queue[index]._context_id   = PORT_READ(in_RESERVATION_STATION_IN_CONTEXT_ID  );
    65             _queue[index]._packet_id    = PORT_READ(in_RESERVATION_STATION_IN_PACKET_ID   );
    66             _queue[index]._operation    = PORT_READ(in_RESERVATION_STATION_IN_OPERATION   );
    67             _queue[index]._type         = PORT_READ(in_RESERVATION_STATION_IN_TYPE        );
    68             _queue[index]._has_immediat = PORT_READ(in_RESERVATION_STATION_IN_HAS_IMMEDIAT);
    69             _queue[index]._immediat     = PORT_READ(in_RESERVATION_STATION_IN_IMMEDIAT    );
    70 //          _queue[index]._read_ra      = PORT_READ(in_RESERVATION_STATION_IN_READ_RA     );
    71             _queue[index]._num_reg_ra   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RA  );
    72             _queue[index]._data_ra_val  = PORT_READ(in_RESERVATION_STATION_IN_DATA_RA_VAL );
    73             _queue[index]._data_ra      = PORT_READ(in_RESERVATION_STATION_IN_DATA_RA     );
    74 //          _queue[index]._read_rb      = PORT_READ(in_RESERVATION_STATION_IN_READ_RB     );
    75             _queue[index]._num_reg_rb   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RB  );
    76             _queue[index]._data_rb_val  = PORT_READ(in_RESERVATION_STATION_IN_DATA_RB_VAL );
    77             _queue[index]._data_rb      = PORT_READ(in_RESERVATION_STATION_IN_DATA_RB     );
    78 //          _queue[index]._read_rc      = PORT_READ(in_RESERVATION_STATION_IN_READ_RC     );
    79             _queue[index]._num_reg_rc   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RC  );
    80             _queue[index]._data_rc_val  = PORT_READ(in_RESERVATION_STATION_IN_DATA_RC_VAL );
    81             _queue[index]._data_rc      = PORT_READ(in_RESERVATION_STATION_IN_DATA_RC     );
    82             _queue[index]._write_rd     = PORT_READ(in_RESERVATION_STATION_IN_WRITE_RD    );
    83             _queue[index]._num_reg_rd   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RD  );
    84             _queue[index]._write_re     = PORT_READ(in_RESERVATION_STATION_IN_WRITE_RE    );
    85             _queue[index]._num_reg_re   = PORT_READ(in_RESERVATION_STATION_IN_NUM_REG_RE  );
    86 //          dump_queue();
    87           }
    88 
    89         // ***** POP from reservation station
    90 
    91         // scan in reverse order, because when we pop the queue there are an auto reorder
    92         for (int32_t i=(static_cast<int32_t>(_queue_control->nb_elt()))-1;i>=0; i--)
    93           {
    94             uint32_t index = (*_queue_control)[i];
    95            
    96             if ((    internal_RESERVATION_STATION_OUT_VAL [index]  == 1) and
    97                 (PORT_READ(in_RESERVATION_STATION_OUT_ACK [index]) == 1))
    98               {
     86            if ((    internal_RETIRE_VAL [i]  == 1) and
     87                (PORT_READ(in_RETIRE_ACK [i]) == 1))
     88              {
     89                //uint32_t index = (*_queue_control)[i];
     90
    9991                log_printf(TRACE,Reservation_station,FUNCTION,"POP  [%d]",i);
    10092
    101                 _queue_control->pop(i);
    102 
     93                uint32_t index  = internal_RETIRE_SLOT[i];
     94
     95#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     96                _queue_valid [index] = false;
     97#else
     98                _queue_control->pop(index);
     99#endif
    103100                log_printf(TRACE,Reservation_station,FUNCTION," * index         : %d",index);
    104101//              dump_queue();
    … …  
    110107       
    111108        // scan all entry
    112         for (uint32_t i=0; i<_queue_control->nb_elt(); i++)
     109        for (uint32_t i=0;
     110#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     111             i<_param->_size_queue;
     112#else
     113             i<_queue_control->nb_elt();
     114#endif
     115             i++)
    113116          {
    114             uint32_t index = (*_queue_control)[i];
     117            uint32_t index;
     118#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     119            index = i;
     120#else
     121            index = (*_queue_control)[i];
     122#endif
    115123
    116124            // ***** bypass - gpr_write
    117125            for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
    118126              {
    119                 if ((PORT_READ(in_GPR_WRITE_VAL        [j]) == 1) and
    120                     (PORT_READ(in_GPR_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id))
     127                bool cmp;
     128                if (_param->_have_port_ooo_engine_id)
     129                  cmp = (PORT_READ(in_GPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
     130                else
     131                  cmp = true;
     132
     133                if ((PORT_READ(in_GPR_WRITE_VAL        [j]) == 1) and cmp)
    121134                  {
    122135                    if (PORT_READ(in_GPR_WRITE_NUM_REG [j]) == _queue[index]._num_reg_ra)
    … …  
    137150            for (uint32_t j=0; j<_param->_nb_spr_write; j++)
    138151              {
    139                 if ((PORT_READ(in_SPR_WRITE_VAL        [j]) == 1)                         and
    140                     (PORT_READ(in_SPR_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id) and
    141                     (PORT_READ(in_SPR_WRITE_NUM_REG    [j]) == _queue[index]._num_reg_rc))
     152                bool cmp;
     153                if (_param->_have_port_ooo_engine_id)
     154                  cmp = (PORT_READ(in_SPR_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
     155                else
     156                  cmp = true;
     157               
     158                if ((PORT_READ(in_SPR_WRITE_VAL           [j]) == 1) and
     159                    cmp and
     160                    (PORT_READ(in_SPR_WRITE_NUM_REG       [j]) == _queue[index]._num_reg_rc))
    142161                  {
    143162                    log_printf(TRACE,Reservation_station,FUNCTION," -> SPR_WRITE     [%d] - Hit queue[%d]-SPR_RC[%d]",i,index,_queue[index]._num_reg_rc);
    … …  
    149168            for (uint32_t j=0; j<_param->_nb_bypass_write; j++)
    150169              {
    151                 if (PORT_READ(in_BYPASS_WRITE_CONTEXT_ID [j]) == _queue[index]._context_id)
     170                bool cmp;
     171                if (_param->_have_port_ooo_engine_id)
     172                  cmp = (PORT_READ(in_BYPASS_WRITE_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
     173                else
     174                  cmp = true;
     175
     176                if (cmp)
    152177                  {
    153178                    if (PORT_READ(in_BYPASS_WRITE_GPR_VAL    [j]) == 1)
    … …  
    178203            for (uint32_t j=0; j<_param->_nb_bypass_memory; j++)
    179204              {
    180                 if ((PORT_READ(in_BYPASS_MEMORY_VAL        [j]) == 1) and
    181                     (PORT_READ(in_BYPASS_MEMORY_CONTEXT_ID [j]) == _queue[index]._context_id))
     205                bool cmp;
     206                if (_param->_have_port_ooo_engine_id)
     207                  cmp = (PORT_READ(in_BYPASS_MEMORY_OOO_ENGINE_ID [j]) == _queue[index]._ooo_engine_id);
     208                else
     209                  cmp = true;
     210
     211                if ((PORT_READ(in_BYPASS_MEMORY_VAL           [j]) == 1) and cmp)
    182212                  {
    183213                    if (PORT_READ(in_BYPASS_MEMORY_NUM_REG [j]) == _queue[index]._num_reg_ra)
    … …  
    196226              }
    197227          }
     228        // ***** PUSH to reservation station
     229        if ((PORT_READ(in_INSERT_VAL) == 1) and
     230            (    internal_INSERT_ACK  == 1))
     231          {
     232            log_printf(TRACE,Reservation_station,FUNCTION,"PUSH");
     233
     234            // Write in reservation station
     235            uint32_t index;
     236
     237#ifdef  SYSTEMC_VHDL_COMPATIBILITY
     238            index = internal_INSERT_SLOT;
     239            _queue_valid [internal_INSERT_SLOT] = true;
     240#else
     241            index = _queue_control->push();
     242#endif
     243            log_printf(TRACE,Reservation_station,FUNCTION," * index         : %d",index);
     244
     245            if (_param->_have_port_context_id)
     246            _queue[index]._context_id      = PORT_READ(in_INSERT_CONTEXT_ID     );
     247            if (_param->_have_port_front_end_id)
     248            _queue[index]._front_end_id    = PORT_READ(in_INSERT_FRONT_END_ID   );
     249            if (_param->_have_port_ooo_engine_id)
     250            _queue[index]._ooo_engine_id   = PORT_READ(in_INSERT_OOO_ENGINE_ID  );
     251            if (_param->_have_port_rob_id)
     252            _queue[index]._rob_id          = PORT_READ(in_INSERT_ROB_ID         );
     253            _queue[index]._operation       = PORT_READ(in_INSERT_OPERATION      );
     254            _queue[index]._type            = PORT_READ(in_INSERT_TYPE           );
     255            _queue[index]._has_immediat    = PORT_READ(in_INSERT_HAS_IMMEDIAT   );
     256            _queue[index]._immediat        = PORT_READ(in_INSERT_IMMEDIAT       );
     257//          _queue[index]._read_ra         = PORT_READ(in_INSERT_READ_RA        );
     258            _queue[index]._num_reg_ra      = PORT_READ(in_INSERT_NUM_REG_RA     );
     259            _queue[index]._data_ra_val     = PORT_READ(in_INSERT_DATA_RA_VAL    );
     260            _queue[index]._data_ra         = PORT_READ(in_INSERT_DATA_RA        );
     261//          _queue[index]._read_rb         = PORT_READ(in_INSERT_READ_RB        );
     262            _queue[index]._num_reg_rb      = PORT_READ(in_INSERT_NUM_REG_RB     );
     263            _queue[index]._data_rb_val     = PORT_READ(in_INSERT_DATA_RB_VAL    );
     264            _queue[index]._data_rb         = PORT_READ(in_INSERT_DATA_RB        );
     265//          _queue[index]._read_rc         = PORT_READ(in_INSERT_READ_RC        );
     266            _queue[index]._num_reg_rc      = PORT_READ(in_INSERT_NUM_REG_RC     );
     267            _queue[index]._data_rc_val     = PORT_READ(in_INSERT_DATA_RC_VAL    );
     268            _queue[index]._data_rc         = PORT_READ(in_INSERT_DATA_RC        );
     269            _queue[index]._write_rd        = PORT_READ(in_INSERT_WRITE_RD       );
     270            _queue[index]._num_reg_rd      = PORT_READ(in_INSERT_NUM_REG_RD     );
     271            _queue[index]._write_re        = PORT_READ(in_INSERT_WRITE_RE       );
     272            _queue[index]._num_reg_re      = PORT_READ(in_INSERT_NUM_REG_RE     );
     273//          dump_queue();
     274          }
    198275      }
    199276
    200 #ifdef STATISTICS
    201     _stat->add();
    202 #endif   
    203 
    204 #ifdef VHDL_TESTBENCH
    205     vhdl_testbench_transition ();
    206 #endif
     277    end_cycle ();
    207278
    208279    log_printf(FUNC,Reservation_station,FUNCTION,"End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_body.cpp

    r55 r69  
    1818namespace reservation_station {
    1919
    20 
    2120#undef  FUNCTION
    2221#define FUNCTION "Reservation_station::vhdl_body"
    2322  void Reservation_station::vhdl_body (Vhdl * & vhdl)
    2423  {
     24    string range_retire, range_insert;
     25
     26    if (_param->_size_queue == 1)
     27      range_insert = "(0)";
     28    else
     29      range_insert = "(conv_integer(internal_INSERT_SLOT"+std_logic_range(log2(_param->_size_queue))+"))";
     30
    2531    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
    26     vhdl->set_body ("");
     32
     33    vhdl->set_body ("-----------------------------------");
     34    vhdl->set_body ("-- interface 'INSERT'");
     35    vhdl->set_body ("-----------------------------------");
     36    vhdl->set_body ("");
     37    vhdl->set_body ("     out_INSERT_ACK          <= not internal_FULL;");
     38    vhdl->set_body ("internal_INSERT_TRANSACTION  <= not internal_FULL and in_INSERT_VAL;");
     39   
     40    vhdl->set_body ("internal_INSERT_SLOT         <=");
     41    for (uint32_t i=0; i<_param->_size_queue; i++)
     42      {
     43        vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),i)+" when reg_VAL("+toString(i)+")='0' else");
     44      }
     45    vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";");
     46
     47    vhdl->set_body ("");
     48    vhdl->set_body ("-----------------------------------");
     49    vhdl->set_body ("-- interface 'RETIRE'");
     50    vhdl->set_body ("-----------------------------------");
     51    vhdl->set_body ("");
     52    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     53      vhdl->set_body ("internal_RETIRE_TRANSACTION_"+toString(i)+"<= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+" and in_RETIRE_"+toString(i)+"_ACK;");
     54    vhdl->set_body ("");
     55
     56    uint32_t nb_slot_scan = _param->_size_queue-_param->_nb_inst_retire+1;
     57    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     58      {
     59        vhdl->set_body ("internal_RETIRE_SLOT_"+toString(i)+"       <= ");
     60        for (uint32_t j=i; j<nb_slot_scan+i; j++)
     61          {
     62            vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),j)+" when");
     63            for (uint32_t k=0; k<i; k++)
     64              {
     65                vhdl->set_body ("\t\tnot (internal_RETIRE_SLOT_"+toString(k)+" = "+std_logic_conv(log2(_param->_size_queue),j)+std_logic_range(log2(_param->_size_queue))+") and");
     66              }
     67            vhdl->set_body ("\t\t(reg_VAL        ("+toString(j)+")='1') and");
     68            vhdl->set_body ("\t\t(reg_DATA_RA_VAL("+toString(j)+")='1') and");
     69            vhdl->set_body ("\t\t(reg_DATA_RB_VAL("+toString(j)+")='1') and");
     70            vhdl->set_body ("\t\t(reg_DATA_RC_VAL("+toString(j)+")='1') else");
     71          }
     72        vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";");
     73        vhdl->set_body ("");
     74      }
     75
     76    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     77      {
     78        if (_param->_size_queue == 1)
     79          range_retire = "(0)";
     80        else
     81          range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))";
     82
     83        vhdl->set_body ("out_RETIRE_"+toString(i)+"_VAL             <= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+";");
     84        if (_param->_have_port_context_id)                         
     85        vhdl->set_body ("out_RETIRE_"+toString(i)+"_CONTEXT_ID      <= reg_CONTEXT_ID   "+range_retire+";");
     86        if (_param->_have_port_front_end_id)                       
     87        vhdl->set_body ("out_RETIRE_"+toString(i)+"_FRONT_END_ID    <= reg_FRONT_END_ID "+range_retire+";");
     88        if (_param->_have_port_ooo_engine_id)                       
     89        vhdl->set_body ("out_RETIRE_"+toString(i)+"_OOO_ENGINE_ID   <= reg_OOO_ENGINE_ID"+range_retire+";");
     90        if (_param->_have_port_rob_id)                             
     91        vhdl->set_body ("out_RETIRE_"+toString(i)+"_ROB_ID          <= reg_ROB_ID       "+range_retire+";");
     92        vhdl->set_body ("out_RETIRE_"+toString(i)+"_OPERATION       <= reg_OPERATION    "+range_retire+";");
     93        vhdl->set_body ("out_RETIRE_"+toString(i)+"_TYPE            <= reg_TYPE         "+range_retire+";");
     94        vhdl->set_body ("out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT    <= reg_HAS_IMMEDIAT "+range_retire+";");
     95        vhdl->set_body ("out_RETIRE_"+toString(i)+"_IMMEDIAT        <= reg_IMMEDIAT     "+range_retire+";");
     96        vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RA         <= reg_DATA_RA      "+range_retire+";");
     97        vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RB         <= reg_DATA_RB      "+range_retire+";");
     98        vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RC         <= reg_DATA_RC      "+range_retire+";");
     99        vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RD        <= reg_WRITE_RD     "+range_retire+";");
     100        vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RD      <= reg_NUM_REG_RD   "+range_retire+";");
     101        vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RE        <= reg_WRITE_RE     "+range_retire+";");
     102        vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RE      <= reg_NUM_REG_RE   "+range_retire+";");
     103        vhdl->set_body ("");
     104      }
     105
     106//     vhdl->set_body ("-----------------------------------");
     107//     vhdl->set_body ("-- flags");
     108//     vhdl->set_body ("-----------------------------------");
     109//     vhdl->set_body ("");
     110//     vhdl->set_body ("internal_EMPTY <=");
     111//     for (uint32_t i=_param->_size_queue-1; i>0; i--)
     112//       vhdl->set_body ("\tnot reg_VAL ("+toString(i)+") and");
     113//     vhdl->set_body ("\tnot reg_VAL (0);");
     114//     vhdl->set_body ("internal_FULL  <=");
     115//     for (uint32_t i=_param->_size_queue-1; i>0; i--)
     116//       vhdl->set_body ("\t    reg_VAL ("+toString(i)+") and");
     117//     vhdl->set_body ("\t    reg_VAL (0);");
     118
     119    vhdl->set_body ("");
     120    vhdl->set_body ("-----------------------------------");
     121    vhdl->set_body ("-- transition");
     122    vhdl->set_body ("-----------------------------------");
     123    vhdl->set_body ("");
     124    vhdl->set_body ("transition: process (in_CLOCK)");
     125    vhdl->set_body ("begin  -- process transition");
     126    vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then");
     127    vhdl->set_body ("");
     128    vhdl->set_body ("\t\tif (in_NRESET = '0') then");   
     129    for (uint32_t i=0; i<_param->_size_queue; i++)
     130      {
     131        vhdl->set_body ("\t\t\treg_VAL ("+toString(i)+")<= '0';");
     132      }
     133    vhdl->set_body ("\t\telse");
     134
     135
     136    vhdl->set_body ("");
     137    vhdl->set_body ("\t\t\t-----------------------------------");
     138    vhdl->set_body ("\t\t\t-- bypass");
     139    vhdl->set_body ("\t\t\t-----------------------------------");
     140    vhdl->set_body ("");
     141    vhdl->set_body ("\t\t\t-- interface : 'GPR_WRITE'");
     142    for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
     143      {
     144        vhdl->set_body ("\t\t\tif (in_GPR_WRITE_"+toString(i)+"_VAL = '1') then");
     145        vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
     146        for (uint32_t j=0; j<_param->_size_queue; j++)
     147          {
     148            if (_param->_have_port_ooo_engine_id)
     149              vhdl->set_body ("\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
     150            vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then");
     151            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';");
     152            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA     ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;");
     153            vhdl->set_body ("\t\t\t\t\tend if;");   
     154
     155            vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then");
     156            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';");
     157            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB     ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;");
     158            vhdl->set_body ("\t\t\t\t\tend if;");   
     159
     160            if (_param->_have_port_ooo_engine_id)
     161              vhdl->set_body ("\t\t\t\tend if;");   
     162          }
     163        vhdl->set_body ("\t\t\tend if;");   
     164      }
     165
     166    vhdl->set_body ("\t\t\t-- interface : 'SPR_WRITE'");
     167    for (uint32_t i=0; i<_param->_nb_spr_write; i++)
     168      {
     169        vhdl->set_body ("\t\t\tif (in_SPR_WRITE_"+toString(i)+"_VAL = '1') then");
     170        vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
     171        for (uint32_t j=0; j<_param->_size_queue; j++)
     172          {
     173            if (_param->_have_port_ooo_engine_id)
     174              vhdl->set_body ("\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
     175            vhdl->set_body ("\t\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then");
     176            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';");
     177            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC     ("+toString(j)+") <= in_SPR_WRITE_"+toString(i)+"_DATA;");
     178            vhdl->set_body ("\t\t\t\t\tend if;");   
     179
     180            if (_param->_have_port_ooo_engine_id)
     181              vhdl->set_body ("\t\t\t\tend if;");   
     182          }
     183        vhdl->set_body ("\t\t\tend if;");   
     184      }
     185
     186    vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_GPR'");
     187    for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
     188      {
     189        vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_VAL = '1') then");
     190        vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
     191        for (uint32_t j=0; j<_param->_size_queue; j++)
     192          {
     193            if (_param->_have_port_ooo_engine_id)
     194              vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
     195            vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then");
     196            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';");
     197            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA     ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;");
     198            vhdl->set_body ("\t\t\t\t\tend if;");   
     199
     200            vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then");
     201            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';");
     202            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB     ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;");
     203            vhdl->set_body ("\t\t\t\t\tend if;");   
     204
     205            if (_param->_have_port_ooo_engine_id)
     206              vhdl->set_body ("\t\t\t\tend if;");   
     207          }
     208        vhdl->set_body ("\t\t\tend if;");   
     209      }
     210
     211    vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_SPR'");
     212    for (uint32_t i=0; i<_param->_nb_bypass_write; i++)
     213      {
     214        vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_VAL = '1') then");
     215        vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
     216        for (uint32_t j=0; j<_param->_size_queue; j++)
     217          {
     218            if (_param->_have_port_ooo_engine_id)
     219              vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
     220            vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then");
     221            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';");
     222            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC     ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_SPR_DATA;");
     223            vhdl->set_body ("\t\t\t\t\tend if;");   
     224
     225            if (_param->_have_port_ooo_engine_id)
     226              vhdl->set_body ("\t\t\t\tend if;");   
     227          }
     228        vhdl->set_body ("\t\t\tend if;");   
     229      }
     230
     231    vhdl->set_body ("\t\t\t-- interface : 'BYPASS_MEMORY_GPR'");
     232    for (uint32_t i=0; i<_param->_nb_bypass_memory; i++)
     233      {
     234        vhdl->set_body ("\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_VAL = '1') then");
     235        vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)");
     236        for (uint32_t j=0; j<_param->_size_queue; j++)
     237          {
     238            if (_param->_have_port_ooo_engine_id)
     239              vhdl->set_body ("\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then");
     240            vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then");
     241            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';");
     242            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA     ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;");
     243            vhdl->set_body ("\t\t\t\t\tend if;");   
     244
     245            vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then");
     246            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';");
     247            vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB     ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;");
     248            vhdl->set_body ("\t\t\t\t\tend if;");   
     249
     250            if (_param->_have_port_ooo_engine_id)
     251              vhdl->set_body ("\t\t\t\tend if;");   
     252          }
     253        vhdl->set_body ("\t\t\tend if;");   
     254      }
     255
     256    vhdl->set_body ("");
     257    vhdl->set_body ("\t\t\t-- interface : 'INSERT'");
     258    vhdl->set_body ("\t\t\tif (internal_INSERT_TRANSACTION = '1') then");
     259
     260
     261
     262    vhdl->set_body ("\t\t\t\treg_VAL           "+range_insert+" <= '1';");
     263
     264    if (_param->_have_port_context_id)
     265    vhdl->set_body ("\t\t\t\treg_CONTEXT_ID    "+range_insert+" <= in_INSERT_CONTEXT_ID   ;");
     266    if (_param->_have_port_front_end_id)
     267    vhdl->set_body ("\t\t\t\treg_FRONT_END_ID  "+range_insert+" <= in_INSERT_FRONT_END_ID ;");
     268    if (_param->_have_port_ooo_engine_id)
     269    vhdl->set_body ("\t\t\t\treg_OOO_ENGINE_ID "+range_insert+" <= in_INSERT_OOO_ENGINE_ID;");
     270    if (_param->_have_port_rob_id)
     271    vhdl->set_body ("\t\t\t\treg_ROB_ID        "+range_insert+" <= in_INSERT_ROB_ID       ;");
     272    vhdl->set_body ("\t\t\t\treg_OPERATION     "+range_insert+" <= in_INSERT_OPERATION    ;");
     273    vhdl->set_body ("\t\t\t\treg_TYPE          "+range_insert+" <= in_INSERT_TYPE         ;");
     274    vhdl->set_body ("\t\t\t\treg_HAS_IMMEDIAT  "+range_insert+" <= in_INSERT_HAS_IMMEDIAT ;");
     275    vhdl->set_body ("\t\t\t\treg_IMMEDIAT      "+range_insert+" <= in_INSERT_IMMEDIAT     ;");
     276    vhdl->set_body ("\t\t\t\treg_NUM_REG_RA    "+range_insert+" <= in_INSERT_NUM_REG_RA   ;");
     277    vhdl->set_body ("\t\t\t\treg_DATA_RA_VAL   "+range_insert+" <= in_INSERT_DATA_RA_VAL  ;");
     278    vhdl->set_body ("\t\t\t\treg_DATA_RA       "+range_insert+" <= in_INSERT_DATA_RA      ;");
     279    vhdl->set_body ("\t\t\t\treg_NUM_REG_RB    "+range_insert+" <= in_INSERT_NUM_REG_RB   ;");
     280    vhdl->set_body ("\t\t\t\treg_DATA_RB_VAL   "+range_insert+" <= in_INSERT_DATA_RB_VAL  ;");
     281    vhdl->set_body ("\t\t\t\treg_DATA_RB       "+range_insert+" <= in_INSERT_DATA_RB      ;");
     282    vhdl->set_body ("\t\t\t\treg_NUM_REG_RC    "+range_insert+" <= in_INSERT_NUM_REG_RC   ;");
     283    vhdl->set_body ("\t\t\t\treg_DATA_RC_VAL   "+range_insert+" <= in_INSERT_DATA_RC_VAL  ;");
     284    vhdl->set_body ("\t\t\t\treg_DATA_RC       "+range_insert+" <= in_INSERT_DATA_RC      ;");
     285    vhdl->set_body ("\t\t\t\treg_WRITE_RD      "+range_insert+" <= in_INSERT_WRITE_RD     ;");
     286    vhdl->set_body ("\t\t\t\treg_NUM_REG_RD    "+range_insert+" <= in_INSERT_NUM_REG_RD   ;");
     287    vhdl->set_body ("\t\t\t\treg_WRITE_RE      "+range_insert+" <= in_INSERT_WRITE_RE     ;");
     288    vhdl->set_body ("\t\t\t\treg_NUM_REG_RE    "+range_insert+" <= in_INSERT_NUM_REG_RE   ;");
     289    vhdl->set_body ("\t\t\tend if;");   
     290
     291    vhdl->set_body ("");
     292    vhdl->set_body ("\t\t\t-- interface : 'RETIRE'");
     293    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     294      {
     295        if (_param->_size_queue == 1)
     296          range_retire = "(0)";
     297        else
     298          range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))";
     299
     300        vhdl->set_body ("\t\t\tif (internal_RETIRE_TRANSACTION_"+toString(i)+" = '1') then");
     301       
     302        vhdl->set_body ("\t\t\t\treg_VAL "+range_retire+" <= '0';");
     303        vhdl->set_body ("\t\t\tend if;");   
     304      }
     305
     306    vhdl->set_body ("");
     307    vhdl->set_body ("\t\tend if;");
     308    vhdl->set_body ("");
     309    vhdl->set_body ("\tend if;");
     310    vhdl->set_body ("end process transition;");
     311
    27312    log_printf(FUNC,Reservation_station,FUNCTION,"End");
    28313  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_declaration.cpp

    r55 r69  
    2424  {
    2525    log_printf(FUNC,Reservation_station,FUNCTION,"Begin");
     26
     27    vhdl->set_type ("Tcontrol        ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(1));
     28    if (_param->_have_port_context_id)           
     29    vhdl->set_type ("Tcontext_id     ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_context_id));
     30    if (_param->_have_port_front_end_id)         
     31    vhdl->set_type ("Tfront_end_id   ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_front_end_id));
     32    if (_param->_have_port_ooo_engine_id)         
     33    vhdl->set_type ("Tooo_engine_id  ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_ooo_engine_id));
     34    if (_param->_have_port_rob_id)               
     35    vhdl->set_type ("Trob_id         ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_rob_id));
     36    vhdl->set_type ("Toperation      ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_operation));
     37    vhdl->set_type ("Ttype           ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_type));
     38    vhdl->set_type ("Tgeneral_data   ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_general_data));
     39    vhdl->set_type ("Tspecial_data   ","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_special_data));   
     40    vhdl->set_type ("Tgeneral_address","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_general_register));
     41    vhdl->set_type ("Tspecial_address","array (" + toString(_param->_size_queue-1) + " downto 0) of " + std_logic(_param->_size_special_register));   
     42
     43    vhdl->set_signal("reg_VAL                     ","Tcontrol");
     44    if (_param->_have_port_context_id)           
     45    vhdl->set_signal("reg_CONTEXT_ID              ","Tcontext_id");
     46    if (_param->_have_port_front_end_id)         
     47    vhdl->set_signal("reg_FRONT_END_ID            ","Tfront_end_id");
     48    if (_param->_have_port_ooo_engine_id)         
     49    vhdl->set_signal("reg_OOO_ENGINE_ID           ","Tooo_engine_id");
     50    if (_param->_have_port_rob_id)               
     51    vhdl->set_signal("reg_ROB_ID                  ","Trob_id");
     52    vhdl->set_signal("reg_OPERATION               ","Toperation");
     53    vhdl->set_signal("reg_TYPE                    ","Ttype");
     54    vhdl->set_signal("reg_HAS_IMMEDIAT            ","Tcontrol");
     55    vhdl->set_signal("reg_IMMEDIAT                ","Tgeneral_data");
     56    vhdl->set_signal("reg_NUM_REG_RA              ","Tgeneral_address");
     57    vhdl->set_signal("reg_DATA_RA_VAL             ","Tcontrol");
     58    vhdl->set_signal("reg_DATA_RA                 ","Tgeneral_data");
     59    vhdl->set_signal("reg_NUM_REG_RB              ","Tgeneral_address");
     60    vhdl->set_signal("reg_DATA_RB_VAL             ","Tcontrol");
     61    vhdl->set_signal("reg_DATA_RB                 ","Tgeneral_data");
     62    vhdl->set_signal("reg_NUM_REG_RC              ","Tspecial_address");
     63    vhdl->set_signal("reg_DATA_RC_VAL             ","Tcontrol");
     64    vhdl->set_signal("reg_DATA_RC                 ","Tspecial_data");
     65    vhdl->set_signal("reg_WRITE_RD                ","Tcontrol");
     66    vhdl->set_signal("reg_NUM_REG_RD              ","Tgeneral_address");
     67    vhdl->set_signal("reg_WRITE_RE                ","Tcontrol");
     68    vhdl->set_signal("reg_NUM_REG_RE              ","Tspecial_address");
     69
     70    if (_param->_size_queue == 1)
     71      vhdl->set_alias(" internal_FULL               ",1,"internal_INSERT_SLOT","");
     72    else
     73      vhdl->set_alias(" internal_FULL               ",1,"internal_INSERT_SLOT","("+toString(log2(_param->_size_queue))+")");
     74//  vhdl->set_signal("internal_EMPTY              ",1);
     75
     76    vhdl->set_signal("internal_INSERT_TRANSACTION ",1);
     77    vhdl->set_signal("internal_INSERT_SLOT        ",log2(_param->_size_queue)+1);
     78
     79   
     80    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     81      {
     82        vhdl->set_signal("internal_RETIRE_TRANSACTION_"+toString(i),1);
     83        vhdl->set_signal("internal_RETIRE_SLOT_"+toString(i)+"      ",log2(_param->_size_queue)+1);
     84      }
    2685    log_printf(FUNC,Reservation_station,FUNCTION,"End");
    2786  };
    … …  
    3392}; // end namespace multi_execute_loop
    3493}; // end namespace core
    35 
    3694}; // end namespace behavioural
    3795}; // end namespace morpheo             

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf

    r67 r69  
    33#
    44
    5 all: _Generic/Queue/SelfTest _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest _Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest _Generic/Select/Select_Priority_Fixed/SelfTest _Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest _Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
     5all: _Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
    66
    7 _Generic/Queue/SelfTest:
    8         make all -C Generic/Queue/SelfTest
    9 
    10 _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest:
    11         make all -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
    12 
    13 _Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest:
    14         make all -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
    15 
    16 _Generic/Select/Select_Priority_Fixed/SelfTest:
    17         make all -C Generic/Select/Select_Priority_Fixed/SelfTest
    18 
    19 _Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest:
    20         make all -C Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
    21 
    22 _Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest:
    23         make all -C Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
     7_Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest:
     8        make all -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
    249
    2510clean:
    26         make clean -C Generic/Queue/SelfTest
    27         make clean -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
    28         make clean -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
    29         make clean -C Generic/Select/Select_Priority_Fixed/SelfTest
    30         make clean -C Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
    31         make clean -C Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
     11        make clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
    3212
    3313re: clean all
    3414
    3515install:
    36         make install -C Generic/Queue/SelfTest
    37         make install -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
    38         make install -C Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
    39         make install -C Generic/Select/Select_Priority_Fixed/SelfTest
    40         make install -C Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
    41         make install -C Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
     16        make install -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
    4217

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h

    r57 r69  
    108108#endif                                         
    109109                                               
    110 #ifdef VHDL_TESTBENCH                         
    111   private : void     vhdl_testbench_transition (void);
    112 #endif
     110  private : void     end_cycle                 (void);
    113111  };
    114112

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_end_cycle.cpp

    r59 r69  
    1 #ifdef VHDL_TESTBENCH
    21/*
    32 * $Id$
    … …  
    98#include "Behavioural/@DIRECTORY/include/@COMPONENT.h"
    109
    11 namespace morpheo                    {
     10namespace morpheo {
    1211namespace behavioural {
    1312@NAMESPACE_BEGIN
    1413
    1514#undef  FUNCTION
    16 #define FUNCTION "@COMPONENT::vhdl_testbench_transition"
    17   void @COMPONENT::vhdl_testbench_transition ()
     15#define FUNCTION "@COMPONENT::end_cycle"
     16void @COMPONENT::end_cycle ()
    1817  {
    1918    log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
    2019
     20#ifdef STATISTICS
     21    _stat->add();
     22#endif   
     23
     24#ifdef VHDL_TESTBENCH
    2125    // Evaluation before read the ouput signal
    22 //     sc_start(0);
    23 
     26//  sc_start(0);
    2427    _interfaces->testbench();
     28#endif
    2529
    2630    log_printf(FUNC,@COMPONENT,FUNCTION,"End");
    … …  
    3034}; // end namespace behavioural
    3135}; // end namespace morpheo             
    32 #endif

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp

    r53 r69  
    2020    log_printf(FUNC,@COMPONENT,FUNCTION,"Begin");
    2121
    22 #ifdef STATISTICS
    23     _stat->add();
    24 #endif   
    25 
    26 #ifdef VHDL_TESTBENCH
    27     vhdl_testbench_transition ();
    28 #endif
     22    end_cycle ();
    2923
    3024    log_printf(FUNC,@COMPONENT,FUNCTION,"End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h

    r68 r69  
    2424#define         DEBUG_Multi_Read_unit                             false
    2525#define           DEBUG_Read_unit                                 false
    26 #define             DEBUG_Read_queue                              true
    27 #define             DEBUG_Reservation_station                     false
     26#define             DEBUG_Read_queue                              false
     27#define             DEBUG_Reservation_station                     true
    2828#define         DEBUG_Register_unit                               false
    2929#define           DEBUG_Register_unit_Glue                        false

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h

    r67 r69  
    113113                                                            string      name2                 ,
    114114                                                            string      range2                );
     115  public    : void             set_alias                   (string      name1                 ,
     116                                                            uint32_t    size1                 ,
     117                                                            string      name2                 ,
     118                                                            string      range2                );
    115119
    116120  public    : string           get_list                    (list<string> liste                ,

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info

    r68 r69  
    1515
    1616# build src directory content
    17 target_dep              all             Generic/Queue/SelfTest
    18 target_dep              all             Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
    19 target_dep              all             Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
    20 target_dep              all             Generic/Select/Select_Priority_Fixed/SelfTest
    21 target_dep              all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest
    22 target_dep              all             Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
    23 target_dep              all             Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
     17#target_dep             all             Generic/Queue/SelfTest
     18#target_dep             all             Generic/RegisterFile/RegisterFile_Monolithic/SelfTest
     19#target_dep             all             Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
     20#target_dep             all             Generic/Select/Select_Priority_Fixed/SelfTest
     21#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest
     22target_dep              all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
     23#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
     24#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
    2425# mkf include path
    2526var_define              _mkf_path       include_mkf

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_alias.cpp

    r43 r69  
    2727    log_printf(FUNC,Behavioural,FUNCTION,"End");
    2828  };
     29
     30  void Vhdl::set_alias (string      name1 ,
     31                        uint32_t    size1 ,
     32                        string      name2 ,
     33                        string      range2)
     34  {
     35    log_printf(FUNC,Behavioural,FUNCTION,"Begin");
     36    set_alias(name1, std_logic(size1),name2,range2);
     37    log_printf(FUNC,Behavioural,FUNCTION,"End");
     38  };
    2939 
    3040}; // end namespace behavioural         
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