source: trunk/IPs/systemC/processor/Morpheo/Behavioural

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Diff Rev Age Author Log Message
(edit) @121   16 years rosiere 1) Commit_unit : remove read information of ROB
(edit) @120   16 years rosiere 1) Context_state : Add statistics 2) Add configuration with multi …
(edit) @119   16 years rosiere 1) Prediction unit : static prediction not blocking
(edit) @118   16 years rosiere 1) Stat List : scan all queue to find free register 2) Write_queue : …
(edit) @117   16 years rosiere 1) Platforms : add new organization for test 2) Load_Store_Unit : add …
(edit) @116   16 years moulu 1) added a generic multiplier (systemC isn't working with 8bits) 2) …
(edit) @115   16 years rosiere 1) Write queue with mealy 2) Network : fix bug 3) leak memory
(edit) @114   16 years rosiere 1) Fix bug with previous commit 2) Add test libc 3) Change Dhrystone
(edit) @113   16 years rosiere 1) Add modelsim simulation systemC 2) Modelsim cosimulation systemC / …
(edit) @112   16 years rosiere 1) Stat_list : fix retire old and new register bug 2) Stat_list : …
(edit) @111   16 years rosiere 1) Decod_queue : multi implementation (one_fifo, multi_fifo) 2) …
(edit) @110   16 years rosiere 1) OOO_egine : add stat to depiste low perf source 2) Commit : add …
(edit) @109   16 years rosiere 1) Configuration : instance configuration file : regroup similar …
(edit) @108   16 years rosiere 1) decod_queue : add reg_LAST_SLOT. 2) Commit : insert on event -> to …
(edit) @107   16 years rosiere 1) Fix test in Direction_Glue for Conditionnal Branch 2) Fix …
(edit) @106   16 years rosiere 1) RAT : Fix bug when update and event in same cycle 2) Context State …
(edit) @105   16 years rosiere 1) Bug fix : Load Miss Speculation (in Commit_unit, Update Prediction …
(edit) @104   16 years rosiere Fix Bug : 1) Load Store Unit : check big endian 2) Commit unit & RAT : …
(edit) @103   16 years moulu 1) write queue vhdl 2) bug fix : in generic queue
(edit) @102   16 years rosiere Previous commit with new files :P
(edit) @101   16 years rosiere 1) Add soc test 2) fix bug (Pc management, Decod and execute, Update …
(edit) @100   16 years rosiere 1) Bug fix (Operation, Instruction) 2) Modif Return Address Stack 3) …
(edit) @98   16 years rosiere 1) Fix bug (read unit, RAT -> write in R0, SPR desallocation ...) 2) …
(edit) @97   16 years rosiere 1) Update Prediction Table : statistics 2) Size instruction address on …
(edit) @96   16 years moulu 1) Execute_queue VHDL.
(edit) @95   16 years rosiere 1) Update Prediction Table - New architecture (systemC) done (and …
(edit) @94   16 years rosiere Update document on Vhdl generation.
(edit) @93   16 years rosiere Add document on Vhdl generation
(edit) @92   16 years rosiere
(edit) @91   16 years rosiere Documentation
(edit) @90   16 years rosiere
(edit) @88   16 years rosiere Almost complete design with Test and test platform
(edit) @87   17 years rosiere Test Decod and Decod_unit.
(edit) @86   17 years rosiere Decod : * Correct selftest * Set Instruction address on (32/64)-2 …
(edit) @85   17 years rosiere - Ifetch_unit : systemC test ok - modif shell script and …
(edit) @84   17 years rosiere Change Address_manager : * before : pc_previous, pc_current, pc_next * …
(edit) @83   17 years rosiere Add component : Context_State (manage miss prediction, exception , …
(edit) @82   17 years rosiere * support locale (now must "just" translate) * update all component …
(edit) @81   17 years rosiere - Finish Environment (and test) - Continue predictor_unit - Add …
(edit) @78   17 years rosiere Add : * Execute_loop (must be test systemC) * Prediction * …
(edit) @77   17 years rosiere - Add two component : - network between read unit and execute unit …
(edit) @76   17 years rosiere Add new component : Read_unit (no tested) Change functionnal_unit : …
(edit) @75   17 years rosiere Update all component (except front_end) to : * new statistics model …
(edit) @74   17 years rosiere New component : Read_unit (instance between a write queue and a …
(edit) @73   17 years rosiere add two component : * Write Queue (in Moore version) * Execute Queue …
(edit) @72   17 years rosiere * SystemC de l'unite fonctionnelle. * gestion des groupes / …
(edit) @71   17 years rosiere Modification of Statisctics Add a new systemC component : …
(edit) @70   17 years rosiere Petit bug entre sur le vhdl et la compatibilite systemC/vhdl
(edit) @69   17 years rosiere Station de reservation : systemC et VHDL ok
(edit) @68   17 years rosiere read_queue : systemC et vhdl ok ! queue : quelques petits modif pour …
(edit) @67   17 years rosiere Ajout d'un nouveau composant : fifo generic (un port lecture et un …
(edit) @66   17 years rosiere * un pas de plus vers la compatibilite avec systemC * modification de …
(edit) @65   17 years rosiere register_unit : systemc et VHDL ok
(edit) @64   17 years rosiere test du Register_unit
(edit) @62   17 years rosiere Modification en profondeur de Component-port_map. Compilation ok pour …
(edit) @61   17 years rosiere register_unit_glue : separation des fonctions - evite les cycles dans …
(edit) @60   17 years rosiere
(edit) @59   17 years rosiere Add Load store queue -> but not terminated and tested Add article to …
(edit) @58   17 years rosiere Vhdl : RegisterFile_Multi_Banked - "full crossbar" Correction d'un bug …
(edit) @57   17 years rosiere * VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - …
(edit) @56   17 years rosiere Factorisation du contrôle de file d'attente dans une classe "Queue_Control"
(edit) @55   17 years rosiere Ajout SystemC read_queue et reservation_station Ajout port au bloc …
(edit) @54   17 years rosiere Ajout de Read_queue * seulement en systemC * validé
(edit) @53   17 years rosiere * Banc de registre multi banc * Banc de registre générique.
(edit) @50   17 years rosiere Changement dans le répertoire "New_Component" afin que les composants …
(edit) @49   17 years rosiere RegisterFile? multi bank : supression du svn car ancien version (plus …
(edit) @48   17 years rosiere Modification des Makefile : pas de creation inutile de shell
(edit) @47   17 years rosiere déplacement
(edit) @46   17 years rosiere déplacement …
(edit) @45   17 years rosiere - Documentation : specification d'un cache de donnée non bloquant - …
(edit) @44   17 years rosiere Modification des classes d'encapsulation des interfaces. Stable sur …
(edit) @43   17 years rosiere Modif mineur : ajout d'info de débug Release non stable
(edit) @42   17 years rosiere Modification des classes d'encapsulation des interfaces : * gère les …
(edit) @41   18 years rosiere Vhdl_Testbench : Modification du testbench. Maintenant complétement …
(edit) @40   18 years rosiere Interface et Signal, c'est deux classes enregistres la valeurs des …
(edit) @38   18 years rosiere Interface et vhdl_testbench : l'appel aux fonction add_input et …
(edit) @31   18 years rosiere Class Position qui encapsule la génération des fichiers de positions
(edit) @29   18 years rosiere Changement de classes de gestions des Interfaces. -> simplification …
(edit) @25   18 years rosiere Déplacmenent du type enum "direction_t" hors du fichier d'entête Vhdl.h
(edit) @23   18 years rosiere Documentation pour chaque composant. Documentation : ajout d'un poster …
(edit) @19   18 years gaolin Patch du Makefile.Synthesis : prise en compte des répertoires …
(edit) @15   18 years rosiere Interface normalisé Début du banc de registres multi niveaux
(edit) @11   18 years rosiere
(edit) @10   18 years rosiere
(edit) @9   18 years rosiere
(edit) @8   18 years rosiere
(edit) @7   18 years rosiere
(edit) @6   18 years rosiere Banc de registres - ajout de 2 ports additionnels inutiles (reset et …
(edit) @5   18 years rosiere Ajout du composant Meta_Predictor
(edit) @4   18 years rosiere
(edit) @3   18 years kane 1) Ajout d'un "printer" XML pour la configuration de paramètres 2) …
(add) @2   18 years kane Import Morpheo
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