Changeset 74 for PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/MultiMPITest.vhd

Timestamp:

Jan 15, 2014, 2:40:01 AM (11 years ago)

Author:

rolagamo

Message:

 

File:

• PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/MultiMPITest.vhd (modified) (2 diffs)

PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/MultiMPITest.vhd

@@ -70 +70 @@
 end Component;  
  
-        constant clk_period : time := 10 ns;
-   constant PROC : positive :=8;
+        constant clk_period : time := 15 ns;
+   constant PROC : positive :=4;
 -- synthesis translate_off
 --===================signaux pour l'horloge ==============================
@@ -133 +133 @@
            Core_Hold_Ack => MPI_Node_in(2).hold_ack
 );
-PE3: PE generic map (DestId=>2)
-Port Map (
-Instruction => MPi_Node_in(3).Instruction,
-           Instruction_en => MPi_Node_in(3).Instruction_en,
-                          Core_PushOut => MPi_Node_out(3).PushOut,
-           clk =>clkm,
-           reset =>reset,
-                          CE => '1',
-           Core_RAM_Data_Out =>MPi_Node_in(3).Ram_Data_out,
-           Core_RAM_Data_IN => MPI_Node_out(3).ram_data_in,
-           Core_RAM_WE => MPI_Node_out(3).ram_we,
-           Core_RAM_EN => MPI_Node_out(3).ram_en,
-          -- Core_RAM_ENB => MPI_Node_out(1).ram_en,
-           Core_RAM_Address_Wr => MPI_Node_out(3).ram_address_wr,
-           Core_RAM_Address_Rd => MPI_Node_out(3).ram_address_rd,
-           Core_Hold_req => MPI_Node_out(3).hold_req,
-           Core_Hold_Ack => MPI_Node_in(3).hold_ack
-);
-
-PE4: PE         Generic map (DestId=>3)
-                        Port Map (
-                                Instruction => MPi_Node_in(4).Instruction,
-           Instruction_en => MPi_Node_in(4).Instruction_en,
-                          Core_PushOut => MPi_Node_out(4).PushOut,
-           clk =>clkm,
-           reset =>reset,
-                          CE => '1',
-           Core_RAM_Data_Out =>MPi_Node_in(4).Ram_Data_out,
-           Core_RAM_Data_IN => MPI_Node_out(4).ram_data_in,
-           Core_RAM_WE => MPI_Node_out(4).ram_we,
-           Core_RAM_EN => MPI_Node_out(4).ram_en,
-           --Core_RAM_ENB => MPI_Node_out(2).ram_en,
-           Core_RAM_Address_Wr => MPI_Node_out(4).ram_address_wr,
-           Core_RAM_Address_Rd => MPI_Node_out(4).ram_address_rd,
-           Core_Hold_req => MPI_Node_out(4).hold_req,
-           Core_Hold_Ack => MPI_Node_in(4).hold_ack
-);
+--PE3: PE generic map (DestId=>2)
+--Port Map (
+--Instruction => MPi_Node_in(3).Instruction,
+--           Instruction_en => MPi_Node_in(3).Instruction_en,
+--                        Core_PushOut => MPi_Node_out(3).PushOut,
+--           clk =>clkm,
+--           reset =>reset,
+--                        CE => '1',
+--           Core_RAM_Data_Out =>MPi_Node_in(3).Ram_Data_out,
+--           Core_RAM_Data_IN => MPI_Node_out(3).ram_data_in,
+--           Core_RAM_WE => MPI_Node_out(3).ram_we,
+--           Core_RAM_EN => MPI_Node_out(3).ram_en,
+--          -- Core_RAM_ENB => MPI_Node_out(1).ram_en,
+--           Core_RAM_Address_Wr => MPI_Node_out(3).ram_address_wr,
+--           Core_RAM_Address_Rd => MPI_Node_out(3).ram_address_rd,
+--           Core_Hold_req => MPI_Node_out(3).hold_req,
+--           Core_Hold_Ack => MPI_Node_in(3).hold_ack
+--);
+--
+--PE4: PE       Generic map (DestId=>3)
+--                      Port Map (
+--                              Instruction => MPi_Node_in(4).Instruction,
+--           Instruction_en => MPi_Node_in(4).Instruction_en,
+--                        Core_PushOut => MPi_Node_out(4).PushOut,
+--           clk =>clkm,
+--           reset =>reset,
+--                        CE => '1',
+--           Core_RAM_Data_Out =>MPi_Node_in(4).Ram_Data_out,
+--           Core_RAM_Data_IN => MPI_Node_out(4).ram_data_in,
+--           Core_RAM_WE => MPI_Node_out(4).ram_we,
+--           Core_RAM_EN => MPI_Node_out(4).ram_en,
+--           --Core_RAM_ENB => MPI_Node_out(2).ram_en,
+--           Core_RAM_Address_Wr => MPI_Node_out(4).ram_address_wr,
+--           Core_RAM_Address_Rd => MPI_Node_out(4).ram_address_rd,
+--           Core_Hold_req => MPI_Node_out(4).hold_req,
+--           Core_Hold_Ack => MPI_Node_in(4).hold_ack
+--);
 MPI_Node_in(1).reset<=reset;    
 MPI_Node_in(1).clk<=clkm;
 MPI_Node_in(2).reset<=reset;    
 MPI_Node_in(2).clk<=clkm;
-MPI_Node_in(3).reset<=reset;    
-MPI_Node_in(3).clk<=clkm;
-MPI_Node_in(4).reset<=reset;    
-MPI_Node_in(4).clk<=clkm;
+--MPI_Node_in(3).reset<=reset;  
+--MPI_Node_in(3).clk<=clkm;
+--MPI_Node_in(4).reset<=reset;  
+--MPI_Node_in(4).clk<=clkm;
 Result<=MPi_Node_out(1).PushOut;
-PE_Dyn:for i in 5 to 6 generate
-PE_i: PE        Generic map (DestId=>i)
+PE_Dyn:for i in 3 to 4 generate
+PE_i: PE        Generic map (DestId=>i-1)
                         Port Map (
                                 Instruction => MPi_Node_in(i).Instruction,