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@396
|
12 years |
alain |
Major evolution of platform "tsar_generic_xbar"
to support 40 bits …
|
|
|
@395
|
12 years |
alain |
ntroducing support for 40 bits physical addresses.
|
|
|
@394
|
12 years |
alain |
ntroducing support for 40 bits physical addresses.
|
|
|
@393
|
12 years |
alain |
Introducing support for addresses larger than 32 bits.
|
|
|
@392
|
12 years |
alain |
Introducing support for physical addresses larger than 32 bits.
A new …
|
|
|
@391
|
12 years |
lambert |
Bug fix in Vci_mem_cache :
* When line evicion in write fsm to …
|
|
|
@390
|
12 years |
cfuguet |
Reactivating commented command in the Makefile of the tsar_boot
|
|
|
@389
|
12 years |
cfuguet |
Modifying the tsar_generic_xbar:
- Modifying the metadata and the …
|
|
|
@388
|
12 years |
cfuguet |
Modifications in tsar/trunk/softs/tsar_boot:
- Improving the …
|
|
|
@387
|
12 years |
joannou |
Bugfix in DCACHE_CC_UPDT (test on r_dcahe_cc_send_req instead of …
|
|
|
@386
|
12 years |
alain |
New release supporting the tsar_generic_xbar platform
with 64 bits …
|
|
|
@385
|
12 years |
alain |
VCI port to XRAM switched to DATA == 64 bits
=> two template …
|
|
|
@384
|
12 years |
joannou |
Bugfix in vci_cc_vcache_wrapper :
* Made cache flush states …
|
|
|
@383
|
12 years |
haoliu |
bug fix in dcache fsm:
in state DCACHE_MISS_CLEAN, we should use the …
|
|
|
@382
|
12 years |
alain |
Removing compilation warnings.
|
|
|
@381
|
12 years |
alain |
Removing a warning in constructor
|
|
|
@380
|
12 years |
simerabe |
Another bugfix
|
|
|
@379
|
12 years |
alain |
Code polishing
|
|
|
@378
|
12 years |
joannou |
Introducing tsar_generic_xbar platform
|
|
|
@377
|
12 years |
joannou |
Introducing vci_cc_vcache_wrapper and vci_mem_cache components in …
|
|
|
@376
|
12 years |
joannou |
Introducing dspin_dhccp_param class in communication directory
|
|
|
@375
|
12 years |
joannou |
Introducing vci_io_bridge component
|
|
|
@374
|
12 years |
joannou |
Introducing vci_block_device_tsar component
|
|
|
@373
|
12 years |
joannou |
Reintroducing softs :
* tests_cc_vcache
* tsar_boot
|
|
|
@372
|
12 years |
joannou |
Remove from trunk all obsolete components (saved in branch v4)
|
|
|
@371
|
12 years |
joannou |
Create TsarV4 branch from trunk as of now
|
|
|
@370
|
12 years |
joannou |
In tsarv5_generic_mmu :
* top.cpp : go look for hard_config.h in …
|
|
|
@369
|
12 years |
joannou |
Bugfix in vci_cc_vcache_wrapper v5 :
forgot to copy the nline when …
|
|
|
@368
|
12 years |
cfuguet |
Modification in tsar/trunk/softs/tsar_boot
Writing the carriage …
|
|
|
@367
|
12 years |
cfuguet |
Modification in v5/vci_mem_cache
Aligning to left the SRCID into the …
|
|
|
@366
|
12 years |
joannou |
In vci_cc_vcache_wrapper v5,
* now using the new generic_cache_tsar …
|
|
|
@365
|
12 years |
joannou |
In generic_cache_tsar, added a new write_dir function that does not …
|
|
|
@364
|
12 years |
haoliu |
Bug fix in dcache fsm, in dcache_xtn_dc_inval_go state,
set the slot …
|
|
|
@363
|
12 years |
joannou |
In tsarv5_generic_mmu platform, in tsar cluster, added l_width to …
|
|
|
@362
|
12 years |
cfuguet |
Bugfix in vci_mem_cache:
In function "copy()" of the xram_transaction …
|
|
|
@361
|
12 years |
cfuguet |
Bugfix in vci_mem_cache_v4:
In function "copy()" of the …
|
|
|
@360
|
12 years |
joannou |
In tsarv5_generic_mmu platform (tsarcluster):
* connected vci to dspin …
|
|
|
@359
|
12 years |
joannou |
bugfix : correctly updating the r_preempt register
|
|
|
@358
|
12 years |
simerabe |
bugfix : preempt in case of broadcast, palloc in case of single flit
|
|
|
@357
|
12 years |
simerabe |
fixbug : test on eop in case of single_flit coherence request
|
|
|
@356
|
12 years |
cfuguet |
Modifying comments in the dspin_dhccp_param to comply the type …
|
|
|
@355
|
12 years |
joannou |
In vci_cc_vcache_wrapper v5
- added check for p_dspin_in.write in …
|
|
|
@354
|
12 years |
cfuguet |
Bugfix in branches/v5/vci_mem_cache
Adding missing condition in …
|
|
|
@353
|
12 years |
cfuguet |
Bugfix in branches/v5/vci_mem_cache
Adding missing fifo get in case of …
|
|
|
@352
|
12 years |
cfuguet |
Bugfix in vci_cc_vcache_wrapper_v4:
In case of SC or CAS command, the …
|
|
|
@351
|
12 years |
joannou |
Got rid of intermediate v5 version. _dspin_coherence versions changed …
|
|
|
@350
|
12 years |
alain |
Introducing Platform tsarv5_dspin_array,
that can be used for TSAR …
|
|
|
@349
|
12 years |
cfuguet |
Rearranging addresses in the function pointer table
to keep backward …
|
|
|
@348
|
12 years |
cfuguet |
Adding the boot_putc and the boot_getc in the functions
pointer table …
|
|
|
@347
|
12 years |
cfuguet |
Introducing dcache line invalidation mechanism in the boot_ioc_read …
|
|
|
@346
|
12 years |
alain |
New contructors for vci_mem_cache & vci_cc_vcache,
as we don't need …
|
|
|
@345
|
12 years |
alain |
Introducing the cluster component in tsarv5_generic_mmu platform.
|
|
|
@344
|
12 years |
alain |
Introducing the tsarv5_generic_mmu platform.
|
|
|
@343
|
12 years |
cfuguet |
Using the Xicu SOFT IRQs (IPIs). Adding them on the Xicu
constructor
|
|
|
@342
|
12 years |
joannou |
Introducing tsar_generic_mmu_dspin_coherence platform (ring dspin for …
|
|
|
@341
|
12 years |
joannou |
In vci_cc_vcache_wrapper_dspin_coherence, DCACHE_TLB_PTE1_MISS and …
|
|
|
@340
|
12 years |
cfuguet |
Erasing always false condition in the if statement of the …
|
|
|
@339
|
12 years |
cfuguet |
Erasing always false condition in the if statement of the …
|
|
|
@338
|
12 years |
joannou |
* In vci_cc_vcache_wrapper_dspin_coherence, modified both states
…
|
|
|
@337
|
12 years |
joannou |
In generic_cache_tsar, added new read function that returns 2 32bits …
|
|
|
@336
|
12 years |
cfuguet |
Bug fix in the vci_cc_vcache_wrapper and vci_mem_cache components
(and …
|
|
|
@335
|
12 years |
joannou |
Added llsc table initialization in both vci_mem_cache and …
|
|
|
@334
|
12 years |
joannou |
Separated stat counters resets from internal registers resets
|
|
|
@333
|
12 years |
joannou |
- In vci_cc_vcache_wrapper_dspin_coherence : initializing …
|
|
|
@332
|
12 years |
joannou |
Updated top.cpp in tsar_mono_mmu_dspin_coherence to respect new file …
|
|
|
@331
|
12 years |
joannou |
Renaming all files form vci_cc_vcache_wrapper_dspin_coherence and …
|
|
|
@330
|
12 years |
joannou |
* Commented debug in dspin_local_ring_fast_c
* Added test on plen …
|
|
|
@329
|
12 years |
joannou |
Added test on INST/DATA for the CLACK in the …
|
|
|
@328
|
12 years |
cfuguet |
Including TYPE_CLEANUP_ACK_INST and TYPE_CLEANUP_ACK_DATA in the …
|
|
|
@327
|
12 years |
simerabe |
introducing topcell examples using dspin ring interconnect
|
|
|
@326
|
12 years |
simerabe |
introducing 2 new components : simple and local ring interconnect …
|
|
|
@325
|
12 years |
joannou |
bugfix in vci_cc_vcache_wrapper_dspin_coherence :
- consume fifo in …
|
|
|
@324
|
12 years |
joannou |
updated the test_interrupt_delayslot : now testing for several delay values
|
|
|
@323
|
12 years |
joannou |
removed unusefull flipflop r_*cache_cc_fifo_done + syntax correction …
|
|
|
@322
|
12 years |
cfuguet |
Erasing binary generated files in tests_ccvcache_v4/test_sync
from the repo
|
|
|
@321
|
12 years |
joannou |
bugfix in vci_cc_vcache_wrapper_dspin_coherence in coherence type checking
|
|
|
@320
|
12 years |
cfuguet |
vci_mem_cache_dspin_coherence:
- Fixing typo error in …
|
|
|
@319
|
12 years |
cfuguet |
Fix bug in vci_mem_cache_dspin_coherence. The write signal
in the …
|
|
|
@318
|
12 years |
joannou |
vci_cc_vcache_wrapper_dspin_coherence now use DspinDhccpParam::* types …
|
|
|
@317
|
12 years |
cfuguet |
Introducing missing debug strings in the vci_mem_cache cpp file
|
|
|
@316
|
12 years |
joannou |
Introducing new tsar_mono_mmu_dspin_coherence platform
Same as …
|
|
|
@315
|
12 years |
joannou |
Introducing new dspin interface for …
|
|
|
@314
|
12 years |
cfuguet |
Erasing old comments in the reset.s file of the pre-loader
|
|
|
@313
|
12 years |
cfuguet |
Erasing useless template parameters for the …
|
|
|
@312
|
12 years |
cfuguet |
Updating width of the way index in DSPIN coherence flits.
Using 2 bits …
|
|
|
@311
|
12 years |
cfuguet |
Including GET and SET methods for the FROM_L1_BC and
FROM_MC_BC bit in …
|
|
|
@310
|
12 years |
cfuguet |
Introducing FROM_L1_BC and FROM_MC_BC in dspin param class to
access …
|
|
|
@309
|
12 years |
joannou |
Bugfix : typo in component name (was 'dhcpp', is now 'dhccp')
|
|
|
@308
|
12 years |
cfuguet |
Fixing parameter name error in metadata of vci_mem_cache
|
|
|
@307
|
12 years |
cfuguet |
Including vci_mem_cache v5 using dspin interface for
the coherence …
|
|
|
@306
|
12 years |
joannou |
Added tsar_mono_mmu and tsar_generic_mmu platforms
|
|
|
@305
|
12 years |
joannou |
In vci_mem_cache component:
Adding an assert for cleanup commands …
|
|
|
@304
|
12 years |
joannou |
Bug fixing in vci_cc_vcache_wrapper component :
- In TGT_RSP_DCACHE, …
|
|
|
@303
|
12 years |
joannou |
Bug fix in generic_cache_tsar component :
In the read_select function, …
|
|
|
@302
|
12 years |
cfuguet |
Introducing IRQ_PER_PROC constant in the tsar boot loader …
|
|
|
@301
|
12 years |
joannou |
bugfix in vci_block_device_tsar_v4 : the component used a vci …
|
|
|
@300
|
12 years |
joannou |
Moved tsar modules vci_cc_vcache_wrapper and vci_mem_cache under the …
|
|
|
@299
|
12 years |
alain |
bug fixing: coherence interrupt must be taken in the MISS_DIR_UPDT states.
|
|
|
@298
|
12 years |
alain |
Bug fixing in the NIC constructor
|
|
|
@297
|
12 years |
alain |
Introducing the 3 states (EMPTY,VALID,ZOMBI) states in cache directory
|
|
|