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4:21 PM Changeset [386] by alain: New release supporting the tsar_generic_xbar platform with 64 bits …
4:13 PM Changeset [385] by alain: VCI port to XRAM switched to DATA == 64 bits => two template …

4:18 PM Changeset [384] by joannou: Bugfix in vci_cc_vcache_wrapper : * Made cache flush states …

3:33 PM Changeset [383] by haoliu: bug fix in dcache fsm: in state DCACHE_MISS_CLEAN, we should use the …

3:33 PM Changeset [378] by joannou: Introducing tsar_generic_xbar platform
1:34 PM Changeset [377] by joannou: Introducing vci_cc_vcache_wrapper and vci_mem_cache components in …
1:32 PM Changeset [376] by joannou: Introducing dspin_dhccp_param class in communication directory
1:30 PM Changeset [375] by joannou: Introducing vci_io_bridge component
1:28 PM Changeset [374] by joannou: Introducing vci_block_device_tsar component
1:14 PM Changeset [373] by joannou: Reintroducing softs : * tests_cc_vcache * tsar_boot
1:08 PM Changeset [372] by joannou: Remove from trunk all obsolete components (saved in branch v4)
12:42 PM Changeset [371] by joannou: Create TsarV4 branch from trunk as of now

5:26 PM Changeset [370] by joannou: In tsarv5_generic_mmu : * top.cpp : go look for hard_config.h in …
4:53 PM Changeset [369] by joannou: Bugfix in vci_cc_vcache_wrapper v5 : forgot to copy the nline when …

5:33 PM Changeset [368] by cfuguet: Modification in tsar/trunk/softs/tsar_boot Writing the carriage …

7:59 PM InterconnexionNetworks edited by alain: (diff)
7:56 PM InterconnexionNetworks edited by alain: (diff)
7:54 PM InterconnexionNetworks edited by alain: (diff)
7:27 PM InterconnexionNetworks edited by alain: (diff)
11:59 AM InterconnexionNetworks edited by alain: (diff)
11:56 AM InterconnexionNetworks edited by alain: (diff)
11:55 AM Changeset [367] by cfuguet: Modification in v5/vci_mem_cache Aligning to left the SRCID into the …
11:49 AM InterconnexionNetworks edited by alain: (diff)
11:32 AM InterconnexionNetworks edited by alain: (diff)

9:41 PM Changeset [366] by joannou: In vci_cc_vcache_wrapper v5, * now using the new generic_cache_tsar …
9:33 PM Changeset [365] by joannou: In generic_cache_tsar, added a new write_dir function that does not …
3:14 PM Changeset [364] by haoliu: Bug fix in dcache fsm, in dcache_xtn_dc_inval_go state, set the slot …

6:36 PM Changeset [363] by joannou: In tsarv5_generic_mmu platform, in tsar cluster, added l_width to …
12:58 PM Changeset [362] by cfuguet: Bugfix in vci_mem_cache: In function "copy()" of the xram_transaction …
12:54 PM Changeset [361] by cfuguet: Bugfix in vci_mem_cache_v4: In function "copy()" of the …
11:54 AM Changeset [360] by joannou: In tsarv5_generic_mmu platform (tsarcluster): * connected vci to dspin …

5:10 PM Changeset [359] by joannou: bugfix : correctly updating the r_preempt register
12:34 PM Changeset [358] by simerabe: bugfix : preempt in case of broadcast, palloc in case of single flit

6:13 PM Changeset [357] by simerabe: fixbug : test on eop in case of single_flit coherence request
1:46 PM Changeset [356] by cfuguet: Modifying comments in the dspin_dhccp_param to comply the type …

7:21 PM Changeset [355] by joannou: In vci_cc_vcache_wrapper v5 - added check for p_dspin_in.write in …
4:28 PM Changeset [354] by cfuguet: Bugfix in branches/v5/vci_mem_cache Adding missing condition in …
4:17 PM Changeset [353] by cfuguet: Bugfix in branches/v5/vci_mem_cache Adding missing fifo get in case of …

3:45 PM Changeset [352] by cfuguet: Bugfix in vci_cc_vcache_wrapper_v4: In case of SC or CAS command, the …
2:36 PM Changeset [351] by joannou: Got rid of intermediate v5 version. _dspin_coherence versions changed …

10:41 PM Changeset [350] by alain: Introducing Platform tsarv5_dspin_array, that can be used for TSAR …

5:53 PM Changeset [349] by cfuguet: Rearranging addresses in the function pointer table to keep backward …
5:47 PM InterconnexionNetworks edited by haoliu: fix error in dspin multi-ack packet descrption (diff)
2:23 PM Changeset [348] by cfuguet: Adding the boot_putc and the boot_getc in the functions pointer table …

8:57 PM Changeset [347] by cfuguet: Introducing dcache line invalidation mechanism in the boot_ioc_read …

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