Changeset 119 for anr/section-6.1.tex


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Timestamp:
Feb 9, 2010, 1:02:52 PM (14 years ago)
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coach
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Paul: Minor language modifications.

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  • anr/section-6.1.tex

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    44The CAIRN group is an INRIA - Bretagne Atlantique project and a part of IRISA, UMR
    5 6074. CAIRN members are affiliated from University of Rennes\~1 or Ecole Normale
    6 Supérieure de Cachan. the goal of CAIRN is to study reconfigurable system-on-chip,
     56074. CAIRN members are affiliated to University of Rennes\~1 or Ecole Normale
     6Supérieure de Cachan. The goal of CAIRN is to study reconfigurable system-on-chip,
    77i.e. hardware systems whose configuration may change before or even during execution.
    8 To this end, CAIRN intends to approach reconfigurable architectures from three angles:
     8To this end, CAIRN intends to approach reconfigurable architectures from three
     9directions: % angles:
    910the invention of new reconfigurable platforms, the development of associated
    1011transformation, compilation and synthesis tools, and the exploration of the interaction
     
    3637Systems-on-Chip together with their basic operating system on the other end.
    3738
    38 Currently, the lab contains 124 persons among whom 60 PhD candidates, and runs
     39Currently, the lab employs 124 persons among which 60 PhD candidates, and runs
    394032 ongoing French/European funded projects.
    40 Since its creation in 1984, TIMA funded 7 start ups, patented 36 inventions
     41Since its creation in 1984, TIMA funded 7 startups, patented 36 inventions
    4142and had 243 PhD thesis defended.
    4243
     
    5152The Lab-STICC (Laboratoire des Sciences et Techniques de l'Information,
    5253de la Communication, et de la Connaissance), is a French CNRS laboratory
    53 (UMR 3192) that gathers 4 research centers in the west and south
    54 Brittany; from the Universitï¿œ de Bretagne-Sud (UBS), the Universitï¿œ de
     54(UMR 3192) that groups 4 research centers in the west and south
     55Brittany: the Universit\'e de Bretagne-Sud (UBS), the Universit\'e de
    5556Bretagne Occidentale (UBO), and Telecom Bretagne (ENSTB).
    5657\\
     
    5859Digital communications, Architectures and circuits (CACS) and Knowledge,
    5960information and decision (CID). The Lab-STICC represents a staff of 279
    60 people, including 115 researchers and 113 PhD students.
     61peoples, including 115 researchers and 113 PhD students.
    6162The scientific production during the last 4 years represents 20
    6263books, 200 journal publications, 500 conference publications, 22
     
    121122
    122123\xilinx is the world leader in the domain of programmable logic circuits (FPGA).
    123 \xilinx develops in one hand several FPGA architectures (CoolRunner, Spartan and Virtex
     124\xilinx develops on one hand several FPGA architectures (CoolRunner, Spartan and Virtex
    124125families) and in the other hand a software solution allowing exploiting the
    125126characteristics of these FPGA.
    126127\parlf
    127 The tools proposed can allow the designer to describe his architecture from modeling
     128The tools proposed allow the designer to describe his architecture from a modeling
    128129language (VHDL/Verilog) to an optimized architecture implemented to the selected
    129130technology.
     
    135136  \item RTL model optimizations.
    136137  \item Inference and generation of optimized macro blocks (Finite states machine, counter).
    137   \item Boolean equations generation for randomly logic.
     138  \item Boolean equations generation for random logic.
    138139  \item Logical, mapping and timing optimizations.
    139140\end{itemize}
     
    141142The architectures developed by \xilinx offer a collection of technological primitives
    142143(variable complexity) from simple Boolean generators (LUT) to complex DSP blocks or memory
    143 and whether configurable processor cores (Pico and MicroBlaze families).
    144 This kind of architecture allows, thus, the designer to validate different
     144and even configurable processor cores (Pico and MicroBlaze families).
     145This kind of architecture allows, therefore, the designer to validate different
    145146hardware/software possibilities in a High Level Synthesis (HLS) framework.
    146147\parlf
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