Changeset 121


Ignore:
Timestamp:
Feb 9, 2010, 5:08:49 PM (15 years ago)
Author:
coach
Message:

FC: mise à jour partie moyens INRIA/CAIRN

Location:
anr
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • anr/anr.tex

    r120 r121  
    4747\def\Sformat#1{\begin{small}\textsc{#1}\end{small}}
    4848\def\inria{INRIA\xspace}          \def\Sinria{\Sformat{INRIA}\xspace}
    49 \def\irisa{INRIA/CAIRN\xspace}          \def\Sirisa{\Sformat{CAIRN}\xspace}
     49\def\irisa{INRIA/CAIRN\xspace}          \def\Sirisa{\Sformat{IN/CN}\xspace}
    5050%\def\citi{CITI\xspace}            \def\Sciti{\Sformat{CITI}\xspace}
    51 \def\lip{INRIA/COMPSYS\xspace}              \def\Slip{\Sformat{COMP}\xspace}
     51\def\lip{INRIA/COMPSYS\xspace}              \def\Slip{\Sformat{IN/CS}\xspace}
    5252\def\tima{TIMA\xspace}            \def\Stima{\Sformat{TIMA}\xspace}
    5353\def\ubs{LAB-STICC\xspace}        \def\Subs{\Sformat{UBS}\xspace}

  • anr/gantt.l

    r113 r121  
    4242struct partner_def { char *key, *name, *fnfull, *fnshort; } partner_table[] = {
    4343    { "UNKNOW" ,"relax"  ,0                       ,0                        },
    44     { "irisa"  ,"irisa"  ,"table_irisa_full.tex"  ,"table_irisa_short.tex"  },
    45     { "lip"    ,"lip"    ,"table_lip_full.tex"    ,"table_lip_short.tex"    },
     44    { "irisa"  ,"irisa"  ,"table_inria_cairn_full.tex"  ,"table_inria_cairn_short.tex"  },
     45    { "inria_compsys"    ,"inria_compsys"    ,"table_inria_compsys_full.tex"    ,"table_inria_compsys_short.tex"    },
    4646    { "tima"   ,"tima"   ,"table_tima_full.tex"   ,"table_tima_short.tex"   },
    4747    { "ubs"    ,"ubs"    ,"table_ubs_full.tex"    ,"table_ubs_short.tex"    },
    … …  
    781781    prepare2(curr);
    782782    prepare3(curr);
     783    do_partner_table_full(1); do_partner_table_short(1);
    783784    do_partner_table_full(3); do_partner_table_short(3);
    784785    do_partner_table_full(4); do_partner_table_short(4);

  • anr/section-6.1.tex

    r120 r121  
    11%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    2 \subsubsection{\inria}
     2\subsubsection{\inria (CAIRN \& COMPSYS teams)}
    33
    44Inria, the French national institute for research in computer science

  • anr/section-7.tex

    r120 r121  
    22
    33%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    4 \subsection{Partner 1: \inria}
    5 \ressourcehelp
    6 
    7 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    8 \subsubsection*{\irisa}
    9 
    10 
    11 \subsubsection*{\lip}
     4\subsection{Partner 1: \irisa}
     5
     6\begin{figure}\leavevmode\center
     7\input{table_inria_cairn_full.tex}
     8\caption{\label{ress-detail-irisa}Man power in $mm$ for the delivrables of \irisa.}
     9\end{figure}
     10\begin{description}
     11\item [Equipment]
     12No specific equipment acquisition.
     13\item [Personnel costs] The faculty members involved in the project
     14  are François Charot (INRIA researcher) Steven Derrien (associate
     15  professor) and Charles Wagner (research engineer). The non-permanent
     16  personal required is a PhD student that will mainly work on ASIP
     17  generation. We are looking for profile with strong informatic skills
     18  and good knowledge in computer architecture.
     19
     20The table below summarizes the man power by task for both permanent and
     21non-permanent personnels. The detail by delivrables is given in
     22figure~\ref{ress-detail-irisa}.
     23The non-permanent personnels costs represent ??\% of the personnal
     24costs. The requested funding for non permanent personnels is 100\% of
     25the total ANR requested funding.
     26    \begin{center}\input{table_inria_cairn_short.tex}\end{center}
     27
     28\item [Subcontracting]
     29No subcontracting costs.
     30\item [Travel]
     31The travel costs are associated to project meeting as
     32well as participation to conferences. The travel costs are estimated
     33to ??\% of the total requested ANR funding.
     34\item [Expenses for inward billing]
     35The costs justified by internal invoicing procedures are evaluated to 4\%
     36of the total requested ANR funding.\\
     37\end{description}
     38
     39
     40\subsection{Partner 2: \lip}
     41
    1242%\ressourcehelp
    1343\begin{figure}\leavevmode\center
    … …  
    4979
    5080%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    51 \subsection{Partner 2: \tima}
     81\subsection{Partner 3: \tima}
    5282\begin{figure}\leavevmode\center
    5383\input{table_tima_full.tex}
    … …  
    90120
    91121%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    92 \subsection{Partner 3: \ubs}
     122\subsection{Partner 4: \ubs}
    93123\begin{figure}\leavevmode\center
    94124\input{table_ubs_full.tex}
    … …  
    125155
    126156%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    127 \subsection{Partner 4: \upmc}
     157\subsection{Partner 5: \upmc}
    128158\begin{figure}\leavevmode\center
    129159\input{table_upmc_full.tex}
    … …  
    159189
    160190%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    161 \subsection{Partner 5: \xilinx}
     191\subsection{Partner 6: \xilinx}
    162192
    163193\begin{figure}\leavevmode\center
    … …  
    184214
    185215%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    186 \subsection{Partner 6: \bull}
     216\subsection{Partner 7: \bull}
    187217
    188218\begin{description}
    … …  
    205235
    206236%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    207 \subsection{Partner 7: \thales}
     237\subsection{Partner 8: \thales}
    208238\ressourcehelp
    209239
    210240%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    211 \subsection{Partner 8: \zied}
     241\subsection{Partner 9: \zied}
    212242\ressourcehelp
    213243
    214244%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
    215 \subsection{Partner 9: \navtel}
     245\subsection{Partner 10: \navtel}
    216246\ressourcehelp
    217247

  • anr/task-2.tex

    r114 r121  
    8585        the SystemC modules of the components of the ALTERA architectural template
    8686        currently not available in the SocLib component library.
    87     \itemL{18}{24}{h}{\Sirisa}{ALTERA architecture}{0:0:0}
     87    \itemL{18}{24}{h}{\Sirisa}{ALTERA architecture}{6:6:0}
    8888        The synthesizable VHDL description of the MWMR component corresponding to the
    8989        SystemC module of the former delivrable (\csgAlteraSystemC);

  • anr/task-3.tex

    r114 r121  
    2727      \itemV{0}{18}{X}{\Sirisa}{ASIP compilation flow}
    2828        In this first version of the software, the computations patterns corresponding to
    29         custom instruction are specified by the user, and then automatically extracted (when
     29        custom instructions are specified by the user, and then automatically extracted (when
    3030        beneficial) from the application intermediate representation.
    3131        %\mustbecompleted{FIXME .....}
    32       \itemL{18}{24}{X}{\Sirisa}{ASIP compilation flow}{0:0:0}
     32      \itemL{18}{24}{X}{\Sirisa}{ASIP compilation flow}{6:9:0}
    3333        In this second version, the software will also be able to automatically identify
    3434        interesting pattern candidates in the application code, and use them as custom
    … …  
    3737 
    3838 \item In this sub-task, we provide micro-architectural template models for the two target
    39  processor architectures (NIOS-II and MIPS) supported within in the COACH-ASIP design flow.
     39 processor architectures (NIOS-II and MIPS) supported within the COACH-ASIP design flow.
    4040 For each processor, we provide a simulation model (System-C) and a synthesizable model (VHDL)
    4141 of the architecture, along with its architectural extensions
    4242    \begin{livrable}
    4343      \itemV{0}{12}{X}{\Sirisa}{SystemC for extensible MIPS }
    44       { A SystemC simulation model for an simple extensible MIPS architectural template }
    45       \itemL{12}{20}{X}{\Sirisa}{SystemC for extensible MIPS}{0:0:0}
    46       {A SystemC simulation model for a extensible MIPS with a tight architectural integration of
     44      { A SystemC simulation model for a simple extensible MIPS architectural template }
     45      \itemL{12}{20}{X}{\Sirisa}{SystemC for extensible MIPS}{2:3:0}
     46      {A SystemC simulation model for an extensible MIPS with a tight architectural integration of
    4747      its instruction set extensions}
    48       \itemL{0}{12}{X}{\Sirisa}{SystemC for NIOS processor}{0:0:0}
     48      \itemL{0}{12}{X}{\Sirisa}{SystemC for NIOS processor}{2:0:0}
    4949          { A SystemC simulation model for an extensible NIOS processor template, the VHDL model being
    5050          already available from Altera}
    5151      \itemV{12}{18}{H}{\Sirisa}{VHDL for an extensible MIPS}
    52       {A synthesizable VHDL model for an simple extensible MIPS architectural template}
    53       \itemL{18}{24}{H}{\Sirisa}{VHDL for an extensible MIPS}{0:0:0}
    54       {A synthesizable VHDL model for a extensible MIPS with a tight architectural integration of
     52      {A synthesizable VHDL model for a simple extensible MIPS architectural template}
     53      \itemL{18}{24}{H}{\Sirisa}{VHDL for an extensible MIPS}{9:12:0}
     54      {A synthesizable VHDL model for an extensible MIPS with a tight architectural integration of
    5555      its instruction set extensions}
    56       \itemL{24}{36}{D}{\Sirisa}{Evaluation report }{0:0:0}
    57       {A evaluation report with quantitative analysis of the performance/area trade-off induced by
     56      \itemL{24}{36}{D}{\Sirisa}{Evaluation report }{0:0:2}
     57      {An evaluation report with quantitative analysis of the performance/area trade-off induced by
    5858      the different approaches}
    5959    \end{livrable}
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