Changeset 52 for anr/task-5.tex


Ignore:
Timestamp:
Jan 31, 2010, 10:17:25 PM (15 years ago)
Author:
coach
Message:

IA: modification des macros livrable & sortie des tableaux de ressources.

File:
1 edited

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  • anr/task-5.tex

    r40 r52  
    2424\end{objectif}
    2525%
    26 \begin{workpackage}{D5}
     26\begin{workpackage}
    2727\item This \ST is the definition of the communication schemes as a software API
    2828    (Application Programing Interface) between the application part running on the PC and
    2929    the application part running on the FPGA-SoC.
    3030    \begin{livrable}
    31     \item{}{0}{6}{d}{\Supmc}{HPC communication API} User refernce manual describing the API.
    32         \global\edef\hpcCommApi{\name}
     31    \itemL{0}{6}{d}{\Supmc}{HPC communication API}{1.0:0:0}
     32        \setMacroInAuxFile{hpcCommApi}
     33        User refernce manual describing the API.
    3334    \end{livrable}
    3435\item This \ST consists in helping to partition the application.
     
    3637    the partitioned application.
    3738    \begin{livrable}
    38     \item{}{6}{12}{x}{\Supmc}{HPC partionning helper} A library implementing the communication
    39         API defined in the {\hpcCommApi} delivrable.
     39    \itemL{6}{12}{x}{\Supmc}{HPC partionning helper}{1:0:0}
     40        A library implementing the communication API defined in the {\hpcCommApi} delivrable.
    4041    \end{livrable}
    4142\item This \ST deals with the implementation of the communication API on the both sides (PC
    4243    part and FPGA-SoC).
    4344    \begin{livrable}
    44     \item{}{12}{21}{x}{\Supmc}{HPC API for Linux PC} The PC part of the HPC communication API
    45         that comminicates with the FPGA-SOC, a library and probably a LINUX module.
    46     \item{}{12}{21}{x}{\Supmc}{HPC API for MUTEK OS} The FPGA-SoC part of the communication API, a
    47         driver.\global\edef\hpcMutekDriver{\name}
    48     \item{}{21}{24}{x}{\Stima}{HPC API for DNA OS} Port of the {\hpcMutekDriver} driver on the DNA OS.
     45    \itemL{12}{21}{x}{\Supmc}{HPC API for Linux PC}{0:3:0}
     46        The PC part of the HPC communication API that comminicates with the FPGA-SOC, a
     47        library and probably a LINUX module.
     48    \itemL{12}{21}{x}{\Supmc}{HPC API for MUTEK OS}{0:3:0}
     49        \setMacroInAuxFile{hpcMutekDriver}
     50        The FPGA-SoC part of the communication API, a driver.
     51    \itemL{21}{24}{x}{\Stima}{HPC API for DNA OS}{0:0:0}
     52        Port of the {\hpcMutekDriver} driver on the DNA OS.
     53    \itemL{24}{33}{x}{\Supmc}{HPC API}{0:0:1}
     54        Maintenance work of HPC API for both Lunix PC and MUTEK OS.
    4955    \end{livrable}
    5056\item This \ST deals with the implementation of hardware required by the COACH
    5157    architectural template for using the PCI/X IP of \altera and \xilinx.
    5258    \begin{livrable}
    53     \item{}{9}{18}{h}{\Stima}{HPC hardware \xilinx}
     59    \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{0:0:0}
    5460        \setMacroInAuxFile{hpcPlbBridge}
    5561        The synthesizable VHDL description of a PLB/VCI bridge and its corresponding SystemC model.
    56     \item{}{9}{18}{h}{\Saltera}{HPC hardware \altera}
     62    \itemL{9}{18}{h}{\Saltera}{HPC hardware \altera}{0:0:0}
    5763        \setMacroInAuxFile{hpcAvalonBridge}
    5864        The synthesizable VHDL description of an AVALON/VCI bridge and its corresponding SystemC model.
     
    6066\item This \ST deals with the dynamic reconfiguration of an FPGA.
    6167    \begin{livrable}
    62     \item{}{18}{30}{x}{\Stima}{dynamic reconfiguration \ganttlf DNA drivers}
    63         \global\edef\hpcDynconfDriver{\name}
     68    \itemL{18}{30}{x}{\Stima}{dynamic reconfiguration \ganttlf DNA drivers}{0:0:0}
     69        \setMacroInAuxFile{hpcDynconfDriver}
    6470        \mustbecompleted{FIXME:TIMA ....}
    65     \item{}{30}{36}{x}{\Supmc}{dynamic reconfiguration \ganttlf MUTEK drivers}
     71    \itemL{30}{36}{x}{\Supmc}{dynamic reconfiguration \ganttlf MUTEK drivers}{0:0:1}
    6672        Port of the {\hpcDynconfDriver} \mustbecompleted{FIXME:TIMA driver} on the MUTEK OS.
    67     \item{}{24}{36}{x}{\Supmc}{CSG support for \ganttlf dynamic reconfiguration}
     73    \itemL{24}{36}{x}{\Supmc}{CSG support for \ganttlf dynamic reconfiguration}{0:0:2}
    6874        \mustbecompleted{FIXME:TIMA ....}
    69     \item{}{18}{36}{x}{\Stima}{PC support for \ganttlf dynamic reconfiguration}
     75    \itemL{18}{36}{x}{\Stima}{PC support for \ganttlf dynamic reconfiguration}{0:0:0}
    7076        \mustbecompleted{FIXME:TIMA ....}
    7177    \end{livrable}
     
    7480    They are based on \mustbecompleted{FIXME:stratix4} FPGA device of 400,000 LUT.
    7581    \begin{livrable}
    76     \item{}{0}{6}{m}{\Saltera}{HPC development boards} Two PCI/X FPGA boards.
     82    \itemL{0}{6}{m}{\Saltera}{HPC development boards}{0:0:0} Two PCI/X FPGA boards.
    7783    \end{livrable}
    7884\end{workpackage}
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