[78] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Update_Prediction_Table_transition.cpp 120 2009-05-26 19:01:47Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace prediction_unit { |
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| 17 | namespace update_prediction_table { |
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| 18 | |
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| 19 | #undef FUNCTION |
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| 20 | #define FUNCTION "Update_Prediction_Table::transition" |
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| 21 | void Update_Prediction_Table::transition (void) |
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| 22 | { |
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[88] | 23 | log_begin(Update_Prediction_Table,FUNCTION); |
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| 24 | log_function(Update_Prediction_Table,FUNCTION,_name.c_str()); |
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[78] | 25 | |
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[81] | 26 | if (PORT_READ(in_NRESET) == 0) |
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| 27 | { |
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[88] | 28 | // Initialisation |
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| 29 | |
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| 30 | reg_UPDATE_PRIORITY = 0; |
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| 31 | |
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| 32 | // All pointer is set at 0 |
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[81] | 33 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 34 | { |
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[88] | 35 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
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| 36 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
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| 37 | reg_UFPT_BOTTOM [i] = 0; |
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| 38 | reg_UFPT_TOP [i] = 0; |
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| 39 | reg_UFPT_UPDATE [i] = 0; |
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| 40 | reg_UFPT_NB_NEED_UPDATE [i] = 0; |
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[106] | 41 | reg_UFPT_NB_UPDATE [i] = 0; |
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[88] | 42 | |
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| 43 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; ++j) |
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| 44 | reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY; |
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| 45 | reg_UPT_BOTTOM [i] = 0; |
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| 46 | reg_UPT_TOP [i] = 0; |
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[95] | 47 | reg_UPT_TOP_EVENT [i] = 0; |
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[88] | 48 | reg_UPT_UPDATE [i] = 0; |
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[101] | 49 | reg_UPT_EMPTY [i] = true; |
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[88] | 50 | |
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| 51 | reg_IS_ACCURATE [i] = true; |
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[94] | 52 | |
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[105] | 53 | reg_EVENT_VAL [i] = false; |
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[88] | 54 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
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[112] | 55 | reg_EVENT_IS_BRANCH [i] = true; |
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[88] | 56 | } |
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[81] | 57 | } |
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| 58 | else |
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| 59 | { |
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[105] | 60 | bool flush_UFPT [_param->_nb_context]; |
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[94] | 61 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[105] | 62 | { |
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| 63 | flush_UFPT [i] = false; |
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| 64 | } |
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[94] | 65 | |
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[81] | 66 | // =================================================================== |
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[88] | 67 | // =====[ GARBAGE COLLECTOR ]========================================= |
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| 68 | // =================================================================== |
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| 69 | |
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| 70 | // Each cycle, if the most lastest branch have update all prediction struction (state = end), free this slot |
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| 71 | // * Update state -> new status is "empty" |
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| 72 | // * Update pointer (bottom and accurate) |
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[105] | 73 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * GARBAGE COLLECTOR (BEGIN)"); |
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[88] | 74 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 75 | { |
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| 76 | // UPDATE_FETCH_PREDICTION_TABLE |
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| 77 | { |
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| 78 | uint32_t bottom = reg_UFPT_BOTTOM [i]; |
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| 79 | |
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| 80 | // Test if state is end |
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| 81 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state == UPDATE_FETCH_PREDICTION_STATE_END) |
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| 82 | { |
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| 83 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d]",i,bottom); |
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| 84 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state = UPDATE_FETCH_PREDICTION_STATE_EMPTY",i,bottom); |
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| 85 | |
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| 86 | // Free slot |
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| 87 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
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| 88 | // Update pointer |
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| 89 | reg_UFPT_BOTTOM [i] = (bottom+1)%_param->_size_ufpt_queue[i]; |
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| 90 | } |
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| 91 | } |
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| 92 | |
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| 93 | // UPDATE_PREDICTION_TABLE |
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| 94 | { |
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[101] | 95 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
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[106] | 96 | bool end = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END); |
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| 97 | // bool end_ok = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_OK); |
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| 98 | // bool end_ko = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_KO); |
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[101] | 99 | // event_state_t event_state = reg_EVENT_STATE [i]; |
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[95] | 100 | |
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[88] | 101 | // Test if state is end |
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[106] | 102 | // if (end_ok or end_ko) |
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[112] | 103 | |
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| 104 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state is STATE_END : %d",end); |
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| 105 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (before) : %d",reg_UPT_BOTTOM [i]); |
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| 106 | |
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[106] | 107 | if (end) |
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[88] | 108 | { |
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[111] | 109 | #if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true) |
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| 110 | if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._retire_ok) |
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| 111 | { |
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| 112 | uint32_t num_thread = _param->_translate_num_context_to_num_thread [i]; |
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| 113 | branchement_log_file [num_thread] |
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| 114 | << std::hex |
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[112] | 115 | << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_src << " " |
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| 116 | << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_dest << " " |
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[111] | 117 | << std::dec |
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[112] | 118 | << reg_UPDATE_PREDICTION_TABLE [i][bottom]._good_take << " - " |
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[113] | 119 | << "[" << simulation_cycle() << "] " << " " |
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[112] | 120 | << reg_UPDATE_PREDICTION_TABLE [i][bottom]._miss_prediction << " " |
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| 121 | << reg_UPDATE_PREDICTION_TABLE [i][bottom]._ifetch_prediction << " " |
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| 122 | << "(" << (uint32_t)reg_UPDATE_PREDICTION_TABLE [i][bottom]._condition << ")" |
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[111] | 123 | << std::endl; |
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| 124 | } |
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| 125 | #endif |
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[88] | 126 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]",i,bottom); |
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| 127 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]._state = UPDATE_PREDICTION_STATE_EMPTY",i,bottom); |
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| 128 | // Free slot |
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| 129 | reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY; |
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[95] | 130 | |
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[88] | 131 | // Update pointer |
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| 132 | reg_UPT_BOTTOM [i] = (bottom+1)%_param->_size_upt_queue[i]; |
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[106] | 133 | |
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[101] | 134 | if (reg_UPT_BOTTOM [i] == reg_UPT_TOP [i]) |
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| 135 | reg_UPT_EMPTY [i] = true; // free a slot |
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| 136 | |
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[95] | 137 | // if (bottom = reg_UPT_UPDATE [i]) |
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| 138 | // reg_UPT_UPDATE [i] = reg_UPT_BOTTOM [i]; |
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[112] | 139 | }// @@@ |
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| 140 | |
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| 141 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (after ) : %d",reg_UPT_BOTTOM [i]); |
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| 142 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d",reg_EVENT_VAL [i]); |
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| 143 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d",reg_EVENT_UPT_PTR [i]); |
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| 144 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d",reg_EVENT_UPT_FULL[i]); |
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[105] | 145 | |
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[112] | 146 | if (reg_EVENT_VAL [i] and (reg_EVENT_UPT_PTR [i] == bottom)) |
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| 147 | { |
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| 148 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * END EVENT"); |
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| 149 | |
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| 150 | if ((reg_EVENT_IS_BRANCH [i] == false) and (reg_EVENT_UPT_FULL [i] == false)) |
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| 151 | reg_EVENT_STATE[i] = EVENT_STATE_OK; |
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| 152 | |
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| 153 | if ((reg_EVENT_IS_BRANCH [i] == true) or (reg_EVENT_UPT_FULL [i] == false)) |
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[95] | 154 | { |
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[112] | 155 | reg_EVENT_VAL [i] = false; |
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| 156 | // reg_EVENT_IS_BRANCH [i] = true; |
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| 157 | reg_UPT_TOP [i] = reg_UPT_TOP_EVENT [i]; |
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| 158 | reg_UPT_UPDATE [i] = reg_UPT_TOP_EVENT [i]; |
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| 159 | |
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| 160 | if (reg_UPT_BOTTOM [i] != reg_UPT_TOP [i]) |
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| 161 | reg_UPT_EMPTY [i] = false; |
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[95] | 162 | } |
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[106] | 163 | |
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[112] | 164 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
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| 165 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP_EVENT : %d",reg_UPT_TOP_EVENT [i]); |
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| 166 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [i]); |
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| 167 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
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| 168 | |
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[88] | 169 | } |
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[112] | 170 | |
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| 171 | if (end) |
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| 172 | reg_EVENT_UPT_FULL [i] = false; |
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[88] | 173 | } |
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| 174 | } |
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[106] | 175 | |
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[105] | 176 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * GARBAGE COLLECTOR (END)"); |
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[88] | 177 | |
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| 178 | // =================================================================== |
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[81] | 179 | // =====[ PREDICT ]=================================================== |
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| 180 | // =================================================================== |
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[88] | 181 | |
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| 182 | // An ifetch_unit compute next cycle and have an branch : predict_val is set |
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| 183 | // * Alloc new entry -> new status is "wait decod" |
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| 184 | // * Save input (to restore in miss or error) |
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| 185 | // * Update pointer |
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| 186 | |
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[81] | 187 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
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| 188 | if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i]) |
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| 189 | { |
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| 190 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; |
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[88] | 191 | uint32_t top = internal_PREDICT_UPDATE_PREDICTION_ID [i]; |
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[81] | 192 | |
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[88] | 193 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * PREDICT[%d] - Accepted",i); |
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| 194 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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| 195 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
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[81] | 196 | |
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[88] | 197 | #ifdef DEBUG_TEST |
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| 198 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
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| 199 | throw ERRORMORPHEO(FUNCTION,_("Predict : invalid state.")); |
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| 200 | #endif |
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[81] | 201 | |
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[88] | 202 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD (predict)",context,top); |
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| 203 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state = UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD; |
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| 204 | |
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[120] | 205 | Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); |
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| 206 | bool is_accurate = _param->_accurate_block_predict or PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]); |
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[88] | 207 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._condition = condition; |
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| 208 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); |
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| 209 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); |
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| 210 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_PREDICT_BTB_LAST_TAKE [i]); |
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[120] | 211 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._is_accurate = is_accurate; |
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[88] | 212 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._history = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0; |
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| 213 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_PREDICT_RAS_ADDRESS [i]); |
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| 214 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_PREDICT_RAS_INDEX [i]); |
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| 215 | |
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| 216 | reg_UFPT_TOP [context] = (top+1)%_param->_size_ufpt_queue [context]; |
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| 217 | // reg_UFPT_UPDATE [context] = reg_UFPT_TOP [context]; |
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| 218 | if (need_update(condition)) |
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[111] | 219 | { |
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| 220 | reg_UFPT_NB_NEED_UPDATE [context] ++; |
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| 221 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); |
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| 222 | |
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| 223 | } |
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[81] | 224 | } |
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| 225 | |
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| 226 | // =================================================================== |
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| 227 | // =====[ DECOD ]===================================================== |
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| 228 | // =================================================================== |
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[88] | 229 | |
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| 230 | |
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| 231 | // An decod is detected by decod stage |
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| 232 | // 1) Hit prediction : The instruction bundle have a branch predicted in ifetch stage and it is this branch |
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| 233 | // * Update state, wait_decod -> wait_end |
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| 234 | // * Pop ufpt -> push upt |
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| 235 | // * Update accurate register : if the predict stage have tagged this branch as not accurate, stop decod |
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| 236 | // 2) Miss : The instruction bundle have a branch but it is not predicted |
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| 237 | // * Flush ufpt |
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| 238 | // * decod information is write in upt |
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| 239 | |
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[81] | 240 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 241 | if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i]) |
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| 242 | { |
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[88] | 243 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; |
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| 244 | Tcontrol_t miss_ifetch = PORT_READ(in_DECOD_MISS_IFETCH [i]); |
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| 245 | Tcontrol_t miss_decod = PORT_READ(in_DECOD_MISS_DECOD [i]); |
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| 246 | uint32_t upt_ptr_write = internal_DECOD_UPT_PTR_WRITE [i]; |
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| 247 | Tbranch_condition_t condition ; |
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| 248 | Tcontrol_t is_accurate; |
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[94] | 249 | Taddress_t address_src = PORT_READ(in_DECOD_BTB_ADDRESS_SRC [i]); |
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| 250 | Taddress_t address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]); |
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[119] | 251 | Tcontrol_t direction = PORT_READ(in_DECOD_BTB_LAST_TAKE [i]); |
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[81] | 252 | |
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[88] | 253 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * DECOD[%d] - Accepted",i); |
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| 254 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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| 255 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch); |
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| 256 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_decod : %d",miss_decod); |
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| 257 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_ptr_write : %d",upt_ptr_write); |
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[108] | 258 | |
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[88] | 259 | if (miss_ifetch or miss_decod) |
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[81] | 260 | { |
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[119] | 261 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss !!!"); |
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| 262 | |
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[88] | 263 | // Have a miss !!! |
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[119] | 264 | condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); |
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[120] | 265 | is_accurate = _param->_accurate_block_decod or PORT_READ(in_DECOD_IS_ACCURATE [i]); |
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[119] | 266 | |
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| 267 | // if can_continue else don't wait the end of all instruction |
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| 268 | // can_continue = not miss_commit and the destination is accurate (know) |
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| 269 | Tcontrol_t can_continue = is_accurate; |
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| 270 | |
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[94] | 271 | #ifdef DEBUG_TEST |
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| 272 | if (reg_EVENT_STATE [context] != EVENT_STATE_OK) |
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| 273 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); |
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| 274 | #endif |
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[119] | 275 | |
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| 276 | // miss_ifetch = branch is previously predict, but it's not the good |
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| 277 | // * need flush ufpt |
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| 278 | // miss_decod = branch was not detected |
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| 279 | // * not necessary |
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| 280 | |
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| 281 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * can_continue: %d",can_continue); |
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| 282 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * direction : %d",direction ); |
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| 283 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch ); |
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| 284 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * change : %d",(not (can_continue and not direction and not miss_ifetch))); |
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| 285 | |
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| 286 | // if can_continue (destination is know) and direction is not take, don't need flush fetch_unit. |
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| 287 | if (not (can_continue and not direction and not miss_ifetch)) |
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[88] | 288 | { |
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[119] | 289 | if (reg_UFPT_NB_NEED_UPDATE [context] == 0) |
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| 290 | { |
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| 291 | // Change state |
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| 292 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); |
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| 293 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
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| 294 | // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT; |
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| 295 | } |
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| 296 | else |
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| 297 | { |
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| 298 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context); |
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| 299 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; |
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| 300 | } |
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[81] | 301 | |
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[119] | 302 | // Flush UPFT |
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| 303 | flush_UFPT [context] = true; |
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[94] | 304 | |
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[119] | 305 | reg_EVENT_IS_BRANCH [context] = true; |
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| 306 | reg_EVENT_DEPTH [context] = upt_ptr_write; |
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| 307 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
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| 308 | reg_EVENT_ADDRESS_DEST_VAL[context] = direction; |
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| 309 | reg_EVENT_ADDRESS_DEST [context] = address_dest; |
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| 310 | reg_EVENT_CAN_CONTINUE [context] = can_continue; |
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| 311 | } |
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| 312 | |
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[88] | 313 | // Push upt (from decod interface) |
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| 314 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
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[94] | 315 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = address_src ; |
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| 316 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = address_dest; |
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[119] | 317 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = direction ; |
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[88] | 318 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
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| 319 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
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| 320 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = ; // static prediction |
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| 321 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = PORT_READ(in_DECOD_RAS_ADDRESS [i]); |
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| 322 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = PORT_READ(in_DECOD_RAS_INDEX [i]); |
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| 323 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = false; // static prediction |
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[81] | 324 | } |
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| 325 | else |
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| 326 | { |
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| 327 | // Normal case : branch is previous predicated, change state of branch |
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[88] | 328 | uint32_t ufpt_ptr_read = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; |
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[81] | 329 | |
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[88] | 330 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ufpt_ptr_read : %d",ufpt_ptr_read); |
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| 331 | |
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| 332 | #ifdef DEBUG_TEST |
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| 333 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state != UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) |
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| 334 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt state.")); |
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| 335 | #endif |
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| 336 | // Change state |
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| 337 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (decod - hit)",context,ufpt_ptr_read); |
---|
| 338 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
---|
| 339 | |
---|
| 340 | // Push upt (from Pop ufpt) |
---|
| 341 | condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._condition; |
---|
| 342 | is_accurate = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._is_accurate; |
---|
| 343 | |
---|
| 344 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
---|
| 345 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_src ; |
---|
| 346 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_dest; |
---|
| 347 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._last_take ; |
---|
| 348 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
---|
| 349 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
---|
| 350 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._history ; |
---|
| 351 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_ras ; |
---|
| 352 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._index_ras ; |
---|
[105] | 353 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = true ; // prediction from ifetch |
---|
[88] | 354 | |
---|
| 355 | // Update pointer |
---|
| 356 | if (need_update(condition)) |
---|
| 357 | { |
---|
| 358 | reg_UFPT_NB_NEED_UPDATE [context] --; |
---|
[111] | 359 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); |
---|
[88] | 360 | } |
---|
[81] | 361 | } |
---|
[88] | 362 | |
---|
| 363 | // All case !!! |
---|
| 364 | #ifdef DEBUG_TEST |
---|
| 365 | if (reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 366 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid upt state.")); |
---|
| 367 | #endif |
---|
| 368 | |
---|
| 369 | // Change state |
---|
| 370 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write); |
---|
| 371 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END; |
---|
[119] | 372 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok = false; |
---|
| 373 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._miss_commit = false; |
---|
[111] | 374 | |
---|
[88] | 375 | // Write new accurate |
---|
| 376 | #ifdef DEBUG_TEST |
---|
| 377 | if (not reg_IS_ACCURATE [context] and not is_accurate) |
---|
| 378 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid accurate flag.")); |
---|
| 379 | #endif |
---|
[119] | 380 | |
---|
| 381 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * is_accurate : %d",is_accurate); |
---|
| 382 | |
---|
[88] | 383 | reg_IS_ACCURATE [context] = is_accurate; |
---|
| 384 | |
---|
| 385 | // Update pointer |
---|
| 386 | reg_UPT_TOP [context] = (upt_ptr_write+1)%_param->_size_upt_queue [context]; |
---|
[101] | 387 | reg_UPT_EMPTY [context] = false; |
---|
[88] | 388 | // reg_UPT_UPDATE [context] = reg_UPT_TOP [context]; |
---|
[108] | 389 | |
---|
| 390 | // if (miss_ifetch or miss_decod) |
---|
| 391 | // reg_UPT_TOP_EVENT [context] = reg_UPT_TOP [context]; |
---|
[81] | 392 | } |
---|
| 393 | |
---|
| 394 | // =================================================================== |
---|
| 395 | // =====[ UPDATE ]==================================================== |
---|
| 396 | // =================================================================== |
---|
[95] | 397 | { |
---|
| 398 | bool can_continue [_param->_nb_context]; |
---|
| 399 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 400 | can_continue [i] = true; |
---|
[81] | 401 | |
---|
[95] | 402 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
---|
| 403 | { |
---|
| 404 | Tcontext_t context = internal_UPDATE_CONTEXT_ID [i]; |
---|
| 405 | |
---|
| 406 | if ((internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) or |
---|
| 407 | (internal_UPDATE_VAL_WITHOUT_ACK [i] and can_continue [context])) |
---|
[88] | 408 | { |
---|
[112] | 409 | Tdepth_t depth = internal_UPDATE_DEPTH [i]; |
---|
[95] | 410 | |
---|
| 411 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPDATE[%d] - Accepted",i); |
---|
| 412 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 413 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 414 | |
---|
| 415 | if (internal_UPDATE_FROM_UFPT [i]) |
---|
[94] | 416 | { |
---|
[95] | 417 | // if free a slot, also all queue is updated |
---|
| 418 | // Last slot ? |
---|
[106] | 419 | // if (reg_UFPT_UPDATE [context] == reg_UFPT_BOTTOM [context]) |
---|
| 420 | if ((--reg_UFPT_NB_UPDATE [context])==0) |
---|
[112] | 421 | { |
---|
| 422 | switch (reg_EVENT_STATE [context]) |
---|
| 423 | { |
---|
| 424 | case EVENT_STATE_MISS_FLUSH_UFPT : |
---|
| 425 | { |
---|
| 426 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
---|
| 427 | // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT; |
---|
| 428 | |
---|
| 429 | break; |
---|
| 430 | } |
---|
| 431 | // impossible to have an update on ufpt and reg_upt_update>reg_upt_top |
---|
| 432 | case EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT : reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT ; break; |
---|
| 433 | case EVENT_STATE_EVENT_FLUSH_UFPT : reg_EVENT_STATE [context] = EVENT_STATE_OK ; break; |
---|
| 434 | case EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT: reg_EVENT_STATE [context] = EVENT_STATE_EVENT_FLUSH_UPT; break; |
---|
| 435 | default : break; |
---|
| 436 | } |
---|
| 437 | } |
---|
[95] | 438 | |
---|
| 439 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Fetch Prediction Table"); |
---|
| 440 | |
---|
| 441 | // Change state |
---|
[88] | 442 | #ifdef DEBUG_TEST |
---|
[95] | 443 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state != UPDATE_FETCH_PREDICTION_STATE_EVENT) |
---|
| 444 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid ufpt state.")); |
---|
[88] | 445 | #endif |
---|
[95] | 446 | |
---|
| 447 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (update)",context,depth); |
---|
| 448 | |
---|
| 449 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
---|
[106] | 450 | |
---|
[95] | 451 | // Update pointer |
---|
| 452 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (before) : %d",reg_UFPT_UPDATE [context]); |
---|
| 453 | reg_UFPT_UPDATE [context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; |
---|
| 454 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [context]); |
---|
| 455 | // Free a register that need update ? |
---|
| 456 | if (need_update(reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition)) |
---|
[111] | 457 | { |
---|
| 458 | reg_UFPT_NB_NEED_UPDATE [context] --; |
---|
| 459 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); |
---|
| 460 | } |
---|
[94] | 461 | } |
---|
| 462 | else |
---|
| 463 | { |
---|
[95] | 464 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Prediction Table"); |
---|
[112] | 465 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE (before) : %d",reg_UPT_UPDATE [context]); |
---|
| 466 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
| 467 | |
---|
[95] | 468 | // Change state |
---|
| 469 | #ifdef DEBUG_TEST |
---|
| 470 | if (internal_UPDATE_RAS [i]) |
---|
| 471 | { |
---|
| 472 | if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_EVENT) and |
---|
[105] | 473 | (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_KO ) ) |
---|
[95] | 474 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 475 | } |
---|
| 476 | else |
---|
| 477 | { |
---|
| 478 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_OK ) |
---|
| 479 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 480 | } |
---|
[88] | 481 | #endif |
---|
| 482 | |
---|
[95] | 483 | // bool have_event = ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO) or |
---|
| 484 | // (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_EVENT)); |
---|
[97] | 485 | #ifdef STATISTICS |
---|
| 486 | Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; |
---|
[111] | 487 | #endif |
---|
[97] | 488 | bool ok = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_OK); |
---|
[95] | 489 | bool ko = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO); |
---|
[88] | 490 | |
---|
[111] | 491 | if (ok or ko) |
---|
[112] | 492 | { |
---|
| 493 | reg_UPDATE_PREDICTION_TABLE [context][depth]._retire_ok = true; |
---|
| 494 | reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_prediction = ko; |
---|
[115] | 495 | |
---|
| 496 | #ifdef STATISTICS |
---|
| 497 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 498 | { |
---|
| 499 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._ifetch_prediction) |
---|
| 500 | (*_stat_nb_branch_ifetch_prediction [context])++; |
---|
| 501 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate) |
---|
| 502 | (*_stat_nb_branch_accurate [context])++; |
---|
| 503 | } |
---|
| 504 | #endif |
---|
[112] | 505 | } |
---|
[111] | 506 | |
---|
[95] | 507 | // Have an update, test the state to transiste to the good state |
---|
| 508 | if (ko) |
---|
| 509 | { |
---|
[101] | 510 | // Ko : wait end of all instruction |
---|
| 511 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO_WAIT_END (update)",context,depth); |
---|
| 512 | |
---|
| 513 | // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO_WAIT_END; |
---|
| 514 | |
---|
[95] | 515 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",context,depth); |
---|
| 516 | |
---|
| 517 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
[97] | 518 | |
---|
[112] | 519 | reg_EVENT_VAL [context] = true; |
---|
| 520 | reg_EVENT_UPT_PTR [context] = depth; |
---|
| 521 | // reg_EVENT_UPT_FULL [context] = 0; |
---|
| 522 | // reg_EVENT_UPT_FULL [i] = (not reg_UPT_EMPTY [i] and (bottom == reg_UPT_TOP [i])); |
---|
[105] | 523 | |
---|
[112] | 524 | |
---|
[97] | 525 | #ifdef STATISTICS |
---|
| 526 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 527 | (*_stat_nb_branch_miss [context][condition])++; |
---|
| 528 | #endif |
---|
[95] | 529 | } |
---|
| 530 | else |
---|
| 531 | { |
---|
[106] | 532 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_OK (update)",context,depth); |
---|
| 533 | // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_OK; |
---|
[97] | 534 | |
---|
[106] | 535 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (update)",context,depth); |
---|
| 536 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END; |
---|
[97] | 537 | |
---|
| 538 | #ifdef STATISTICS |
---|
| 539 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 540 | { |
---|
| 541 | if (ok) |
---|
| 542 | (*_stat_nb_branch_hit [context][condition]) ++; |
---|
| 543 | else |
---|
| 544 | (*_stat_nb_branch_unused [context]) ++; |
---|
| 545 | } |
---|
| 546 | #endif |
---|
[95] | 547 | } |
---|
| 548 | |
---|
| 549 | // Update pointer |
---|
| 550 | // * if update RAS : update pointer is decreaste until it equal at top pointer |
---|
[112] | 551 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * internal_UPDATE_RAS [%d] : %d",i,internal_UPDATE_RAS [i]); |
---|
| 552 | |
---|
[95] | 553 | if (internal_UPDATE_RAS [i]) |
---|
| 554 | { |
---|
| 555 | // if end_event, restart too bottom, else decrease pointer |
---|
| 556 | bool end_event = (reg_UPT_UPDATE [context] == reg_UPT_TOP [context]); |
---|
[112] | 557 | |
---|
| 558 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * end_event : %d",end_event); |
---|
| 559 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * bottom : %d",reg_UPT_BOTTOM[context]); |
---|
[95] | 560 | |
---|
| 561 | if (end_event) |
---|
| 562 | { |
---|
[112] | 563 | reg_UPT_UPDATE [context] = (end_event)?reg_UPT_BOTTOM[context]:(((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 564 | // reg_UPT_UPDATE [context] = reg_UPT_BOTTOM[context]; |
---|
[105] | 565 | |
---|
| 566 | if (reg_EVENT_STATE [context] == EVENT_STATE_EVENT_FLUSH_UPT) |
---|
| 567 | { |
---|
| 568 | reg_EVENT_STATE [context] = EVENT_STATE_OK; |
---|
| 569 | } |
---|
| 570 | else |
---|
[112] | 571 | { |
---|
| 572 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
---|
| 573 | // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UPT; |
---|
| 574 | } |
---|
[95] | 575 | } |
---|
| 576 | else |
---|
| 577 | { |
---|
| 578 | reg_UPT_UPDATE [context] = (((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 579 | } |
---|
| 580 | } |
---|
| 581 | else |
---|
| 582 | { |
---|
[112] | 583 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * next update"); |
---|
| 584 | |
---|
[95] | 585 | // increase pointer |
---|
| 586 | reg_UPT_UPDATE [context] = (depth+1)%_param->_size_upt_queue[context]; |
---|
| 587 | } |
---|
| 588 | |
---|
| 589 | // Free the branch with no accurate ? |
---|
[112] | 590 | if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate == false) and not ko) |
---|
[95] | 591 | reg_IS_ACCURATE [context] = true; |
---|
[112] | 592 | |
---|
| 593 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE (after ) : %d",reg_UPT_UPDATE[context]); |
---|
| 594 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
[94] | 595 | } |
---|
[88] | 596 | } |
---|
[95] | 597 | else |
---|
| 598 | can_continue [context] = false; |
---|
| 599 | } |
---|
[81] | 600 | |
---|
[95] | 601 | // Round robin |
---|
| 602 | reg_UPDATE_PRIORITY = (reg_UPDATE_PRIORITY+1)%_param->_nb_context; |
---|
| 603 | } |
---|
[81] | 604 | |
---|
[108] | 605 | // =================================================================== |
---|
| 606 | // =====[ BRANCH_COMPLETE ]=========================================== |
---|
| 607 | // =================================================================== |
---|
| 608 | |
---|
| 609 | // The branch is complete |
---|
| 610 | // * Hit prediction : |
---|
| 611 | // * update status |
---|
| 612 | // * Miss prediction : |
---|
| 613 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
---|
| 614 | if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) |
---|
| 615 | { |
---|
| 616 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; |
---|
| 617 | Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; |
---|
| 618 | Tcontrol_t miss = internal_BRANCH_COMPLETE_MISS_PREDICTION [i]; |
---|
| 619 | Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE [i]; |
---|
| 620 | Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; |
---|
| 621 | |
---|
| 622 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); |
---|
[112] | 623 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 624 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 625 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); |
---|
| 626 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
[108] | 627 | |
---|
| 628 | if (miss) |
---|
| 629 | { |
---|
| 630 | // Flush UPT |
---|
[111] | 631 | uint32_t top = reg_UPT_TOP [context]; |
---|
| 632 | uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; |
---|
| 633 | |
---|
| 634 | Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; |
---|
| 635 | event_state_t event_state = reg_EVENT_STATE [context]; |
---|
| 636 | upt_state_t event_top = reg_UPDATE_PREDICTION_TABLE [context][top]._state; |
---|
[112] | 637 | |
---|
| 638 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * event_top : %s",toString(event_top).c_str()); |
---|
| 639 | |
---|
[111] | 640 | bool previous_ufpt_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 641 | (event_state == EVENT_STATE_MISS_FLUSH_UFPT ) or |
---|
| 642 | (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 643 | (event_state == EVENT_STATE_EVENT_FLUSH_UFPT )); |
---|
[108] | 644 | |
---|
[112] | 645 | bool previous_upt_event = (false |
---|
| 646 | or (event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) |
---|
| 647 | or (event_state == EVENT_STATE_MISS_FLUSH_UPT ) |
---|
| 648 | or (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) |
---|
| 649 | or (event_state == EVENT_STATE_EVENT_FLUSH_UPT ) |
---|
| 650 | or (event_top == UPDATE_PREDICTION_STATE_END_KO ) |
---|
| 651 | or (event_top == UPDATE_PREDICTION_STATE_KO ) |
---|
| 652 | // or (event_state == EVENT_STATE_WAIT_END_EVENT ) |
---|
| 653 | // or ((event_state == EVENT_STATE_UPDATE_CONTEXT ) |
---|
| 654 | // and (reg_EVENT_SOURCE [context] == EVENT_SOURCE_UPT)) |
---|
| 655 | ); |
---|
[109] | 656 | // bool update_ras = (new_update != depth); |
---|
[108] | 657 | |
---|
[111] | 658 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
| 659 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); |
---|
| 660 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); |
---|
| 661 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_upt_event : %d",previous_upt_event); |
---|
| 662 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_ufpt_event : %d",previous_ufpt_event); |
---|
[112] | 663 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [context]); |
---|
| 664 | |
---|
[111] | 665 | // Have a miss !!! |
---|
| 666 | // Flush UPFT |
---|
[112] | 667 | flush_UFPT [context] |= not previous_ufpt_event; |
---|
[111] | 668 | |
---|
[109] | 669 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 670 | { |
---|
| 671 | for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; |
---|
| 672 | j!=top; |
---|
| 673 | j=(j+1)%_param->_size_upt_queue[context]) |
---|
[111] | 674 | { |
---|
| 675 | reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 676 | reg_UPDATE_PREDICTION_TABLE [context][j]._retire_ok = false; |
---|
| 677 | } |
---|
[109] | 678 | |
---|
[108] | 679 | |
---|
[109] | 680 | // reg_UPT_BOTTOM [context]; |
---|
| 681 | reg_UPT_TOP [context] = depth; |
---|
| 682 | // reg_UPT_TOP_EVENT [context] = top; |
---|
[112] | 683 | |
---|
[111] | 684 | if (not previous_upt_event) |
---|
[109] | 685 | { |
---|
| 686 | reg_UPT_TOP_EVENT [context] = top; |
---|
| 687 | reg_UPT_UPDATE [context] = new_update; |
---|
| 688 | } |
---|
| 689 | else |
---|
| 690 | { |
---|
| 691 | // Have event. Top index this slot |
---|
[111] | 692 | reg_UPDATE_PREDICTION_TABLE [context][top]._retire_ok = false; |
---|
| 693 | |
---|
| 694 | switch (event_top) |
---|
[109] | 695 | { |
---|
| 696 | case UPDATE_PREDICTION_STATE_END_KO : |
---|
| 697 | { |
---|
| 698 | // Have already update predictor |
---|
| 699 | reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_END; |
---|
[112] | 700 | reg_UPT_UPDATE [context] = new_update; |
---|
[109] | 701 | break; |
---|
| 702 | } |
---|
| 703 | case UPDATE_PREDICTION_STATE_KO : |
---|
| 704 | { |
---|
| 705 | // Doesn't have update predictor |
---|
| 706 | reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 707 | break; |
---|
| 708 | } |
---|
| 709 | default : |
---|
| 710 | { |
---|
[111] | 711 | // reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 712 | // break; |
---|
| 713 | |
---|
[108] | 714 | #ifdef DEBUG_TEST |
---|
[109] | 715 | throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
[108] | 716 | #endif |
---|
[109] | 717 | } |
---|
| 718 | } |
---|
| 719 | } |
---|
| 720 | |
---|
| 721 | if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) |
---|
| 722 | reg_UPT_EMPTY [context] = true; |
---|
| 723 | |
---|
| 724 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); |
---|
| 725 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; |
---|
[111] | 726 | |
---|
| 727 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE [%d] : %d",context,reg_UFPT_NB_NEED_UPDATE [context]); |
---|
| 728 | |
---|
| 729 | if ( (reg_UFPT_NB_NEED_UPDATE [context] > 0) or |
---|
| 730 | (reg_UFPT_NB_UPDATE [context] > 0)) |
---|
[108] | 731 | { |
---|
[109] | 732 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); |
---|
| 733 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; |
---|
[108] | 734 | } |
---|
[109] | 735 | else |
---|
| 736 | { |
---|
| 737 | // if (not previous_update_ras) |
---|
| 738 | { |
---|
| 739 | // have ras prediction ? |
---|
| 740 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); |
---|
| 741 | |
---|
| 742 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; |
---|
| 743 | |
---|
| 744 | } |
---|
| 745 | } |
---|
[112] | 746 | // reg_EVENT_SOURCE [context] = EVENT_SOURCE_UPT; |
---|
[109] | 747 | |
---|
| 748 | // else no update |
---|
| 749 | |
---|
[112] | 750 | reg_EVENT_IS_BRANCH [context] = true; |
---|
[109] | 751 | reg_EVENT_DEPTH [context] = depth; |
---|
| 752 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
---|
| 753 | reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; |
---|
| 754 | reg_EVENT_ADDRESS_DEST [context] = good_addr; |
---|
[119] | 755 | reg_EVENT_CAN_CONTINUE [context] = false; |
---|
| 756 | |
---|
[108] | 757 | } |
---|
[119] | 758 | reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_commit = true; |
---|
[109] | 759 | } |
---|
[108] | 760 | else |
---|
| 761 | { |
---|
| 762 | // Hit case |
---|
| 763 | |
---|
| 764 | // #ifdef DEBUG_TEST |
---|
| 765 | // if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 766 | // throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
| 767 | // #endif |
---|
| 768 | |
---|
| 769 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 770 | { |
---|
| 771 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth); |
---|
| 772 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; |
---|
| 773 | } |
---|
| 774 | } |
---|
| 775 | |
---|
[112] | 776 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
| 777 | |
---|
[108] | 778 | // In all case : update good_take |
---|
| 779 | reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; |
---|
| 780 | |
---|
| 781 | // Write address_dest if need read register |
---|
| 782 | Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; |
---|
| 783 | |
---|
| 784 | if ((condition == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or |
---|
| 785 | (condition == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK ) or |
---|
| 786 | (condition == BRANCH_CONDITION_READ_STACK ) ) |
---|
| 787 | reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = good_addr; |
---|
| 788 | } |
---|
| 789 | |
---|
[112] | 790 | |
---|
[94] | 791 | // =================================================================== |
---|
| 792 | // =====[ BRANCH_EVENT ]============================================== |
---|
| 793 | // =================================================================== |
---|
| 794 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 795 | if (internal_BRANCH_EVENT_VAL [i] and PORT_READ(in_BRANCH_EVENT_ACK [i])) |
---|
| 796 | { |
---|
[95] | 797 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_EVENT [%d] - Accepted",i); |
---|
[82] | 798 | |
---|
[107] | 799 | // if different : an other branch is occured |
---|
[119] | 800 | if (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT) |
---|
[107] | 801 | { |
---|
| 802 | // Change state |
---|
| 803 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i); |
---|
| 804 | reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT; |
---|
| 805 | } |
---|
[94] | 806 | } |
---|
| 807 | |
---|
| 808 | // =================================================================== |
---|
[95] | 809 | // =====[ EVENT ]===================================================== |
---|
| 810 | // =================================================================== |
---|
| 811 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
[97] | 812 | if (PORT_READ(in_EVENT_VAL [i]) and internal_EVENT_ACK [i]) |
---|
| 813 | { |
---|
[105] | 814 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT"); |
---|
| 815 | |
---|
[97] | 816 | //---------------------------------------------------------------- |
---|
| 817 | // Cases |
---|
| 818 | //---------------------------------------------------------------- |
---|
| 819 | // * EVENT_TYPE_NONE - nothing |
---|
| 820 | // * EVENT_TYPE_MISS_SPECULATION - Change state, reset pointer |
---|
| 821 | // * EVENT_TYPE_EXCEPTION - Flush upft and upt, Change state, reset pointer |
---|
| 822 | // * EVENT_TYPE_BRANCH_NO_ACCURATE - nothing : manage in decod and update |
---|
| 823 | // * EVENT_TYPE_SPR_ACCESS - nothing |
---|
| 824 | // * EVENT_TYPE_MSYNC - nothing |
---|
| 825 | // * EVENT_TYPE_PSYNC - nothing |
---|
| 826 | // * EVENT_TYPE_CSYNC - nothing |
---|
| 827 | |
---|
| 828 | Tevent_type_t event_type = PORT_READ(in_EVENT_TYPE [i]); |
---|
[105] | 829 | |
---|
[101] | 830 | // Test if end of miss -> all previous branch is complete |
---|
| 831 | // -> all next branch is finish |
---|
[105] | 832 | |
---|
| 833 | switch (event_type) |
---|
[97] | 834 | { |
---|
[105] | 835 | case EVENT_TYPE_BRANCH_MISS_SPECULATION : |
---|
| 836 | { |
---|
| 837 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_BRANCH_MISS_SPECULATION"); |
---|
[101] | 838 | |
---|
[119] | 839 | // #ifdef DEBUG_TEST |
---|
| 840 | // if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT) |
---|
| 841 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state.")); |
---|
| 842 | // #endif |
---|
| 843 | // Special case : test if event and branch_complete ! |
---|
| 844 | if (reg_EVENT_STATE [i] == EVENT_STATE_WAIT_END_EVENT) |
---|
[106] | 845 | { |
---|
[119] | 846 | |
---|
| 847 | // Change state |
---|
| 848 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); |
---|
[106] | 849 | |
---|
[119] | 850 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 851 | reg_IS_ACCURATE [i] = true; |
---|
| 852 | |
---|
| 853 | Tdepth_t depth = reg_EVENT_UPT_PTR [i]; |
---|
| 854 | |
---|
| 855 | if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO) |
---|
| 856 | { |
---|
| 857 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth); |
---|
| 858 | |
---|
| 859 | reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END; |
---|
| 860 | } |
---|
| 861 | |
---|
[101] | 862 | #ifdef DEBUG_TEST |
---|
[106] | 863 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO_WAIT_END) |
---|
| 864 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
[105] | 865 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO) |
---|
| 866 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
[101] | 867 | #endif |
---|
| 868 | |
---|
[106] | 869 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",i,depth); |
---|
| 870 | |
---|
| 871 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
[119] | 872 | } |
---|
[105] | 873 | break; |
---|
| 874 | } |
---|
| 875 | case EVENT_TYPE_LOAD_MISS_SPECULATION : |
---|
| 876 | case EVENT_TYPE_EXCEPTION : |
---|
| 877 | { |
---|
| 878 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_LOAD_MISS_SPECULATION"); |
---|
| 879 | |
---|
| 880 | // Have a miss !!! |
---|
| 881 | // Flush UPFT |
---|
| 882 | flush_UFPT [i] = true; |
---|
| 883 | |
---|
| 884 | // Flush UPT |
---|
[112] | 885 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
---|
[108] | 886 | |
---|
[112] | 887 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * bottom : %d",bottom); |
---|
[105] | 888 | |
---|
[112] | 889 | // event_state_t event_state = reg_EVENT_STATE [i]; |
---|
| 890 | // bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 891 | // (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or |
---|
| 892 | // (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 893 | // (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); |
---|
[108] | 894 | |
---|
[112] | 895 | bool find = false; // have slot to update ??? |
---|
| 896 | Tdepth_t top = bottom; |
---|
| 897 | Tdepth_t update = bottom; |
---|
| 898 | bool empty = reg_UPT_EMPTY [i]; |
---|
[108] | 899 | |
---|
[112] | 900 | // flush all slot, because this event is in head of rob |
---|
| 901 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; ++j) |
---|
[106] | 902 | { |
---|
[112] | 903 | Tdepth_t x = (bottom+j)%_param->_size_upt_queue[i]; |
---|
| 904 | |
---|
| 905 | if ((reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_END) and |
---|
| 906 | (reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_EMPTY)) |
---|
| 907 | { |
---|
| 908 | find = true; // find a not empty slot |
---|
| 909 | reg_UPDATE_PREDICTION_TABLE [i][x]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 910 | reg_UPDATE_PREDICTION_TABLE [i][x]._retire_ok = false; |
---|
| 911 | update = x; |
---|
| 912 | } |
---|
[111] | 913 | |
---|
[112] | 914 | if (reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 915 | top = x+1; |
---|
[108] | 916 | } |
---|
[105] | 917 | |
---|
[112] | 918 | top = top%_param->_size_upt_queue[i]; |
---|
| 919 | |
---|
[108] | 920 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find : %d",find); |
---|
[112] | 921 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
[108] | 922 | |
---|
| 923 | // Test if have update slot |
---|
| 924 | if (find) |
---|
| 925 | { |
---|
| 926 | // TODO : special case : event is an exception on branch, also depth is not valid |
---|
[112] | 927 | reg_UPT_TOP [i] = top; // depth is again valid |
---|
[108] | 928 | reg_UPT_TOP_EVENT [i] = top; |
---|
| 929 | |
---|
| 930 | if (bottom == reg_UPT_TOP [i]) |
---|
| 931 | reg_UPT_EMPTY [i] = true; |
---|
[106] | 932 | } |
---|
[112] | 933 | reg_UPT_UPDATE [i] = update; |
---|
[108] | 934 | |
---|
[105] | 935 | // new state : |
---|
| 936 | // * test if ufpt is empty |
---|
| 937 | // * ok : flush upft and upt |
---|
| 938 | // * ko : test if have previous flush upt |
---|
| 939 | // * ok : nothing |
---|
| 940 | // * ko : flush upt |
---|
[112] | 941 | reg_EVENT_VAL [i] = find; |
---|
| 942 | reg_EVENT_IS_BRANCH [i] = false; |
---|
| 943 | reg_EVENT_UPT_PTR [i] = top; |
---|
| 944 | reg_EVENT_UPT_FULL [i] = (not empty and (bottom == reg_UPT_TOP [i])); |
---|
| 945 | reg_EVENT_DEPTH [i] = top; |
---|
| 946 | // reg_EVENT_ADDRESS_SRC [i] = address_src; // delay_slot is compute in I_State |
---|
| 947 | // reg_EVENT_ADDRESS_DEST_VAL[i] = good_take; |
---|
| 948 | // reg_EVENT_ADDRESS_DEST [i] = good_addr; |
---|
[108] | 949 | |
---|
[112] | 950 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM : %d",reg_UPT_BOTTOM [i]); |
---|
| 951 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
---|
| 952 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
---|
| 953 | |
---|
| 954 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d",reg_EVENT_VAL [i]); |
---|
| 955 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d",reg_EVENT_UPT_PTR [i]); |
---|
| 956 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d",reg_EVENT_UPT_FULL [i]); |
---|
[111] | 957 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
[112] | 958 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_UPDATE : %d",reg_UFPT_NB_UPDATE [i]); |
---|
| 959 | |
---|
[111] | 960 | if ( (reg_UFPT_NB_NEED_UPDATE [i] > 0) or |
---|
| 961 | (reg_UFPT_NB_UPDATE [i] > 0)) |
---|
[105] | 962 | { |
---|
[112] | 963 | if (find) |
---|
[105] | 964 | { |
---|
[112] | 965 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT (event - find)",i); |
---|
[105] | 966 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT; |
---|
| 967 | } |
---|
| 968 | else |
---|
| 969 | { |
---|
[112] | 970 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT (event - not find)",i); |
---|
| 971 | // reg_EVENT_VAL [i] = false; |
---|
| 972 | |
---|
[105] | 973 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT; |
---|
| 974 | } |
---|
| 975 | } |
---|
| 976 | else |
---|
| 977 | { |
---|
[112] | 978 | if (find) |
---|
[105] | 979 | { |
---|
| 980 | // have ras prediction ? |
---|
[112] | 981 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (event - find)",i); |
---|
[105] | 982 | |
---|
| 983 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UPT; |
---|
| 984 | } |
---|
| 985 | else |
---|
| 986 | { |
---|
[108] | 987 | // special case : nothing |
---|
[112] | 988 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (event - not find)",i); |
---|
[108] | 989 | |
---|
[112] | 990 | // reg_EVENT_VAL [i] = false; |
---|
| 991 | |
---|
[105] | 992 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 993 | } |
---|
| 994 | } |
---|
[108] | 995 | |
---|
[105] | 996 | // else no update |
---|
| 997 | |
---|
[112] | 998 | // Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_EVENT_DEPTH [i]):0; |
---|
| 999 | // uint32_t top = reg_UPT_TOP [i]; |
---|
| 1000 | // uint32_t bottom = reg_UPT_BOTTOM [i]; |
---|
| 1001 | // uint32_t new_update = ((top==0)?_param->_size_upt_queue[i]:top)-1; |
---|
| 1002 | // // bool empty = reg_UPT_EMPTY [i]; |
---|
[105] | 1003 | |
---|
[112] | 1004 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
| 1005 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 1006 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); |
---|
| 1007 | |
---|
| 1008 | // event_state_t event_state = reg_EVENT_STATE [i]; |
---|
| 1009 | // bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 1010 | // (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or |
---|
| 1011 | // (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 1012 | // (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); |
---|
| 1013 | |
---|
| 1014 | // bool find = false; // have slot to update ??? |
---|
| 1015 | // Tdepth_t depth_new = depth; |
---|
| 1016 | |
---|
| 1017 | // // flush all slot, because this event is in head of rob |
---|
| 1018 | // for (uint32_t j=(depth+1)%_param->_size_upt_queue[i]; |
---|
| 1019 | // //uint32_t j=bottom; |
---|
| 1020 | // j!=top; |
---|
| 1021 | // j=(j+1)%_param->_size_upt_queue[i]) |
---|
| 1022 | // if ((reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_END) and |
---|
| 1023 | // (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY)) |
---|
| 1024 | // { |
---|
| 1025 | // find = true; |
---|
| 1026 | // reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 1027 | // reg_UPDATE_PREDICTION_TABLE [i][j]._retire_ok = false; |
---|
| 1028 | // } |
---|
| 1029 | // else |
---|
| 1030 | // if (not find) // while state == end or empty |
---|
| 1031 | // depth_new ++; |
---|
| 1032 | |
---|
| 1033 | // if ((reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END) and |
---|
| 1034 | // (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_EMPTY)) |
---|
| 1035 | // { |
---|
| 1036 | // find = true; |
---|
| 1037 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 1038 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._retire_ok = false; |
---|
| 1039 | |
---|
| 1040 | // } |
---|
| 1041 | // else |
---|
| 1042 | // // while state == end or empty |
---|
| 1043 | // depth = (depth_new+1)%_param->_size_upt_queue[i]; |
---|
| 1044 | |
---|
| 1045 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find : %d",find); |
---|
| 1046 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth_new : %d",depth_new); |
---|
| 1047 | |
---|
| 1048 | // // Test if have update slot |
---|
| 1049 | // if (find) |
---|
| 1050 | // { |
---|
| 1051 | // // // flush all slot after the event |
---|
| 1052 | // // for (uint32_t j=(depth+1)%_param->_size_upt_queue[i]; |
---|
| 1053 | // // j!=top; |
---|
| 1054 | // // j=(j+1)%_param->_size_upt_queue[i]) |
---|
| 1055 | // // reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 1056 | |
---|
| 1057 | // // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 1058 | |
---|
| 1059 | // // reg_UPT_BOTTOM [i]; |
---|
| 1060 | // // TODO : special case : event is an exception on branch, also depth is not valid |
---|
| 1061 | // reg_UPT_TOP [i] = depth; // depth is again valid |
---|
| 1062 | // reg_UPT_TOP_EVENT [i] = top; |
---|
| 1063 | |
---|
| 1064 | // if (bottom == reg_UPT_TOP [i]) |
---|
| 1065 | // reg_UPT_EMPTY [i] = true; |
---|
| 1066 | // } |
---|
| 1067 | |
---|
| 1068 | // bool full = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]); |
---|
| 1069 | // bool update_ras = find and ((top != depth) or full); |
---|
| 1070 | |
---|
| 1071 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); |
---|
| 1072 | |
---|
| 1073 | // if (not previous_update_ras and update_ras) |
---|
| 1074 | // reg_UPT_UPDATE [i] = new_update; |
---|
| 1075 | |
---|
| 1076 | // // new state : |
---|
| 1077 | // // * test if ufpt is empty |
---|
| 1078 | // // * ok : flush upft and upt |
---|
| 1079 | // // * ko : test if have previous flush upt |
---|
| 1080 | // // * ok : nothing |
---|
| 1081 | // // * ko : flush upt |
---|
| 1082 | // reg_EVENT_VAL [i] = update_ras; |
---|
| 1083 | // reg_EVENT_UPT_PTR [i] = depth; |
---|
| 1084 | |
---|
| 1085 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 1086 | // // if (reg_UFPT_NB_NEED_UPDATE [i] > 0) |
---|
| 1087 | // if ( (reg_UFPT_NB_NEED_UPDATE [i] > 0) or |
---|
| 1088 | // (reg_UFPT_NB_UPDATE [i] > 0)) |
---|
| 1089 | // { |
---|
| 1090 | // if (update_ras) |
---|
| 1091 | // { |
---|
| 1092 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT (branch_complete - miss)",i); |
---|
| 1093 | // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT; |
---|
| 1094 | // } |
---|
| 1095 | // else |
---|
| 1096 | // { |
---|
| 1097 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT (branch_complete - miss)",i); |
---|
| 1098 | // // reg_EVENT_VAL [i] = false; |
---|
| 1099 | |
---|
| 1100 | // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT; |
---|
| 1101 | // } |
---|
| 1102 | // } |
---|
| 1103 | // else |
---|
| 1104 | // { |
---|
| 1105 | // // if (not previous_update_ras) |
---|
| 1106 | // if (update_ras) |
---|
| 1107 | // { |
---|
| 1108 | // // have ras prediction ? |
---|
| 1109 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (branch_complete - miss)",i); |
---|
| 1110 | |
---|
| 1111 | // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UPT; |
---|
| 1112 | // } |
---|
| 1113 | // else |
---|
| 1114 | // { |
---|
| 1115 | // // special case : nothing |
---|
| 1116 | // // reg_EVENT_VAL [i] = false; |
---|
| 1117 | |
---|
| 1118 | // reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 1119 | // } |
---|
| 1120 | // } |
---|
| 1121 | |
---|
| 1122 | // // else no update |
---|
| 1123 | |
---|
| 1124 | // reg_EVENT_DEPTH [i] = depth; |
---|
| 1125 | // // reg_EVENT_ADDRESS_SRC [i] = address_src; // delay_slot is compute in I_State |
---|
| 1126 | // // reg_EVENT_ADDRESS_DEST_VAL[i] = good_take; |
---|
| 1127 | // // reg_EVENT_ADDRESS_DEST [i] = good_addr; |
---|
| 1128 | |
---|
[105] | 1129 | break; |
---|
| 1130 | } |
---|
| 1131 | default : |
---|
| 1132 | { |
---|
| 1133 | // nothing |
---|
| 1134 | break; |
---|
| 1135 | } |
---|
[97] | 1136 | } |
---|
| 1137 | } |
---|
[95] | 1138 | |
---|
| 1139 | // =================================================================== |
---|
[94] | 1140 | // =====[ FLUSH ]===================================================== |
---|
| 1141 | // =================================================================== |
---|
| 1142 | |
---|
| 1143 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 1144 | { |
---|
| 1145 | if (flush_UFPT [i]) |
---|
| 1146 | { |
---|
| 1147 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Flush Update Fetch Prediction Table"); |
---|
| 1148 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",i); |
---|
| 1149 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 1150 | |
---|
| 1151 | // It's to accelerate miss speculation |
---|
| 1152 | if (reg_UFPT_NB_NEED_UPDATE [i] == 0) |
---|
| 1153 | { |
---|
| 1154 | // No entry need prediction, flush all entry -> Reset |
---|
| 1155 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
| 1156 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
---|
| 1157 | reg_UFPT_BOTTOM [i] = 0; |
---|
| 1158 | reg_UFPT_TOP [i] = 0; |
---|
| 1159 | // reg_UFPT_UPDATE [i]; |
---|
| 1160 | } |
---|
| 1161 | else |
---|
| 1162 | { |
---|
[111] | 1163 | uint32_t bottom = reg_UFPT_BOTTOM [i]; |
---|
[94] | 1164 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
[111] | 1165 | { |
---|
| 1166 | uint32_t index = (bottom+j)%_param->_size_ufpt_queue[i]; |
---|
| 1167 | // EMPTY : no event |
---|
| 1168 | // END : already update |
---|
| 1169 | // EVENT : previous event |
---|
| 1170 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][index]._state == UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) |
---|
| 1171 | { |
---|
| 1172 | reg_UFPT_UPDATE [i] = index; |
---|
| 1173 | reg_UFPT_NB_UPDATE [i] ++; |
---|
| 1174 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][index]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT; |
---|
| 1175 | } |
---|
| 1176 | } |
---|
[106] | 1177 | |
---|
[111] | 1178 | // // TOP is next write slot : last slot is TOP-1 |
---|
| 1179 | // uint32_t top = reg_UFPT_TOP [i]; |
---|
| 1180 | // reg_UFPT_UPDATE [i] = ((top==0)?_param->_size_ufpt_queue[i]:top)-1; |
---|
[106] | 1181 | |
---|
| 1182 | // reg_UFPT_BOTTOM [i]; |
---|
| 1183 | // reg_UFPT_TOP [i]; |
---|
[94] | 1184 | } |
---|
[81] | 1185 | |
---|
[94] | 1186 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [i]); |
---|
| 1187 | |
---|
| 1188 | } |
---|
| 1189 | } |
---|
| 1190 | |
---|
[97] | 1191 | #ifdef STATISTICS |
---|
| 1192 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 1193 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 1194 | { |
---|
| 1195 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
| 1196 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
---|
| 1197 | (*_stat_ufpt_queue_nb_elt [i]) ++; |
---|
| 1198 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
| 1199 | if (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 1200 | (*_stat_upt_queue_nb_elt [i]) ++; |
---|
| 1201 | } |
---|
| 1202 | #endif |
---|
| 1203 | |
---|
[94] | 1204 | // =================================================================== |
---|
| 1205 | // =====[ PRINT ]===================================================== |
---|
| 1206 | // =================================================================== |
---|
| 1207 | |
---|
[82] | 1208 | #if (DEBUG >= DEBUG_TRACE) |
---|
[88] | 1209 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Dump Update_Prediction_Table"); |
---|
| 1210 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPDATE_PRIORITY : %d",reg_UPDATE_PRIORITY); |
---|
[81] | 1211 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 1212 | { |
---|
[88] | 1213 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_IS_ACCURATE : %d",reg_IS_ACCURATE [i]); |
---|
[105] | 1214 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d" ,reg_EVENT_VAL [i]); |
---|
| 1215 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d" ,reg_EVENT_UPT_PTR [i]); |
---|
[112] | 1216 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d" ,reg_EVENT_UPT_FULL [i]); |
---|
[88] | 1217 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s" ,toString(reg_EVENT_STATE [i]).c_str()); |
---|
[112] | 1218 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_IS_BRANCH : %d" ,reg_EVENT_IS_BRANCH [i]); |
---|
[98] | 1219 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); |
---|
[108] | 1220 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_SRC : %.8x (%.8x)",reg_EVENT_ADDRESS_SRC [i],reg_EVENT_ADDRESS_SRC [i]<<2); |
---|
[94] | 1221 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST_VAL: %d" ,reg_EVENT_ADDRESS_DEST_VAL[i]); |
---|
[108] | 1222 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST : %.8x (%.8x)",reg_EVENT_ADDRESS_DEST [i],reg_EVENT_ADDRESS_DEST [i]<<2); |
---|
[119] | 1223 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_CAN_CONTINUE : %d" ,reg_EVENT_CAN_CONTINUE [i]); |
---|
[88] | 1224 | |
---|
| 1225 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Fetch_Prediction_Table [%d]",i); |
---|
| 1226 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_BOTTOM : %d",reg_UFPT_BOTTOM [i]); |
---|
| 1227 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_TOP : %d",reg_UFPT_TOP [i]); |
---|
[94] | 1228 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE : %d",reg_UFPT_UPDATE [i]); |
---|
[88] | 1229 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
[106] | 1230 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_UPDATE : %d",reg_UFPT_NB_UPDATE [i]); |
---|
[88] | 1231 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
[107] | 1232 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d, %.8d %.8x (%.8x) %.4d - %s", |
---|
[88] | 1233 | j, |
---|
| 1234 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._condition, |
---|
| 1235 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src, |
---|
[107] | 1236 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src<<2, |
---|
[88] | 1237 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest, |
---|
[107] | 1238 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest<<2, |
---|
[88] | 1239 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._last_take, |
---|
| 1240 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 1241 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._history, |
---|
| 1242 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras, |
---|
[107] | 1243 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras<<2, |
---|
[88] | 1244 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 1245 | toString(reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 1246 | ); |
---|
| 1247 | |
---|
| 1248 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Prediction_Table [%d]",i); |
---|
| 1249 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM : %d",reg_UPT_BOTTOM [i]); |
---|
| 1250 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
---|
[95] | 1251 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP_EVENT : %d",reg_UPT_TOP_EVENT [i]); |
---|
[88] | 1252 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [i]); |
---|
[101] | 1253 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
---|
[88] | 1254 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
[107] | 1255 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d %.1d, %.8d %.8x (%.8x) %.4d - %s", |
---|
[88] | 1256 | j, |
---|
| 1257 | reg_UPDATE_PREDICTION_TABLE [i][j]._condition, |
---|
| 1258 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_src, |
---|
[107] | 1259 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_src<<2, |
---|
[88] | 1260 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest, |
---|
[107] | 1261 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest<<2, |
---|
[88] | 1262 | reg_UPDATE_PREDICTION_TABLE [i][j]._last_take, |
---|
| 1263 | reg_UPDATE_PREDICTION_TABLE [i][j]._good_take, |
---|
| 1264 | reg_UPDATE_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 1265 | reg_UPDATE_PREDICTION_TABLE [i][j]._history, |
---|
| 1266 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras, |
---|
[107] | 1267 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras<<2, |
---|
[88] | 1268 | reg_UPDATE_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 1269 | toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 1270 | ); |
---|
[81] | 1271 | } |
---|
[82] | 1272 | #endif |
---|
[108] | 1273 | |
---|
| 1274 | #ifdef DEBUG_TEST |
---|
| 1275 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 1276 | { |
---|
| 1277 | if (reg_UFPT_NB_NEED_UPDATE [i] > _param->_size_ufpt_queue[i]) |
---|
| 1278 | throw ERRORMORPHEO(FUNCTION,toString(_("reg_UFPT_NB_NEED_UPDATE [%d] (%d) is > at size_ufpt_queue (%d).\n"),i,reg_UFPT_NB_NEED_UPDATE [i],_param->_size_ufpt_queue[i])); |
---|
| 1279 | if (reg_UFPT_NB_UPDATE [i] > _param->_size_ufpt_queue[i]) |
---|
| 1280 | throw ERRORMORPHEO(FUNCTION,toString(_("reg_UFPT_NB_UPDATE [%d] (%d) is > at size_ufpt_queue (%d).\n"),i,reg_UFPT_NB_UPDATE [i],_param->_size_ufpt_queue[i])); |
---|
[88] | 1281 | } |
---|
[108] | 1282 | #endif |
---|
[81] | 1283 | |
---|
[108] | 1284 | } |
---|
[81] | 1285 | |
---|
[108] | 1286 | |
---|
[78] | 1287 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
| 1288 | end_cycle (); |
---|
| 1289 | #endif |
---|
[88] | 1290 | |
---|
| 1291 | log_end(Update_Prediction_Table,FUNCTION); |
---|
[78] | 1292 | }; |
---|
| 1293 | |
---|
| 1294 | }; // end namespace update_prediction_table |
---|
| 1295 | }; // end namespace prediction_unit |
---|
| 1296 | }; // end namespace front_end |
---|
| 1297 | }; // end namespace multi_front_end |
---|
| 1298 | }; // end namespace core |
---|
| 1299 | |
---|
| 1300 | }; // end namespace behavioural |
---|
| 1301 | }; // end namespace morpheo |
---|
| 1302 | #endif |
---|