Changeset 106 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State
- Timestamp:
- Feb 9, 2009, 11:55:26 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_min.cfg
r98 r106 3 3 1 1 +1 # nb_decod_unit 4 4 1 1 +1 # nb_inst_branch_complete 5 0 0 +1 # size_depth[0] [nb_context]5 1 1 +1 # nb_inst_branch_speculated [0] [nb_context] 6 6 32 32 +1 # size_general_data 7 7 1 1 +1 # size_inst_decod [0] [nb_decod_unit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_mono_context.cfg
r98 r106 3 3 1 1 *4 # nb_decod_unit 4 4 1 4 *4 # nb_inst_branch_complete 5 0 2 +1 # size_depth[0] [nb_context]5 1 4 *2 # nb_inst_branch_speculated [0] [nb_context] 6 6 32 32 +1 # size_general_data 7 7 1 4 *4 # size_inst_decod [0] [nb_decod_unit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/config_multi_context.cfg
r98 r106 3 3 4 4 *4 # nb_decod_unit 4 4 2 2 *4 # nb_inst_branch_complete 5 4 4 +1 # size_depth[0] [nb_context]6 2 2 +1 # size_depth[1] [nb_context]7 1 1 +1 # size_depth[2] [nb_context]8 0 0 +1 # size_depth[3] [nb_context]9 4 4 +1 # size_depth[4] [nb_context]10 2 2 +1 # size_depth[5] [nb_context]11 1 1 +1 # size_depth[6] [nb_context]12 0 0 +1 # size_depth[7] [nb_context]5 6 6 +1 # nb_inst_branch_speculated [0] [nb_context] 6 3 3 +1 # nb_inst_branch_speculated [1] [nb_context] 7 2 2 +1 # nb_inst_branch_speculated [2] [nb_context] 8 1 1 +1 # nb_inst_branch_speculated [3] [nb_context] 9 8 8 +1 # nb_inst_branch_speculated [4] [nb_context] 10 4 4 +1 # nb_inst_branch_speculated [5] [nb_context] 11 2 2 +1 # nb_inst_branch_speculated [6] [nb_context] 12 1 1 +1 # nb_inst_branch_speculated [7] [nb_context] 13 13 32 32 +1 # size_general_data 14 14 4 4 *4 # size_inst_decod [0] [nb_decod_unit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/main.cpp
r98 r106 17 17 err (_(" * nb_decod_unit (uint32_t)\n")); 18 18 err (_(" * nb_inst_branch_complete (uint32_t)\n")); 19 err (_(" * size_depth[nb_context] (uint32_t)\n"));19 err (_(" * nb_inst_branch_speculated [nb_context] (uint32_t)\n")); 20 20 err (_(" * size_general_data (uint32_t)\n")); 21 21 err (_(" * size_inst_decod [nb_decod_unit] (uint32_t)\n")); … … 48 48 usage (argc, argv); 49 49 50 uint32_t * _ size_depth= new uint32_t [_nb_context];50 uint32_t * _nb_inst_branch_speculated = new uint32_t [_nb_context]; 51 51 for (uint32_t i=0; i<_nb_context; i++) 52 _ size_depth[i] = fromString<uint32_t>(argv[x++]);52 _nb_inst_branch_speculated [i] = fromString<uint32_t>(argv[x++]); 53 53 54 54 uint32_t _size_general_data = fromString<uint32_t>(argv[x++]); … … 69 69 _nb_decod_unit , 70 70 _nb_inst_branch_complete , 71 _ size_depth,71 _nb_inst_branch_speculated , 72 72 _size_general_data , 73 73 _size_inst_decod , … … 87 87 } 88 88 89 delete [] _ size_depth;89 delete [] _nb_inst_branch_speculated; 90 90 delete [] _size_inst_decod; 91 91 delete [] _link_context_to_decod_unit; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp
r105 r106 275 275 for (uint32_t i=0; i<_param->_nb_context; i++) 276 276 if (_param->_have_port_depth) 277 in_DEPTH_MIN [i]->write(( _param->_array_size_depth[i]==0)?0:(i%_param->_array_size_depth[i]));277 in_DEPTH_MIN [i]->write((log2(_param->_nb_inst_branch_speculated[i])==0)?0:(i%log2(_param->_nb_inst_branch_speculated[i]))); 278 278 279 279 uint32_t context = rand()%_param->_nb_context; … … 295 295 in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbeef); 296 296 if (_param->_have_port_depth) 297 in_DECOD_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));297 in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 298 298 in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_MSYNC); 299 299 … … 350 350 in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdeadbebe); 351 351 if (_param->_have_port_depth) 352 in_DECOD_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));352 in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 353 353 in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_PSYNC); 354 354 … … 428 428 in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0300); 429 429 if (_param->_have_port_depth) 430 in_DECOD_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));430 in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 431 431 in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_CSYNC); 432 432 … … 507 507 in_DECOD_EVENT_ADDRESS_EPCR [port]->write(0xdead0400); 508 508 if (_param->_have_port_depth) 509 in_DECOD_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));509 in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 510 510 in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_SPR_ACCESS); 511 511 … … 559 559 // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); 560 560 // if (_param->_have_port_depth) 561 // in_BRANCH_COMPLETE_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));561 // in_BRANCH_COMPLETE_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 562 562 // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x400); 563 563 // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x500); … … 580 580 581 581 if (_param->_have_port_depth) 582 in_BRANCH_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));582 in_BRANCH_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 583 583 in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x400); 584 584 in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x500); … … 649 649 // in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); 650 650 // if (_param->_have_port_depth) 651 // in_BRANCH_COMPLETE_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));651 // in_BRANCH_COMPLETE_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 652 652 // in_BRANCH_COMPLETE_ADDRESS_SRC [port]->write(0x600); 653 653 // in_BRANCH_COMPLETE_ADDRESS_DEST [port]->write(0x700); … … 669 669 uint32_t port = context; 670 670 671 in_BRANCH_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context+1)%_param->_array_size_depth[context]));671 in_BRANCH_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context+1)%log2(_param->_nb_inst_branch_speculated[context]))); 672 672 in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x600); 673 673 in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x700); … … 736 736 in_DECOD_EVENT_CONTEXT_ID [port]->write(context); 737 737 if (_param->_have_port_depth) 738 in_DECOD_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));738 in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); 739 739 in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); 740 740 in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(0); … … 830 830 in_DECOD_EVENT_CONTEXT_ID [port]->write(context); 831 831 if (_param->_have_port_depth) 832 in_DECOD_EVENT_DEPTH [port]->write(( _param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));832 in_DECOD_EVENT_DEPTH [port]->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); 833 833 in_DECOD_EVENT_TYPE [port]->write(EVENT_TYPE_EXCEPTION); 834 834 in_DECOD_EVENT_IS_DELAY_SLOT [port]->write(1); … … 922 922 in_COMMIT_EVENT_CONTEXT_ID ->write(context); 923 923 if (_param->_have_port_depth) 924 in_COMMIT_EVENT_DEPTH ->write(( _param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));924 in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); 925 925 in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); 926 926 in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); … … 1017 1017 in_COMMIT_EVENT_CONTEXT_ID ->write(context); 1018 1018 if (_param->_have_port_depth) 1019 in_COMMIT_EVENT_DEPTH ->write(( _param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));1019 in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); 1020 1020 in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); 1021 1021 in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); … … 1112 1112 in_COMMIT_EVENT_CONTEXT_ID ->write(context); 1113 1113 if (_param->_have_port_depth) 1114 in_COMMIT_EVENT_DEPTH ->write(( _param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));1114 in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); 1115 1115 in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); 1116 1116 in_COMMIT_EVENT_IS_DELAY_SLOT ->write(0); … … 1207 1207 in_COMMIT_EVENT_CONTEXT_ID ->write(context); 1208 1208 if (_param->_have_port_depth) 1209 in_COMMIT_EVENT_DEPTH ->write(( _param->_array_size_depth[context]==0)?0:((context)%_param->_array_size_depth[context]));1209 in_COMMIT_EVENT_DEPTH ->write((log2(_param->_nb_inst_branch_speculated[context])==0)?0:((context)%log2(_param->_nb_inst_branch_speculated[context]))); 1210 1210 in_COMMIT_EVENT_TYPE ->write(EVENT_TYPE_EXCEPTION); 1211 1211 in_COMMIT_EVENT_IS_DELAY_SLOT ->write(1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Parameters.h
r98 r106 27 27 public : uint32_t _nb_decod_unit ; 28 28 public : uint32_t _nb_inst_branch_complete ; 29 public : uint32_t * _ array_size_depth; //[nb_context]29 public : uint32_t * _nb_inst_branch_speculated ; //[nb_context] 30 30 //public : uint32_t * _size_depth ; //[nb_context] 31 31 //public : uint32_t _size_general_data ; … … 38 38 uint32_t nb_decod_unit, 39 39 uint32_t nb_inst_branch_complete, 40 uint32_t * size_depth,40 uint32_t * nb_inst_branch_speculated, 41 41 uint32_t size_general_data, 42 42 uint32_t * size_nb_inst_decod, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp
r105 r106 196 196 log_printf(TRACE,Context_State,FUNCTION," * BRANCH_EVENT [%d]",i); 197 197 198 // throw ERRORMORPHEO(FUNCTION,_("Not yet implemented (Comming Soon).\n"));199 200 198 context_state_t state = reg_STATE [i]; 201 199 … … 203 201 Tdepth_t depth_cur = reg_EVENT_DEPTH [i]; 204 202 Tdepth_t depth_min = (_param->_have_port_depth)?PORT_READ(in_DEPTH_MIN [i]):0; 205 Tdepth_t depth_max = _param->_ array_size_depth[i];203 Tdepth_t depth_max = _param->_nb_inst_branch_speculated [i]; 206 204 207 //Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));208 //Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min));209 Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));210 Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max));205 Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min)); 206 Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min)); 207 // Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max)); 208 // Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); 211 209 212 210 // priority : miss > excep > spr/sync 213 uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) or (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR) or (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND) or (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND))?2:((state == EVENT_TYPE_EXCEPTION)?1:0); 211 uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or 212 (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or 213 (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND) or 214 (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ))?2:((state == EVENT_TYPE_EXCEPTION)?1:0); 214 215 uint8_t priority1 = 2; // miss 215 216 … … 217 218 // if context_state_ok : yes 218 219 // if context_state_ko : test the depth, and the priority of event 219 220 220 bool is_valid = ((state == CONTEXT_STATE_OK) or 221 221 (depth1< depth0) or 222 222 ((depth1==depth0) and (priority1>=priority0))); // >= because another branch can be a miss prediction with same depth 223 224 log_printf(TRACE,Context_State,FUNCTION," * depth : %d",depth ); 225 log_printf(TRACE,Context_State,FUNCTION," * depth_cur : %d",depth_cur ); 226 log_printf(TRACE,Context_State,FUNCTION," * depth_min : %d",depth_min ); 227 log_printf(TRACE,Context_State,FUNCTION," * depth_max : %d",depth_max ); 228 log_printf(TRACE,Context_State,FUNCTION," * depth0 : %d",depth0 ); 229 log_printf(TRACE,Context_State,FUNCTION," * depth1 : %d",depth1 ); 230 log_printf(TRACE,Context_State,FUNCTION," * priority0 : %d",priority0 ); 231 log_printf(TRACE,Context_State,FUNCTION," * priority1 : %d",priority1 ); 232 log_printf(TRACE,Context_State,FUNCTION," * is_valid : %d",is_valid ); 223 233 224 234 if (is_valid) … … 251 261 Tdepth_t depth_cur = reg_EVENT_DEPTH [context]; 252 262 Tdepth_t depth_min = (_param->_have_port_depth )?PORT_READ(in_DEPTH_MIN [context]):0; 253 Tdepth_t depth_max = _param->_ array_size_depth[context];263 Tdepth_t depth_max = _param->_nb_inst_branch_speculated [context]; 254 264 255 //Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));256 //Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min));257 Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));258 Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max));265 Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min)); 266 Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min)); 267 // Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max)); 268 // Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); 259 269 260 270 context_state_t state = reg_STATE [context]; … … 262 272 263 273 // miss > excep > spr/sync 264 uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) or (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR) or (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND) or (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0); 274 uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or 275 (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or 276 (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND) or 277 (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0); 265 278 uint8_t priority1 = (state == EVENT_TYPE_EXCEPTION)?1:0; 266 279 … … 272 285 (depth1< depth0) or 273 286 ((depth1==depth0) and (priority1>=priority0))); 287 288 log_printf(TRACE,Context_State,FUNCTION," * depth : %d",depth ); 289 log_printf(TRACE,Context_State,FUNCTION," * depth_cur : %d",depth_cur ); 290 log_printf(TRACE,Context_State,FUNCTION," * depth_min : %d",depth_min ); 291 log_printf(TRACE,Context_State,FUNCTION," * depth_max : %d",depth_max ); 292 log_printf(TRACE,Context_State,FUNCTION," * depth0 : %d",depth0 ); 293 log_printf(TRACE,Context_State,FUNCTION," * depth1 : %d",depth1 ); 294 log_printf(TRACE,Context_State,FUNCTION," * priority0 : %d",priority0 ); 295 log_printf(TRACE,Context_State,FUNCTION," * priority1 : %d",priority1 ); 296 log_printf(TRACE,Context_State,FUNCTION," * is_valid : %d",is_valid ); 274 297 275 298 if (is_valid) … … 371 394 Tdepth_t depth_cur = reg_EVENT_DEPTH [context]; 372 395 Tdepth_t depth_min = (_param->_have_port_depth )?PORT_READ(in_DEPTH_MIN [context]):0; 373 Tdepth_t depth_max = _param->_ array_size_depth[context];396 Tdepth_t depth_max = _param->_nb_inst_branch_speculated [context]; 374 397 375 //Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));376 //Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min));377 Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));378 Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max));398 Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min)); 399 Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min)); 400 // Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max)); 401 // Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); 379 402 380 403 context_state_t state = reg_STATE [context]; … … 382 405 383 406 // miss > excep > spr/sync 384 uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) or (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR) or (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND) or (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0); 407 uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR ) or 408 (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR ) or 409 (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND) or 410 (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND ))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0); 385 411 uint8_t priority1 = (state == EVENT_TYPE_EXCEPTION)?1:2; // else load_miss_speculation (EVENT_TYPE_MISS_SPECULATION) 386 412 … … 392 418 (depth1< depth0) or 393 419 ((depth1==depth0) and (priority1>=priority0))); 420 421 log_printf(TRACE,Context_State,FUNCTION," * depth : %d",depth ); 422 log_printf(TRACE,Context_State,FUNCTION," * depth_cur : %d",depth_cur ); 423 log_printf(TRACE,Context_State,FUNCTION," * depth_min : %d",depth_min ); 424 log_printf(TRACE,Context_State,FUNCTION," * depth_max : %d",depth_max ); 425 log_printf(TRACE,Context_State,FUNCTION," * depth0 : %d",depth0 ); 426 log_printf(TRACE,Context_State,FUNCTION," * depth1 : %d",depth1 ); 427 log_printf(TRACE,Context_State,FUNCTION," * priority0 : %d",priority0 ); 428 log_printf(TRACE,Context_State,FUNCTION," * priority1 : %d",priority1 ); 429 log_printf(TRACE,Context_State,FUNCTION," * is_valid : %d",is_valid ); 394 430 395 431 if (is_valid) … … 427 463 428 464 // ------------------------------------------------------------------- 429 // -----[ BRANCH_COMPLETE ]-------------------------------------------430 // -------------------------------------------------------------------431 432 // for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)433 // if (PORT_READ(in_BRANCH_COMPLETE_VAL [i]) and internal_BRANCH_COMPLETE_ACK [i])434 // {435 // log_printf(TRACE,Context_State,FUNCTION," * BRANCH_COMPLETE [%d]",i);436 // if (PORT_READ(in_BRANCH_COMPLETE_MISS_PREDICTION [i]))437 // {438 // Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0;439 // Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0;440 // Tdepth_t depth_cur = reg_EVENT_DEPTH [context];441 // Tdepth_t depth_min = (_param->_have_port_depth )?PORT_READ(in_DEPTH_MIN [context]):0;442 // Tdepth_t depth_max = _param->_array_size_depth [context];443 444 // // Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min));445 // // Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min));446 // Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max));447 // Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max));448 449 // context_state_t state = reg_STATE [context];450 451 // // miss > excep > spr/sync452 // uint8_t priority0 = ((state == CONTEXT_STATE_KO_MISS_BRANCH_ADDR) or (state == CONTEXT_STATE_KO_MISS_LOAD_ADDR) or (state == CONTEXT_STATE_KO_MISS_BRANCH_WAITEND) or (state == CONTEXT_STATE_KO_MISS_LOAD_WAITEND))?2:((state == CONTEXT_STATE_KO_EXCEP)?1:0);453 // uint8_t priority1 = 2; // miss454 455 // // is_valid = can modify local information456 // // if context_state_ok : yes457 // // if context_state_ko : test the depth, and the priority of envent458 459 // bool is_valid = ((state == CONTEXT_STATE_OK) or460 // (depth1< depth0) or461 // ((depth1==depth0) and (priority1>=priority0)));462 463 // if (is_valid)464 // {465 // // commit466 // Tcontrol_t take = PORT_READ(in_BRANCH_COMPLETE_TAKE [i]);467 // reg_STATE [context] = CONTEXT_STATE_KO_MISS;468 // reg_EVENT_ADDRESS [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_SRC [i])+1; //DELAY_SLOT469 // reg_EVENT_ADDRESS_EPCR [context] = PORT_READ(in_BRANCH_COMPLETE_ADDRESS_DEST [i]);470 // reg_EVENT_ADDRESS_EPCR_VAL [context] = take; // if not take : in sequence471 // //reg_EVENT_ADDRESS_EEAR [context];472 // reg_EVENT_ADDRESS_EEAR_VAL [context] = 0;473 // reg_EVENT_IS_DELAY_SLOT [context] = take;474 // reg_EVENT_IS_DS_TAKE [context] = take;475 // reg_EVENT_DEPTH [context] = depth;476 // }477 // }478 // }479 480 // -------------------------------------------------------------------481 465 // -----[ EVENT ]----------------------------------------------------- 482 466 // ------------------------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Parameters.cpp
r98 r106 22 22 uint32_t nb_decod_unit, 23 23 uint32_t nb_inst_branch_complete, 24 uint32_t * size_depth,24 uint32_t * nb_inst_branch_speculated, 25 25 uint32_t size_general_data, 26 26 uint32_t * size_nb_inst_decod, … … 34 34 _nb_decod_unit = nb_decod_unit ; 35 35 _nb_inst_branch_complete = nb_inst_branch_complete ; 36 _ array_size_depth = size_depth;36 _nb_inst_branch_speculated = nb_inst_branch_speculated ; 37 37 // _size_general_data = size_general_data ; 38 38 // _size_nb_inst_decod = size_nb_inst_decod ; … … 45 45 { 46 46 _size_context_id = log2(_nb_context); 47 _size_depth = log2(max<uint32_t>( size_depth,_nb_context));47 _size_depth = log2(max<uint32_t>(nb_inst_branch_speculated,_nb_context)); 48 48 _size_general_data = size_general_data; 49 49 _size_instruction_address = size_general_data-2;
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