Changeset 136 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp

Timestamp:

Oct 20, 2009, 8:52:15 PM (15 years ago)

Author:

rosiere

Message:

1) Add new algo in ifetch queue
2) Add Cancel bit
3) new config

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp

@@ -84 +84 @@
       ALLOC1_VALACK_OUT(out_DECOD_VAL        ,VAL);
       ALLOC1_VALACK_IN ( in_DECOD_ACK        ,ACK);
-      ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION,"instruction",Tinstruction_t,_param->_size_instruction);
+      ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION                ,"instruction"                ,Tinstruction_t    ,_param->_size_instruction);
+      ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address);
+      ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state);
+      ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);
+      ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
 
       ALLOC1_INTERFACE_END(_param->_nb_instruction);
     }
-    {
-      ALLOC0_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage."));
+//     {
+//       ALLOC0_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage."));
       
-      ALLOC0_SIGNAL_OUT(out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address         );
-      ALLOC0_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr );
-      ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state    );
-      ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth           );
-      ALLOC0_SIGNAL_OUT(out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
+//       ALLOC0_SIGNAL_OUT(out_DECOD_ADDRESS                    ,"address"                    ,Tgeneral_address_t,_param->_size_instruction_address         );
+//       ALLOC0_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR            ,"inst_ifetch_ptr"            ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr );
+//       ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_STATE               ,"branch_state"               ,Tbranch_state_t   ,_param->_size_branch_state    );
+//       ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth           );
+//       ALLOC0_SIGNAL_OUT(out_DECOD_EXCEPTION                  ,"exception"                  ,Texception_t      ,_param->_size_exception_ifetch);
 
-      ALLOC0_INTERFACE_END();
-    }
+//       ALLOC0_INTERFACE_END();
+//     }
 
     // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -132 +136 @@
     if (usage_is_set(_usage,USE_SYSTEMC))
       {
-        ALLOC1(internal_DECOD_VAL,Tcontrol_t,_param->_nb_instruction);
-        
+        ALLOC1(internal_DECOD_VAL ,Tcontrol_t,_param->_nb_instruction);
+        if (_param->_queue_scheme == IFETCH_QUEUE_SCHEME_FULL_ASSOC)
+          {
+        ALLOC1(internal_DECOD_PTR ,uint32_t  ,_param->_nb_instruction);
+        ALLOC1(internal_DECOD_SLOT,uint32_t  ,_param->_nb_instruction);
+          }
+
         _queue = new ifetch_queue_entry_t * [_param->_size_queue];
         for (uint32_t i=0;i<_param->_size_queue; i++)