Changeset 136
- Timestamp:
- Oct 20, 2009, 8:52:15 PM (15 years ago)
- Location:
- trunk
- Files:
-
- 2358 added
- 253 deleted
- 189 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/include/Parameters.h
r115 r136 26 26 public : uint32_t _nb_thread ; 27 27 public : uint32_t * _size_ifetch_queue ;//[nb_thread] 28 public : morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 29 * _ifetch_queue_scheme ;//[nb_thread] 28 30 public : uint32_t * _nb_inst_fetch ;//[nb_thread] 29 31 public : bool ** _implement_group ;//[nb_thread][NB_GROUP] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance.cpp
r128 r136 172 172 DELETE2(_param->_implement_group ,_param->_nb_thread,NB_GROUP); 173 173 DELETE1(_param->_nb_inst_fetch ,_param->_nb_thread); 174 DELETE1(_param->_ifetch_queue_scheme ,_param->_nb_thread); 174 175 DELETE1(_param->_size_ifetch_queue ,_param->_nb_thread); 175 176 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Instance_fromInternalStructure.cpp
r115 r136 42 42 43 43 ALLOC1(_param->_size_ifetch_queue,uint32_t,_param->_nb_thread); 44 ALLOC1(_param->_ifetch_queue_scheme ,morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 45 ,_param->_nb_thread); 44 46 ALLOC1(_param->_nb_inst_fetch ,uint32_t,_param->_nb_thread); 45 47 ALLOC2(_param->_implement_group ,bool ,_param->_nb_thread,NB_GROUP); … … 52 54 //log_printf(INFO,Configuration,FUNCTION,_("THREAD [%d]"),i); 53 55 54 _param->_size_ifetch_queue [i] = fromString<uint32_t>(getParam("size_ifetch_queue", "thread",toString(i).c_str(),"")); 55 _param->_nb_inst_fetch [i] = fromString<uint32_t>(getParam("nb_inst_fetch" , "thread",toString(i).c_str(),"")); 56 _param->_ras_size_queue [i] = fromString<uint32_t>(getParam("ras_size_queue" , "thread",toString(i).c_str(),"")); 57 _param->_upt_size_queue [i] = fromString<uint32_t>(getParam("upt_size_queue" , "thread",toString(i).c_str(),"")); 58 _param->_ufpt_size_queue [i] = fromString<uint32_t>(getParam("ufpt_size_queue" , "thread",toString(i).c_str(),"")); 56 _param->_size_ifetch_queue [i] = fromString<uint32_t>(getParam("size_ifetch_queue" , "thread",toString(i).c_str(),"")); 57 _param->_ifetch_queue_scheme [i] = fromString<morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t> 58 (getParam("ifetch_queue_scheme", "thread",toString(i).c_str(),"")); 59 _param->_nb_inst_fetch [i] = fromString<uint32_t>(getParam("nb_inst_fetch" , "thread",toString(i).c_str(),"")); 60 _param->_ras_size_queue [i] = fromString<uint32_t>(getParam("ras_size_queue" , "thread",toString(i).c_str(),"")); 61 _param->_upt_size_queue [i] = fromString<uint32_t>(getParam("upt_size_queue" , "thread",toString(i).c_str(),"")); 62 _param->_ufpt_size_queue [i] = fromString<uint32_t>(getParam("ufpt_size_queue" , "thread",toString(i).c_str(),"")); 59 63 60 64 // just read !!! -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Core_Glue.h
r131 r136 120 120 public : SC_IN (Ttype_t ) *** in_ISSUE_OOO_ENGINE_TYPE ;//[nb_ooo_engine][nb_inst_issue] 121 121 public : SC_IN (Toperation_t ) *** in_ISSUE_OOO_ENGINE_OPERATION ;//[nb_ooo_engine][nb_inst_issue] 122 public : SC_IN (Tcontrol_t ) *** in_ISSUE_OOO_ENGINE_CANCEL ;//[nb_ooo_engine][nb_inst_issue] 122 123 public : SC_IN (Tlsq_ptr_t ) *** in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE ;//[nb_ooo_engine][nb_inst_issue] 123 124 public : SC_IN (Tlsq_ptr_t ) *** in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ ;//[nb_ooo_engine][nb_inst_issue] … … 145 146 public : SC_OUT(Toperation_t ) *** out_ISSUE_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_read_unit] 146 147 public : SC_OUT(Ttype_t ) *** out_ISSUE_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_read_unit] 148 public : SC_OUT(Tcontrol_t ) *** out_ISSUE_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_read_unit] 147 149 public : SC_OUT(Tlsq_ptr_t ) *** out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE ;//[nb_execute_loop][nb_read_unit] 148 150 public : SC_OUT(Tlsq_ptr_t ) *** out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_READ ;//[nb_execute_loop][nb_read_unit] … … 171 173 //public : SC_OUT(Ttype_t ) **** out_EXECUTE_OOO_ENGINE_TYPE ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] 172 174 //public : SC_OUT(Toperation_t ) **** out_EXECUTE_OOO_ENGINE_OPERATION ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] 175 public : SC_OUT(Tcontrol_t ) **** out_EXECUTE_OOO_ENGINE_CANCEL ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] 173 176 public : SC_OUT(Tspecial_data_t ) **** out_EXECUTE_OOO_ENGINE_FLAGS ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] 174 177 public : SC_OUT(Texception_t ) **** out_EXECUTE_OOO_ENGINE_EXCEPTION ;//[nb_ooo_engine][ooo_engine_nb_execute_loop][nb_inst_execute] … … 185 188 //public : SC_IN (Toperation_t ) *** in_EXECUTE_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_write_unit] 186 189 //public : SC_IN (Ttype_t ) *** in_EXECUTE_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_write_unit] 190 public : SC_IN (Tcontrol_t ) *** in_EXECUTE_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_write_unit] 187 191 public : SC_IN (Tspecial_data_t ) *** in_EXECUTE_EXECUTE_LOOP_FLAGS ;//[nb_execute_loop][nb_write_unit] 188 192 public : SC_IN (Texception_t ) *** in_EXECUTE_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_write_unit] … … 191 195 public : SC_IN (Tgeneral_data_t ) *** in_EXECUTE_EXECUTE_LOOP_DATA ;//[nb_execute_loop][nb_write_unit] 192 196 193 // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~194 public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_VAL ;//[nb_ooo_engine][nb_inst_insert]195 public : SC_OUT(Tcontrol_t ) *** out_INSERT_OOO_ENGINE_ACK ;//[nb_ooo_engine][nb_inst_insert]196 public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RD_USE ;//[nb_ooo_engine][nb_inst_insert]197 public : SC_IN (Tgeneral_address_t) *** in_INSERT_OOO_ENGINE_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert]198 public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RE_USE ;//[nb_ooo_engine][nb_inst_insert]199 public : SC_IN (Tspecial_address_t) *** in_INSERT_OOO_ENGINE_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert]200 201 public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_VAL ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert]202 public : SC_IN (Tcontrol_t ) **** in_INSERT_EXECUTE_LOOP_ACK ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert]203 public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RD_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert]204 public : SC_OUT(Tgeneral_address_t) **** out_INSERT_EXECUTE_LOOP_RD_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert]205 public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RE_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert]206 public : SC_OUT(Tspecial_address_t) **** out_INSERT_EXECUTE_LOOP_RE_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert]197 // // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 198 // public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_VAL ;//[nb_ooo_engine][nb_inst_insert] 199 // public : SC_OUT(Tcontrol_t ) *** out_INSERT_OOO_ENGINE_ACK ;//[nb_ooo_engine][nb_inst_insert] 200 // public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RD_USE ;//[nb_ooo_engine][nb_inst_insert] 201 // public : SC_IN (Tgeneral_address_t) *** in_INSERT_OOO_ENGINE_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert] 202 // public : SC_IN (Tcontrol_t ) *** in_INSERT_OOO_ENGINE_RE_USE ;//[nb_ooo_engine][nb_inst_insert] 203 // public : SC_IN (Tspecial_address_t) *** in_INSERT_OOO_ENGINE_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert] 204 205 // public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_VAL ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] 206 // public : SC_IN (Tcontrol_t ) **** in_INSERT_EXECUTE_LOOP_ACK ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] 207 // public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RD_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] 208 // public : SC_OUT(Tgeneral_address_t) **** out_INSERT_EXECUTE_LOOP_RD_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] 209 // public : SC_OUT(Tcontrol_t ) **** out_INSERT_EXECUTE_LOOP_RE_USE ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] 210 // public : SC_OUT(Tspecial_address_t) **** out_INSERT_EXECUTE_LOOP_RE_NUM_REG ;//[nb_execute_loop][execute_loop_nb_ooo_engine][execute_loop_nb_inst_insert] 207 211 208 212 … … 254 258 public : void genMealy_issue (void); 255 259 public : void genMealy_execute (void); 256 260 //public : void genMealy_insert (void); 257 261 #endif 258 262 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/include/Parameters.h
r120 r136 31 31 public : uint32_t * _front_end_nb_inst_branch_complete ;//[nb_front_end] 32 32 public : uint32_t * _ooo_engine_nb_inst_branch_complete ;//[nb_ooo_engine] 33 33 //public : uint32_t * _nb_inst_insert ;//[nb_ooo_engine] 34 34 public : uint32_t * _nb_inst_reexecute ;//[nb_ooo_engine] 35 35 public : uint32_t * _nb_inst_issue_queue ;//[nb_ooo_engine] … … 64 64 public : Tcontext_t ** _translate_num_ooo_engine_to_execute_loop_ooo_engine_id ;//[nb_ooo_engine][nb_execute_loop] 65 65 66 66 //public : uint32_t ** _execute_loop_nb_inst_insert ;//[nb_execute_loop][execute_loop_nb_ooo_engine] 67 67 public : uint32_t ** _execute_loop_nb_inst_issue_slot ;//[nb_execute_loop][execute_loop_nb_ooo_engine] 68 68 //public : uint32_t * _link_execute_loop_with_ooo_engine ;//[nb_ooo_engine] … … 73 73 public : uint32_t _max_nb_inst_execute ; 74 74 public : uint32_t _max_nb_write_unit ; 75 75 //public : uint32_t _max_nb_inst_insert ; 76 76 public : uint32_t _max_nb_inst_issue_queue ; 77 77 public : uint32_t _max_nb_inst_issue_slot ; … … 90 90 uint32_t * front_end_nb_inst_branch_complete ,//[nb_front_end] 91 91 uint32_t * ooo_engine_nb_inst_branch_complete ,//[nb_ooo_engine] 92 uint32_t * nb_inst_insert ,//[nb_ooo_engine]92 // uint32_t * nb_inst_insert ,//[nb_ooo_engine] 93 93 uint32_t * nb_inst_reexecute ,//[nb_ooo_engine] 94 94 uint32_t * nb_inst_issue_queue ,//[nb_ooo_engine] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp
r132 r136 174 174 << (*(in_ISSUE_OOO_ENGINE_TYPE [i][j])) 175 175 << (*(in_ISSUE_OOO_ENGINE_OPERATION [i][j])) 176 << (*(in_ISSUE_OOO_ENGINE_CANCEL [i][j])) 176 177 << (*(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [i][j])) 177 178 << (*(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ [i][j])) … … 224 225 // << (*(in_EXECUTE_EXECUTE_LOOP_OPERATION [i][j])) 225 226 // << (*(in_EXECUTE_EXECUTE_LOOP_TYPE [i][j])) 227 << (*(in_EXECUTE_EXECUTE_LOOP_CANCEL [i][j])) 226 228 << (*(in_EXECUTE_EXECUTE_LOOP_FLAGS [i][j])) 227 229 << (*(in_EXECUTE_EXECUTE_LOOP_EXCEPTION [i][j])) … … 243 245 # endif 244 246 245 log_printf(INFO,Core_Glue,FUNCTION,_("<%s> : Method - genMealy_insert"),_name.c_str());246 SC_METHOD (genMealy_insert);247 dont_initialize ();248 // sensitive << (*(in_CLOCK)).neg(); // don't need internal register249 sensitive << (*(in_NRESET));250 251 for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i)252 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j)253 sensitive << (*(in_INSERT_OOO_ENGINE_VAL [i][j]))254 << (*(in_INSERT_OOO_ENGINE_RD_USE [i][j]))255 << (*(in_INSERT_OOO_ENGINE_RD_NUM_REG [i][j]))256 << (*(in_INSERT_OOO_ENGINE_RE_USE [i][j]))257 << (*(in_INSERT_OOO_ENGINE_RE_NUM_REG [i][j]));258 for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)259 for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j)260 for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k)261 sensitive << (*(in_INSERT_EXECUTE_LOOP_ACK [i][j][k]));262 263 # ifdef SYSTEMCASS_SPECIFIC264 // List dependency information265 # endif247 // log_printf(INFO,Core_Glue,FUNCTION,_("<%s> : Method - genMealy_insert"),_name.c_str()); 248 // SC_METHOD (genMealy_insert); 249 // dont_initialize (); 250 // // sensitive << (*(in_CLOCK)).neg(); // don't need internal register 251 // sensitive << (*(in_NRESET)); 252 253 // for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i) 254 // for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) 255 // sensitive << (*(in_INSERT_OOO_ENGINE_VAL [i][j])) 256 // << (*(in_INSERT_OOO_ENGINE_RD_USE [i][j])) 257 // << (*(in_INSERT_OOO_ENGINE_RD_NUM_REG [i][j])) 258 // << (*(in_INSERT_OOO_ENGINE_RE_USE [i][j])) 259 // << (*(in_INSERT_OOO_ENGINE_RE_NUM_REG [i][j])); 260 // for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) 261 // for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) 262 // for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) 263 // sensitive << (*(in_INSERT_EXECUTE_LOOP_ACK [i][j][k])); 264 265 // # ifdef SYSTEMCASS_SPECIFIC 266 // // List dependency information 267 // # endif 266 268 267 269 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_allocation.cpp
r128 r136 140 140 _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); 141 141 _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); 142 _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); 142 143 _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); 143 144 _ALLOC2_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_ooo_engine,_param->_nb_inst_issue_queue[it1]); … … 171 172 _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); 172 173 _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); 174 _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); 173 175 _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); 174 176 _ALLOC2_SIGNAL_OUT(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_execute_loop,_param->_nb_read_unit[it1]); … … 202 204 // _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); 203 205 // _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); 206 _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); 204 207 _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); 205 208 _ALLOC3_SIGNAL_OUT(out_EXECUTE_OOO_ENGINE_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_ooo_engine,_param->_ooo_engine_nb_execute_loop[it1],_param->_nb_inst_execute[it1][it2]); … … 222 225 // _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); 223 226 // _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); 227 _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); 224 228 _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); 225 229 _ALLOC2_SIGNAL_IN ( in_EXECUTE_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_write_unit[it1]); … … 231 235 } 232 236 233 // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~234 {235 ALLOC2_INTERFACE_BEGIN("insert_ooo_engine",SOUTH,IN ,_("Insert"),_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);237 // // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 238 // { 239 // ALLOC2_INTERFACE_BEGIN("insert_ooo_engine",SOUTH,IN ,_("Insert"),_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 236 240 237 _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);238 _ALLOC2_SIGNAL_OUT(out_INSERT_OOO_ENGINE_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);239 _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);240 _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);241 _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);242 _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);243 244 ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]);245 }246 247 {248 ALLOC3_INTERFACE_BEGIN("insert_execute_loop",SOUTH,IN ,_("Insert"),_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);241 // _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 242 // _ALLOC2_SIGNAL_OUT(out_INSERT_OOO_ENGINE_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 243 // _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 244 // _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 245 // _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 246 // _ALLOC2_SIGNAL_IN ( in_INSERT_OOO_ENGINE_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 247 248 // ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert[it1]); 249 // } 250 251 // { 252 // ALLOC3_INTERFACE_BEGIN("insert_execute_loop",SOUTH,IN ,_("Insert"),_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 249 253 250 _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);251 _ALLOC3_SIGNAL_IN ( in_INSERT_EXECUTE_LOOP_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);252 _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);253 _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);254 _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);255 _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);256 257 ALLOC3_INTERFACE_END(_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]);258 }254 // _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_VAL ,"VAL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 255 // _ALLOC3_SIGNAL_IN ( in_INSERT_EXECUTE_LOOP_ACK ,"ACK" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 256 // _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 257 // _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RD_NUM_REG,"RD_NUM_REG",Tgeneral_address_t,_param->_size_general_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 258 // _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 259 // _ALLOC3_SIGNAL_OUT(out_INSERT_EXECUTE_LOOP_RE_NUM_REG,"RE_NUM_REG",Tspecial_address_t,_param->_size_special_register,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 260 261 // ALLOC3_INTERFACE_END(_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2]); 262 // } 259 263 260 264 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_deallocation.cpp
r122 r136 146 146 DELETE2_SIGNAL( in_EXECUTE_EXECUTE_LOOP_DATA ,_param->_nb_execute_loop,_param->_nb_write_unit[it1],_param->_size_general_data); 147 147 148 DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 );149 DELETE2_SIGNAL(out_INSERT_OOO_ENGINE_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 );150 DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 );151 DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_general_register);152 DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 );153 DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_special_register);148 // DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); 149 // DELETE2_SIGNAL(out_INSERT_OOO_ENGINE_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); 150 // DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); 151 // DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_general_register); 152 // DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],1 ); 153 // DELETE2_SIGNAL( in_INSERT_OOO_ENGINE_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert[it1],_param->_size_special_register); 154 154 155 DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_VAL ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 );156 DELETE3_SIGNAL( in_INSERT_EXECUTE_LOOP_ACK ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 );157 DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 );158 DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_general_register);159 DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 );160 DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_special_register);155 // DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_VAL ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); 156 // DELETE3_SIGNAL( in_INSERT_EXECUTE_LOOP_ACK ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); 157 // DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); 158 // DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RD_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_general_register); 159 // DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_USE ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],1 ); 160 // DELETE3_SIGNAL(out_INSERT_EXECUTE_LOOP_RE_NUM_REG ,_param->_nb_execute_loop,_param->_execute_loop_nb_ooo_engine[it1],_param->_execute_loop_nb_inst_insert[it1][it2],_param->_size_special_register); 161 161 } 162 162 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_execute.cpp
r123 r136 56 56 // PORT_WRITE(out_EXECUTE_OOO_ENGINE_TYPE [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_TYPE [i][j])); 57 57 // PORT_WRITE(out_EXECUTE_OOO_ENGINE_OPERATION [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_OPERATION [i][j])); 58 PORT_WRITE(out_EXECUTE_OOO_ENGINE_CANCEL [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_CANCEL [i][j])); 58 59 PORT_WRITE(out_EXECUTE_OOO_ENGINE_FLAGS [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_FLAGS [i][j])); 59 60 PORT_WRITE(out_EXECUTE_OOO_ENGINE_EXCEPTION [num_ooo_engine][num_execute_loop][j], PORT_READ(in_EXECUTE_EXECUTE_LOOP_EXCEPTION [i][j])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_insert.cpp
r123 r136 1 #ifdef SYSTEMC2 / *3 * $Id$4 *5 * [ Description ]6 *7 */1 // #ifdef SYSTEMC 2 // /* 3 // * $Id$ 4 // * 5 // * [ Description ] 6 // * 7 // */ 8 8 9 #include "Behavioural/Core/Core_Glue/include/Core_Glue.h"9 // #include "Behavioural/Core/Core_Glue/include/Core_Glue.h" 10 10 11 namespace morpheo {12 namespace behavioural {13 namespace core {14 namespace core_glue {11 // namespace morpheo { 12 // namespace behavioural { 13 // namespace core { 14 // namespace core_glue { 15 15 16 16 17 #undef FUNCTION18 #define FUNCTION "Core_Glue::genMealy_insert"19 void Core_Glue::genMealy_insert (void)20 {21 log_begin(Core_Glue,FUNCTION);22 log_function(Core_Glue,FUNCTION,_name.c_str());17 // #undef FUNCTION 18 // #define FUNCTION "Core_Glue::genMealy_insert" 19 // void Core_Glue::genMealy_insert (void) 20 // { 21 // log_begin(Core_Glue,FUNCTION); 22 // log_function(Core_Glue,FUNCTION,_name.c_str()); 23 23 24 if (PORT_READ(in_NRESET))25 {26 for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)27 for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j)28 {29 Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j];24 // if (PORT_READ(in_NRESET)) 25 // { 26 // for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) 27 // for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) 28 // { 29 // Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j]; 30 30 31 for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k)32 {33 log_printf(TRACE,Core_Glue,FUNCTION," * INSERT_OOO_ENGINE [%d][%d] <-> INSERT_EXECUTE_LOOP [%d][%d][%d]",num_ooo_engine,k,i,j,k);31 // for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) 32 // { 33 // log_printf(TRACE,Core_Glue,FUNCTION," * INSERT_OOO_ENGINE [%d][%d] <-> INSERT_EXECUTE_LOOP [%d][%d][%d]",num_ooo_engine,k,i,j,k); 34 34 35 Tcontrol_t ooo_engine_val = PORT_READ(in_INSERT_OOO_ENGINE_VAL [num_ooo_engine][k]);36 Tcontrol_t execute_loop_ack = PORT_READ(in_INSERT_EXECUTE_LOOP_ACK [i][j][k]);35 // Tcontrol_t ooo_engine_val = PORT_READ(in_INSERT_OOO_ENGINE_VAL [num_ooo_engine][k]); 36 // Tcontrol_t execute_loop_ack = PORT_READ(in_INSERT_EXECUTE_LOOP_ACK [i][j][k]); 37 37 38 Tcontrol_t execute_loop_val = ooo_engine_val ;39 Tcontrol_t ooo_engine_ack = execute_loop_ack;38 // Tcontrol_t execute_loop_val = ooo_engine_val ; 39 // Tcontrol_t ooo_engine_ack = execute_loop_ack; 40 40 41 log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_val (r) : %d",ooo_engine_val );42 log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_ack (w) : %d",ooo_engine_ack );43 log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_val (w) : %d",execute_loop_val);44 log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_ack (r) : %d",execute_loop_ack);41 // log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_val (r) : %d",ooo_engine_val ); 42 // log_printf(TRACE,Core_Glue,FUNCTION," * ooo_engine_ack (w) : %d",ooo_engine_ack ); 43 // log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_val (w) : %d",execute_loop_val); 44 // log_printf(TRACE,Core_Glue,FUNCTION," * execute_loop_ack (r) : %d",execute_loop_ack); 45 45 46 PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],ooo_engine_ack );47 PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],execute_loop_val);48 PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_USE [num_ooo_engine][k]));49 PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_NUM_REG [num_ooo_engine][k]));50 PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_USE [num_ooo_engine][k]));51 PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_NUM_REG [num_ooo_engine][k]));52 }53 }54 }55 else56 {57 for (uint32_t i=0; i<_param->_nb_execute_loop; ++i)58 for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j)59 {60 Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j];46 // PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],ooo_engine_ack ); 47 // PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],execute_loop_val); 48 // PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_USE [num_ooo_engine][k])); 49 // PORT_WRITE(out_INSERT_EXECUTE_LOOP_RD_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RD_NUM_REG [num_ooo_engine][k])); 50 // PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_USE [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_USE [num_ooo_engine][k])); 51 // PORT_WRITE(out_INSERT_EXECUTE_LOOP_RE_NUM_REG [i][j][k],PORT_READ(in_INSERT_OOO_ENGINE_RE_NUM_REG [num_ooo_engine][k])); 52 // } 53 // } 54 // } 55 // else 56 // { 57 // for (uint32_t i=0; i<_param->_nb_execute_loop; ++i) 58 // for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) 59 // { 60 // Tcontext_t num_ooo_engine = _param->_translate_execute_loop_num_ooo_engine [i][j]; 61 61 62 for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k)63 {64 PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],0);65 PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],0);66 }67 }68 }62 // for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert[i][j]; ++k) 63 // { 64 // PORT_WRITE(out_INSERT_OOO_ENGINE_ACK [num_ooo_engine][k],0); 65 // PORT_WRITE(out_INSERT_EXECUTE_LOOP_VAL [i][j][k],0); 66 // } 67 // } 68 // } 69 69 70 log_end(Core_Glue,FUNCTION);71 };70 // log_end(Core_Glue,FUNCTION); 71 // }; 72 72 73 }; // end namespace core_glue74 }; // end namespace core73 // }; // end namespace core_glue 74 // }; // end namespace core 75 75 76 }; // end namespace behavioural77 }; // end namespace morpheo78 #endif76 // }; // end namespace behavioural 77 // }; // end namespace morpheo 78 // #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue_genMealy_issue.cpp
r123 r136 197 197 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_OPERATION [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_OPERATION [num_ooo_engine][num_inst_issue_queue])); 198 198 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_TYPE [num_execute_loop][num_read_unit],type); 199 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_CANCEL [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_CANCEL [num_ooo_engine][num_inst_issue_queue])); 199 200 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_WRITE [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_WRITE [num_ooo_engine][num_inst_issue_queue])); 200 201 PORT_WRITE(out_ISSUE_EXECUTE_LOOP_STORE_QUEUE_PTR_READ [num_execute_loop][num_read_unit],PORT_READ(in_ISSUE_OOO_ENGINE_STORE_QUEUE_PTR_READ [num_ooo_engine][num_inst_issue_queue])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Parameters.cpp
r120 r136 29 29 uint32_t * front_end_nb_inst_branch_complete ,//[nb_front_end] 30 30 uint32_t * ooo_engine_nb_inst_branch_complete ,//[nb_ooo_engine] 31 31 // uint32_t * nb_inst_insert ,//[nb_ooo_engine] 32 32 uint32_t * nb_inst_reexecute ,//[nb_ooo_engine] 33 33 uint32_t * nb_inst_issue_queue ,//[nb_ooo_engine] … … 66 66 _front_end_nb_inst_branch_complete = front_end_nb_inst_branch_complete ; 67 67 _ooo_engine_nb_inst_branch_complete = ooo_engine_nb_inst_branch_complete ; 68 68 // _nb_inst_insert = nb_inst_insert ; 69 69 _nb_inst_reexecute = nb_inst_reexecute ; 70 70 _nb_inst_issue_queue = nb_inst_issue_queue ; … … 117 117 } 118 118 119 119 // ALLOC2(_execute_loop_nb_inst_insert,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 120 120 ALLOC2(_execute_loop_nb_inst_issue_slot ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 121 121 … … 125 125 uint32_t num_ooo_engine = _translate_execute_loop_num_ooo_engine [i][j]; 126 126 _execute_loop_nb_inst_issue_slot [i][j] = _nb_inst_issue_slot [num_ooo_engine]; 127 127 // _execute_loop_nb_inst_insert [i][j] = _nb_inst_insert [num_ooo_engine]; 128 128 } 129 129 … … 133 133 _max_nb_inst_execute = max<uint32_t>(_nb_inst_execute ,_nb_ooo_engine, _ooo_engine_nb_execute_loop); 134 134 _max_nb_write_unit = max<uint32_t>(_nb_write_unit ,_nb_execute_loop); 135 135 // _max_nb_inst_insert = max<uint32_t>(_nb_inst_insert ,_nb_ooo_engine); 136 136 _max_nb_inst_issue_queue = max<uint32_t>(_nb_inst_issue_queue ,_nb_ooo_engine); 137 137 _max_nb_inst_issue_slot = max<uint32_t>(_nb_inst_issue_slot ,_nb_ooo_engine); … … 189 189 190 190 DELETE2(_execute_loop_nb_inst_issue_slot ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 191 191 // DELETE2(_execute_loop_nb_inst_insert ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 192 192 DELETE2(_translate_num_ooo_engine_to_execute_loop_ooo_engine_id ,_nb_ooo_engine,_nb_execute_loop); 193 193 DELETE2(_translate_num_execute_loop_to_ooo_engine_execute_loop_id,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Execute_loop_Glue.h
r88 r136 102 102 public : SC_OUT(Tspecial_address_t) ** out_SPR_WRITE_READ_UNIT_NUM_REG ; 103 103 public : SC_OUT(Tspecial_data_t ) ** out_SPR_WRITE_READ_UNIT_DATA ; 104 105 // -----[ Interface "issue" ]----------------------------------------- 106 public : SC_IN (Tcontrol_t ) ** in_ISSUE_VAL ; 107 public : SC_OUT(Tcontrol_t ) ** out_ISSUE_ACK ; 108 109 public : SC_OUT(Tcontrol_t ) ** out_ISSUE_READ_UNIT_VAL ; 110 public : SC_IN (Tcontrol_t ) ** in_ISSUE_READ_UNIT_ACK ; 111 112 public : SC_OUT(Tcontrol_t ) ** out_ISSUE_REGISTER_UNIT_VAL ; 113 public : SC_IN (Tcontrol_t ) ** in_ISSUE_REGISTER_UNIT_ACK ; 104 114 105 115 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 144 154 public : void genMealy_gpr_write (void); 145 155 public : void genMealy_spr_write (void); 156 public : void genMealy_issue (void); 146 157 #endif 147 158 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/include/Parameters.h
r88 r136 25 25 public : uint32_t _nb_gpr_write ; 26 26 public : uint32_t _nb_spr_write ; 27 public : uint32_t _nb_inst_issue ; 27 28 //public : uint32_t _size_ooo_engine_id ; 28 29 //public : uint32_t _size_general_register ; … … 36 37 public : Parameters (uint32_t nb_gpr_write , 37 38 uint32_t nb_spr_write , 39 uint32_t nb_inst_issue , 38 40 uint32_t size_ooo_engine_id , 39 41 uint32_t size_general_register , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue.cpp
r132 r136 166 166 } 167 167 # endif 168 169 log_printf(INFO,Execute_loop_Glue,FUNCTION,_("<%s> : Method - genMealy_issue"),_name.c_str()); 170 171 SC_METHOD (genMealy_issue); 172 dont_initialize (); 173 // sensitive << (*(in_CLOCK)).neg();// don't need internal register 174 for (uint32_t i=0; i<_param->_nb_inst_issue; ++i) 175 sensitive << (*(in_ISSUE_VAL [i])) 176 << (*(in_ISSUE_READ_UNIT_ACK [i])) 177 << (*(in_ISSUE_REGISTER_UNIT_ACK [i])); 178 179 # ifdef SYSTEMCASS_SPECIFIC 180 // List dependency information 181 # endif 168 182 169 183 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Execute_loop_Glue_allocation.cpp
r112 r136 132 132 } 133 133 134 // -----[ Interface "issue" ]----------------------------------------- 135 { 136 ALLOC1_INTERFACE_BEGIN("issue",IN,WEST, _("Issue"), _param->_nb_inst_issue); 137 138 ALLOC1_SIGNAL_IN ( in_ISSUE_VAL ,"val" ,Tcontrol_t,1); 139 ALLOC1_SIGNAL_OUT(out_ISSUE_ACK ,"ack" ,Tcontrol_t,1); 140 ALLOC1_SIGNAL_OUT(out_ISSUE_READ_UNIT_VAL ,"read_unit_val" ,Tcontrol_t,1); 141 ALLOC1_SIGNAL_IN ( in_ISSUE_READ_UNIT_ACK ,"read_unit_ack" ,Tcontrol_t,1); 142 ALLOC1_SIGNAL_OUT(out_ISSUE_REGISTER_UNIT_VAL,"register_unit_val",Tcontrol_t,1); 143 ALLOC1_SIGNAL_IN ( in_ISSUE_REGISTER_UNIT_ACK,"register_unit_ack",Tcontrol_t,1); 144 145 ALLOC1_INTERFACE_END(_param->_nb_inst_issue); 146 } 147 134 148 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 135 149 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters.cpp
r88 r136 20 20 Parameters::Parameters (uint32_t nb_gpr_write , 21 21 uint32_t nb_spr_write , 22 uint32_t nb_inst_issue , 22 23 uint32_t size_ooo_engine_id , 23 24 uint32_t size_general_register , … … 31 32 _nb_gpr_write = nb_gpr_write ; 32 33 _nb_spr_write = nb_spr_write ; 34 _nb_inst_issue = nb_inst_issue ; 33 35 // _size_ooo_engine_id = size_ooo_engine_id ; 34 36 // _size_general_register = size_general_register ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/src/Parameters_print.cpp
r88 r136 28 28 xml.singleton_begin("nb_gpr_write "); xml.attribut("value",toString(_nb_gpr_write )); xml.singleton_end(); 29 29 xml.singleton_begin("nb_spr_write "); xml.attribut("value",toString(_nb_spr_write )); xml.singleton_end(); 30 xml.singleton_begin("nb_inst_issue "); xml.attribut("value",toString(_nb_inst_issue )); xml.singleton_end(); 30 31 xml.singleton_begin("size_ooo_engine_id "); xml.attribut("value",toString(_size_ooo_engine_id )); xml.singleton_end(); 31 32 xml.singleton_begin("size_general_register"); xml.attribut("value",toString(_size_general_register)); xml.singleton_end(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h
r128 r136 52 52 Toperation_t _operation ; 53 53 Ttype_t _type ; 54 Tcontrol_t _cancel ; 54 55 Tcontrol_t _has_immediat; 55 56 Tgeneral_data_t _immediat ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h
r122 r136 84 84 public : SC_IN (Toperation_t ) * in_EXECUTE_IN_OPERATION ; 85 85 public : SC_IN (Ttype_t ) * in_EXECUTE_IN_TYPE ; 86 public : SC_IN (Tcontrol_t ) * in_EXECUTE_IN_CANCEL ; 86 87 public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE; 87 88 public : SC_IN (Tlsq_ptr_t ) * in_EXECUTE_IN_STORE_QUEUE_PTR_READ ; … … 107 108 //public : SC_OUT(Toperation_t ) * out_EXECUTE_OUT_OPERATION ; 108 109 //public : SC_OUT(Ttype_t ) * out_EXECUTE_OUT_TYPE ; 110 public : SC_OUT(Tcontrol_t ) * out_EXECUTE_OUT_CANCEL ; 109 111 public : SC_OUT(Tcontrol_t ) * out_EXECUTE_OUT_WRITE_RD ; 110 112 public : SC_OUT(Tgeneral_address_t) * out_EXECUTE_OUT_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_allocation.cpp
r122 r136 62 62 ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_OPERATION ,"operation" ,Toperation_t , _param->_size_operation ); 63 63 ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_TYPE ,"type" ,Ttype_t , _param->_size_type ); 64 ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_CANCEL ,"cancel" ,Tcontrol_t , 1); 64 65 ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); 65 66 ALLOC0_SIGNAL_IN ( in_EXECUTE_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); … … 90 91 //ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 91 92 //ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 93 ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); 92 94 ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1); 93 95 ALLOC0_SIGNAL_OUT(out_EXECUTE_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_deallocation.cpp
r128 r136 38 38 DELETE0_SIGNAL( in_EXECUTE_IN_OPERATION ,_param->_size_operation ); 39 39 DELETE0_SIGNAL( in_EXECUTE_IN_TYPE ,_param->_size_type ); 40 DELETE0_SIGNAL( in_EXECUTE_IN_CANCEL ,1); 40 41 DELETE0_SIGNAL( in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE ,_param->_size_store_queue_ptr); 41 42 DELETE0_SIGNAL( in_EXECUTE_IN_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr); … … 60 61 //DELETE0_SIGNAL(out_EXECUTE_OUT_OPERATION ,_param->_size_operation ); 61 62 //DELETE0_SIGNAL(out_EXECUTE_OUT_TYPE ,_param->_size_type ); 63 DELETE0_SIGNAL(out_EXECUTE_OUT_CANCEL ,1); 62 64 DELETE0_SIGNAL(out_EXECUTE_OUT_WRITE_RD ,1); 63 65 DELETE0_SIGNAL(out_EXECUTE_OUT_NUM_REG_RD ,_param->_size_general_register); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp
r123 r136 38 38 // PORT_WRITE(out_EXECUTE_OUT_OPERATION ,_execute_operation_out->_operation ); 39 39 // PORT_WRITE(out_EXECUTE_OUT_TYPE ,_execute_operation_out->_type ); 40 PORT_WRITE(out_EXECUTE_OUT_CANCEL ,_execute_operation_out->_cancel ); 40 41 PORT_WRITE(out_EXECUTE_OUT_WRITE_RD ,_execute_operation_out->_write_rd ); 41 42 PORT_WRITE(out_EXECUTE_OUT_NUM_REG_RD ,_execute_operation_out->_num_reg_rd ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp
r134 r136 55 55 // _execute_operation_out->_operation = 0; // not necessary 56 56 // _execute_operation_out->_type = 0; // not necessary 57 _execute_operation_out->_cancel = 0; // not necessary 57 58 _execute_operation_out->_write_rd = 0; // not necessary 58 59 _execute_operation_out->_num_reg_rd = 0; // not necessary … … 88 89 _execute_operation_out->_operation = _execute_operation_in->_operation ; 89 90 _execute_operation_out->_type = _execute_operation_in->_type ; 91 _execute_operation_out->_cancel = _execute_operation_in->_cancel ; 90 92 _execute_operation_out->_has_immediat = _execute_operation_in->_has_immediat ; 91 93 _execute_operation_out->_immediat = _execute_operation_in->_immediat ; … … 130 132 Toperation_t operation = PORT_READ(in_EXECUTE_IN_OPERATION); 131 133 Ttype_t type = PORT_READ(in_EXECUTE_IN_TYPE); 134 Tcontrol_t cancel = PORT_READ(in_EXECUTE_IN_CANCEL); 132 135 133 136 execute_operation->_context_id = context_id ; … … 137 140 execute_operation->_operation = operation ; 138 141 execute_operation->_type = type ; 142 execute_operation->_cancel = cancel ; 139 143 execute_operation->_has_immediat = PORT_READ(in_EXECUTE_IN_HAS_IMMEDIAT); 140 144 execute_operation->_immediat = PORT_READ(in_EXECUTE_IN_IMMEDIAT ); … … 158 162 log_printf(TRACE,Functionnal_unit,FUNCTION," * operation : %d",execute_operation->_operation ); 159 163 log_printf(TRACE,Functionnal_unit,FUNCTION," * type : %s",toString(execute_operation->_type).c_str()); 164 log_printf(TRACE,Functionnal_unit,FUNCTION," * cancel : %d",execute_operation->_cancel ); 160 165 log_printf(TRACE,Functionnal_unit,FUNCTION," * has_immediat : %d",execute_operation->_has_immediat ); 161 166 log_printf(TRACE,Functionnal_unit,FUNCTION," * immediat : %.8x",execute_operation->_immediat ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h
r131 r136 104 104 public : SC_IN (Toperation_t ) ** in_MEMORY_IN_OPERATION ;//[nb_inst_memory] 105 105 public : SC_IN (Ttype_t ) ** in_MEMORY_IN_TYPE ;//[nb_inst_memory] 106 public : SC_IN (Tcontrol_t ) ** in_MEMORY_IN_CANCEL ;//[nb_inst_memory] 106 107 public : SC_IN (Tlsq_ptr_t ) ** in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;//[nb_inst_memory] 107 108 public : SC_IN (Tlsq_ptr_t ) ** in_MEMORY_IN_STORE_QUEUE_PTR_READ ;//[nb_inst_memory] … … 127 128 //public : SC_OUT(Toperation_t ) ** out_MEMORY_OUT_OPERATION ;//[nb_inst_memory] 128 129 //public : SC_OUT(Ttype_t ) ** out_MEMORY_OUT_TYPE ;//[nb_inst_memory] 130 public : SC_OUT(Tcontrol_t ) ** out_MEMORY_OUT_CANCEL ;//[nb_inst_memory] 129 131 public : SC_OUT(Tcontrol_t ) ** out_MEMORY_OUT_WRITE_RD ;//[nb_inst_memory] // = (operation==load) 130 132 public : SC_OUT(Tgeneral_address_t) ** out_MEMORY_OUT_NUM_REG_RD ;//[nb_inst_memory] // destination (load) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h
r122 r136 67 67 public : Tpacket_t _packet_id ; 68 68 public : Toperation_t _operation ; 69 public : Tcontrol_t _cancel ; 69 70 public : Tlsq_ptr_t _load_queue_ptr_write; 70 71 public : Tdcache_address_t _address ; … … 80 81 << " * packet : " << toString(x._packet_id) << std::endl 81 82 << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl 82 << " * operation : " << toString(x._operation) << std::endl83 << " * operation, cancel : " << toString(x._operation) << " - " << toString(x._cancel) << std::endl 83 84 << " * load_ptr : " << toString(x._load_queue_ptr_write) << std::endl 84 85 << " * exception : " << toString(x._exception) << std::endl … … 111 112 public : Tpacket_t _packet_id ; 112 113 public : Toperation_t _operation ; 114 public : Tcontrol_t _cancel ; 113 115 public : Tlsq_ptr_t _load_queue_ptr_write ; 114 116 public : Tlsq_ptr_t _store_queue_ptr_write; … … 125 127 << " * packet : " << toString(x._packet_id) << std::endl 126 128 << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl 127 << " * operation : " << toString(x._operation) << std::endl129 << " * operation, cancel : " << toString(x._operation) << " - " << toString(x._cancel) << std::endl 128 130 << " * load, store ptr_(write/read) empty: " << toString(x._load_queue_ptr_write) << " - " << toString(x._store_queue_ptr_write) << " - " << toString(x._store_queue_ptr_read) << " - " << toString(x._store_queue_empty) << std::endl 129 131 << " * exception : " << toString(x._exception) << std::endl … … 168 170 public : Tpacket_t _packet_id ; 169 171 public : Toperation_t _operation ; 172 public : Tcontrol_t _cancel ; 170 173 public : Tlsq_ptr_t _store_queue_ptr_write; 171 174 public : Tlsq_ptr_t _store_queue_ptr_read ; … … 187 190 << " * packet : " << toString(x._packet_id) << std::endl 188 191 << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl 189 << " * operation : " << toString(x._operation) << std::endl192 << " * operation, cancel : " << toString(x._operation) << " - " << toString(x._cancel) << std::endl 190 193 << " * store_queue ptr_(write,read) empty: " << toString(x._store_queue_ptr_write) << " - " << toString(x._store_queue_ptr_read) << " - " << toString(x._store_queue_empty) <<std::endl 191 194 << " * exception : " << toString(x._exception) << std::endl -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
r134 r136 65 65 ALLOC1_SIGNAL_IN ( in_MEMORY_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 66 66 ALLOC1_SIGNAL_IN ( in_MEMORY_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 67 ALLOC1_SIGNAL_IN ( in_MEMORY_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 67 68 ALLOC1_SIGNAL_IN ( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ); 68 69 ALLOC1_SIGNAL_IN ( in_MEMORY_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); … … 94 95 // ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 95 96 // ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 97 ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 96 98 ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 97 99 ALLOC1_SIGNAL_OUT(out_MEMORY_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp
r134 r136 44 44 DELETE1_SIGNAL( in_MEMORY_IN_OPERATION ,_param->_nb_inst_memory,_param->_size_operation ); 45 45 DELETE1_SIGNAL( in_MEMORY_IN_TYPE ,_param->_nb_inst_memory,_param->_size_type ); 46 DELETE1_SIGNAL( in_MEMORY_IN_CANCEL ,_param->_nb_inst_memory,1); 46 47 DELETE1_SIGNAL( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_memory,_param->_size_store_queue_ptr ); 47 48 DELETE1_SIGNAL( in_MEMORY_IN_STORE_QUEUE_PTR_READ ,_param->_nb_inst_memory,_param->_size_store_queue_ptr ); … … 66 67 // DELETE1_SIGNAL(out_MEMORY_OUT_OPERATION ,_param->_nb_inst_memory,_param->_size_operation ); 67 68 // DELETE1_SIGNAL(out_MEMORY_OUT_TYPE ,_param->_nb_inst_memory,_param->_size_type ); 69 DELETE1_SIGNAL(out_MEMORY_OUT_CANCEL ,_param->_nb_inst_memory,1 ); 68 70 DELETE1_SIGNAL(out_MEMORY_OUT_WRITE_RD ,_param->_nb_inst_memory,1 ); 69 71 DELETE1_SIGNAL(out_MEMORY_OUT_NUM_REG_RD ,_param->_nb_inst_memory,_param->_size_general_register ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
r123 r136 35 35 Tcontext_t memory_out_ooo_engine_id = 0; 36 36 Tpacket_t memory_out_packet_id = 0; 37 Tcontrol_t memory_out_cancel = 0; 37 38 Tcontrol_t memory_out_write_rd = 0; 38 39 Tgeneral_address_t memory_out_num_reg_rd = 0; … … 67 68 memory_out_ooo_engine_id = _load_queue [internal_MEMORY_OUT_PTR]._ooo_engine_id; 68 69 memory_out_packet_id = _load_queue [internal_MEMORY_OUT_PTR]._packet_id ; 70 memory_out_cancel = _load_queue [internal_MEMORY_OUT_PTR]._cancel ; 69 71 memory_out_write_rd = _load_queue [internal_MEMORY_OUT_PTR]._write_rd ; 70 72 memory_out_num_reg_rd = _load_queue [internal_MEMORY_OUT_PTR]._num_reg_rd; … … 130 132 memory_out_ooo_engine_id = _store_queue [internal_MEMORY_OUT_PTR]._ooo_engine_id; 131 133 memory_out_packet_id = _store_queue [internal_MEMORY_OUT_PTR]._packet_id ; 134 memory_out_cancel = _store_queue [internal_MEMORY_OUT_PTR]._cancel; 132 135 // memory_out_write_rd 133 136 // memory_out_num_reg_rd … … 152 155 // PORT_WRITE(out_MEMORY_OUT_OPERATION [0], memory_out_operation ); 153 156 // PORT_WRITE(out_MEMORY_OUT_TYPE [0], TYPE_MEMORY ); 157 PORT_WRITE(out_MEMORY_OUT_CANCEL [0], memory_out_cancel ); 154 158 PORT_WRITE(out_MEMORY_OUT_WRITE_RD [0], memory_out_write_rd ); 155 159 PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD [0], memory_out_num_reg_rd ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r134 r136 251 251 _store_queue [i]._packet_id = 0; // not necessary 252 252 _store_queue [i]._operation = 0; // not necessary 253 _store_queue [i]._cancel = 0; // not necessary 253 254 _store_queue [i]._load_queue_ptr_write = 0; // not necessary 254 255 _store_queue [i]._address = 0; // not necessary … … 268 269 _load_queue [i]._packet_id = 0; // not necessary 269 270 _load_queue [i]._operation = 0; // not necessary 271 _load_queue [i]._cancel = 0; // not necessary 270 272 _load_queue [i]._store_queue_ptr_write = 0; // not necessary 271 273 _load_queue [i]._store_queue_ptr_read = 0; // not necessary … … 291 293 _speculative_access_queue [i]._packet_id = 0; // not necessary 292 294 _speculative_access_queue [i]._operation = 0; // not necessary 295 _speculative_access_queue [i]._cancel = 0; // not necessary 293 296 _speculative_access_queue [i]._load_queue_ptr_write = 0; // not necessary 294 297 _speculative_access_queue [i]._store_queue_ptr_write = 0; // not necessary … … 815 818 #endif 816 819 Toperation_t operation = PORT_READ(in_MEMORY_IN_OPERATION[internal_MEMORY_IN_PORT]); 820 Tcontrol_t cancel = PORT_READ(in_MEMORY_IN_CANCEL [internal_MEMORY_IN_PORT]); 817 821 Tgeneral_data_t address = (PORT_READ(in_MEMORY_IN_IMMEDIAT[internal_MEMORY_IN_PORT]) + 818 822 PORT_READ(in_MEMORY_IN_DATA_RA [internal_MEMORY_IN_PORT])); … … 925 929 _store_queue [index]._packet_id = (not _param->_have_port_rob_ptr )?0:PORT_READ(in_MEMORY_IN_PACKET_ID [internal_MEMORY_IN_PORT]); 926 930 _store_queue [index]._operation = operation; 931 _store_queue [index]._cancel = cancel ; 927 932 _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]); 928 933 _store_queue [index]._address = address; … … 965 970 966 971 _speculative_access_queue [index]._operation = operation; 972 _speculative_access_queue [index]._cancel = cancel ; 967 973 _speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]); 968 974 _speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE[internal_MEMORY_IN_PORT]); … … 1094 1100 _load_queue [ptr_write]._packet_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._packet_id; 1095 1101 _load_queue [ptr_write]._operation = operation; 1102 _load_queue [ptr_write]._cancel = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._cancel; 1096 1103 _load_queue [ptr_write]._store_queue_ptr_write = store_queue_ptr_write; 1097 1104 _load_queue [ptr_write]._store_queue_ptr_read = store_queue_ptr_read ; … … 1286 1293 uint32_t j = (reg_STORE_QUEUE_PTR_READ+i)%_param->_size_store_queue; 1287 1294 1288 log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d , %.4d, %.8x %.8x, %.2d %.1d, %.2d %s",1295 log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d %.1d, %.4d, %.8x %.8x, %.2d %.1d, %.2d %s", 1289 1296 j, 1290 1297 _store_queue[j]._context_id , … … 1293 1300 _store_queue[j]._packet_id , 1294 1301 _store_queue[j]._operation , 1302 _store_queue[j]._cancel , 1295 1303 _store_queue[j]._load_queue_ptr_write, 1296 1304 _store_queue[j]._address , … … 1311 1319 uint32_t j = (*_speculative_access_queue_control)[i]; 1312 1320 1313 log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d , %.4d %.4d %.4d %.1d, %.8x, %.1d %.4d, %.2d, %s",1321 log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d %.1d, %.4d %.4d %.4d %.1d, %.8x, %.1d %.4d, %.2d, %s", 1314 1322 j, 1315 1323 _speculative_access_queue[j]._context_id , … … 1318 1326 _speculative_access_queue[j]._packet_id , 1319 1327 _speculative_access_queue[j]._operation , 1328 _speculative_access_queue[j]._cancel , 1320 1329 _speculative_access_queue[j]._load_queue_ptr_write, 1321 1330 _speculative_access_queue[j]._store_queue_ptr_write, … … 1337 1346 uint32_t j = i; 1338 1347 1339 log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d , %.4d %.4d %.1d, %.8x %.1x %.1d %.2d %.1d %.2d, %.8x, %.1d %.4d, %.2d, %s",1348 log_printf(TRACE,Load_store_unit,FUNCTION," [%.4d] %.4d %.4d %.4d, %.4d, %.4d %.1d, %.4d %.4d %.1d, %.8x %.1x %.1d %.2d %.1d %.2d, %.8x, %.1d %.4d, %.2d, %s", 1340 1349 j, 1341 1350 _load_queue[j]._context_id , … … 1344 1353 _load_queue[j]._packet_id , 1345 1354 _load_queue[j]._operation , 1355 _load_queue[j]._cancel , 1346 1356 _load_queue[j]._store_queue_ptr_write, 1347 1357 _load_queue[j]._store_queue_ptr_read , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Read_queue.h
r122 r136 72 72 public : SC_IN (Toperation_t ) * in_READ_QUEUE_IN_OPERATION ; 73 73 public : SC_IN (Ttype_t ) * in_READ_QUEUE_IN_TYPE ; 74 public : SC_IN (Tcontrol_t ) * in_READ_QUEUE_IN_CANCEL ; 74 75 public : SC_IN (Tlsq_ptr_t ) * in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE; 75 76 public : SC_IN (Tlsq_ptr_t ) * in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ; … … 99 100 public : SC_OUT(Toperation_t ) * out_READ_QUEUE_OUT_OPERATION ; 100 101 public : SC_OUT(Ttype_t ) * out_READ_QUEUE_OUT_TYPE ; 102 public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_CANCEL ; 101 103 public : SC_OUT(Tlsq_ptr_t ) * out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE; 102 104 public : SC_OUT(Tlsq_ptr_t ) * out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ ; … … 105 107 public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_HAS_IMMEDIAT ; 106 108 public : SC_OUT(Tgeneral_data_t ) * out_READ_QUEUE_OUT_IMMEDIAT ; 107 // 109 //public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RA ; 108 110 public : SC_OUT(Tgeneral_address_t) * out_READ_QUEUE_OUT_NUM_REG_RA ; 109 111 public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_DATA_RA_VAL ; 110 112 public : SC_OUT(Tgeneral_data_t ) * out_READ_QUEUE_OUT_DATA_RA ; 111 // 113 //public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RB ; 112 114 public : SC_OUT(Tgeneral_address_t) * out_READ_QUEUE_OUT_NUM_REG_RB ; 113 115 public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_DATA_RB_VAL ; 114 116 public : SC_OUT(Tgeneral_data_t ) * out_READ_QUEUE_OUT_DATA_RB ; 115 // 117 //public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_READ_RC ; 116 118 public : SC_OUT(Tspecial_address_t) * out_READ_QUEUE_OUT_NUM_REG_RC ; 117 119 public : SC_OUT(Tcontrol_t ) * out_READ_QUEUE_OUT_DATA_RC_VAL ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h
r122 r136 28 28 public : Toperation_t _operation ; 29 29 public : Ttype_t _type ; 30 public : Tcontrol_t _cancel ; 30 31 public : Tlsq_ptr_t _store_queue_ptr_write; 31 32 public : Tlsq_ptr_t _store_queue_ptr_read ; … … 54 55 << " * _operation : " << toString(x._operation ) << std::endl 55 56 << " * _type : " << toString(x._type ) << std::endl 57 << " * _cancel : " << toString(x._cancel ) << std::endl 56 58 << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl 57 59 << " * _store_queue_ptr_read : " << toString(x._store_queue_ptr_read ) << std::endl … … 84 86 public : Toperation_t _operation ; 85 87 public : Ttype_t _type ; 88 public : Tcontrol_t _cancel ; 86 89 public : Tlsq_ptr_t _store_queue_ptr_write; 87 90 public : Tlsq_ptr_t _store_queue_ptr_read ; … … 122 125 _operation = x._operation ; 123 126 _type = x._type ; 127 _cancel = x._cancel ; 124 128 _store_queue_ptr_write = x._store_queue_ptr_write; 125 129 _store_queue_ptr_read = x._store_queue_ptr_read ; … … 164 168 << " * _operation : " << x._operation << std::endl 165 169 << " * _type : " << x._type << std::endl 170 << " * _cancel : " << x._cancel << std::endl 166 171 << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl 167 172 << " * _store_queue_ptr_read : " << toString(x._store_queue_ptr_read ) << std::endl -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue.cpp
r132 r136 18 18 19 19 20 #undef FUNCTION 21 #define FUNCTION "Read_queue::Read_queue" 20 22 Read_queue::Read_queue 21 23 ( … … 34 36 ,_usage (usage) 35 37 { 36 log_printf(FUNC,Read_queue, "Read_queue","Begin");38 log_printf(FUNC,Read_queue,FUNCTION,_("<%s> Begin"),_name.c_str()); 37 39 38 40 // #if DEBUG_Read_queue == true … … 43 45 44 46 #ifdef SYSTEMC 45 log_printf(INFO,Read_queue, "Read_queue","Allocation");47 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Allocation"),_name.c_str()); 46 48 47 49 allocation (); … … 51 53 if (usage_is_set(_usage,USE_STATISTICS)) 52 54 { 53 log_printf(INFO,Read_queue,FUNCTION, "Allocation of statistics");55 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); 54 56 55 57 statistics_declaration(param_statistics); … … 61 63 { 62 64 // generate the vhdl 63 log_printf(INFO,Read_queue, "Read_queue","Generate the vhdl");65 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 64 66 65 67 vhdl(); … … 70 72 if (usage_is_set(_usage,USE_SYSTEMC)) 71 73 { 72 log_printf(INFO,Read_queue, "Read_queue","Method - transition");74 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 73 75 74 76 SC_METHOD (transition); … … 76 78 sensitive << (*(in_CLOCK)).pos(); 77 79 78 log_printf(INFO,Read_queue, "Read_queue","Method - genMoore");80 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMoore"),_name.c_str()); 79 81 80 82 SC_METHOD (genMoore); … … 82 84 sensitive << (*(in_CLOCK)).neg(); 83 85 84 log_printf(INFO,Read_queue, "Read_queue","Method - genMealy_read_queue_out_val");86 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMealy_read_queue_out_val"),_name.c_str()); 85 87 86 88 SC_METHOD (genMealy_read_queue_out_val); … … 130 132 #endif 131 133 132 log_printf(INFO,Read_queue, "Read_queue","Method - genMealy_read_queue_out_gpr");134 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMealy_read_queue_out_gpr"),_name.c_str()); 133 135 134 136 SC_METHOD (genMealy_read_queue_out_gpr); … … 183 185 #endif 184 186 185 log_printf(INFO,Read_queue, "Read_queue","Method - genMealy_read_queue_out_spr");187 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Method - genMealy_read_queue_out_spr"),_name.c_str()); 186 188 187 189 SC_METHOD (genMealy_read_queue_out_spr); … … 225 227 } 226 228 #endif 227 log_printf(FUNC,Read_queue, "Read_queue","End");229 log_printf(FUNC,Read_queue,FUNCTION,_("<%s> End"),_name.c_str()); 228 230 }; 229 231 232 #undef FUNCTION 233 #define FUNCTION "Read_queue::~Read_queue" 230 234 Read_queue::~Read_queue (void) 231 235 { 232 log_printf(FUNC,Read_queue, "~Read_queue","Begin");236 log_printf(FUNC,Read_queue,FUNCTION,_("<%s> Begin"),_name.c_str()); 233 237 234 238 #ifdef STATISTICS 235 239 if (usage_is_set(_usage,USE_STATISTICS)) 236 240 { 237 log_printf(INFO,Read_queue, "~Read_queue","Generate Statistics file");241 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 238 242 239 243 delete _stat; … … 242 246 243 247 #ifdef SYSTEMC 244 log_printf(INFO,Read_queue, "~Read_queue","Deallocation");248 log_printf(INFO,Read_queue,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 245 249 246 250 deallocation (); 247 251 #endif 248 252 249 log_printf(FUNC,Read_queue, "~Read_queue","End");253 log_printf(FUNC,Read_queue,FUNCTION,_("<%s> End"),_name.c_str()); 250 254 }; 251 255 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp
r135 r136 61 61 ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 62 62 ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 63 ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_CANCEL ,"cancel" ,Tcontrol_t ,1); 63 64 ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); 64 65 ALLOC0_SIGNAL_IN ( in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); … … 93 94 ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 94 95 ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 96 ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); 95 97 ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t , _param->_size_store_queue_ptr ); 96 98 ALLOC0_SIGNAL_OUT(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t , _param->_size_store_queue_ptr ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp
r128 r136 37 37 DELETE0_SIGNAL( in_READ_QUEUE_IN_OPERATION ,_param->_size_operation ); 38 38 DELETE0_SIGNAL( in_READ_QUEUE_IN_TYPE ,_param->_size_type ); 39 DELETE0_SIGNAL( in_READ_QUEUE_IN_CANCEL ,1 ); 39 40 DELETE0_SIGNAL( in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE ,_param->_size_store_queue_ptr ); 40 41 DELETE0_SIGNAL( in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr ); … … 62 63 DELETE0_SIGNAL(out_READ_QUEUE_OUT_OPERATION ,_param->_size_operation ); 63 64 DELETE0_SIGNAL(out_READ_QUEUE_OUT_TYPE ,_param->_size_type ); 65 DELETE0_SIGNAL(out_READ_QUEUE_OUT_CANCEL ,1 ); 64 66 DELETE0_SIGNAL(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_size_store_queue_ptr ); 65 67 DELETE0_SIGNAL(out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_gpr.cpp
r123 r136 27 27 if (PORT_READ(in_NRESET)) 28 28 { 29 30 // Tcontrol_t cancel = _queue_head->_cancel; 31 29 32 internal_READ_QUEUE_OUT_DATA_RA_VAL = (// Previous value 30 33 _queue_head->_data_ra_val or … … 36 39 37 40 log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RA_VAL : %d",internal_READ_QUEUE_OUT_DATA_RA_VAL); 41 log_printf(TRACE,Read_queue,FUNCTION," * _queue_head->_cancel : %d",_queue_head->_cancel ); 38 42 log_printf(TRACE,Read_queue,FUNCTION," * _queue_head->_data_ra_val : %d",_queue_head->_data_ra_val); 39 43 log_printf(TRACE,Read_queue,FUNCTION," * _queue_head->_read_ra_val : %d",_queue_head->_read_ra_val); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp
r123 r136 37 37 38 38 if(_param->_have_port_context_id ) 39 39 PORT_WRITE (out_READ_QUEUE_OUT_CONTEXT_ID , _queue_head->_context_id ); 40 40 if(_param->_have_port_front_end_id ) 41 41 PORT_WRITE (out_READ_QUEUE_OUT_FRONT_END_ID , _queue_head->_front_end_id); 42 42 if(_param->_have_port_ooo_engine_id) 43 43 PORT_WRITE (out_READ_QUEUE_OUT_OOO_ENGINE_ID, _queue_head->_ooo_engine_id); 44 44 if(_param->_have_port_rob_ptr ) 45 45 PORT_WRITE (out_READ_QUEUE_OUT_ROB_ID , _queue_head->_rob_id ); 46 46 PORT_WRITE (out_READ_QUEUE_OUT_OPERATION , _queue_head->_operation ); 47 47 PORT_WRITE (out_READ_QUEUE_OUT_TYPE , _queue_head->_type ); 48 PORT_WRITE (out_READ_QUEUE_OUT_CANCEL , _queue_head->_cancel ); 48 49 PORT_WRITE (out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE, _queue_head->_store_queue_ptr_write); 49 50 PORT_WRITE (out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ , _queue_head->_store_queue_ptr_read ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp
r128 r136 49 49 _queue_head->_operation = 0;// not necessary 50 50 _queue_head->_type = 0;// not necessary 51 _queue_head->_cancel = 0;// not necessary 51 52 _queue_head->_store_queue_ptr_write = 0;// not necessary 52 53 _queue_head->_store_queue_ptr_read = 0;// not necessary … … 102 103 entry->_operation = PORT_READ(in_READ_QUEUE_IN_OPERATION ); 103 104 entry->_type = PORT_READ(in_READ_QUEUE_IN_TYPE ); 105 entry->_cancel = PORT_READ(in_READ_QUEUE_IN_CANCEL ); 104 106 entry->_store_queue_ptr_write = PORT_READ(in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE); 105 107 entry->_store_queue_ptr_read = PORT_READ(in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ ); … … 181 183 if (_queue->size()>0) 182 184 { 183 log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d , %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)",185 log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.8x, %.1d %.1d %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", 184 186 0, 185 187 … … 191 193 _queue_head->_type , 192 194 _queue_head->_operation , 195 _queue_head->_cancel , 193 196 194 197 _queue_head->_store_queue_ptr_write, … … 233 236 for (;it!=_queue->end(); ++it) 234 237 { 235 log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d , %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.4d , %.1d %.4d , %.1d %.4d , %.1d %.4d, %.1d %.4d (%s)",238 log_printf(TRACE,Read_queue,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.1d %.4d , %.1d %.4d , %.1d %.4d , %.1d %.4d, %.1d %.4d (%s)", 236 239 i, 237 240 … … 243 246 (*it)->_type , 244 247 (*it)->_operation , 248 (*it)->_cancel , 245 249 246 250 (*it)->_store_queue_ptr_write, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h
r122 r136 73 73 public : SC_IN (Toperation_t ) * in_INSERT_OPERATION ; 74 74 public : SC_IN (Ttype_t ) * in_INSERT_TYPE ; 75 public : SC_IN (Tcontrol_t ) * in_INSERT_CANCEL ; 75 76 public : SC_IN (Tlsq_ptr_t ) * in_INSERT_STORE_QUEUE_PTR_WRITE; 76 77 public : SC_IN (Tlsq_ptr_t ) * in_INSERT_STORE_QUEUE_PTR_READ ; … … 105 106 public : SC_OUT(Toperation_t ) ** out_RETIRE_OPERATION ; 106 107 public : SC_OUT(Ttype_t ) ** out_RETIRE_TYPE ; 108 public : SC_OUT(Tcontrol_t ) ** out_RETIRE_CANCEL ; 107 109 public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_STORE_QUEUE_PTR_WRITE; 108 110 public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_STORE_QUEUE_PTR_READ ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Types.h
r122 r136 28 28 public : Toperation_t _operation ; 29 29 public : Ttype_t _type ; 30 public : Tcontrol_t _cancel ; 30 31 public : Tlsq_ptr_t _store_queue_ptr_write; 31 32 public : Tlsq_ptr_t _store_queue_ptr_read ; … … 60 61 << " * _operation : " << toString(x._operation ) << std::endl 61 62 << " * _type : " << toString(x._type ) << std::endl 63 << " * _cancel : " << toString(x._cancel ) << std::endl 62 64 << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl 63 65 << " * _store_queue_ptr_read : " << toString(x._store_queue_ptr_read ) << std::endl -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station.cpp
r131 r136 37 37 ,_usage (usage) 38 38 { 39 log_printf(FUNC,Reservation_station,FUNCTION, "Begin");39 log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> Begin"),_name.c_str()); 40 40 41 41 // #if DEBUG_Reservation_station == true … … 46 46 47 47 #ifdef SYSTEMC 48 log_printf(INFO,Reservation_station,FUNCTION, "Allocation");48 log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Allocation"),_name.c_str()); 49 49 50 50 allocation (); … … 54 54 if (usage_is_set(_usage,USE_STATISTICS)) 55 55 { 56 log_printf(INFO,Reservation_station,FUNCTION, "Allocation of statistics");56 log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); 57 57 58 58 statistics_declaration(param_statistics); … … 64 64 { 65 65 // generate the vhdl 66 log_printf(INFO,Reservation_station,FUNCTION, "Generate the vhdl");66 log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 67 67 68 68 vhdl(); … … 74 74 { 75 75 //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) 76 log_printf(INFO,Reservation_station,FUNCTION, "Method - transition");76 log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 77 77 78 78 SC_METHOD (transition); … … 85 85 #endif 86 86 87 log_printf(INFO,Reservation_station,FUNCTION, "Method - genMoore");87 log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Method - genMoore"),_name.c_str()); 88 88 89 89 SC_METHOD (genMoore); … … 96 96 } 97 97 #endif 98 log_printf(FUNC,Reservation_station,FUNCTION, "End");98 log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> End"),_name.c_str()); 99 99 }; 100 100 … … 103 103 Reservation_station::~Reservation_station (void) 104 104 { 105 log_printf(FUNC,Reservation_station,FUNCTION, "Begin");105 log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> Begin"),_name.c_str()); 106 106 107 107 #ifdef STATISTICS 108 108 if (usage_is_set(_usage,USE_STATISTICS)) 109 109 { 110 log_printf(INFO,Reservation_station,FUNCTION, "Generate Statistics file");110 log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 111 111 112 112 delete _stat; … … 115 115 116 116 #ifdef SYSTEMC 117 log_printf(INFO,Reservation_station,FUNCTION, "Deallocation");117 log_printf(INFO,Reservation_station,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 118 118 119 119 deallocation (); 120 120 #endif 121 121 122 log_printf(FUNC,Reservation_station,FUNCTION, "End");122 log_printf(FUNC,Reservation_station,FUNCTION,_("<%s> End"),_name.c_str()); 123 123 }; 124 124 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp
r135 r136 63 63 ALLOC0_SIGNAL_IN ( in_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 64 64 ALLOC0_SIGNAL_IN ( in_INSERT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 65 ALLOC0_SIGNAL_IN ( in_INSERT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 65 66 ALLOC0_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ); 66 67 ALLOC0_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); … … 101 102 ALLOC1_SIGNAL_OUT(out_RETIRE_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); 102 103 ALLOC1_SIGNAL_OUT(out_RETIRE_TYPE ,"type" ,Ttype_t ,_param->_size_type); 104 ALLOC1_SIGNAL_OUT(out_RETIRE_CANCEL ,"cancel" ,Tcontrol_t ,1); 103 105 ALLOC1_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); 104 106 ALLOC1_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp
r122 r136 42 42 DELETE0_SIGNAL( in_INSERT_OPERATION ,_param->_size_operation ); 43 43 DELETE0_SIGNAL( in_INSERT_TYPE ,_param->_size_type ); 44 DELETE0_SIGNAL( in_INSERT_CANCEL ,1 ); 44 45 DELETE0_SIGNAL( in_INSERT_STORE_QUEUE_PTR_WRITE,_param->_size_store_queue_ptr ); 45 46 DELETE0_SIGNAL( in_INSERT_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr ); … … 73 74 DELETE1_SIGNAL(out_RETIRE_OPERATION ,_param->_nb_inst_retire,_param->_size_operation); 74 75 DELETE1_SIGNAL(out_RETIRE_TYPE ,_param->_nb_inst_retire,_param->_size_type); 76 DELETE1_SIGNAL(out_RETIRE_CANCEL ,_param->_nb_inst_retire,1); 75 77 DELETE1_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr); 76 78 DELETE1_SIGNAL(out_RETIRE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_retire,_param->_size_store_queue_ptr); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp
r123 r136 112 112 PORT_WRITE(out_RETIRE_OPERATION [i],_queue[index_find]._operation); 113 113 PORT_WRITE(out_RETIRE_TYPE [i],_queue[index_find]._type); 114 PORT_WRITE(out_RETIRE_CANCEL [i],_queue[index_find]._cancel); 114 115 PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [i],_queue[index_find]._store_queue_ptr_write); 115 116 PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_READ [i],_queue[index_find]._store_queue_ptr_read ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
r128 r136 26 26 for (uint32_t it_dump=0;it_dump<_param->_size_queue; it_dump++) \ 27 27 if (_queue_valid [it_dump]) \ 28 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d , %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \28 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ 29 29 it_dump, \ 30 30 _queue[it_dump]._context_id , \ … … 34 34 _queue[it_dump]._type , \ 35 35 _queue[it_dump]._operation , \ 36 _queue[it_dump]._cancel , \ 36 37 _queue[it_dump]._store_queue_ptr_write, \ 37 38 _queue[it_dump]._store_queue_ptr_read , \ … … 63 64 for (uint32_t it_dump=0;it_dump<_param->_size_queue; it_dump++) \ 64 65 if (it_dump < _queue_control->nb_elt()) \ 65 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d , %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \66 log_printf(TRACE,Reservation_station,FUNCTION," * [%.4d] %.2d %.2d %.2d %.4d, %.2d %.3d %.1d, %.2d %.2d %.1d %.2d, %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.8x, %.4d %.1d %.2x, %.1d %.4d, %.1d %.4d (%s)", \ 66 67 (*_queue_control)[it_dump], \ 67 68 _queue[(*_queue_control)[it_dump]]._context_id , \ … … 71 72 _queue[(*_queue_control)[it_dump]]._type , \ 72 73 _queue[(*_queue_control)[it_dump]]._operation , \ 74 _queue[(*_queue_control)[it_dump]]._cancel , \ 73 75 _queue[(*_queue_control)[it_dump]]._store_queue_ptr_write, \ 74 76 _queue[(*_queue_control)[it_dump]]._store_queue_ptr_read , \ … … 121 123 _queue[i]._operation = 0; // not necessary 122 124 _queue[i]._type = 0; // not necessary 125 _queue[i]._cancel = 0; // not necessary 123 126 _queue[i]._store_queue_ptr_write = 0; // not necessary 124 127 _queue[i]._store_queue_ptr_read = 0; // not necessary … … 327 330 _queue[index]._operation = PORT_READ(in_INSERT_OPERATION ); 328 331 _queue[index]._type = PORT_READ(in_INSERT_TYPE ); 332 _queue[index]._cancel = PORT_READ(in_INSERT_CANCEL ); 329 333 _queue[index]._store_queue_ptr_write = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE); 330 334 _queue[index]._store_queue_ptr_read = PORT_READ(in_INSERT_STORE_QUEUE_PTR_READ ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/include/Read_unit.h
r122 r136 73 73 public : SC_IN (Toperation_t ) * in_READ_UNIT_IN_OPERATION ; 74 74 public : SC_IN (Ttype_t ) * in_READ_UNIT_IN_TYPE ; 75 public : SC_IN (Tcontrol_t ) * in_READ_UNIT_IN_CANCEL ; 75 76 public : SC_IN (Tlsq_ptr_t ) * in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE; 76 77 public : SC_IN (Tlsq_ptr_t ) * in_READ_UNIT_IN_STORE_QUEUE_PTR_READ ; … … 99 100 public : SC_OUT(Toperation_t ) ** out_READ_UNIT_OUT_OPERATION ; 100 101 public : SC_OUT(Ttype_t ) ** out_READ_UNIT_OUT_TYPE ; 102 public : SC_OUT(Tcontrol_t ) ** out_READ_UNIT_OUT_CANCEL ; 101 103 public : SC_OUT(Tlsq_ptr_t ) ** out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE; 102 104 public : SC_OUT(Tlsq_ptr_t ) ** out_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit.cpp
r123 r136 36 36 ,_usage (usage) 37 37 { 38 log_printf(FUNC,Read_unit,FUNCTION, "Begin");38 log_printf(FUNC,Read_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 39 39 40 40 // #if DEBUG_Read_unit == true … … 44 44 // #endif 45 45 46 log_printf(INFO,Read_unit,FUNCTION, "Allocation");46 log_printf(INFO,Read_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); 47 47 48 48 allocation ( … … 55 55 if (usage_is_set(_usage,USE_STATISTICS)) 56 56 { 57 log_printf(INFO,Read_unit,FUNCTION, "Allocation of statistics");57 log_printf(INFO,Read_unit,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); 58 58 59 59 statistics_declaration(param_statistics); … … 65 65 { 66 66 // generate the vhdl 67 log_printf(INFO,Read_unit,FUNCTION, "Generate the vhdl");67 log_printf(INFO,Read_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 68 68 69 69 vhdl(); … … 74 74 if (usage_is_set(_usage,USE_SYSTEMC)) 75 75 { 76 log_printf(INFO,Read_unit,FUNCTION, "Method - transition");76 log_printf(INFO,Read_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 77 77 78 78 SC_METHOD (transition); … … 86 86 #endif 87 87 } 88 log_printf(FUNC,Read_unit,FUNCTION, "End");88 log_printf(FUNC,Read_unit,FUNCTION,_("<%s> End"),_name.c_str()); 89 89 }; 90 90 … … 93 93 Read_unit::~Read_unit (void) 94 94 { 95 log_printf(FUNC,Read_unit,FUNCTION, "Begin");95 log_printf(FUNC,Read_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 96 96 97 97 #ifdef STATISTICS 98 98 if (usage_is_set(_usage,USE_STATISTICS)) 99 99 { 100 log_printf(INFO,Read_unit,FUNCTION, "Generate Statistics file");100 log_printf(INFO,Read_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 101 101 102 102 delete _stat; … … 104 104 #endif 105 105 106 log_printf(INFO,Read_unit,FUNCTION, "Deallocation");106 log_printf(INFO,Read_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 107 107 deallocation (); 108 108 109 log_printf(FUNC,Read_unit,FUNCTION, "End");109 log_printf(FUNC,Read_unit,FUNCTION,_("<%s> End"),_name.c_str()); 110 110 }; 111 111 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_allocation.cpp
r122 r136 67 67 ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 68 68 ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 69 ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_CANCEL ,"cancel" ,Tcontrol_t ,1); 69 70 ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); 70 71 ALLOC0_SIGNAL_IN ( in_READ_UNIT_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); … … 99 100 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 100 101 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 102 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); 101 103 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); 102 104 ALLOC1_SIGNAL_OUT(out_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); … … 271 273 _component->port_map(name, "in_READ_QUEUE_IN_OPERATION" ,dest, "in_READ_UNIT_IN_OPERATION" ); 272 274 _component->port_map(name, "in_READ_QUEUE_IN_TYPE" ,dest, "in_READ_UNIT_IN_TYPE" ); 275 _component->port_map(name, "in_READ_QUEUE_IN_CANCEL" ,dest, "in_READ_UNIT_IN_CANCEL" ); 273 276 _component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_WRITE",dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE"); 274 277 _component->port_map(name, "in_READ_QUEUE_IN_STORE_QUEUE_PTR_READ" ,dest, "in_READ_UNIT_IN_STORE_QUEUE_PTR_READ" ); … … 310 313 _component->port_map(name,"out_READ_QUEUE_OUT_OPERATION" ,dest, "in_INSERT_OPERATION" ); 311 314 _component->port_map(name,"out_READ_QUEUE_OUT_TYPE" ,dest, "in_INSERT_TYPE" ); 315 _component->port_map(name,"out_READ_QUEUE_OUT_CANCEL" ,dest, "in_INSERT_CANCEL" ); 312 316 _component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE",dest, "in_INSERT_STORE_QUEUE_PTR_WRITE"); 313 317 _component->port_map(name,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ" ,dest, "in_INSERT_STORE_QUEUE_PTR_READ" ); … … 436 440 _component->port_map(name, "in_INSERT_OPERATION" ,dest,"out_READ_QUEUE_OUT_OPERATION" ); 437 441 _component->port_map(name, "in_INSERT_TYPE" ,dest,"out_READ_QUEUE_OUT_TYPE" ); 442 _component->port_map(name, "in_INSERT_CANCEL" ,dest,"out_READ_QUEUE_OUT_CANCEL" ); 438 443 _component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_WRITE",dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_WRITE"); 439 444 _component->port_map(name, "in_INSERT_STORE_QUEUE_PTR_READ" ,dest,"out_READ_QUEUE_OUT_STORE_QUEUE_PTR_READ" ); … … 483 488 _component->port_map(name,"out_RETIRE_"+toString(i)+"_OPERATION" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_OPERATION" ); 484 489 _component->port_map(name,"out_RETIRE_"+toString(i)+"_TYPE" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_TYPE" ); 490 _component->port_map(name,"out_RETIRE_"+toString(i)+"_CANCEL" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_CANCEL" ); 485 491 _component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); 486 492 _component->port_map(name,"out_RETIRE_"+toString(i)+"_STORE_QUEUE_PTR_READ" ,dest,"out_READ_UNIT_OUT_"+toString(i)+"_STORE_QUEUE_PTR_READ" ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/src/Read_unit_deallocation.cpp
r128 r136 34 34 DELETE0_SIGNAL( in_READ_UNIT_IN_FRONT_END_ID ,_param->_size_front_end_id ); 35 35 DELETE0_SIGNAL( in_READ_UNIT_IN_OOO_ENGINE_ID ,_param->_size_ooo_engine_id); 36 DELETE0_SIGNAL( in_READ_UNIT_IN_PACKET_ID ,_param->_size_rob_ptr );36 DELETE0_SIGNAL( in_READ_UNIT_IN_PACKET_ID ,_param->_size_rob_ptr ); 37 37 DELETE0_SIGNAL( in_READ_UNIT_IN_OPERATION ,_param->_size_operation ); 38 38 DELETE0_SIGNAL( in_READ_UNIT_IN_TYPE ,_param->_size_type ); 39 DELETE0_SIGNAL( in_READ_UNIT_IN_CANCEL ,1); 39 40 DELETE0_SIGNAL( in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE,_param->_size_store_queue_ptr); 40 41 DELETE0_SIGNAL( in_READ_UNIT_IN_STORE_QUEUE_PTR_READ ,_param->_size_store_queue_ptr); … … 62 63 DELETE1_SIGNAL(out_READ_UNIT_OUT_OPERATION ,_param->_nb_inst_retire,_param->_size_operation ); 63 64 DELETE1_SIGNAL(out_READ_UNIT_OUT_TYPE ,_param->_nb_inst_retire,_param->_size_type ); 65 DELETE1_SIGNAL(out_READ_UNIT_OUT_CANCEL ,_param->_nb_inst_retire,1); 64 66 DELETE1_SIGNAL(out_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_retire,_param->_size_store_queue_ptr); 65 67 DELETE1_SIGNAL(out_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_retire,_param->_size_store_queue_ptr); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h
r113 r136 79 79 //public : SC_IN (Toperation_t ) * in_EXECUTE_QUEUE_IN_OPERATION ; 80 80 //public : SC_IN (Ttype_t ) * in_EXECUTE_QUEUE_IN_TYPE ; 81 public : SC_IN (Tcontrol_t ) * in_EXECUTE_QUEUE_IN_CANCEL ; 81 82 public : SC_IN (Tspecial_data_t ) * in_EXECUTE_QUEUE_IN_FLAGS ; 82 83 public : SC_IN (Texception_t ) * in_EXECUTE_QUEUE_IN_EXCEPTION ; … … 94 95 //public : SC_OUT(Toperation_t ) * out_EXECUTE_QUEUE_OUT_OPERATION ; 95 96 //public : SC_OUT(Ttype_t ) * out_EXECUTE_QUEUE_OUT_TYPE ; 97 public : SC_OUT(Tcontrol_t ) * out_EXECUTE_QUEUE_OUT_CANCEL ; 96 98 public : SC_OUT(Tspecial_data_t ) * out_EXECUTE_QUEUE_OUT_FLAGS ; 97 99 public : SC_OUT(Texception_t ) * out_EXECUTE_QUEUE_OUT_EXCEPTION ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Types.h
r88 r136 28 28 //public : Toperation_t _operation ; 29 29 //public : Ttype_t _type ; 30 public : Tcontrol_t _cancel ; 30 31 public : Tspecial_data_t _flags ; 31 32 public : Texception_t _exception ; … … 40 41 //Toperation_t operation , 41 42 //Ttype_t type , 43 Tcontrol_t cancel , 42 44 Tspecial_data_t flags , 43 45 Texception_t exception , … … 52 54 //_operation = operation ; 53 55 //_type = type ; 56 _cancel = cancel ; 54 57 _flags = flags ; 55 58 _exception = exception ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Wrapper_Execute_queue.h
r113 r136 43 43 //public : SC_IN (Toperation_t ) * in_EXECUTE_QUEUE_IN_OPERATION ; 44 44 //public : SC_IN (Ttype_t ) * in_EXECUTE_QUEUE_IN_TYPE ; 45 public : SC_IN (Tcontrol_t ) * in_EXECUTE_QUEUE_IN_CANCEL ; 45 46 public : SC_IN (Tspecial_data_t) * in_EXECUTE_QUEUE_IN_FLAGS ; 46 47 public : SC_IN (Texception_t ) * in_EXECUTE_QUEUE_IN_EXCEPTION ; … … 58 59 //public : SC_OUT(Toperation_t ) * out_EXECUTE_QUEUE_OUT_OPERATION ; 59 60 //public : SC_OUT(Ttype_t ) * out_EXECUTE_QUEUE_OUT_TYPE ; 61 public : SC_OUT(Tcontrol_t ) * out_EXECUTE_QUEUE_OUT_CANCEL ; 60 62 public : SC_OUT(Tspecial_data_t) * out_EXECUTE_QUEUE_OUT_FLAGS ; 61 63 public : SC_OUT(Texception_t ) * out_EXECUTE_QUEUE_OUT_EXCEPTION ; … … 87 89 // ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_OPERATION ,"execute_queue_in" ,"operation" ,Toperation_t ,_param->_size_operation ); 88 90 // ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_TYPE ,"execute_queue_in" ,"type" ,Ttype_t ,_param->_size_type ); 91 ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_CANCEL ,"execute_queue_in" ,"cancel" ,Tcontrol_t ,1 ); 89 92 ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_FLAGS ,"execute_queue_in" ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); 90 93 ALLOC0_FOREIGN_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_EXCEPTION ,"execute_queue_in" ,"exception" ,Texception_t ,_param->_size_exception ); … … 101 104 // ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_OPERATION ,"execute_queue_out","operation" ,Toperation_t ,_param->_size_operation ); 102 105 // ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_TYPE ,"execute_queue_out","type" ,Ttype_t ,_param->_size_type ); 106 ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_CANCEL ,"execute_queue_out","cancel" ,Tcontrol_t ,1 ); 103 107 ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_FLAGS ,"execute_queue_out","flags" ,Tspecial_data_t ,_param->_size_special_data ); 104 108 ALLOC0_FOREIGN_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_EXCEPTION ,"execute_queue_out","exception" ,Texception_t ,_param->_size_exception ); … … 123 127 // DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_OPERATION ,_param->_size_operation ); 124 128 // DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_TYPE ,_param->_size_type ); 129 DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_CANCEL ,1 ); 125 130 DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_FLAGS ,_param->_size_special_data ); 126 131 DELETE0_FOREIGN_SIGNAL( in_EXECUTE_QUEUE_IN_EXCEPTION ,_param->_size_exception ); … … 137 142 // DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_OPERATION ,_param->_size_operation ); 138 143 // DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_TYPE ,_param->_size_type ); 144 DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_CANCEL ,1 ); 139 145 DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_FLAGS ,_param->_size_special_data ); 140 146 DELETE0_FOREIGN_SIGNAL(out_EXECUTE_QUEUE_OUT_EXCEPTION ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_allocation.cpp
r113 r136 61 61 // ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 62 62 // ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 63 ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 63 64 ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); 64 65 ALLOC0_SIGNAL_IN ( in_EXECUTE_QUEUE_IN_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); … … 82 83 // ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 83 84 // ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 85 ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 84 86 ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data ); 85 87 ALLOC0_SIGNAL_OUT(out_EXECUTE_QUEUE_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); … … 184 186 // INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_OPERATION ,Toperation_t , "in_EXECUTE_QUEUE_IN_OPERATION" ,_param->_size_operation ); 185 187 // INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_TYPE ,Ttype_t , "in_EXECUTE_QUEUE_IN_TYPE" ,_param->_size_type ); 188 INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_CANCEL ,Tcontrol_t , "in_EXECUTE_QUEUE_IN_CANCEL" ,1 ); 186 189 INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_FLAGS ,Tspecial_data_t, "in_EXECUTE_QUEUE_IN_FLAGS" ,_param->_size_special_data ); 187 190 INSTANCE0_FOREIGN_SIGNAL(_wrapper, in_EXECUTE_QUEUE_IN_EXCEPTION ,Texception_t , "in_EXECUTE_QUEUE_IN_EXCEPTION" ,_param->_size_exception ); … … 198 201 // INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_OPERATION ,Toperation_t ,"out_EXECUTE_QUEUE_OUT_OPERATION" ,_param->_size_operation ); 199 202 // INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_TYPE ,Ttype_t ,"out_EXECUTE_QUEUE_OUT_TYPE" ,_param->_size_type ); 203 INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_CANCEL ,Tcontrol_t ,"out_EXECUTE_QUEUE_OUT_CANCEL" ,1 ); 200 204 INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_FLAGS ,Tspecial_data_t,"out_EXECUTE_QUEUE_OUT_FLAGS" ,_param->_size_special_data ); 201 205 INSTANCE0_FOREIGN_SIGNAL(_wrapper,out_EXECUTE_QUEUE_OUT_EXCEPTION ,Texception_t ,"out_EXECUTE_QUEUE_OUT_EXCEPTION" ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_deallocation.cpp
r113 r136 38 38 // DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_OPERATION ,_param->_size_operation ); 39 39 // DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_TYPE ,_param->_size_type ); 40 DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_CANCEL ,1 ); 40 41 DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_FLAGS ,_param->_size_special_data ); 41 42 DELETE0_SIGNAL( in_EXECUTE_QUEUE_IN_EXCEPTION ,_param->_size_exception ); … … 52 53 // DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_OPERATION ,_param->_size_operation ); 53 54 // DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_TYPE ,_param->_size_type ); 55 DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_CANCEL ,1 ); 54 56 DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_FLAGS ,_param->_size_special_data ); 55 57 DELETE0_SIGNAL(out_EXECUTE_QUEUE_OUT_EXCEPTION ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp
r123 r136 49 49 // PORT_WRITE(out_EXECUTE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); 50 50 // PORT_WRITE(out_EXECUTE_QUEUE_OUT_TYPE , _queue->front()->_type ); 51 PORT_WRITE(out_EXECUTE_QUEUE_OUT_CANCEL , _queue->front()->_cancel ); 51 52 PORT_WRITE(out_EXECUTE_QUEUE_OUT_FLAGS , _queue->front()->_flags ); 52 53 PORT_WRITE(out_EXECUTE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp
r101 r136 47 47 //PORT_READ(in_EXECUTE_QUEUE_IN_OPERATION ), 48 48 //PORT_READ(in_EXECUTE_QUEUE_IN_TYPE ), 49 PORT_READ(in_EXECUTE_QUEUE_IN_CANCEL ), 49 50 PORT_READ(in_EXECUTE_QUEUE_IN_FLAGS ), 50 51 PORT_READ(in_EXECUTE_QUEUE_IN_EXCEPTION ), … … 77 78 ++it) 78 79 { 79 log_printf(TRACE,Execute_queue,FUNCTION," [%d] %.2d %.2d %.2d, %. 4d, %.1d, %.2d %.1d, %.8x %.8x",80 log_printf(TRACE,Execute_queue,FUNCTION," [%d] %.2d %.2d %.2d, %.1d, %.4d, %.1d, %.2d %.1d, %.8x %.8x", 80 81 i, 81 82 (*it)->_context_id , … … 85 86 //(*it)->_operation , 86 87 //(*it)->_type , 88 (*it)->_cancel , 87 89 (*it)->_flags , 88 90 (*it)->_exception , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h
r118 r136 40 40 //public : Toperation_t _operation ; 41 41 //public : Ttype_t _type ; 42 public : Tcontrol_t _cancel ; 42 43 public : Tcontrol_t _write_rd ; 43 44 public : Tgeneral_address_t _num_reg_rd ; … … 56 57 // Toperation_t operation , 57 58 // Ttype_t type , 59 Tcontrol_t cancel , 58 60 Tcontrol_t write_rd , 59 61 Tgeneral_address_t num_reg_rd , … … 72 74 //_operation = operation ; 73 75 //_type = type ; 76 _cancel = cancel ; 74 77 _write_rd = write_rd ; 75 78 _num_reg_rd = num_reg_rd ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h
r118 r136 79 79 //public : SC_IN (Toperation_t ) * in_WRITE_QUEUE_IN_OPERATION ; 80 80 //public : SC_IN (Ttype_t ) * in_WRITE_QUEUE_IN_TYPE ; 81 public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_CANCEL ; 81 82 public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_WRITE_RD ; 82 83 public : SC_IN (Tgeneral_address_t) * in_WRITE_QUEUE_IN_NUM_REG_RD ; … … 98 99 //public : SC_OUT(Toperation_t ) * out_WRITE_QUEUE_OUT_OPERATION ; 99 100 //public : SC_OUT(Ttype_t ) * out_WRITE_QUEUE_OUT_TYPE ; 101 public : SC_OUT(Tcontrol_t ) * out_WRITE_QUEUE_OUT_CANCEL ; 100 102 public : SC_OUT(Tspecial_data_t ) * out_WRITE_QUEUE_OUT_FLAGS ; 101 103 public : SC_OUT(Texception_t ) * out_WRITE_QUEUE_OUT_EXCEPTION ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp
r114 r136 61 61 // ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 62 62 // ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 63 ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 63 64 ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 64 65 ALLOC0_SIGNAL_IN ( in_WRITE_QUEUE_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register ); … … 86 87 // ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 87 88 // ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 89 ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 88 90 ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data ); 89 91 ALLOC0_SIGNAL_OUT(out_WRITE_QUEUE_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_deallocation.cpp
r128 r136 38 38 // DELETE0_SIGNAL( in_WRITE_QUEUE_IN_OPERATION ,_param->_size_operation ); 39 39 // DELETE0_SIGNAL( in_WRITE_QUEUE_IN_TYPE ,_param->_size_type ); 40 DELETE0_SIGNAL( in_WRITE_QUEUE_IN_CANCEL ,1 ); 40 41 DELETE0_SIGNAL( in_WRITE_QUEUE_IN_WRITE_RD ,1 ); 41 42 DELETE0_SIGNAL( in_WRITE_QUEUE_IN_NUM_REG_RD ,_param->_size_general_register ); … … 56 57 // DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_OPERATION ,_param->_size_operation ); 57 58 // DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_TYPE ,_param->_size_type ); 59 DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_CANCEL ,1 ); 58 60 DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_FLAGS ,_param->_size_special_data ); 59 61 DELETE0_SIGNAL(out_WRITE_QUEUE_OUT_EXCEPTION ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_write.cpp
r123 r136 86 86 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); 87 87 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); 88 PORT_WRITE(out_WRITE_QUEUE_OUT_CANCEL , _queue->front()->_cancel ); 88 89 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); 89 90 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMoore.cpp
r133 r136 119 119 // PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION , _queue->front()->_operation ); 120 120 // PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE , _queue->front()->_type ); 121 PORT_WRITE(out_WRITE_QUEUE_OUT_CANCEL , _queue->front()->_cancel ); 121 122 PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS , _queue->front()->_data_re ); 122 123 PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION , _queue->front()->_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp
r128 r136 54 54 //PORT_READ(in_WRITE_QUEUE_IN_OPERATION ), 55 55 //PORT_READ(in_WRITE_QUEUE_IN_TYPE ), 56 PORT_READ(in_WRITE_QUEUE_IN_CANCEL ), 56 57 PORT_READ(in_WRITE_QUEUE_IN_WRITE_RD ), 57 58 PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RD ), … … 96 97 ++it) 97 98 { 98 log_printf(TRACE,Write_queue,FUNCTION," [%d] %.2d %.2d %.2d, %.4d, %.1d %.4d %.8x, %.1d %.4d %.1d, %.2d %.1d, %.8x",99 log_printf(TRACE,Write_queue,FUNCTION," [%d] %.2d %.2d %.2d, %.4d, %.1d, %.1d %.4d %.8x, %.1d %.4d %.1d, %.2d %.1d, %.8x", 99 100 i, 100 101 (*it)->_context_id , … … 104 105 //(*it)->_operation , 105 106 //(*it)->_type , 107 (*it)->_cancel , 106 108 (*it)->_write_rd , 107 109 (*it)->_num_reg_rd , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h
r113 r136 72 72 //public : SC_IN (Toperation_t ) * in_WRITE_UNIT_IN_OPERATION ; 73 73 //public : SC_IN (Ttype_t ) * in_WRITE_UNIT_IN_TYPE ; 74 public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_CANCEL ; 74 75 public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_WRITE_RD ; 75 76 public : SC_IN (Tgeneral_address_t) * in_WRITE_UNIT_IN_NUM_REG_RD ; … … 91 92 //public : SC_OUT(Toperation_t ) * out_WRITE_UNIT_OUT_OPERATION ; 92 93 //public : SC_OUT(Ttype_t ) * out_WRITE_UNIT_OUT_TYPE ; 94 public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_OUT_CANCEL ; 93 95 public : SC_OUT(Tspecial_data_t ) * out_WRITE_UNIT_OUT_FLAGS ; 94 96 public : SC_OUT(Texception_t ) * out_WRITE_UNIT_OUT_EXCEPTION ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_allocation.cpp
r113 r136 67 67 // ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 68 68 // ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 69 ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 69 70 ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 70 71 ALLOC0_SIGNAL_IN ( in_WRITE_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register ); … … 92 93 // ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 93 94 // ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 95 ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 94 96 ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data ); 95 97 ALLOC0_SIGNAL_OUT(out_WRITE_UNIT_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); … … 216 218 //_component->port_map(name, "in_WRITE_QUEUE_IN_OPERATION" , _name, "in_WRITE_UNIT_IN_OPERATION" ); 217 219 //_component->port_map(name, "in_WRITE_QUEUE_IN_TYPE" , _name, "in_WRITE_UNIT_IN_TYPE" ); 220 _component->port_map(name, "in_WRITE_QUEUE_IN_CANCEL" , _name, "in_WRITE_UNIT_IN_CANCEL" ); 218 221 _component->port_map(name, "in_WRITE_QUEUE_IN_WRITE_RD" , _name, "in_WRITE_UNIT_IN_WRITE_RD" ); 219 222 _component->port_map(name, "in_WRITE_QUEUE_IN_NUM_REG_RD" , _name, "in_WRITE_UNIT_IN_NUM_REG_RD" ); … … 246 249 //_component->port_map(name,"out_WRITE_QUEUE_OUT_OPERATION" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_OPERATION" ); 247 250 //_component->port_map(name,"out_WRITE_QUEUE_OUT_TYPE" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_TYPE" ); 251 _component->port_map(name,"out_WRITE_QUEUE_OUT_CANCEL" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_CANCEL" ); 248 252 _component->port_map(name,"out_WRITE_QUEUE_OUT_FLAGS" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_FLAGS" ); 249 253 _component->port_map(name,"out_WRITE_QUEUE_OUT_EXCEPTION" , _name+"_execute_queue", "in_EXECUTE_QUEUE_IN_EXCEPTION" ); … … 272 276 //_component->port_map(name,"out_WRITE_QUEUE_OUT_TYPE" , _name,"out_WRITE_UNIT_OUT_TYPE" ); 273 277 _component->port_map(name,"out_WRITE_QUEUE_OUT_FLAGS" , _name,"out_WRITE_UNIT_OUT_FLAGS" ); 278 _component->port_map(name,"out_WRITE_QUEUE_OUT_CANCEL" , _name,"out_WRITE_UNIT_OUT_CANCEL" ); 274 279 _component->port_map(name,"out_WRITE_QUEUE_OUT_EXCEPTION" , _name,"out_WRITE_UNIT_OUT_EXCEPTION" ); 275 280 _component->port_map(name,"out_WRITE_QUEUE_OUT_NO_SEQUENCE" , _name,"out_WRITE_UNIT_OUT_NO_SEQUENCE" ); … … 358 363 //_component->port_map(name, "in_EXECUTE_QUEUE_IN_OPERATION" , _name+"_write_queue","out_WRITE_QUEUE_OUT_OPERATION" ); 359 364 //_component->port_map(name, "in_EXECUTE_QUEUE_IN_TYPE" , _name+"_write_queue","out_WRITE_QUEUE_OUT_TYPE" ); 365 _component->port_map(name, "in_EXECUTE_QUEUE_IN_CANCEL" , _name+"_write_queue","out_WRITE_QUEUE_OUT_CANCEL" ); 360 366 _component->port_map(name, "in_EXECUTE_QUEUE_IN_FLAGS" , _name+"_write_queue","out_WRITE_QUEUE_OUT_FLAGS" ); 361 367 _component->port_map(name, "in_EXECUTE_QUEUE_IN_EXCEPTION" , _name+"_write_queue","out_WRITE_QUEUE_OUT_EXCEPTION" ); … … 381 387 //_component->port_map(name,"out_EXECUTE_QUEUE_OUT_OPERATION" , _name,"out_WRITE_UNIT_OUT_OPERATION" ); 382 388 //_component->port_map(name,"out_EXECUTE_QUEUE_OUT_TYPE" , _name,"out_WRITE_UNIT_OUT_TYPE" ); 389 _component->port_map(name,"out_EXECUTE_QUEUE_OUT_CANCEL" , _name,"out_WRITE_UNIT_OUT_CANCEL" ); 383 390 _component->port_map(name,"out_EXECUTE_QUEUE_OUT_FLAGS" , _name,"out_WRITE_UNIT_OUT_FLAGS" ); 384 391 _component->port_map(name,"out_EXECUTE_QUEUE_OUT_EXCEPTION" , _name,"out_WRITE_UNIT_OUT_EXCEPTION" ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/src/Write_unit_deallocation.cpp
r112 r136 37 37 // DELETE0_SIGNAL( in_WRITE_UNIT_IN_OPERATION ,_param->_size_operation ); 38 38 // DELETE0_SIGNAL( in_WRITE_UNIT_IN_TYPE ,_param->_size_type ); 39 DELETE0_SIGNAL( in_WRITE_UNIT_IN_CANCEL ,1 ); 39 40 DELETE0_SIGNAL( in_WRITE_UNIT_IN_WRITE_RD ,1 ); 40 41 DELETE0_SIGNAL( in_WRITE_UNIT_IN_NUM_REG_RD ,_param->_size_general_register ); … … 55 56 // DELETE0_SIGNAL(out_WRITE_UNIT_OUT_OPERATION ,_param->_size_operation ); 56 57 // DELETE0_SIGNAL(out_WRITE_UNIT_OUT_TYPE ,_param->_size_type ); 58 DELETE0_SIGNAL(out_WRITE_UNIT_OUT_CANCEL ,1 ); 57 59 DELETE0_SIGNAL(out_WRITE_UNIT_OUT_FLAGS ,_param->_size_special_data ); 58 60 DELETE0_SIGNAL(out_WRITE_UNIT_OUT_EXCEPTION ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/include/Execution_unit_to_Write_unit.h
r97 r136 73 73 //public : SC_IN (Toperation_t ) *** in_EXECUTE_UNIT_OUT_OPERATION ; 74 74 //public : SC_IN (Ttype_t ) *** in_EXECUTE_UNIT_OUT_TYPE ; 75 public : SC_IN (Tcontrol_t ) *** in_EXECUTE_UNIT_OUT_CANCEL ; 75 76 public : SC_IN (Tcontrol_t ) *** in_EXECUTE_UNIT_OUT_WRITE_RD ; 76 77 public : SC_IN (Tgeneral_address_t) *** in_EXECUTE_UNIT_OUT_NUM_REG_RD ; … … 92 93 //public : SC_OUT(Toperation_t ) ** out_WRITE_UNIT_IN_OPERATION ; 93 94 //public : SC_OUT(Ttype_t ) ** out_WRITE_UNIT_IN_TYPE ; 95 public : SC_OUT(Tcontrol_t ) ** out_WRITE_UNIT_IN_CANCEL ; 94 96 public : SC_OUT(Tcontrol_t ) ** out_WRITE_UNIT_IN_WRITE_RD ; 95 97 public : SC_OUT(Tgeneral_address_t) ** out_WRITE_UNIT_IN_NUM_REG_RD ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit.cpp
r132 r136 36 36 ,_usage (usage) 37 37 { 38 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION, "Begin");38 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 39 39 40 40 // #if DEBUG_Execution_unit_to_Write_unit == true … … 44 44 // #endif 45 45 46 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION, "Allocation");46 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); 47 47 48 48 allocation ( … … 55 55 if (usage_is_set(_usage,USE_STATISTICS)) 56 56 { 57 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION, "Allocation of statistics");57 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); 58 58 59 59 statistics_declaration(param_statistics); … … 65 65 { 66 66 // generate the vhdl 67 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION, "Generate the vhdl");67 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 68 68 69 69 vhdl(); … … 74 74 if (usage_is_set(_usage,USE_SYSTEMC)) 75 75 { 76 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION, "Method - transition");76 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 77 77 78 78 SC_METHOD (transition); … … 84 84 # endif 85 85 86 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION, "Method - genMealy");86 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Method - genMealy"),_name.c_str()); 87 87 88 88 SC_METHOD (genMealy); … … 105 105 //<< (*(in_EXECUTE_UNIT_OUT_OPERATION [i][j])) 106 106 //<< (*(in_EXECUTE_UNIT_OUT_TYPE [i][j])) 107 << (*(in_EXECUTE_UNIT_OUT_CANCEL [i][j])) 107 108 << (*(in_EXECUTE_UNIT_OUT_WRITE_RD [i][j])) 108 109 << (*(in_EXECUTE_UNIT_OUT_NUM_REG_RD [i][j])) … … 371 372 #endif 372 373 } 373 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION, "End");374 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> End"),_name.c_str()); 374 375 }; 375 376 … … 378 379 Execution_unit_to_Write_unit::~Execution_unit_to_Write_unit (void) 379 380 { 380 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION, "Begin");381 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 381 382 382 383 #ifdef STATISTICS 383 384 if (usage_is_set(_usage,USE_STATISTICS)) 384 385 { 385 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION, "Generate Statistics file");386 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 386 387 387 388 delete _stat; … … 389 390 #endif 390 391 391 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION, "Deallocation");392 log_printf(INFO,Execution_unit_to_Write_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 392 393 deallocation (); 393 394 394 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION, "End");395 log_printf(FUNC,Execution_unit_to_Write_unit,FUNCTION,_("<%s> End"),_name.c_str()); 395 396 }; 396 397 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_allocation.cpp
r112 r136 68 68 //_ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); 69 69 //_ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); 70 _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); 70 71 _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); 71 72 _ALLOC2_SIGNAL_IN ( in_EXECUTE_UNIT_OUT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register, _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1]); … … 93 94 //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 94 95 //ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 96 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 95 97 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 96 98 ALLOC1_SIGNAL_OUT(out_WRITE_UNIT_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_deallocation.cpp
r112 r136 37 37 // DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_OPERATION , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],_param->_size_operation ); 38 38 // DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_TYPE , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],_param->_size_type ); 39 DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_CANCEL , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],1 ); 39 40 DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_WRITE_RD , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],1 ); 40 41 DELETE2_SIGNAL( in_EXECUTE_UNIT_OUT_NUM_REG_RD , _param->_nb_execute_unit, _param->_nb_execute_unit_port[it1],_param->_size_general_register); … … 55 56 // DELETE1_SIGNAL(out_WRITE_UNIT_IN_OPERATION , _param->_nb_write_unit,_param->_size_operation ); 56 57 // DELETE1_SIGNAL(out_WRITE_UNIT_IN_TYPE , _param->_nb_write_unit,_param->_size_type ); 58 DELETE1_SIGNAL(out_WRITE_UNIT_IN_CANCEL , _param->_nb_write_unit,1 ); 57 59 DELETE1_SIGNAL(out_WRITE_UNIT_IN_WRITE_RD , _param->_nb_write_unit,1 ); 58 60 DELETE1_SIGNAL(out_WRITE_UNIT_IN_NUM_REG_RD , _param->_nb_write_unit,_param->_size_general_register); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Execution_unit_to_Write_unit/src/Execution_unit_to_Write_unit_genMealy.cpp
r123 r136 79 79 // PORT_WRITE(out_WRITE_UNIT_IN_OPERATION [dest], PORT_READ(in_EXECUTE_UNIT_OUT_OPERATION [i][j])); 80 80 // PORT_WRITE(out_WRITE_UNIT_IN_TYPE [dest], PORT_READ(in_EXECUTE_UNIT_OUT_TYPE [i][j])); 81 PORT_WRITE(out_WRITE_UNIT_IN_CANCEL [dest], PORT_READ(in_EXECUTE_UNIT_OUT_CANCEL [i][j])); 81 82 PORT_WRITE(out_WRITE_UNIT_IN_WRITE_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_WRITE_RD [i][j])); 82 83 PORT_WRITE(out_WRITE_UNIT_IN_NUM_REG_RD [dest], PORT_READ(in_EXECUTE_UNIT_OUT_NUM_REG_RD [i][j])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/include/Read_unit_to_Execution_unit.h
r122 r136 84 84 public : SC_IN (Toperation_t ) *** in_READ_UNIT_OUT_OPERATION ;//[nb_read_unit][nb_read_unit_port] 85 85 public : SC_IN (Ttype_t ) *** in_READ_UNIT_OUT_TYPE ;//[nb_read_unit][nb_read_unit_port] 86 public : SC_IN (Tcontrol_t ) *** in_READ_UNIT_OUT_CANCEL ;//[nb_read_unit][nb_read_unit_port] 86 87 public : SC_IN (Tlsq_ptr_t ) *** in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE ;//[nb_read_unit][nb_read_unit_port] 87 88 public : SC_IN (Tlsq_ptr_t ) *** in_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ;//[nb_read_unit][nb_read_unit_port] … … 107 108 public : SC_OUT(Toperation_t ) *** out_EXECUTE_UNIT_IN_OPERATION ;//[nb_execute_unit][nb_execute_unit_port] 108 109 public : SC_OUT(Ttype_t ) *** out_EXECUTE_UNIT_IN_TYPE ;//[nb_execute_unit][nb_execute_unit_port] 110 public : SC_OUT(Tcontrol_t ) *** out_EXECUTE_UNIT_IN_CANCEL ;//[nb_execute_unit][nb_execute_unit_port] 109 111 public : SC_OUT(Tlsq_ptr_t ) *** out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_WRITE;//[nb_execute_unit][nb_execute_unit_port] 110 112 public : SC_OUT(Tlsq_ptr_t ) *** out_EXECUTE_UNIT_IN_STORE_QUEUE_PTR_READ ;//[nb_execute_unit][nb_execute_unit_port] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit.cpp
r132 r136 36 36 ,_usage (usage) 37 37 { 38 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION, "Begin");38 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 39 39 40 40 // #if DEBUG_Read_unit_to_Execution_unit == true … … 44 44 // #endif 45 45 46 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION, "Allocation");46 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); 47 47 48 48 allocation ( … … 55 55 if (usage_is_set(_usage,USE_STATISTICS)) 56 56 { 57 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION, "Allocation of statistics");57 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); 58 58 59 59 statistics_declaration(param_statistics); … … 65 65 { 66 66 // generate the vhdl 67 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION, "Generate the vhdl");67 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 68 68 69 69 vhdl(); … … 74 74 if (usage_is_set(_usage,USE_SYSTEMC)) 75 75 { 76 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION, "Method - transition");76 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 77 77 78 78 SC_METHOD (transition); … … 84 84 # endif 85 85 86 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION, "Method - genMealy");86 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Method - genMealy"),_name.c_str()); 87 87 88 88 SC_METHOD (genMealy); … … 97 97 << (*(in_READ_UNIT_OUT_OPERATION [i][j])) 98 98 << (*(in_READ_UNIT_OUT_TYPE [i][j])) 99 << (*(in_READ_UNIT_OUT_CANCEL [i][j])) 99 100 << (*(in_READ_UNIT_OUT_HAS_IMMEDIAT [i][j])) 100 101 << (*(in_READ_UNIT_OUT_IMMEDIAT [i][j])) … … 450 451 #endif 451 452 } 452 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION, "End");453 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> End"),_name.c_str()); 453 454 }; 454 455 … … 457 458 Read_unit_to_Execution_unit::~Read_unit_to_Execution_unit (void) 458 459 { 459 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION, "Begin");460 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 460 461 461 462 #ifdef STATISTICS 462 463 if (usage_is_set(_usage,USE_STATISTICS)) 463 464 { 464 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION, "Generate Statistics file");465 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 465 466 466 467 delete _stat; … … 468 469 #endif 469 470 470 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION, "Deallocation");471 log_printf(INFO,Read_unit_to_Execution_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 471 472 deallocation (); 472 473 473 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION, "End");474 log_printf(FUNC,Read_unit_to_Execution_unit,FUNCTION,_("<%s> End"),_name.c_str()); 474 475 }; 475 476 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_allocation.cpp
r122 r136 67 67 _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); 68 68 _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); 69 _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); 69 70 _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE,"STORE_QUEUE_PTR_WRITE",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); 70 71 _ALLOC2_SIGNAL_IN ( in_READ_UNIT_OUT_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_read_unit,_param->_nb_read_unit_port[it1]); … … 95 96 _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); 96 97 _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); 98 _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_CANCEL ,"CANCEL" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); 97 99 _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); 98 100 _ALLOC2_SIGNAL_OUT(out_EXECUTE_UNIT_IN_DATA_RC ,"DATA_RC" ,Tspecial_data_t ,_param->_size_special_data , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_deallocation.cpp
r128 r136 37 37 DELETE2_SIGNAL( in_READ_UNIT_OUT_OPERATION , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_operation ); 38 38 DELETE2_SIGNAL( in_READ_UNIT_OUT_TYPE , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_type ); 39 DELETE2_SIGNAL( in_READ_UNIT_OUT_CANCEL , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],1 ); 39 40 DELETE2_SIGNAL( in_READ_UNIT_OUT_STORE_QUEUE_PTR_WRITE , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_store_queue_ptr ); 40 41 DELETE2_SIGNAL( in_READ_UNIT_OUT_STORE_QUEUE_PTR_READ , _param->_nb_read_unit, _param->_nb_read_unit_port [it1],_param->_size_store_queue_ptr ); … … 59 60 DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_OPERATION , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_operation ); 60 61 DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_TYPE , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_type ); 62 DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_CANCEL , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],1 ); 61 63 DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],1 ); 62 64 DELETE2_SIGNAL(out_EXECUTE_UNIT_IN_DATA_RC , _param->_nb_execute_unit, _param->_nb_execute_unit_port [it1],_param->_size_special_data ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Network/Read_unit_to_Execution_unit/src/Read_unit_to_Execution_unit_genMealy.cpp
r123 r136 84 84 PORT_WRITE(out_EXECUTE_UNIT_IN_PACKET_ID [dest][port], PORT_READ(in_READ_UNIT_OUT_PACKET_ID [i][j])); 85 85 PORT_WRITE(out_EXECUTE_UNIT_IN_OPERATION [dest][port], PORT_READ(in_READ_UNIT_OUT_OPERATION [i][j])); 86 PORT_WRITE(out_EXECUTE_UNIT_IN_CANCEL [dest][port], PORT_READ(in_READ_UNIT_OUT_CANCEL [i][j])); 86 87 PORT_WRITE(out_EXECUTE_UNIT_IN_TYPE [dest][port], PORT_READ(in_READ_UNIT_OUT_TYPE [i][j])); 87 88 PORT_WRITE(out_EXECUTE_UNIT_IN_HAS_IMMEDIAT [dest][port], PORT_READ(in_READ_UNIT_OUT_HAS_IMMEDIAT [i][j])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Parameters.h
r88 r136 34 34 public : uint32_t _nb_gpr_write ; 35 35 public : uint32_t _nb_spr_write ; 36 public : uint32_t * _nb_inst_insert_rob ; 37 public : uint32_t * _nb_inst_retire_rob ; 36 public : uint32_t _nb_inst_issue ; 37 // public : uint32_t * _nb_inst_insert_rob ; 38 // public : uint32_t * _nb_inst_retire_rob ; 38 39 39 40 //public : bool _have_port_ooo_engine_id; … … 47 48 uint32_t nb_gpr_write , 48 49 uint32_t nb_spr_write , 49 uint32_t * nb_inst_insert_rob , 50 uint32_t * nb_inst_retire_rob , 50 uint32_t nb_inst_issue , 51 // uint32_t * nb_inst_insert_rob , 52 // uint32_t * nb_inst_retire_rob , 51 53 bool is_toplevel=false); 52 54 //public : Parameters (Parameters & param) ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/include/Register_unit_Glue.h
r131 r136 118 118 public : SC_OUT(Tspecial_data_t ) *** out_SPR_WRITE_STATUS_DATA ; // type for compatibility with the registerFile 119 119 120 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 121 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; 122 public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; 123 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ; 124 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ; 125 126 public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_GPR_STATUS_VAL ; 127 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_GPR_STATUS_ACK ; 128 public : SC_OUT(Tgeneral_data_t ) *** out_INSERT_ROB_GPR_STATUS_DATA ; // type for compatibility with the registerFile 129 130 public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_SPR_STATUS_VAL ; 131 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_SPR_STATUS_ACK ; 132 public : SC_OUT(Tspecial_data_t ) *** out_INSERT_ROB_SPR_STATUS_DATA ; // type for compatibility with the registerFile 120 // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 121 public : SC_IN (Tcontrol_t ) ** in_ISSUE_VAL ; 122 public : SC_OUT(Tcontrol_t ) ** out_ISSUE_ACK ; 123 public : SC_IN (Tcontext_t ) ** in_ISSUE_OOO_ENGINE_ID ; 124 public : SC_IN (Tcontrol_t ) ** in_ISSUE_RD_USE ; 125 public : SC_IN (Tcontrol_t ) ** in_ISSUE_RE_USE ; 126 127 public : SC_OUT(Tcontrol_t ) *** out_ISSUE_GPR_STATUS_VAL ; 128 public : SC_IN (Tcontrol_t ) *** in_ISSUE_GPR_STATUS_ACK ; 129 public : SC_OUT(Tgeneral_data_t ) *** out_ISSUE_GPR_STATUS_DATA ; // type for compatibility with the registerFile 130 131 public : SC_OUT(Tcontrol_t ) *** out_ISSUE_SPR_STATUS_VAL ; 132 public : SC_IN (Tcontrol_t ) *** in_ISSUE_SPR_STATUS_ACK ; 133 public : SC_OUT(Tspecial_data_t ) *** out_ISSUE_SPR_STATUS_DATA ; // type for compatibility with the registerFile 134 135 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 136 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; 137 // public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; 138 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ; 139 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ; 140 141 // public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_GPR_STATUS_VAL ; 142 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_GPR_STATUS_ACK ; 143 // public : SC_OUT(Tgeneral_data_t ) *** out_INSERT_ROB_GPR_STATUS_DATA ; // type for compatibility with the registerFile 144 145 // public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_SPR_STATUS_VAL ; 146 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_SPR_STATUS_ACK ; 147 // public : SC_OUT(Tspecial_data_t ) *** out_INSERT_ROB_SPR_STATUS_DATA ; // type for compatibility with the registerFile 133 148 134 149 // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters.cpp
r88 r136 26 26 uint32_t nb_gpr_write , 27 27 uint32_t nb_spr_write , 28 uint32_t * nb_inst_insert_rob , 29 uint32_t * nb_inst_retire_rob , 28 uint32_t nb_inst_issue , 29 // uint32_t * nb_inst_insert_rob , 30 // uint32_t * nb_inst_retire_rob , 30 31 bool is_toplevel ) 31 32 { … … 37 38 _nb_gpr_write = nb_gpr_write ; 38 39 _nb_spr_write = nb_spr_write ; 39 _nb_inst_insert_rob = nb_inst_insert_rob; 40 _nb_inst_retire_rob = nb_inst_retire_rob; 40 _nb_inst_issue = nb_inst_issue ; 41 // _nb_inst_insert_rob = nb_inst_insert_rob; 42 // _nb_inst_retire_rob = nb_inst_retire_rob; 41 43 42 44 test(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Parameters_print.cpp
r81 r136 34 34 xml.singleton_begin("nb_gpr_write "); xml.attribut("value",toString(_nb_gpr_write )); xml.singleton_end(); 35 35 xml.singleton_begin("nb_spr_write "); xml.attribut("value",toString(_nb_spr_write )); xml.singleton_end(); 36 xml.singleton_begin("nb_inst_issue "); xml.attribut("value",toString(_nb_inst_issue )); xml.singleton_end(); 36 37 37 xml. balise_open("multi_ooo_engine");38 for (uint32_t i=0; i<_nb_ooo_engine; i++)39 {40 xml. balise_open_begin("ooo_engine");41 xml. attribut("id", toString(i));42 xml. balise_open_end();43 xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end();44 xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end();45 xml. balise_close();46 }47 xml. balise_close();38 // xml. balise_open("multi_ooo_engine"); 39 // for (uint32_t i=0; i<_nb_ooo_engine; i++) 40 // { 41 // xml. balise_open_begin("ooo_engine"); 42 // xml. attribut("id", toString(i)); 43 // xml. balise_open_end(); 44 // xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); 45 // xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); 46 // xml. balise_close(); 47 // } 48 // xml. balise_close(); 48 49 xml.balise_close(); 49 50 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue.cpp
r132 r136 36 36 ,_usage (usage) 37 37 { 38 log_printf(FUNC,Register_unit_Glue,FUNCTION, "Begin");38 log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> Begin"),_name.c_str()); 39 39 40 40 // #if DEBUG_Register_unit_Glue == true … … 44 44 // #endif 45 45 46 log_printf(INFO,Register_unit_Glue,FUNCTION, "Allocation");46 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Allocation"),_name.c_str()); 47 47 allocation (); 48 48 … … 50 50 if (usage_is_set(_usage,USE_STATISTICS)) 51 51 { 52 log_printf(INFO,Register_unit_Glue,FUNCTION, "Allocation of statistics");52 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); 53 53 54 54 // Allocation of statistics … … 61 61 { 62 62 // generate the vhdl 63 log_printf(INFO,Register_unit_Glue,FUNCTION, "Generate the vhdl");63 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 64 64 65 65 vhdl(); … … 73 73 constant(); 74 74 #else 75 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - constant");75 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - constant"),_name.c_str()); 76 76 77 77 SC_METHOD (constant); … … 83 83 #endif 84 84 85 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - transition");85 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 86 86 87 87 SC_METHOD (transition); … … 93 93 #endif 94 94 95 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_gpr_read");95 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_read"),_name.c_str()); 96 96 97 97 SC_METHOD (genMealy_gpr_read); … … 131 131 #endif 132 132 133 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_gpr_read_status");133 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_read_status"),_name.c_str()); 134 134 135 135 SC_METHOD (genMealy_gpr_read_status); … … 161 161 #endif 162 162 163 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_gpr_read_registerfile");163 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_read_registerfile"),_name.c_str()); 164 164 165 165 SC_METHOD (genMealy_gpr_read_registerfile); … … 191 191 #endif 192 192 193 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_gpr_write");193 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_write"),_name.c_str()); 194 194 195 195 SC_METHOD (genMealy_gpr_write); … … 222 222 #endif 223 223 224 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_gpr_write_status");224 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_write_status"),_name.c_str()); 225 225 226 226 SC_METHOD (genMealy_gpr_write_status); … … 252 252 #endif 253 253 254 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_gpr_write_registerfile");254 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_gpr_write_registerfile"),_name.c_str()); 255 255 256 256 SC_METHOD (genMealy_gpr_write_registerfile); … … 282 282 #endif 283 283 284 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_spr_read");284 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_read"),_name.c_str()); 285 285 286 286 SC_METHOD (genMealy_spr_read); … … 320 320 #endif 321 321 322 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_spr_read_status");322 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_read_status"),_name.c_str()); 323 323 324 324 SC_METHOD (genMealy_spr_read_status); … … 350 350 #endif 351 351 352 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_spr_read_registerfile");352 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_read_registerfile"),_name.c_str()); 353 353 354 354 SC_METHOD (genMealy_spr_read_registerfile); … … 380 380 #endif 381 381 382 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_spr_write");382 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_write"),_name.c_str()); 383 383 384 384 SC_METHOD (genMealy_spr_write); … … 411 411 #endif 412 412 413 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_spr_write_status");413 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_write_status"),_name.c_str()); 414 414 415 415 SC_METHOD (genMealy_spr_write_status); … … 441 441 #endif 442 442 443 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_spr_write_registerfile");443 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_spr_write_registerfile"),_name.c_str()); 444 444 445 445 SC_METHOD (genMealy_spr_write_registerfile); … … 471 471 #endif 472 472 473 log_printf(INFO,Register_unit_Glue,FUNCTION, "Method - genMealy_insert");473 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_insert"),_name.c_str()); 474 474 475 475 SC_METHOD (genMealy_insert); … … 477 477 // sensitive << (*(in_CLOCK)).neg(); 478 478 sensitive << (*(in_NRESET)); 479 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 480 { 481 uint32_t x=_param->_nb_inst_insert_rob [i]; 482 for (uint32_t j=0; j<x; j++) 483 sensitive << *( in_INSERT_ROB_VAL [i][j]) 484 << *( in_INSERT_ROB_RD_USE [i][j]) 485 << *( in_INSERT_ROB_RE_USE [i][j]) 486 << *( in_INSERT_ROB_GPR_STATUS_ACK [i][j]) 487 << *( in_INSERT_ROB_SPR_STATUS_ACK [i][j]); 488 } 489 #ifdef SYSTEMCASS_SPECIFIC 490 // List dependency information 491 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 492 { 493 uint32_t x=_param->_nb_inst_insert_rob [i]; 494 for (uint32_t j=0; j<x; j++) 495 { 496 (*(out_INSERT_ROB_ACK [i][j]))(*( in_INSERT_ROB_GPR_STATUS_ACK [i][j])); 497 (*(out_INSERT_ROB_ACK [i][j]))(*( in_INSERT_ROB_SPR_STATUS_ACK [i][j])); 498 499 (*(out_INSERT_ROB_GPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_VAL [i][j])); 500 (*(out_INSERT_ROB_GPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_RD_USE [i][j])); 501 (*(out_INSERT_ROB_GPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_SPR_STATUS_ACK [i][j])); 502 503 (*(out_INSERT_ROB_SPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_VAL [i][j])); 504 (*(out_INSERT_ROB_SPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_RE_USE [i][j])); 505 (*(out_INSERT_ROB_SPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_GPR_STATUS_ACK [i][j])); 506 } 507 } 508 #endif 509 510 // log_printf(INFO,Register_unit_Glue,FUNCTION,"Method - genMealy_retire"); 479 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 480 { 481 sensitive << *( in_ISSUE_VAL [i]) 482 << *( in_ISSUE_RD_USE [i]) 483 << *( in_ISSUE_RE_USE [i]); 484 485 if (_param->_have_port_ooo_engine_id == true) 486 sensitive << *( in_ISSUE_OOO_ENGINE_ID [i]); 487 488 for (uint32_t j=0; j<_param->_nb_ooo_engine; ++j) 489 sensitive << *( in_ISSUE_GPR_STATUS_ACK [j][i]) 490 << *( in_ISSUE_SPR_STATUS_ACK [j][i]); 491 } 492 493 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 494 // { 495 // uint32_t x=_param->_nb_inst_insert_rob [i]; 496 // for (uint32_t j=0; j<x; j++) 497 // sensitive << *( in_INSERT_ROB_VAL [i][j]) 498 // << *( in_INSERT_ROB_RD_USE [i][j]) 499 // << *( in_INSERT_ROB_RE_USE [i][j]) 500 // << *( in_INSERT_ROB_GPR_STATUS_ACK [i][j]) 501 // << *( in_INSERT_ROB_SPR_STATUS_ACK [i][j]); 502 // } 503 #ifdef SYSTEMCASS_SPECIFIC 504 // // List dependency information 505 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 506 // { 507 // uint32_t x=_param->_nb_inst_insert_rob [i]; 508 // for (uint32_t j=0; j<x; j++) 509 // { 510 // (*(out_INSERT_ROB_ACK [i][j]))(*( in_INSERT_ROB_GPR_STATUS_ACK [i][j])); 511 // (*(out_INSERT_ROB_ACK [i][j]))(*( in_INSERT_ROB_SPR_STATUS_ACK [i][j])); 512 513 // (*(out_INSERT_ROB_GPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_VAL [i][j])); 514 // (*(out_INSERT_ROB_GPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_RD_USE [i][j])); 515 // (*(out_INSERT_ROB_GPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_SPR_STATUS_ACK [i][j])); 516 517 // (*(out_INSERT_ROB_SPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_VAL [i][j])); 518 // (*(out_INSERT_ROB_SPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_RE_USE [i][j])); 519 // (*(out_INSERT_ROB_SPR_STATUS_VAL [i][j]))(*( in_INSERT_ROB_GPR_STATUS_ACK [i][j])); 520 // } 521 // } 522 #endif 523 524 // log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Method - genMealy_retire"),_name.c_str()); 511 525 512 526 // SC_METHOD (genMealy_retire); … … 567 581 } 568 582 #endif 569 log_printf(FUNC,Register_unit_Glue,FUNCTION, "End");583 log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> End"),_name.c_str()); 570 584 }; 571 585 … … 574 588 Register_unit_Glue::~Register_unit_Glue (void) 575 589 { 576 log_printf(FUNC,Register_unit_Glue,FUNCTION, "Begin");590 log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> Begin"),_name.c_str()); 577 591 578 592 #ifdef STATISTICS 579 593 if (usage_is_set(_usage,USE_STATISTICS)) 580 594 { 581 log_printf(INFO,Register_unit_Glue,FUNCTION, "Generate Statistics file");595 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 582 596 583 597 delete _stat; … … 585 599 #endif 586 600 587 log_printf(INFO,Register_unit_Glue,FUNCTION, "Deallocation");601 log_printf(INFO,Register_unit_Glue,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 588 602 deallocation (); 589 603 590 log_printf(FUNC,Register_unit_Glue,FUNCTION, "End");604 log_printf(FUNC,Register_unit_Glue,FUNCTION,_("<%s> End"),_name.c_str()); 591 605 }; 592 606 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_allocation.cpp
r131 r136 177 177 } 178 178 179 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 180 { 181 ALLOC2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 182 183 _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 184 _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 185 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE,"rd_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 186 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE,"re_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 187 188 ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 189 } 190 191 { 192 ALLOC2_INTERFACE_BEGIN("insert_rob_gpr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 193 194 _ALLOC2_VALACK_OUT(out_INSERT_ROB_GPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 195 _ALLOC2_VALACK_IN ( in_INSERT_ROB_GPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 196 _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_GPR_STATUS_DATA,"data",Tgeneral_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 197 198 ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 199 } 200 201 { 202 ALLOC2_INTERFACE_BEGIN("insert_rob_spr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 203 204 _ALLOC2_VALACK_OUT(out_INSERT_ROB_SPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 205 _ALLOC2_VALACK_IN ( in_INSERT_ROB_SPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 206 _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_SPR_STATUS_DATA,"data",Tspecial_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 207 208 ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 209 } 179 // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 180 { 181 ALLOC1_INTERFACE_BEGIN("issue",IN,WEST,_("Interface to update status (insert)"),_param->_nb_inst_issue); 182 183 ALLOC1_VALACK_IN ( in_ISSUE_VAL ,VAL); 184 ALLOC1_VALACK_OUT(out_ISSUE_ACK ,ACK); 185 ALLOC1_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t,_param->_size_ooo_engine_id); 186 ALLOC1_SIGNAL_IN ( in_ISSUE_RD_USE ,"rd_use" ,Tcontrol_t, 1); 187 ALLOC1_SIGNAL_IN ( in_ISSUE_RE_USE ,"re_use" ,Tcontrol_t, 1); 188 189 ALLOC1_INTERFACE_END(_param->_nb_inst_issue); 190 } 191 192 { 193 ALLOC2_INTERFACE_BEGIN("issue_gpr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_issue); 194 195 ALLOC2_VALACK_OUT(out_ISSUE_GPR_STATUS_VAL ,VAL ); 196 ALLOC2_VALACK_IN ( in_ISSUE_GPR_STATUS_ACK ,ACK ); 197 ALLOC2_SIGNAL_OUT(out_ISSUE_GPR_STATUS_DATA,"data",Tgeneral_data_t,1); 198 199 ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_issue); 200 } 201 202 { 203 ALLOC2_INTERFACE_BEGIN("issue_spr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine, _param->_nb_inst_issue); 204 205 ALLOC2_VALACK_OUT(out_ISSUE_SPR_STATUS_VAL ,VAL ); 206 ALLOC2_VALACK_IN ( in_ISSUE_SPR_STATUS_ACK ,ACK ); 207 ALLOC2_SIGNAL_OUT(out_ISSUE_SPR_STATUS_DATA,"data",Tspecial_data_t,1); 208 209 ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_issue); 210 } 211 212 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 213 // { 214 // ALLOC2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 215 216 // _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 217 // _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 218 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE,"rd_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 219 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE,"re_use",Tcontrol_t, 1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 220 221 // ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 222 // } 223 224 // { 225 // ALLOC2_INTERFACE_BEGIN("insert_rob_gpr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 226 227 // _ALLOC2_VALACK_OUT(out_INSERT_ROB_GPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 228 // _ALLOC2_VALACK_IN ( in_INSERT_ROB_GPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 229 // _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_GPR_STATUS_DATA,"data",Tgeneral_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 230 231 // ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 232 // } 233 234 // { 235 // ALLOC2_INTERFACE_BEGIN("insert_rob_spr_status",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 236 237 // _ALLOC2_VALACK_OUT(out_INSERT_ROB_SPR_STATUS_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 238 // _ALLOC2_VALACK_IN ( in_INSERT_ROB_SPR_STATUS_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 239 // _ALLOC2_SIGNAL_OUT(out_INSERT_ROB_SPR_STATUS_DATA,"data",Tspecial_data_t,1,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 240 241 // ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 242 // } 210 243 211 244 // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_constant.cpp
r131 r136 33 33 PORT_WRITE(out_SPR_WRITE_STATUS_DATA [i][j],1); 34 34 35 for (uint32_t j=0; j<_param->_nb_inst_insert_rob[i]; ++j)36 {37 PORT_WRITE(out_INSERT_ROB_GPR_STATUS_DATA [i][j],0);38 PORT_WRITE(out_INSERT_ROB_SPR_STATUS_DATA [i][j],0);39 }35 // for (uint32_t j=0; j<_param->_nb_inst_insert_rob[i]; ++j) 36 // { 37 // PORT_WRITE(out_INSERT_ROB_GPR_STATUS_DATA [i][j],0); 38 // PORT_WRITE(out_INSERT_ROB_SPR_STATUS_DATA [i][j],0); 39 // } 40 40 } 41 42 for (uint32_t i=0; i<_param->_nb_ooo_engine; ++i) 43 for (uint32_t j=0; j<_param->_nb_inst_issue; ++j) 44 { 45 PORT_WRITE(out_ISSUE_GPR_STATUS_DATA [i][j],0); 46 PORT_WRITE(out_ISSUE_SPR_STATUS_DATA [i][j],0); 47 } 41 48 42 49 log_end(Register_unit_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_deallocation.cpp
r128 r136 84 84 DELETE2_SIGNAL(out_SPR_WRITE_STATUS_DATA ,_param->_nb_ooo_engine,_param->_nb_spr_write,1 ); 85 85 86 DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 87 DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 88 DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 89 DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 86 DELETE1_SIGNAL( in_ISSUE_VAL ,_param->_nb_inst_issue,1); 87 DELETE1_SIGNAL(out_ISSUE_ACK ,_param->_nb_inst_issue,1); 88 DELETE1_SIGNAL( in_ISSUE_OOO_ENGINE_ID ,_param->_nb_inst_issue,_param->_size_ooo_engine_id); 89 DELETE1_SIGNAL( in_ISSUE_RD_USE ,_param->_nb_inst_issue,1); 90 DELETE1_SIGNAL( in_ISSUE_RE_USE ,_param->_nb_inst_issue,1); 90 91 91 DELETE2_SIGNAL(out_I NSERT_ROB_GPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1);92 DELETE2_SIGNAL( in_I NSERT_ROB_GPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1);93 DELETE2_SIGNAL(out_I NSERT_ROB_GPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1);92 DELETE2_SIGNAL(out_ISSUE_GPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); 93 DELETE2_SIGNAL( in_ISSUE_GPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); 94 DELETE2_SIGNAL(out_ISSUE_GPR_STATUS_DATA ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); 94 95 95 DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 96 DELETE2_SIGNAL( in_INSERT_ROB_SPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 97 DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 96 DELETE2_SIGNAL(out_ISSUE_SPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); 97 DELETE2_SIGNAL( in_ISSUE_SPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); 98 DELETE2_SIGNAL(out_ISSUE_SPR_STATUS_DATA ,_param->_nb_ooo_engine,_param->_nb_inst_issue,1); 99 100 // DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 101 // DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 102 // DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 103 // DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 104 105 // DELETE2_SIGNAL(out_INSERT_ROB_GPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 106 // DELETE2_SIGNAL( in_INSERT_ROB_GPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 107 // DELETE2_SIGNAL(out_INSERT_ROB_GPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 108 109 // DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 110 // DELETE2_SIGNAL( in_INSERT_ROB_SPR_STATUS_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 111 // DELETE2_SIGNAL(out_INSERT_ROB_SPR_STATUS_DATA,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 98 112 } 99 113 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_genMealy_insert.cpp
r128 r136 28 28 if (PORT_READ(in_NRESET)) 29 29 { 30 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 31 for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 32 { 33 Tcontrol_t val = PORT_READ(in_INSERT_ROB_VAL [i][j]); 34 Tcontrol_t gpr_use = PORT_READ(in_INSERT_ROB_RD_USE [i][j]); 35 Tcontrol_t spr_use = PORT_READ(in_INSERT_ROB_RE_USE [i][j]); 36 Tcontrol_t gpr_status_ack = PORT_READ(in_INSERT_ROB_GPR_STATUS_ACK [i][j]); 37 Tcontrol_t spr_status_ack = PORT_READ(in_INSERT_ROB_SPR_STATUS_ACK [i][j]); 38 39 Tcontrol_t ack = (gpr_status_ack and 40 spr_status_ack); 41 Tcontrol_t gpr_status_val = (val and 42 gpr_use and 43 spr_status_ack); 44 Tcontrol_t spr_status_val = (val and 45 spr_use and 46 gpr_status_ack); 30 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 31 { 32 Tcontrol_t val = PORT_READ(in_ISSUE_VAL [i]); 33 Tcontrol_t gpr_use = PORT_READ(in_ISSUE_RD_USE [i]); 34 Tcontrol_t spr_use = PORT_READ(in_ISSUE_RE_USE [i]); 35 Tcontext_t ooo_engine_id = (_param->_have_port_ooo_engine_id)?PORT_READ(in_ISSUE_VAL [i]):0; 36 Tcontrol_t gpr_status_ack = PORT_READ(in_ISSUE_GPR_STATUS_ACK [ooo_engine_id][i]); 37 Tcontrol_t spr_status_ack = PORT_READ(in_ISSUE_SPR_STATUS_ACK [ooo_engine_id][i]); 47 38 48 log_printf(TRACE,Register_unit_Glue,FUNCTION," * insert_rob [%d][%d]",i,j); 49 log_printf(TRACE,Register_unit_Glue,FUNCTION," * val (r) : %d",val ); 50 log_printf(TRACE,Register_unit_Glue,FUNCTION," * ack (w) : %d",ack ); 51 log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_use (rd) (r) : %d",gpr_use ); 52 log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_val (w) : %d",gpr_status_val); 53 log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_ack (r) : %d",gpr_status_ack); 54 log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_use (re) (r) : %d",spr_use ); 55 log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_val (w) : %d",spr_status_val); 56 log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_ack (r) : %d",spr_status_ack); 39 Tcontrol_t ack = (gpr_status_ack and 40 spr_status_ack); 41 Tcontrol_t gpr_status_val = (val and 42 gpr_use and 43 spr_status_ack); 44 Tcontrol_t spr_status_val = (val and 45 spr_use and 46 gpr_status_ack); 47 48 log_printf(TRACE,Register_unit_Glue,FUNCTION," * issue [%d]",i); 49 log_printf(TRACE,Register_unit_Glue,FUNCTION," * ooo_engine_id (w) : %d",ooo_engine_id ); 50 log_printf(TRACE,Register_unit_Glue,FUNCTION," * val (r) : %d",val ); 51 log_printf(TRACE,Register_unit_Glue,FUNCTION," * ack (w) : %d",ack ); 52 log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_use (rd) (r) : %d",gpr_use ); 53 log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_val (w) : %d",gpr_status_val); 54 log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_ack (r) : %d",gpr_status_ack); 55 log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_use (re) (r) : %d",spr_use ); 56 log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_val (w) : %d",spr_status_val); 57 log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_ack (r) : %d",spr_status_ack); 58 59 PORT_WRITE(out_ISSUE_ACK [i], ack ); 60 PORT_WRITE(out_ISSUE_GPR_STATUS_VAL [ooo_engine_id][i], gpr_status_val); 61 PORT_WRITE(out_ISSUE_SPR_STATUS_VAL [ooo_engine_id][i], spr_status_val); 57 62 58 PORT_WRITE(out_INSERT_ROB_ACK [i][j], ack ); 59 PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], gpr_status_val); 60 PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], spr_status_val); 63 for (uint32_t j=0; j<_param->_nb_ooo_engine; ++j) 64 if (j!=ooo_engine_id) 65 { 66 PORT_WRITE(out_ISSUE_GPR_STATUS_VAL [j][i], 0); 67 PORT_WRITE(out_ISSUE_SPR_STATUS_VAL [j][i], 0); 68 } 61 69 } 62 70 } 63 71 else 64 72 { 65 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 66 for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 67 { 68 PORT_WRITE(out_INSERT_ROB_ACK [i][j], 0); 69 PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], 0); 70 PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], 0); 71 } 73 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 74 { 75 PORT_WRITE(out_ISSUE_ACK [i], 0); 76 for (uint32_t j=0; j<_param->_nb_ooo_engine; j++) 77 { 78 PORT_WRITE(out_ISSUE_GPR_STATUS_VAL [j][i], 0); 79 PORT_WRITE(out_ISSUE_SPR_STATUS_VAL [j][i], 0); 80 } 81 } 72 82 } 83 84 // if (PORT_READ(in_NRESET)) 85 // { 86 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 87 // for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 88 // { 89 // Tcontrol_t val = PORT_READ(in_INSERT_ROB_VAL [i][j]); 90 // Tcontrol_t gpr_use = PORT_READ(in_INSERT_ROB_RD_USE [i][j]); 91 // Tcontrol_t spr_use = PORT_READ(in_INSERT_ROB_RE_USE [i][j]); 92 // Tcontrol_t gpr_status_ack = PORT_READ(in_INSERT_ROB_GPR_STATUS_ACK [i][j]); 93 // Tcontrol_t spr_status_ack = PORT_READ(in_INSERT_ROB_SPR_STATUS_ACK [i][j]); 94 95 // Tcontrol_t ack = (gpr_status_ack and 96 // spr_status_ack); 97 // Tcontrol_t gpr_status_val = (val and 98 // gpr_use and 99 // spr_status_ack); 100 // Tcontrol_t spr_status_val = (val and 101 // spr_use and 102 // gpr_status_ack); 103 104 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * insert_rob [%d][%d]",i,j); 105 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * val (r) : %d",val ); 106 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * ack (w) : %d",ack ); 107 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_use (rd) (r) : %d",gpr_use ); 108 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_val (w) : %d",gpr_status_val); 109 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * gpr_status_ack (r) : %d",gpr_status_ack); 110 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_use (re) (r) : %d",spr_use ); 111 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_val (w) : %d",spr_status_val); 112 // log_printf(TRACE,Register_unit_Glue,FUNCTION," * spr_status_ack (r) : %d",spr_status_ack); 113 114 // PORT_WRITE(out_INSERT_ROB_ACK [i][j], ack ); 115 // PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], gpr_status_val); 116 // PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], spr_status_val); 117 // } 118 // } 119 // else 120 // { 121 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 122 // for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 123 // { 124 // PORT_WRITE(out_INSERT_ROB_ACK [i][j], 0); 125 // PORT_WRITE(out_INSERT_ROB_GPR_STATUS_VAL [i][j], 0); 126 // PORT_WRITE(out_INSERT_ROB_SPR_STATUS_VAL [i][j], 0); 127 // } 128 // } 73 129 74 130 log_end(Register_unit_Glue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/src/Register_unit_Glue_vhdl_body.cpp
r88 r136 245 245 246 246 //----------------------------------- 247 // I NSERT_ROB247 // ISSUE 248 248 //----------------------------------- 249 249 250 250 vhdl->set_body (""); 251 251 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 252 { 253 uint32_t x=_param->_nb_inst_insert_rob [i]; 254 for (uint32_t j=0; j<x; j++) 255 { 256 vhdl->set_body ("out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); 257 vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK and"); 258 vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); 259 260 vhdl->set_body ("out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); 261 vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 262 vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE and"); 263 vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); 264 265 vhdl->set_body ("out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); 266 vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 267 vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE and"); 268 vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); 269 } 270 } 271 272 //----------------------------------- 273 // RETIRE_ROB 274 //----------------------------------- 275 vhdl->set_body (""); 276 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 277 { 278 uint32_t x=_param->_nb_inst_retire_rob [i]; 279 for (uint32_t j=0; j<x; j++) 280 { 281 vhdl->set_body ("out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); 282 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 283 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 284 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 285 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 286 287 vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); 288 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 289 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE and"); 290 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 291 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 292 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 293 294 vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); 295 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 296 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE and"); 297 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 298 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 299 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 300 301 vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); 302 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 303 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE and"); 304 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 305 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 306 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 307 308 vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); 309 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 310 vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE and"); 311 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 312 vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 313 vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK;"); 314 } 315 } 252 for (uint32_t j=0; j<_param->_nb_inst_issue; j++) 253 { 254 vhdl->set_body ("out_ISSUE_"+toString(j)+"_ACK <="); 255 vhdl->set_body ("\tin_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK and"); 256 vhdl->set_body ("\tin_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 257 if (_param->_have_port_ooo_engine_id) 258 { 259 vhdl->set_body ("when out_ISSUE_"+toString(j)+"_OOO_ENGINE_ID = "+std_logic_conv(_param->_size_ooo_engine_id,i)); 260 vhdl->set_body ("else '0'"); 261 } 262 vhdl->set_body (";"); 263 264 265 vhdl->set_body ("out_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); 266 vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_VAL and"); 267 vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_RD_USE and"); 268 vhdl->set_body ("\tin_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 269 if (_param->_have_port_ooo_engine_id) 270 { 271 vhdl->set_body ("when out_ISSUE_"+toString(j)+"_OOO_ENGINE_ID = "+std_logic_conv(_param->_size_ooo_engine_id,i)); 272 vhdl->set_body ("else '0'"); 273 } 274 vhdl->set_body (";"); 275 276 vhdl->set_body ("out_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); 277 vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_VAL and"); 278 vhdl->set_body ("\tin_ISSUE_"+toString(j)+"_RE_USE and"); 279 vhdl->set_body ("\tin_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 280 if (_param->_have_port_ooo_engine_id) 281 { 282 vhdl->set_body ("when out_ISSUE_"+toString(j)+"_OOO_ENGINE_ID = "+std_logic_conv(_param->_size_ooo_engine_id,i)); 283 vhdl->set_body ("else '0'"); 284 } 285 vhdl->set_body (";"); 286 } 287 288 // //----------------------------------- 289 // // INSERT_ROB 290 // //----------------------------------- 291 292 // vhdl->set_body (""); 293 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 294 // { 295 // uint32_t x=_param->_nb_inst_insert_rob [i]; 296 // for (uint32_t j=0; j<x; j++) 297 // { 298 // vhdl->set_body ("out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); 299 // vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK and"); 300 // vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); 301 302 // vhdl->set_body ("out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); 303 // vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 304 // vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE and"); 305 // vhdl->set_body ("\tin_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); 306 307 // vhdl->set_body ("out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL <="); 308 // vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 309 // vhdl->set_body ("\tin_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE and"); 310 // vhdl->set_body ("\tin_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK;"); 311 // } 312 // } 313 314 // //----------------------------------- 315 // // RETIRE_ROB 316 // //----------------------------------- 317 // vhdl->set_body (""); 318 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 319 // { 320 // uint32_t x=_param->_nb_inst_retire_rob [i]; 321 // for (uint32_t j=0; j<x; j++) 322 // { 323 // vhdl->set_body ("out_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_ACK <="); 324 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 325 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 326 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 327 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 328 329 // vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); 330 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 331 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_OLD_USE and"); 332 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 333 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 334 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 335 336 // vhdl->set_body ("out_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); 337 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 338 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RD_NEW_USE and"); 339 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 340 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 341 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 342 343 // vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_VAL <="); 344 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 345 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_OLD_USE and"); 346 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 347 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 348 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK;"); 349 350 // vhdl->set_body ("out_RETIRE_ROB_SPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_VAL <="); 351 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_VAL and"); 352 // vhdl->set_body ("\tin_RETIRE_ROB_"+toString(i)+"_"+toString(j)+"_RE_NEW_USE and"); 353 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK and"); 354 // vhdl->set_body ("\tin_RETIRE_ROB_GPR_STATUS_NEW_"+toString(i)+"_"+toString(j)+"_ACK and"); 355 // vhdl->set_body ("\tin_RETIRE_ROB_SPR_STATUS_OLD_"+toString(i)+"_"+toString(j)+"_ACK;"); 356 // } 357 // } 316 358 317 359 log_printf(FUNC,Register_unit_Glue,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Parameters.h
r88 r136 40 40 public : uint32_t * _nb_general_register ; 41 41 public : uint32_t * _nb_special_register ; 42 public : uint32_t * _nb_inst_insert_rob ; 43 public : uint32_t * _nb_inst_retire_rob ; 42 public : uint32_t _nb_inst_issue ; 43 // public : uint32_t * _nb_inst_insert_rob ; 44 // public : uint32_t * _nb_inst_retire_rob ; 44 45 45 46 //public : bool _have_port_ooo_engine_id ; … … 73 74 uint32_t * nb_general_register , 74 75 uint32_t * nb_special_register , 75 uint32_t * nb_inst_insert_rob , 76 uint32_t * nb_inst_retire_rob , 76 uint32_t nb_inst_issue , 77 // uint32_t * nb_inst_insert_rob , 78 // uint32_t * nb_inst_retire_rob , 77 79 bool is_toplevel=false); 78 80 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/include/Register_unit.h
r131 r136 93 93 public : SC_IN (Tspecial_address_t) ** in_SPR_WRITE_NUM_REG ; 94 94 public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; 95 96 // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 97 public : SC_IN (Tcontrol_t ) ** in_ISSUE_VAL ; 98 public : SC_OUT(Tcontrol_t ) ** out_ISSUE_ACK ; 99 public : SC_IN (Tcontext_t ) ** in_ISSUE_OOO_ENGINE_ID ; 100 public : SC_IN (Tcontrol_t ) ** in_ISSUE_RD_USE ; 101 public : SC_IN (Tgeneral_address_t) ** in_ISSUE_RD_NUM_REG ; // use=1 : status[num_reg]<- 0 102 public : SC_IN (Tcontrol_t ) ** in_ISSUE_RE_USE ; 103 public : SC_IN (Tspecial_address_t) ** in_ISSUE_RE_NUM_REG ; 95 104 96 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~97 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ;98 public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ;99 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ;100 public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0101 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ;102 public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ;105 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 106 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ; 107 // public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ; 108 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ; 109 // public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0 110 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ; 111 // public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ; 103 112 104 113 // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters.cpp
r124 r136 33 33 uint32_t * nb_general_register , 34 34 uint32_t * nb_special_register , 35 uint32_t * nb_inst_insert_rob , 36 uint32_t * nb_inst_retire_rob , 35 uint32_t nb_inst_issue , 36 // uint32_t * nb_inst_insert_rob , 37 // uint32_t * nb_inst_retire_rob , 37 38 bool is_toplevel ) 38 39 { … … 53 54 _nb_general_register = nb_general_register ; 54 55 _nb_special_register = nb_special_register ; 55 _nb_inst_insert_rob = nb_inst_insert_rob ; 56 _nb_inst_retire_rob = nb_inst_retire_rob ; 56 _nb_inst_issue = nb_inst_issue ; 57 // _nb_inst_insert_rob = nb_inst_insert_rob ; 58 // _nb_inst_retire_rob = nb_inst_retire_rob ; 57 59 58 60 _size_gpr_address = log2(nb_general_register [0]); … … 101 103 (_nb_gpr_read , 102 104 // _nb_gpr_write+_nb_inst_insert_rob[i]+2*_nb_inst_retire_rob[i], 103 _nb_gpr_write+_nb_inst_insert_rob[i], 105 // _nb_gpr_write+_nb_inst_insert_rob[i], 106 _nb_gpr_write+_nb_inst_issue, 104 107 0, 105 108 nb_general_register[i], … … 122 125 (_nb_spr_read , 123 126 // _nb_spr_write+_nb_inst_insert_rob[i]+2*_nb_inst_retire_rob[i], 124 _nb_spr_write+_nb_inst_insert_rob[i], 127 // _nb_spr_write+_nb_inst_insert_rob[i], 128 _nb_spr_write+_nb_inst_issue, 125 129 0, 126 130 nb_special_register[i], … … 134 138 } 135 139 136 _param_glue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::register_unit_glue::Parameters (_nb_ooo_engine , 137 size_general_data , 138 size_special_data , 139 _nb_gpr_read , 140 _nb_spr_read , 141 _nb_gpr_write , 142 _nb_spr_write , 143 _nb_inst_insert_rob , 144 _nb_inst_retire_rob ); 140 _param_glue = new morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::register_unit_glue::Parameters 141 (_nb_ooo_engine , 142 size_general_data , 143 size_special_data , 144 _nb_gpr_read , 145 _nb_spr_read , 146 _nb_gpr_write , 147 _nb_spr_write , 148 _nb_inst_issue 149 // _nb_inst_insert_rob , 150 // _nb_inst_retire_rob 151 ); 145 152 146 153 test(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Parameters_print.cpp
r81 r136 39 39 xml. singleton_begin("nb_spr_port_read_by_bank "); xml.attribut("value",toString(_nb_spr_port_read_by_bank )); xml.singleton_end(); 40 40 xml. singleton_begin("nb_spr_port_write_by_bank"); xml.attribut("value",toString(_nb_spr_port_write_by_bank)); xml.singleton_end(); 41 xml. singleton_begin("nb_inst_issue "); xml.attribut("value",toString(_nb_inst_issue )); xml.singleton_end(); 41 42 42 xml. balise_open("multi_ooo_engine");43 for (uint32_t i=0; i<_nb_ooo_engine; i++)44 {45 xml. balise_open_begin("ooo_engine");46 xml. attribut("id", toString(i));47 xml. balise_open_end();48 xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end();49 xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end();50 xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end();51 xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end();52 xml. balise_close();53 }54 xml. balise_close();43 // xml. balise_open("multi_ooo_engine"); 44 // for (uint32_t i=0; i<_nb_ooo_engine; i++) 45 // { 46 // xml. balise_open_begin("ooo_engine"); 47 // xml. attribut("id", toString(i)); 48 // xml. balise_open_end(); 49 // xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end(); 50 // xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end(); 51 // xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); 52 // xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); 53 // xml. balise_close(); 54 // } 55 // xml. balise_close(); 55 56 56 57 // xml. text (_param_glue->print(depth+1)); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit.cpp
r131 r136 35 35 ,_usage (usage) 36 36 { 37 log_printf(FUNC,Register_unit,FUNCTION, "Begin");37 log_printf(FUNC,Register_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 38 38 39 39 // #if DEBUG_Register_unit == true … … 43 43 // #endif 44 44 45 log_printf(INFO,Register_unit,FUNCTION, "Allocation");45 log_printf(INFO,Register_unit,FUNCTION,_("<%s> Allocation"),_name.c_str()); 46 46 allocation ( 47 47 #ifdef STATISTICS … … 63 63 { 64 64 // generate the vhdl 65 log_printf(INFO,Register_unit,FUNCTION, "Generate the vhdl");65 log_printf(INFO,Register_unit,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 66 66 67 67 vhdl(); … … 73 73 { 74 74 //#if defined(STATISTICS) or defined(VHDL_TESTBENCH) 75 log_printf(INFO,Register_unit,FUNCTION, "Method - transition");75 log_printf(INFO,Register_unit,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 76 76 77 77 SC_METHOD (transition); … … 85 85 } 86 86 #endif 87 log_printf(FUNC,Register_unit,FUNCTION, "End");87 log_printf(FUNC,Register_unit,FUNCTION,_("<%s> End"),_name.c_str()); 88 88 }; 89 89 … … 92 92 Register_unit::~Register_unit (void) 93 93 { 94 log_printf(FUNC,Register_unit,FUNCTION, "Begin");94 log_printf(FUNC,Register_unit,FUNCTION,_("<%s> Begin"),_name.c_str()); 95 95 96 96 #ifdef STATISTICS 97 97 if (usage_is_set(_usage,USE_STATISTICS)) 98 98 { 99 log_printf(INFO,Register_unit,FUNCTION, "Generate Statistics file");99 log_printf(INFO,Register_unit,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 100 100 delete _stat; 101 101 } 102 102 #endif 103 103 104 log_printf(INFO,Register_unit,FUNCTION, "Deallocation");104 log_printf(INFO,Register_unit,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 105 105 deallocation (); 106 106 107 log_printf(FUNC,Register_unit,FUNCTION, "End");107 log_printf(FUNC,Register_unit,FUNCTION,_("<%s> End"),_name.c_str()); 108 108 }; 109 109 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_allocation.cpp
r131 r136 106 106 } 107 107 108 // ~~~~~[ Interface "i nsert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~108 // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 109 109 { 110 ALLOC 2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]);110 ALLOC1_INTERFACE_BEGIN("issue",IN,WEST,_("Interface to update status (issue)"),_param->_nb_inst_issue); 111 111 112 _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 113 _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 114 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 115 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_gpr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 116 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 117 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_spr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 112 ALLOC1_VALACK_IN ( in_ISSUE_VAL ,VAL); 113 ALLOC1_VALACK_OUT(out_ISSUE_ACK ,ACK); 114 ALLOC1_SIGNAL_IN ( in_ISSUE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id); 115 ALLOC1_SIGNAL_IN ( in_ISSUE_RD_USE ,"rd_use" ,Tcontrol_t ,1 ); 116 ALLOC1_SIGNAL_IN ( in_ISSUE_RD_NUM_REG ,"rd_num_reg" ,Tgeneral_address_t,_param->_size_gpr_address ); 117 ALLOC1_SIGNAL_IN ( in_ISSUE_RE_USE ,"re_use" ,Tcontrol_t ,1 ); 118 ALLOC1_SIGNAL_IN ( in_ISSUE_RE_NUM_REG ,"re_num_reg" ,Tspecial_address_t,_param->_size_spr_address ); 118 119 119 ALLOC 2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]);120 ALLOC1_INTERFACE_END(_param->_nb_inst_issue); 120 121 } 122 123 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 124 // { 125 // ALLOC2_INTERFACE_BEGIN("insert_rob",IN,WEST,_("Interface to update status (insert)"),_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 126 127 // _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL ,VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 128 // _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK ,ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 129 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 130 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_gpr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 131 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 132 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_spr_address,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 133 134 // ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1]); 135 // } 121 136 122 137 // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 375 390 // ------------------------------------------------------------------- 376 391 { 392 uint32_t x=0; 393 377 394 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 378 395 { … … 413 430 } 414 431 415 uint32_t x=0;416 432 for (uint32_t j=0; j<_param->_nb_gpr_write; j++) 417 433 { … … 439 455 } 440 456 441 for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 442 { 443 dest = _name+"_glue"; 444 445 #ifdef POSITION 446 _component->interface_map (src , "write_"+toString(j), 447 dest,"insert_rob_gpr_status_"+toString(i)+"_"+toString(j)); 448 #endif 449 450 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", 451 dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); 452 COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", 453 dest, "in_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 454 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", 455 dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); 456 // dest,"out_CONST_0"); 457 458 dest = _name; 459 460 PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", 461 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); 462 463 x++; 464 } 457 // for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 458 // { 459 // dest = _name+"_glue"; 460 461 // #ifdef POSITION 462 // _component->interface_map (src , "write_"+toString(j), 463 // dest,"insert_rob_gpr_status_"+toString(i)+"_"+toString(j)); 464 // #endif 465 466 // COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", 467 // dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); 468 // COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", 469 // dest, "in_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 470 // COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", 471 // dest,"out_INSERT_ROB_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); 472 // // dest,"out_CONST_0"); 473 474 // dest = _name; 475 476 // PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", 477 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); 478 479 // x++; 480 // } 481 482 for (uint32_t j=0; j<_param->_nb_inst_issue; j++) 483 { 484 dest = _name+"_glue"; 485 486 #ifdef POSITION 487 _component->interface_map (src ,"write_"+toString(j), 488 dest,"issue_gpr_status_"+toString(i)+"_"+toString(j)); 489 #endif 490 491 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", 492 dest,"out_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); 493 COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", 494 dest, "in_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 495 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", 496 dest,"out_ISSUE_GPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); 497 // dest,"out_CONST_0"); 498 499 dest = _name; 500 501 PORT_MAP (_component,src , "in_WRITE_"+toString(x)+"_ADDRESS", 502 dest, "in_ISSUE_"+toString(j)+"_RD_NUM_REG"); 503 504 x++; 505 } 465 506 } 466 507 }// gpr_status … … 534 575 // ------------------------------------------------------------------- 535 576 { 577 uint32_t x=0; 536 578 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 537 579 { … … 572 614 } 573 615 574 uint32_t x=0;575 616 for (uint32_t j=0; j<_param->_nb_spr_write; j++) 576 617 { … … 597 638 x++; 598 639 } 640 641 // for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 642 // { 643 // dest = _name+"_glue"; 644 645 // #ifdef POSITION 646 // _component->interface_map (src , "write_"+toString(x), 647 // dest,"insert_rob_spr_status_"+toString(i)+"_"+toString(j)); 648 // #endif 649 650 // COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", 651 // dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); 652 // COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", 653 // dest, "in_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 654 // COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", 655 // dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); 656 // // dest,"out_CONST_0"); 657 658 // dest = _name; 659 660 // PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", 661 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); 662 663 // x++; 664 // } 599 665 600 for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++) 601 { 602 dest = _name+"_glue"; 603 604 #ifdef POSITION 605 _component->interface_map (src , "write_"+toString(x), 606 dest,"insert_rob_spr_status_"+toString(i)+"_"+toString(j)); 607 #endif 608 609 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", 610 dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); 611 COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", 612 dest, "in_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 613 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", 614 dest,"out_INSERT_ROB_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); 615 // dest,"out_CONST_0"); 616 617 dest = _name; 618 619 PORT_MAP (_component,src , "in_WRITE_" +toString(x)+"_ADDRESS", 620 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); 621 622 x++; 623 } 666 for (uint32_t j=0; j<_param->_nb_inst_issue; j++) 667 { 668 dest = _name+"_glue"; 669 670 #ifdef POSITION 671 _component->interface_map (src , "write_"+toString(x), 672 dest,"issue_spr_status_"+toString(i)+"_"+toString(j)); 673 #endif 674 675 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_VAL", 676 dest,"out_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_VAL"); 677 COMPONENT_MAP(_component,src ,"out_WRITE_" +toString(x)+"_ACK", 678 dest, "in_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_ACK"); 679 COMPONENT_MAP(_component,src , "in_WRITE_" +toString(x)+"_DATA", 680 dest,"out_ISSUE_SPR_STATUS_"+toString(i)+"_"+toString(j)+"_DATA"); 681 // dest,"out_CONST_0"); 682 683 dest = _name; 684 685 PORT_MAP (_component,src , "in_WRITE_"+toString(x)+"_ADDRESS", 686 dest, "in_ISSUE_"+toString(j)+"_RE_NUM_REG"); 687 688 x++; 689 } 690 624 691 } 625 692 }// spr_status … … 751 818 } 752 819 753 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 820 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 821 // { 822 // uint32_t x = _param->_nb_inst_insert_rob [i]; 823 824 // for (uint32_t j=0; j<x; j++) 825 // { 826 // dest = _name; 827 828 // #ifdef POSITION 829 // _component->interface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), 830 // dest,"insert_rob_"+toString(i)+"_"+toString(j)); 831 // #endif 832 833 // PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL", 834 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL"); 835 // PORT_MAP(_component,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK", 836 // dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK"); 837 // PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE", 838 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE"); 839 // PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE", 840 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE"); 841 842 // // out_INSERT_ROB_GPR_STATUS_VAL - gpr_status. in_WRITE_VAL 843 // // in_INSERT_ROB_GPR_STATUS_ACK - gpr_status. out_WRITE_ACK 844 // // out_INSERT_ROB_GPR_STATUS_DATA- gpr_status. in_WRITE_DATA 845 // // out_INSERT_ROB_SPR_STATUS_VAL - spr_status. in_WRITE_VAL 846 // // in_INSERT_ROB_SPR_STATUS_ACK - spr_status. out_WRITE_ACK 847 // // in_INSERT_ROB_SPR_STATUS_DATA- spr_status. out_WRITE_DATA 848 // } 849 // } 850 851 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 754 852 { 755 uint32_t x = _param->_nb_inst_insert_rob [i]; 756 757 for (uint32_t j=0; j<x; j++) 758 { 759 dest = _name; 760 761 #ifdef POSITION 762 _component->interface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), 763 dest,"insert_rob_"+toString(i)+"_"+toString(j)); 764 #endif 765 766 PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL", 767 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL"); 768 PORT_MAP(_component,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK", 769 dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK"); 770 PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE", 771 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE"); 772 PORT_MAP(_component,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE", 773 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE"); 774 775 // out_INSERT_ROB_GPR_STATUS_VAL - gpr_status. in_WRITE_VAL 776 // in_INSERT_ROB_GPR_STATUS_ACK - gpr_status. out_WRITE_ACK 777 // out_INSERT_ROB_GPR_STATUS_DATA- gpr_status. in_WRITE_DATA 778 // out_INSERT_ROB_SPR_STATUS_VAL - spr_status. in_WRITE_VAL 779 // in_INSERT_ROB_SPR_STATUS_ACK - spr_status. out_WRITE_ACK 780 // in_INSERT_ROB_SPR_STATUS_DATA- spr_status. out_WRITE_DATA 781 } 853 dest = _name; 854 855 #ifdef POSITION 856 _component->interface_map (src ,"issue_"+toString(i), 857 dest,"issue_"+toString(i)); 858 #endif 859 860 PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_VAL", 861 dest, "in_ISSUE_"+toString(i)+"_VAL"); 862 PORT_MAP(_component,src ,"out_ISSUE_"+toString(i)+"_ACK", 863 dest,"out_ISSUE_"+toString(i)+"_ACK"); 864 if (_param->_have_port_ooo_engine_id == true) 865 PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_OOO_ENGINE_ID", 866 dest, "in_ISSUE_"+toString(i)+"_OOO_ENGINE_ID"); 867 PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_RD_USE", 868 dest, "in_ISSUE_"+toString(i)+"_RD_USE"); 869 PORT_MAP(_component,src , "in_ISSUE_"+toString(i)+"_RE_USE", 870 dest, "in_ISSUE_"+toString(i)+"_RE_USE"); 871 872 // out_ISSUE_GPR_STATUS_VAL - gpr_status. in_WRITE_VAL 873 // in_ISSUE_GPR_STATUS_ACK - gpr_status.out_WRITE_ACK 874 // out_ISSUE_GPR_STATUS_DATA- gpr_status. in_WRITE_DATA 875 // out_ISSUE_SPR_STATUS_VAL - spr_status. in_WRITE_VAL 876 // in_ISSUE_SPR_STATUS_ACK - spr_status.out_WRITE_ACK 877 // in_ISSUE_SPR_STATUS_DATA- spr_status.out_WRITE_DATA 782 878 } 879 783 880 }// glue 784 881 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/src/Register_unit_deallocation.cpp
r128 r136 54 54 DELETE1_SIGNAL( in_SPR_WRITE_DATA ,_param->_nb_spr_write,_param->_size_special_data); 55 55 56 DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 57 DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 58 DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 59 DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_gpr_address); 60 DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 61 DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_spr_address); 56 DELETE1_SIGNAL( in_ISSUE_VAL ,_param->_nb_inst_issue,1); 57 DELETE1_SIGNAL(out_ISSUE_ACK ,_param->_nb_inst_issue,1); 58 DELETE1_SIGNAL( in_ISSUE_OOO_ENGINE_ID,_param->_nb_inst_issue,_param->_size_ooo_engine_id); 59 DELETE1_SIGNAL( in_ISSUE_RD_USE ,_param->_nb_inst_issue,1); 60 DELETE1_SIGNAL( in_ISSUE_RD_NUM_REG ,_param->_nb_inst_issue,_param->_size_gpr_address); 61 DELETE1_SIGNAL( in_ISSUE_RE_USE ,_param->_nb_inst_issue,1); 62 DELETE1_SIGNAL( in_ISSUE_RE_NUM_REG ,_param->_nb_inst_issue,_param->_size_spr_address); 63 64 // DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 65 // DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 66 // DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 67 // DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_gpr_address); 68 // DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],1); 69 // DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob [it1],_param->_size_spr_address); 62 70 63 71 // delete [] in_RETIRE_ROB_VAL ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Execute_loop.h
r122 r136 80 80 public : SC_IN (Toperation_t ) ** in_EXECUTE_LOOP_IN_OPERATION ;//[nb_read_unit] 81 81 public : SC_IN (Ttype_t ) ** in_EXECUTE_LOOP_IN_TYPE ;//[nb_read_unit] 82 public : SC_IN (Tcontrol_t ) ** in_EXECUTE_LOOP_IN_CANCEL ;//[nb_read_unit] 82 83 public : SC_IN (Tlsq_ptr_t ) ** in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE;//[nb_read_unit] 83 84 public : SC_IN (Tlsq_ptr_t ) ** in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_READ ;//[nb_read_unit] … … 106 107 //public : SC_OUT(Toperation_t ) ** out_EXECUTE_LOOP_OUT_OPERATION ;//[nb_write_unit] 107 108 //public : SC_OUT(Ttype_t ) ** out_EXECUTE_LOOP_OUT_TYPE ;//[nb_write_unit] 109 public : SC_OUT(Tcontrol_t ) ** out_EXECUTE_LOOP_OUT_CANCEL ;//[nb_write_unit] 108 110 public : SC_OUT(Tspecial_data_t ) ** out_EXECUTE_LOOP_OUT_FLAGS ;//[nb_write_unit] 109 111 public : SC_OUT(Texception_t ) ** out_EXECUTE_LOOP_OUT_EXCEPTION ;//[nb_write_unit] … … 129 131 public : SC_IN (Tdcache_error_t ) *** in_DCACHE_RSP_ERROR ;//[nb_load_store_queue][nb_cache_port] 130 132 131 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~132 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ;//[nb_ooo_engine][nb_inst_insert_rob]133 public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ;//[nb_ooo_engine][nb_inst_insert_rob]134 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ;//[nb_ooo_engine][nb_inst_insert_rob]135 public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob]136 public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ;//[nb_ooo_engine][nb_inst_insert_rob]137 public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob]133 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 134 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_VAL ;//[nb_ooo_engine][nb_inst_insert_rob] 135 // public : SC_OUT(Tcontrol_t ) *** out_INSERT_ROB_ACK ;//[nb_ooo_engine][nb_inst_insert_rob] 136 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RD_USE ;//[nb_ooo_engine][nb_inst_insert_rob] 137 // public : SC_IN (Tgeneral_address_t) *** in_INSERT_ROB_RD_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] 138 // public : SC_IN (Tcontrol_t ) *** in_INSERT_ROB_RE_USE ;//[nb_ooo_engine][nb_inst_insert_rob] 139 // public : SC_IN (Tspecial_address_t) *** in_INSERT_ROB_RE_NUM_REG ;//[nb_ooo_engine][nb_inst_insert_rob] 138 140 139 141 // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/include/Parameters.h
r120 r136 88 88 public : uint32_t * _nb_general_register ; //[nb_ooo_engine] 89 89 public : uint32_t * _nb_special_register ; //[nb_ooo_engine] 90 91 90 //public : uint32_t * _nb_inst_insert_rob ; //[nb_ooo_engine] 91 //public : uint32_t * _nb_inst_retire_rob ; //[nb_ooo_engine] 92 92 // * network 93 93 public : Tpriority_t _execution_unit_to_write_unit_priority ; … … 105 105 public : bool * _num_thread_valid ; //[nb_thread] 106 106 107 public : uint32_t _nb_thread ; 107 108 public : uint32_t _nb_execute_unit ; 108 109 public : uint32_t * _nb_execute_unit_port ; … … 119 120 public : bool _have_port_dcache_context_id ; 120 121 122 public : uint32_t _max_nb_inst_memory ; 121 123 public : uint32_t _max_nb_general_register; 122 124 public : uint32_t _max_nb_special_register; … … 186 188 uint32_t * nb_general_register ,//[nb_ooo_engine] 187 189 uint32_t * nb_special_register ,//[nb_ooo_engine] 188 189 190 // uint32_t * nb_inst_insert_rob ,//[nb_ooo_engine] 191 // uint32_t * nb_inst_retire_rob ,//[nb_ooo_engine] 190 192 191 193 Tpriority_t execution_unit_to_write_unit_priority , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop.cpp
r123 r136 34 34 ,_usage (usage) 35 35 { 36 log_printf(FUNC,Execute_loop,FUNCTION, "Begin");36 log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> Begin"),_name.c_str()); 37 37 38 38 // #if DEBUG_Execute_loop == true … … 42 42 // #endif 43 43 44 log_printf(INFO,Execute_loop,FUNCTION, "Allocation");44 log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Allocation"),_name.c_str()); 45 45 46 46 allocation ( … … 53 53 if (usage_is_set(_usage,USE_STATISTICS)) 54 54 { 55 log_printf(INFO,Execute_loop,FUNCTION, "Allocation of statistics");55 log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Allocation of statistics"),_name.c_str()); 56 56 57 57 statistics_declaration(param_statistics); … … 63 63 { 64 64 // generate the vhdl 65 log_printf(INFO,Execute_loop,FUNCTION, "Generate the vhdl");65 log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Generate the vhdl"),_name.c_str()); 66 66 67 67 vhdl(); … … 72 72 if (usage_is_set(_usage,USE_SYSTEMC)) 73 73 { 74 log_printf(INFO,Execute_loop,FUNCTION, "Method - transition");74 log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Method - transition"),_name.c_str()); 75 75 76 76 SC_METHOD (transition); … … 84 84 #endif 85 85 } 86 log_printf(FUNC,Execute_loop,FUNCTION, "End");86 log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> End"),_name.c_str()); 87 87 }; 88 88 … … 91 91 Execute_loop::~Execute_loop (void) 92 92 { 93 log_printf(FUNC,Execute_loop,FUNCTION, "Begin");93 log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> Begin"),_name.c_str()); 94 94 95 95 #ifdef STATISTICS 96 96 if (usage_is_set(_usage,USE_STATISTICS)) 97 97 { 98 log_printf(INFO,Execute_loop,FUNCTION, "Generate Statistics file");98 log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Generate Statistics file"),_name.c_str()); 99 99 100 100 delete _stat; … … 102 102 #endif 103 103 104 log_printf(INFO,Execute_loop,FUNCTION, "Deallocation");104 log_printf(INFO,Execute_loop,FUNCTION,_("<%s> Deallocation"),_name.c_str()); 105 105 deallocation (); 106 106 107 log_printf(FUNC,Execute_loop,FUNCTION, "End");107 log_printf(FUNC,Execute_loop,FUNCTION,_("<%s> End"),_name.c_str()); 108 108 }; 109 109 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_allocation.cpp
r122 r136 65 65 ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); 66 66 ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type); 67 ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_CANCEL ,"cancel" ,Tcontrol_t ,1); 67 68 ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr); 68 69 ALLOC1_SIGNAL_IN ( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr); … … 96 97 // ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation); 97 98 // ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type); 99 ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); 98 100 ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data); 99 101 ALLOC1_SIGNAL_OUT(out_EXECUTE_LOOP_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception); … … 133 135 } 134 136 135 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~136 {137 ALLOC2_INTERFACE_BEGIN("insert_rob",IN, EAST, "Rename's stage : insert a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);138 139 _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);140 _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);141 142 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);143 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);144 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);145 _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);146 147 ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]);148 }137 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 138 // { 139 // ALLOC2_INTERFACE_BEGIN("insert_rob",IN, EAST, "Rename's stage : insert a new instruction in the Re Order Buffer",_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 140 141 // _ALLOC2_VALACK_IN ( in_INSERT_ROB_VAL,VAL,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 142 // _ALLOC2_VALACK_OUT(out_INSERT_ROB_ACK,ACK,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 143 144 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_USE ,"rd_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 145 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RD_NUM_REG,"rd_num_reg",Tgeneral_address_t,_param->_size_general_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 146 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_USE ,"re_use" ,Tcontrol_t ,1 ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 147 // _ALLOC2_SIGNAL_IN ( in_INSERT_ROB_RE_NUM_REG,"re_num_reg",Tspecial_address_t,_param->_size_special_register,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 148 149 // ALLOC2_INTERFACE_END(_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1]); 150 // } 149 151 150 152 // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 440 442 } 441 443 442 444 // -----[ Interface "issue" ]----------------------------------------- 445 for (uint32_t i=0; i<_param->_nb_read_unit; i++) 446 { 447 dest = _name; 448 449 PORT_MAP(_component ,src , "in_ISSUE_"+toString(i)+"_VAL", 450 dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_VAL"); 451 PORT_MAP(_component ,src ,"out_ISSUE_"+toString(i)+"_ACK", 452 dest,"out_EXECUTE_LOOP_IN_"+toString(i)+"_ACK"); 453 454 //out_ISSUE_READ_UNIT_VAL 455 // in_ISSUE_READ_UNIT_ACK 456 //out_ISSUE_REGISTER_UNIT_VAL 457 // in_ISSUE_REGISTER_UNIT_ACK 458 } 443 459 } 444 460 … … 466 482 // ~~~~~[ Interface "read_unit_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 467 483 { 484 dest = _name+"_glue"; 485 486 COMPONENT_MAP(_component ,src , "in_READ_UNIT_IN_VAL" , 487 dest,"out_ISSUE_"+toString(i)+"_READ_UNIT_VAL"); 488 COMPONENT_MAP(_component ,src ,"out_READ_UNIT_IN_ACK" 489 ,dest, "in_ISSUE_"+toString(i)+"_READ_UNIT_ACK"); 490 468 491 dest = _name; 469 492 #ifdef POSITION … … 472 495 #endif 473 496 474 PORT_MAP(_component ,src , "in_READ_UNIT_IN_VAL" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_VAL" );475 PORT_MAP(_component ,src ,"out_READ_UNIT_IN_ACK" ,dest ,"out_EXECUTE_LOOP_IN_"+toString(i)+"_ACK" );476 497 if (_param->_have_port_context_id) 477 498 PORT_MAP(_component ,src , "in_READ_UNIT_IN_CONTEXT_ID" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_CONTEXT_ID" ); … … 484 505 PORT_MAP(_component ,src , "in_READ_UNIT_IN_OPERATION" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_OPERATION" ); 485 506 PORT_MAP(_component ,src , "in_READ_UNIT_IN_TYPE" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_TYPE" ); 507 PORT_MAP(_component ,src , "in_READ_UNIT_IN_CANCEL" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_CANCEL" ); 486 508 PORT_MAP(_component ,src , "in_READ_UNIT_IN_STORE_QUEUE_PTR_WRITE",dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_STORE_QUEUE_PTR_WRITE"); 487 509 PORT_MAP(_component ,src , "in_READ_UNIT_IN_STORE_QUEUE_PTR_READ" ,dest , "in_EXECUTE_LOOP_IN_"+toString(i)+"_STORE_QUEUE_PTR_READ" ); … … 533 555 COMPONENT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(j )+"_TYPE" , 534 556 dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_"+toString(j)+"_TYPE" ); 557 COMPONENT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(j )+"_CANCEL" , 558 dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_"+toString(j)+"_CANCEL" ); 535 559 COMPONENT_MAP(_component ,src ,"out_READ_UNIT_OUT_"+toString(j )+"_STORE_QUEUE_PTR_WRITE", 536 560 dest, "in_READ_UNIT_OUT_"+toString(it_read_unit_out)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); … … 818 842 COMPONENT_MAP(_component ,src , "in_EXECUTE_IN_TYPE" , 819 843 dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_0_TYPE" ); 844 COMPONENT_MAP(_component ,src , "in_EXECUTE_IN_CANCEL" , 845 dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_0_CANCEL" ); 820 846 COMPONENT_MAP(_component ,src , "in_EXECUTE_IN_STORE_QUEUE_PTR_WRITE", 821 847 dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_0_STORE_QUEUE_PTR_WRITE"); … … 876 902 // COMPONENT_MAP(_component ,src ,"out_EXECUTE_OUT_TYPE" , 877 903 // dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_0_TYPE" ); 904 COMPONENT_MAP(_component ,src ,"out_EXECUTE_OUT_CANCEL" , 905 dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_0_CANCEL" ); 878 906 COMPONENT_MAP(_component ,src ,"out_EXECUTE_OUT_WRITE_RD" , 879 907 dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_0_WRITE_RD" ); … … 946 974 COMPONENT_MAP(_component ,src , "in_MEMORY_IN_"+toString(j)+"_TYPE" , 947 975 dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_"+toString(j)+"_TYPE" ); 976 COMPONENT_MAP(_component ,src , "in_MEMORY_IN_"+toString(j)+"_CANCEL" , 977 dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_"+toString(j)+"_CANCEL" ); 948 978 COMPONENT_MAP(_component ,src , "in_MEMORY_IN_"+toString(j)+"_STORE_QUEUE_PTR_WRITE", 949 979 dest,"out_EXECUTE_UNIT_IN_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); … … 1005 1035 // COMPONENT_MAP(_component ,src ,"out_MEMORY_OUT_"+toString(j)+"_TYPE" , 1006 1036 // dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_"+toString(j)+"_TYPE" ); 1037 COMPONENT_MAP(_component ,src ,"out_MEMORY_OUT_"+toString(j)+"_CANCEL" , 1038 dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_"+toString(j)+"_CANCEL" ); 1007 1039 COMPONENT_MAP(_component ,src ,"out_MEMORY_OUT_"+toString(j)+"_WRITE_RD" , 1008 1040 dest, "in_EXECUTE_UNIT_OUT_"+toString(i)+"_"+toString(j)+"_WRITE_RD" ); … … 1115 1147 // COMPONENT_MAP(_component ,src , "in_WRITE_UNIT_IN_TYPE" , 1116 1148 // dest,"out_WRITE_UNIT_IN_"+toString(i)+"_TYPE" ); 1149 COMPONENT_MAP(_component ,src , "in_WRITE_UNIT_IN_CANCEL" , 1150 dest,"out_WRITE_UNIT_IN_"+toString(i)+"_CANCEL" ); 1117 1151 COMPONENT_MAP(_component ,src , "in_WRITE_UNIT_IN_WRITE_RD" , 1118 1152 dest,"out_WRITE_UNIT_IN_"+toString(i)+"_WRITE_RD" ); … … 1163 1197 // PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_TYPE" , 1164 1198 // dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_TYPE" ); 1199 PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_CANCEL" , 1200 dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_CANCEL" ); 1165 1201 PORT_MAP(_component ,src ,"out_WRITE_UNIT_OUT_FLAGS" , 1166 1202 dest,"out_EXECUTE_LOOP_OUT_"+toString(i)+"_FLAGS" ); … … 1279 1315 #endif 1280 1316 1281 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_VAL" ,dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_VAL" ); 1282 COMPONENT_MAP(_component ,src ,"out_GPR_WRITE_"+toString(i)+"_ACK" ,dest, "in_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_ACK" ); 1317 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_VAL" , 1318 dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_VAL" ); 1319 COMPONENT_MAP(_component ,src ,"out_GPR_WRITE_"+toString(i)+"_ACK" , 1320 dest, "in_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_ACK" ); 1283 1321 if (_param->_have_port_ooo_engine_id) 1284 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID",dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_OOO_ENGINE_ID"); 1285 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_NUM_REG" ,dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_NUM_REG" ); 1286 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_DATA" ); 1322 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID", 1323 dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_OOO_ENGINE_ID"); 1324 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_NUM_REG" , 1325 dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_NUM_REG" ); 1326 COMPONENT_MAP(_component ,src , "in_GPR_WRITE_"+toString(i)+"_DATA" , 1327 dest,"out_GPR_WRITE_REGISTER_FILE_"+toString(i)+"_DATA" ); 1287 1328 } 1288 1329 … … 1321 1362 COMPONENT_MAP(_component ,src , "in_SPR_WRITE_"+toString(i)+"_DATA" ,dest,"out_SPR_WRITE_REGISTER_FILE_"+toString(i)+"_DATA" ); 1322 1363 } 1364 1365 // ~~~~~[ Interface "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1366 for (uint32_t i=0; i<_param->_nb_read_unit; i++) 1367 { 1368 dest = _name+"_glue"; 1369 1370 COMPONENT_MAP(_component ,src , "in_ISSUE_"+toString(i)+"_VAL", 1371 dest,"out_ISSUE_"+toString(i)+"_REGISTER_UNIT_VAL"); 1372 COMPONENT_MAP(_component ,src ,"out_ISSUE_"+toString(i)+"_ACK", 1373 dest, "in_ISSUE_"+toString(i)+"_REGISTER_UNIT_ACK"); 1374 1375 dest = _name; 1376 #ifdef POSITION 1377 _component->interface_map (src ,"issue_"+toString(i), 1378 dest,"issue_"+toString(i)); 1379 #endif 1380 1381 if (_param->_have_port_ooo_engine_id) 1382 PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_OOO_ENGINE_ID", 1383 dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_OOO_ENGINE_ID"); 1384 PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RD_USE" , 1385 dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RD" ); 1386 PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RE_USE" , 1387 dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_WRITE_RE" ); 1388 PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RD_NUM_REG", 1389 dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RD"); 1390 PORT_MAP(_component ,src , "in_ISSUE_" +toString(i)+"_RE_NUM_REG", 1391 dest, "in_EXECUTE_LOOP_IN_"+toString(i)+"_NUM_REG_RE"); 1392 } 1323 1393 1324 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1325 for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)1326 {1327 uint32_t x=_param->_nb_inst_insert_rob [i];1394 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1395 // for (uint32_t i=0; i<_param->_nb_ooo_engine; i++) 1396 // { 1397 // uint32_t x=_param->_nb_inst_insert_rob [i]; 1328 1398 1329 for (uint32_t j=0; j<x; j++)1330 {1331 dest = _name;1332 #ifdef POSITION1333 _component->interface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j),1334 dest,"insert_rob_"+toString(i)+"_"+toString(j));1335 #endif1336 1337 PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ,1338 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" );1339 PORT_MAP(_component ,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ,1340 dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" );1341 PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" ,1342 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" );1343 PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG",1344 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG");1345 PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" ,1346 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" );1347 PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG",1348 dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG");1349 }1350 }1399 // for (uint32_t j=0; j<x; j++) 1400 // { 1401 // dest = _name; 1402 // #ifdef POSITION 1403 // _component->interface_map (src ,"insert_rob_"+toString(i)+"_"+toString(j), 1404 // dest,"insert_rob_"+toString(i)+"_"+toString(j)); 1405 // #endif 1406 1407 // PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" , 1408 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_VAL" ); 1409 // PORT_MAP(_component ,src ,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" , 1410 // dest,"out_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_ACK" ); 1411 // PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" , 1412 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_USE" ); 1413 // PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG", 1414 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); 1415 // PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" , 1416 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_USE" ); 1417 // PORT_MAP(_component ,src , "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG", 1418 // dest, "in_INSERT_ROB_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); 1419 // } 1420 // } 1351 1421 1352 1422 // // ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 1756 1826 1757 1827 log_printf(FUNC,Execute_loop,FUNCTION,"End"); 1758 };1828 }; 1759 1829 1760 1830 }; // end namespace execute_loop -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Execute_loop_deallocation.cpp
r122 r136 35 35 DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_OPERATION ,_param->_nb_read_unit,_param->_size_operation); 36 36 DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_TYPE ,_param->_nb_read_unit,_param->_size_type); 37 DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_CANCEL ,_param->_nb_read_unit,1); 37 38 DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_WRITE,_param->_nb_read_unit,_param->_size_store_queue_ptr); 38 39 DELETE1_SIGNAL( in_EXECUTE_LOOP_IN_STORE_QUEUE_PTR_READ ,_param->_nb_read_unit,_param->_size_store_queue_ptr); … … 60 61 // DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_OPERATION ,_param->_nb_write_unit,_param->_size_operation); 61 62 // DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_TYPE ,_param->_nb_write_unit,_param->_size_type); 63 DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_CANCEL ,_param->_nb_write_unit,1); 62 64 DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_FLAGS ,_param->_nb_write_unit,_param->_size_special_data); 63 65 DELETE1_SIGNAL(out_EXECUTE_LOOP_OUT_EXCEPTION ,_param->_nb_write_unit,_param->_size_exception); … … 81 83 DELETE2_SIGNAL( in_DCACHE_RSP_ERROR , _param->_nb_load_store_unit, _param->_nb_cache_port[it1],_param->_size_dcache_error ); 82 84 83 DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 );84 DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 );85 DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 );86 DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_general_register);87 DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 );88 DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_special_register);85 // DELETE2_SIGNAL( in_INSERT_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); 86 // DELETE2_SIGNAL(out_INSERT_ROB_ACK ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); 87 // DELETE2_SIGNAL( in_INSERT_ROB_RD_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); 88 // DELETE2_SIGNAL( in_INSERT_ROB_RD_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_general_register); 89 // DELETE2_SIGNAL( in_INSERT_ROB_RE_USE ,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],1 ); 90 // DELETE2_SIGNAL( in_INSERT_ROB_RE_NUM_REG,_param->_nb_ooo_engine,_param->_nb_inst_insert_rob[it1],_param->_size_special_register); 89 91 90 92 // DELETE2_SIGNAL( in_RETIRE_ROB_VAL ,_param->_nb_ooo_engine,_param->_nb_inst_retire_rob[it1],1 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters.cpp
r128 r136 61 61 uint32_t * nb_general_register ,//[nb_ooo_engine] 62 62 uint32_t * nb_special_register ,//[nb_ooo_engine] 63 uint32_t * nb_inst_insert_rob ,//[nb_ooo_engine]64 uint32_t * nb_inst_retire_rob ,//[nb_ooo_engine]63 // uint32_t * nb_inst_insert_rob ,//[nb_ooo_engine] 64 // uint32_t * nb_inst_retire_rob ,//[nb_ooo_engine] 65 65 66 66 Tpriority_t execution_unit_to_write_unit_priority , … … 122 122 _nb_general_register = nb_general_register ; 123 123 _nb_special_register = nb_special_register ; 124 _nb_inst_insert_rob = nb_inst_insert_rob ;125 _nb_inst_retire_rob = nb_inst_retire_rob ;124 // _nb_inst_insert_rob = nb_inst_insert_rob ; 125 // _nb_inst_retire_rob = nb_inst_retire_rob ; 126 126 127 127 _execution_unit_to_write_unit_priority = execution_unit_to_write_unit_priority; … … 139 139 140 140 _nb_execute_unit = _nb_functionnal_unit + _nb_load_store_unit; 141 142 143 _nb_thread = get_nb_thread(_nb_context, 144 _nb_front_end, 145 _nb_ooo_engine); 146 _max_nb_inst_memory = max<uint32_t>(_nb_inst_memory,_nb_load_store_unit); 141 147 142 148 ALLOC1(_nb_execute_unit_port ,uint32_t,_nb_execute_unit); … … 194 200 _max_size_store_queue = max<uint32_t>(size_store_queue,nb_load_store_unit); 195 201 _max_size_load_queue = max<uint32_t>(size_load_queue ,nb_load_store_unit); 196 197 uint32_t _nb_thread = get_nb_thread(_nb_context,198 _nb_front_end,199 _nb_ooo_engine);200 201 uint32_t _max_nb_inst_memory = max<uint32_t>(_nb_inst_memory,_nb_load_store_unit);202 202 203 203 ALLOC1(_set_read_unit_source_register_write ,std::set<uint32_t>,_nb_read_unit); … … 297 297 // } 298 298 299 // 299 // std::cout << "_set_......." << std::endl; 300 300 301 301 for (uint32_t i=0; i<_nb_read_unit; i++) … … 308 308 for (uint32_t k=0; k<_nb_thread; k++) 309 309 { 310 // 310 // std::cout << " * Thread[" << k << "]" << std::endl; 311 311 if ( (_execution_unit_to_write_unit_table_thread [j][k]) and 312 312 (_link_read_unit_with_thread [i][k])) … … 367 367 (_nb_gpr_write , 368 368 _nb_spr_write , 369 _nb_read_unit , 369 370 size_ooo_engine_id , 370 371 size_general_register , … … 518 519 _nb_general_register , 519 520 _nb_special_register , 520 _nb_inst_insert_rob , 521 _nb_inst_retire_rob ); 521 _nb_read_unit // , 522 // _nb_inst_insert_rob , 523 // _nb_inst_retire_rob 524 ); 522 525 523 526 _max_size_dcache_context_id = 0; … … 604 607 delete _param_register_unit; 605 608 606 uint32_t _nb_thread = get_nb_thread(_nb_context,607 _nb_front_end,608 _nb_ooo_engine);609 uint32_t _max_nb_inst_memory = max<uint32_t>(_nb_inst_memory,_nb_load_store_unit);610 611 609 DELETE2(_link_read_unit_with_thread ,_nb_read_unit,_nb_thread ); 612 610 DELETE2(_link_read_unit_with_write_unit ,_nb_read_unit,_nb_write_unit ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/src/Parameters_print.cpp
r88 r136 93 93 xml. singleton_begin("nb_general_register"); xml.attribut("value",toString(_nb_general_register [i])); xml.singleton_end(); 94 94 xml. singleton_begin("nb_special_register"); xml.attribut("value",toString(_nb_special_register [i])); xml.singleton_end(); 95 xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end();96 xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end();95 // xml. singleton_begin("nb_inst_insert_rob "); xml.attribut("value",toString(_nb_inst_insert_rob [i])); xml.singleton_end(); 96 // xml. singleton_begin("nb_inst_retire_rob "); xml.attribut("value",toString(_nb_inst_retire_rob [i])); xml.singleton_end(); 97 97 xml.balise_close(); 98 98 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h
r110 r136 72 72 public : SC_OUT(Tcontrol_t ) *** out_IFETCH_ACK ;//[nb_context][nb_inst_fetch] 73 73 public : SC_IN (Tinstruction_t ) *** in_IFETCH_INSTRUCTION ;//[nb_context][nb_inst_fetch] 74 public : SC_IN (Tcontext_t ) ** in_IFETCH_CONTEXT_ID ;//[nb_context]75 public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS ;//[nb_context]76 //public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS_NEXT ;//[nb_context]77 public : SC_IN (Tinst_ifetch_ptr_t ) ** in_IFETCH_INST_IFETCH_PTR ;//[nb_context]78 public : SC_IN (Tbranch_state_t ) ** in_IFETCH_BRANCH_STATE ;//[nb_context]79 public : SC_IN (Tprediction_ptr_t ) ** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context]80 public : SC_IN (Texception_t ) ** in_IFETCH_EXCEPTION ;//[nb_context]74 public : SC_IN (Tcontext_t ) *** in_IFETCH_CONTEXT_ID ;//[nb_context][nb_inst_fetch] 75 public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS ;//[nb_context][nb_inst_fetch] 76 //public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS_NEXT ;//[nb_context][nb_inst_fetch] 77 //public : SC_IN (Tinst_ifetch_ptr_t ) *** in_IFETCH_INST_IFETCH_PTR ;//[nb_context][nb_inst_fetch] 78 public : SC_IN (Tbranch_state_t ) *** in_IFETCH_BRANCH_STATE ;//[nb_context][nb_inst_fetch] 79 public : SC_IN (Tprediction_ptr_t ) *** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context][nb_inst_fetch] 80 public : SC_IN (Texception_t ) *** in_IFETCH_EXCEPTION ;//[nb_context][nb_inst_fetch] 81 81 // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 82 82 public : SC_OUT(Tcontrol_t ) ** out_DECOD_VAL ;//[nb_inst_decod] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod.cpp
r132 r136 94 94 { 95 95 for (uint32_t j=0; j<_param->_nb_inst_fetch [i]; j++) 96 sensitive << (*(in_IFETCH_VAL [i][j])) 97 << (*(in_IFETCH_INSTRUCTION [i][j])); 98 sensitive << (*(in_IFETCH_ADDRESS [i])) 99 // << (*(in_IFETCH_ADDRESS_NEXT [i])) 100 << (*(in_IFETCH_BRANCH_STATE [i])) 101 << (*(in_IFETCH_EXCEPTION [i])) 102 << (*(in_CONTEXT_DECOD_ENABLE [i])); 103 if (_param->_have_port_context_id) 104 sensitive << (*(in_IFETCH_CONTEXT_ID [i])); 105 if (_param->_have_port_depth) 106 sensitive << (*(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i])); 107 sensitive << (*(in_CONTEXT_DEPTH_VAL [i])); 96 { 97 sensitive << (*(in_IFETCH_VAL [i][j])) 98 << (*(in_IFETCH_INSTRUCTION [i][j])) 99 << (*(in_IFETCH_ADDRESS [i][j])) 100 // << (*(in_IFETCH_ADDRESS_NEXT [i][j])) 101 << (*(in_IFETCH_BRANCH_STATE [i][j])) 102 << (*(in_IFETCH_EXCEPTION [i][j])); 103 104 if (_param->_have_port_context_id) 105 sensitive << (*(in_IFETCH_CONTEXT_ID [i][j])); 106 if (_param->_have_port_depth) 107 sensitive << (*(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [i][j])); 108 // if (_param->_have_port_inst_ifetch_ptr) 109 // sensitive << (*(in_IFETCH_INST_IFETCH_PTR [i][j])); 110 } 111 sensitive << (*(in_CONTEXT_DECOD_ENABLE [i])) 112 << (*(in_CONTEXT_DEPTH_VAL [i])); 108 113 if (_param->_have_port_depth) 109 114 sensitive << (*(in_CONTEXT_DEPTH [i])); 110 if (_param->_have_port_inst_ifetch_ptr)111 sensitive << (*(in_IFETCH_INST_IFETCH_PTR [i]));112 115 } 113 116 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp
r112 r136 61 61 62 62 63 _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); 64 _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); 65 _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION,"instruction", Tinstruction_t, _param->_size_instruction,_param->_nb_context, _param->_nb_inst_fetch[it1]); 63 _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); 64 _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); 65 _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 66 _ALLOC2_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 67 _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); 68 // _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); 69 // _ALLOC2_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 70 _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 71 _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 72 _ALLOC2_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 66 73 67 74 ALLOC2_INTERFACE_END(_param->_nb_context, _param->_nb_inst_fetch[it1]); 68 }69 {70 ALLOC1_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context);71 72 73 ALLOC1_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );74 ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address );75 // ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address );76 ALLOC1_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr );77 ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state );78 ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth );79 ALLOC1_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch);80 81 ALLOC1_INTERFACE_END(_param->_nb_context);82 75 } 83 76 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp
r112 r136 29 29 delete in_NRESET; 30 30 31 DELETE2_SIGNAL( in_IFETCH_VAL , _param->_nb_context, _param->_nb_inst_fetch[it1],1); 32 DELETE2_SIGNAL(out_IFETCH_ACK , _param->_nb_context, _param->_nb_inst_fetch[it1],1); 33 DELETE2_SIGNAL( in_IFETCH_INSTRUCTION, _param->_nb_context, _param->_nb_inst_fetch[it1],_param->_size_instruction); 34 35 DELETE1_SIGNAL(in_IFETCH_CONTEXT_ID , _param->_nb_context,_param->_size_context_id ); 36 DELETE1_SIGNAL(in_IFETCH_ADDRESS , _param->_nb_context,_param->_size_instruction_address ); 37 // DELETE1_SIGNAL(in_IFETCH_ADDRESS_NEXT , _param->_nb_context,_param->_size_instruction_address ); 38 DELETE1_SIGNAL(in_IFETCH_INST_IFETCH_PTR , _param->_nb_context,_param->_size_inst_ifetch_ptr ); 39 DELETE1_SIGNAL(in_IFETCH_BRANCH_STATE , _param->_nb_context,_param->_size_branch_state ); 40 DELETE1_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID, _param->_nb_context,_param->_size_depth ); 41 DELETE1_SIGNAL(in_IFETCH_EXCEPTION , _param->_nb_context,_param->_size_exception_ifetch); 31 DELETE2_SIGNAL( in_IFETCH_VAL ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); 32 DELETE2_SIGNAL(out_IFETCH_ACK ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); 33 DELETE2_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction); 34 DELETE2_SIGNAL( in_IFETCH_CONTEXT_ID ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_context_id ); 35 DELETE2_SIGNAL( in_IFETCH_ADDRESS ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address ); 36 // DELETE2_SIGNAL( in_IFETCH_ADDRESS_NEXT ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address ); 37 // DELETE2_SIGNAL( in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_inst_ifetch_ptr ); 38 DELETE2_SIGNAL( in_IFETCH_BRANCH_STATE ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_branch_state ); 39 DELETE2_SIGNAL( in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_depth ); 40 DELETE2_SIGNAL( in_IFETCH_EXCEPTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_exception_ifetch); 42 41 43 42 DELETE1_SIGNAL(out_DECOD_VAL ,_param->_nb_inst_decod,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp
r135 r136 99 99 ifetch_ack [x][y] = PORT_READ(in_DECOD_ACK [i]); // fetch_val and decod_enable and decod_ack 100 100 101 Tgeneral_data_t addr = PORT_READ(in_IFETCH_ADDRESS [x] )+y;101 Tgeneral_data_t addr = PORT_READ(in_IFETCH_ADDRESS [x][y]); 102 102 103 103 _decod_instruction->_instruction = PORT_READ(in_IFETCH_INSTRUCTION [x][y]); … … 132 132 133 133 // Test IFetch exception 134 Texception_t ifetch_exception = PORT_READ(in_IFETCH_EXCEPTION [x] );134 Texception_t ifetch_exception = PORT_READ(in_IFETCH_EXCEPTION [x][y]); 135 135 136 136 if (ifetch_exception == EXCEPTION_IFETCH_NONE) … … 232 232 } 233 233 234 Tbranch_state_t ifetch_branch_state = PORT_READ(in_IFETCH_BRANCH_STATE [x][y]); 234 235 if (_param->_have_port_context_id) 235 236 PORT_WRITE(out_PREDICT_CONTEXT_ID [i],x); 236 PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],y == ((_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_IFETCH_INST_IFETCH_PTR [x]):0)); 237 PORT_WRITE(out_PREDICT_BRANCH_STATE [i],PORT_READ(in_IFETCH_BRANCH_STATE [x])); 237 // PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],y == ((_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_IFETCH_INST_IFETCH_PTR [x]):0)); 238 PORT_WRITE(out_PREDICT_MATCH_INST_IFETCH_PTR [i],ifetch_branch_state != BRANCH_STATE_NONE); 239 240 PORT_WRITE(out_PREDICT_BRANCH_STATE [i],ifetch_branch_state); 238 241 if (_param->_have_port_depth) 239 PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i],PORT_READ(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x] ));242 PORT_WRITE(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID [i],PORT_READ(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID [x][y])); 240 243 PORT_WRITE(out_PREDICT_BRANCH_CONDITION [i],_decod_instruction->_branch_condition ); 241 244 // PORT_WRITE(out_PREDICT_BRANCH_STACK_WRITE [i],_decod_instruction->_branch_stack_write); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h
r123 r136 56 56 private : counter_t * _stat_use_queue; 57 57 58 private : counter_t * _stat_ sum_inst_enable;59 private : counter_t * _stat_ sum_transaction_decod_in;60 private : counter_t * _stat_ average_occupation_bundle;58 private : counter_t * _stat_decode_in_empty ; 59 private : counter_t * _stat_decode_in_full ; 60 private : counter_t * _stat_decode_in_average; 61 61 #endif 62 62 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_multi_fifo_transition.cpp
r124 r136 51 51 { 52 52 #ifdef STATISTICS 53 bool find = false; 54 #endif 53 uint32_t nb_decod_in = 0; 54 #endif 55 55 56 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 56 57 if (PORT_READ(in_DECOD_IN_VAL [i]) and internal_DECOD_IN_ACK[i]) 57 58 { 58 59 log_printf(TRACE,Decod_queue,FUNCTION,_(" * DECOD_IN [%d]"),i); 59 60 61 #ifdef STATISTICS 62 nb_decod_in ++; 63 #endif 64 60 65 // Create entry 61 66 decod_queue_entry_t * entry = new decod_queue_entry_t (1); 62 67 reg_QUEUE[reg_NUM_BANK_TAIL].push_back(entry); 63 68 64 #ifdef STATISTICS65 find = true;66 if (usage_is_set(_usage,USE_STATISTICS))67 (*_stat_sum_inst_enable) ++;68 #endif69 70 69 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0; 71 70 … … 107 106 108 107 #ifdef STATISTICS 109 if (usage_is_set(_usage,USE_STATISTICS)) 110 if (find) 111 (*_stat_sum_transaction_decod_in) ++; 108 if (usage_is_set(_usage,USE_STATISTICS)) 109 { 110 if (nb_decod_in > 0) 111 { 112 if (nb_decod_in == _param->_nb_inst_decod) 113 (*_stat_decode_in_full) ++; 114 else 115 (*_stat_decode_in_average) += nb_decod_in; 116 } 117 else 118 { 119 (*_stat_decode_in_empty) ++; 120 } 121 } 112 122 #endif 113 123 } … … 208 218 { 209 219 for (uint32_t i=0; i<_param->_nb_bank; ++i) 210 *(_stat_use_queue) += reg_QUEUE[i].size();220 (*_stat_use_queue) += reg_QUEUE[i].size(); 211 221 for (uint32_t i=0; i<_param->_nb_context; i++) 212 *(_stat_nb_inst [i]) += reg_NB_INST [i];222 (*_stat_nb_inst [i]) += reg_NB_INST [i]; 213 223 } 214 224 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_function_one_fifo_transition.cpp
r123 r136 46 46 //-----[ DECOD_IN ]--------------------------------------------------- 47 47 //-------------------------------------------------------------------- 48 { 48 49 decod_queue_entry_t * entry = NULL; 50 51 #ifdef STATISTICS 52 uint32_t nb_decod_in = 0; 53 #endif 54 49 55 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 50 56 { … … 58 64 entry = new decod_queue_entry_t (_param->_nb_inst_decod); 59 65 reg_QUEUE->push_back(entry); 60 61 #ifdef STATISTICS62 if (usage_is_set(_usage,USE_STATISTICS))63 (*_stat_sum_transaction_decod_in) ++;64 #endif65 66 } 66 67 67 68 #ifdef STATISTICS 68 if (usage_is_set(_usage,USE_STATISTICS)) 69 (*_stat_sum_inst_enable) ++; 69 nb_decod_in ++; 70 70 #endif 71 71 … … 106 106 } 107 107 } 108 109 #ifdef STATISTICS 110 if (usage_is_set(_usage,USE_STATISTICS)) 111 { 112 if (nb_decod_in > 0) 113 { 114 if (nb_decod_in == _param->_nb_inst_decod) 115 (*_stat_decode_in_full) ++; 116 else 117 (*_stat_decode_in_average) += nb_decod_in; 118 } 119 else 120 { 121 (*_stat_decode_in_empty) ++; 122 } 123 } 124 #endif 125 } 108 126 109 127 //-------------------------------------------------------------------- … … 217 235 if (usage_is_set(_usage,USE_STATISTICS)) 218 236 { 219 *(_stat_use_queue) += reg_QUEUE->size();237 (*_stat_use_queue) += reg_QUEUE->size(); 220 238 for (uint32_t i=0; i<_param->_nb_context; i++) 221 *(_stat_nb_inst [i]) += reg_NB_INST [i];239 (*_stat_nb_inst [i]) += reg_NB_INST [i]; 222 240 } 223 241 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_statistics_allocation.cpp
r110 r136 17 17 namespace decod_queue { 18 18 19 20 19 #undef FUNCTION 21 20 #define FUNCTION "Decod_queue::statistics_allocation" … … 29 28 param_statistics); 30 29 31 _stat_ sum_transaction_decod_in = _stat->create_variable("sum_transaction_decod_in");32 _stat_ sum_inst_enable = _stat->create_variable("sum_inst_enable");33 _stat_ average_occupation_bundle= _stat->create_counter ("average_occupation_bundle", "", "Occupation average of instruction's bundle.");30 _stat_decode_in_empty = _stat->create_counter ("decode_in_empty" , "", "Number cycle with no input instruction."); 31 _stat_decode_in_full = _stat->create_counter ("decode_in_full" , "", toString("Number cycle with full input instruction (%d).",_param->_nb_inst_decod)); 32 _stat_decode_in_average = _stat->create_counter ("decode_in_average", "", "Average decod instruction."); 34 33 35 _stat->create_expr ("average_occupation_bundle" ,"/ sum_inst_enable sum_transaction_decod_in");36 _stat->create_expr_percent ("percent_ occupation_bundle" ,"average_occupation_bundle", toString(_param->_nb_inst_decod),"Percent of instruction's bundle occupation.");34 _stat->create_expr_average_by_cycle("average_decod_in", toString("+ * decode_in_full %d decode_in_average",_param->_nb_inst_decod), "", "Average instruction from decode unit"); 35 _stat->create_expr_percent ("percent_decod_in" ,"average_decod_in", toString(_param->_nb_inst_decod),"Percent of instruction's bundle occupation."); 37 36 38 37 _stat_use_queue = _stat->create_variable ("use_queue"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h
r123 r136 70 70 public : SC_OUT(Tcontrol_t ) *** out_IFETCH_ACK ;//[nb_context][nb_inst_fetch] 71 71 public : SC_IN (Tinstruction_t ) *** in_IFETCH_INSTRUCTION ;//[nb_context][nb_inst_fetch] 72 public : SC_IN (Tcontext_t ) ** in_IFETCH_CONTEXT_ID ;//[nb_context]73 public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS ;//[nb_context]74 //public : SC_IN (Tgeneral_address_t ) ** in_IFETCH_ADDRESS_NEXT ;//[nb_context]75 public : SC_IN (Tinst_ifetch_ptr_t ) ** in_IFETCH_INST_IFETCH_PTR ;//[nb_context]76 public : SC_IN (Tbranch_state_t ) ** in_IFETCH_BRANCH_STATE ;//[nb_context]77 public : SC_IN (Tprediction_ptr_t ) ** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context]78 public : SC_IN (Texception_t ) ** in_IFETCH_EXCEPTION ;//[nb_context]72 public : SC_IN (Tcontext_t ) *** in_IFETCH_CONTEXT_ID ;//[nb_context][nb_inst_fetch] 73 public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS ;//[nb_context][nb_inst_fetch] 74 //public : SC_IN (Tgeneral_address_t ) *** in_IFETCH_ADDRESS_NEXT ;//[nb_context][nb_inst_fetch] 75 //public : SC_IN (Tinst_ifetch_ptr_t ) *** in_IFETCH_INST_IFETCH_PTR ;//[nb_context][nb_inst_fetch] 76 public : SC_IN (Tbranch_state_t ) *** in_IFETCH_BRANCH_STATE ;//[nb_context][nb_inst_fetch] 77 public : SC_IN (Tprediction_ptr_t ) *** in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ;//[nb_context][nb_inst_fetch] 78 public : SC_IN (Texception_t ) *** in_IFETCH_EXCEPTION ;//[nb_context][nb_inst_fetch] 79 79 80 80 // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp
r123 r136 15 15 namespace front_end { 16 16 namespace decod_unit { 17 18 19 17 20 18 #undef FUNCTION … … 60 58 ALLOC2_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context, _param->_nb_inst_fetch[it1]); 61 59 62 _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); 63 _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); 64 _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION,"instruction", Tinstruction_t, _param->_size_instruction,_param->_nb_context, _param->_nb_inst_fetch[it1]); 60 _ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]); 61 _ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]); 62 _ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 63 _ALLOC2_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 64 _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); 65 // _ALLOC2_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address,_param->_nb_context, _param->_nb_inst_fetch[it1]); 66 // _ALLOC2_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 67 _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 68 _ALLOC2_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 69 _ALLOC2_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch ,_param->_nb_context, _param->_nb_inst_fetch[it1]); 65 70 66 71 ALLOC2_INTERFACE_END(_param->_nb_context, _param->_nb_inst_fetch[it1]); 67 }68 {69 ALLOC1_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context);70 71 ALLOC1_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );72 ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address );73 // ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address );74 ALLOC1_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr );75 ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state );76 ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth );77 ALLOC1_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch);78 79 ALLOC1_INTERFACE_END(_param->_nb_context);80 72 } 81 73 … … 261 253 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION", 262 254 dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION"); 255 if (_param->_have_port_context_id) 256 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" , 257 dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" ); 258 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS" , 259 dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS" ); 260 // PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" , 261 // dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ); 262 // if (_param->_have_port_inst_ifetch_ptr) 263 // PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INST_IFETCH_PTR" , 264 // dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INST_IFETCH_PTR" ); 265 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_STATE" , 266 dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_STATE" ); 267 if (_param->_have_port_depth) 268 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID", 269 dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID"); 270 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_EXCEPTION" , 271 dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_EXCEPTION" ); 263 272 } 264 265 #ifdef POSITION 266 _component->interface_map (src ,"ifetch_"+toString(i), 267 dest,"ifetch_"+toString(i)); 268 #endif 269 270 if (_param->_have_port_context_id) 271 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_CONTEXT_ID" , 272 dest, "in_IFETCH_"+toString(i)+"_CONTEXT_ID" ); 273 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS" , 274 dest, "in_IFETCH_"+toString(i)+"_ADDRESS" ); 275 // PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT" , 276 // dest, "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT" ); 277 if (_param->_have_port_inst_ifetch_ptr) 278 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR" , 279 dest, "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR" ); 280 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_STATE" , 281 dest, "in_IFETCH_"+toString(i)+"_BRANCH_STATE" ); 282 if (_param->_have_port_depth) 283 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID", 284 dest, "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID"); 285 PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_EXCEPTION" , 286 dest, "in_IFETCH_"+toString(i)+"_EXCEPTION" ); 273 287 274 } 288 275 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp
r128 r136 28 28 delete in_NRESET; 29 29 30 DELETE2_SIGNAL( in_IFETCH_VAL ,_param->_nb_context, _param->_nb_inst_fetch[it1],1); 31 DELETE2_SIGNAL(out_IFETCH_ACK ,_param->_nb_context, _param->_nb_inst_fetch[it1],1); 32 DELETE2_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context, _param->_nb_inst_fetch[it1],_param->_size_instruction); 33 34 DELETE1_SIGNAL(in_IFETCH_CONTEXT_ID ,_param->_nb_context,_param->_size_context_id ); 35 DELETE1_SIGNAL(in_IFETCH_ADDRESS ,_param->_nb_context,_param->_size_instruction_address); 36 // DELETE1_SIGNAL(in_IFETCH_ADDRESS_NEXT ,_param->_nb_context,_param->_size_instruction_address); 37 DELETE1_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context,_param->_size_inst_ifetch_ptr ); 38 DELETE1_SIGNAL(in_IFETCH_BRANCH_STATE ,_param->_nb_context,_param->_size_branch_state ); 39 DELETE1_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context,_param->_size_depth ); 40 DELETE1_SIGNAL(in_IFETCH_EXCEPTION ,_param->_nb_context,_param->_size_exception_ifetch); 30 DELETE2_SIGNAL( in_IFETCH_VAL ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); 31 DELETE2_SIGNAL(out_IFETCH_ACK ,_param->_nb_context,_param->_nb_inst_fetch[it1],1); 32 DELETE2_SIGNAL( in_IFETCH_INSTRUCTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction); 33 DELETE2_SIGNAL(in_IFETCH_CONTEXT_ID ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_context_id ); 34 DELETE2_SIGNAL(in_IFETCH_ADDRESS ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address); 35 // DELETE2_SIGNAL(in_IFETCH_ADDRESS_NEXT ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_instruction_address); 36 // DELETE2_SIGNAL(in_IFETCH_INST_IFETCH_PTR ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_inst_ifetch_ptr ); 37 DELETE2_SIGNAL(in_IFETCH_BRANCH_STATE ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_branch_state ); 38 DELETE2_SIGNAL(in_IFETCH_BRANCH_UPDATE_PREDICTION_ID ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_depth ); 39 DELETE2_SIGNAL(in_IFETCH_EXCEPTION ,_param->_nb_context,_param->_nb_inst_fetch[it1],_param->_size_exception_ifetch ); 41 40 42 41 DELETE1_SIGNAL(out_DECOD_VAL ,_param->_nb_inst_decod,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp
r128 r136 70 70 log_printf(TRACE,Address_management,FUNCTION," * PREDICT"); 71 71 72 bool branch_is_current = reg_PC_NEXT_IS_DS_TAKE; 72 bool branch_is_current = reg_PC_NEXT_IS_DS_TAKE; 73 Tbranch_state_t branch_state = PORT_READ(in_PREDICT_BRANCH_STATE ); 74 Tprediction_ptr_t branch_update_prediction_id = (_param->_have_port_depth )?PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID):0; 75 Tinst_ifetch_ptr_t inst_ifetch_ptr = (_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_PREDICT_INST_IFETCH_PTR ):0; 76 77 log_printf(TRACE,Address_management,FUNCTION," * branch_is_current : %d",branch_is_current ); 78 log_printf(TRACE,Address_management,FUNCTION," * branch_state : %d",branch_state ); 79 log_printf(TRACE,Address_management,FUNCTION," * branch_update_prediction_id : %d",branch_update_prediction_id); 80 log_printf(TRACE,Address_management,FUNCTION," * inst_ifetch_ptr : %d",inst_ifetch_ptr ); 81 73 82 if (branch_is_current) 74 83 { 75 if (_param->_have_port_inst_ifetch_ptr) 76 reg_PC_CURRENT_INST_IFETCH_PTR = PORT_READ(in_PREDICT_INST_IFETCH_PTR ); 77 reg_PC_CURRENT_BRANCH_STATE = PORT_READ(in_PREDICT_BRANCH_STATE ); 78 if (_param->_have_port_depth) 79 reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); 84 reg_PC_CURRENT_INST_IFETCH_PTR = inst_ifetch_ptr ; 85 reg_PC_CURRENT_BRANCH_STATE = branch_state ; 86 reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = branch_update_prediction_id; 80 87 } 81 88 else 82 89 { 83 if (_param->_have_port_inst_ifetch_ptr) 84 reg_PC_NEXT_INST_IFETCH_PTR = PORT_READ(in_PREDICT_INST_IFETCH_PTR ); 85 reg_PC_NEXT_BRANCH_STATE = PORT_READ(in_PREDICT_BRANCH_STATE ); 86 if (_param->_have_port_depth) 87 reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = PORT_READ(in_PREDICT_BRANCH_UPDATE_PREDICTION_ID); 90 reg_PC_NEXT_INST_IFETCH_PTR = inst_ifetch_ptr ; 91 reg_PC_NEXT_BRANCH_STATE = branch_state ; 92 reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = branch_update_prediction_id; 88 93 } 89 94 … … 161 166 } 162 167 163 // if (not reg_PC_NEXT_VAL and reg_PC_NEXT_NEXT_VAL)164 168 if (reg_PC_NEXT_NEXT_VAL and not reg_PC_NEXT_VAL) 165 169 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Ifetch_queue.h
r131 r136 84 84 public : SC_IN (Tcontrol_t ) ** in_DECOD_ACK ;//[nb_instruction] 85 85 public : SC_OUT(Tinstruction_t ) ** out_DECOD_INSTRUCTION ;//[nb_instruction] 86 public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; 87 public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; 88 public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; 89 public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; 90 public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; 86 public : SC_OUT(Tgeneral_address_t ) ** out_DECOD_ADDRESS ; 87 public : SC_OUT(Tbranch_state_t ) ** out_DECOD_BRANCH_STATE ; 88 public : SC_OUT(Tprediction_ptr_t ) ** out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; 89 public : SC_OUT(Texception_t ) ** out_DECOD_EXCEPTION ; 90 //public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; 91 //public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; 92 //public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; 93 //public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; 94 //public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; 91 95 92 96 // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 110 114 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 111 115 private : Tcontrol_t internal_ADDRESS_ACK ; 112 private : Tcontrol_t * internal_DECOD_VAL ; 116 private : Tcontrol_t * internal_DECOD_VAL ;//[nb_instruction] 117 private : uint32_t * internal_DECOD_PTR ;//[nb_instruction] Only queue_scheme == full_assoc 118 private : uint32_t * internal_DECOD_SLOT ;//[nb_instruction] Only queue_scheme == full_assoc 113 119 private : Tcontrol_t internal_ICACHE_RSP_ACK ; 114 120 private : Tcontrol_t internal_EVENT_RESET_ACK; 121 122 123 124 // function pointer 125 public : void (morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::*function_transition ) (void); 126 public : void (morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::*function_genMoore ) (void); 115 127 #endif 116 128 … … 146 158 #ifdef SYSTEMC 147 159 public : void constant (void); 148 public : void transition (void); 149 public : void genMoore (void); 160 161 public : void transition (void); 162 public : void genMoore (void); 163 164 public : void function_no_assoc_transition (void); 165 public : void function_no_assoc_genMoore (void); 166 167 public : void function_full_assoc_transition (void); 168 public : void function_full_assoc_genMoore (void); 150 169 #endif 151 170 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Parameters.h
r109 r136 11 11 #include "Common/include/Debug.h" 12 12 #include "Behavioural/include/Parameters.h" 13 #include "Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h" 13 14 14 15 namespace morpheo { … … 24 25 { 25 26 //-----[ fields ]------------------------------------------------------------ 26 public : uint32_t _size_queue ; 27 public : uint32_t _nb_instruction ; 28 //public : uint32_t _size_branch_update_prediction ; 29 //public : uint32_t _size_general_data ; 30 public : uint32_t _nb_instruction_in_queue ; 31 32 //public : uint32_t _size_queue_ptr ; 33 //public : uint32_t _size_instruction_ptr ; 34 35 //public : bool _have_port_queue_ptr ; 36 //public : bool _have_port_instruction_ptr ; 37 //public : bool _have_port_branch_update_prediction_id; 27 public : uint32_t _size_queue ; 28 public : Tifetch_queue_scheme_t _queue_scheme ; 29 public : uint32_t _nb_instruction ; 30 //public : uint32_t _size_branch_update_prediction ; 31 //public : uint32_t _size_general_data ; 32 public : uint32_t _nb_instruction_in_queue ; 33 34 //public : uint32_t _size_queue_ptr ; 35 //public : uint32_t _size_instruction_ptr ; 36 37 //public : bool _have_port_queue_ptr ; 38 //public : bool _have_port_instruction_ptr ; 39 //public : bool _have_port_branch_update_prediction_id; 38 40 39 41 //-----[ methods ]----------------------------------------------------------- 40 public : Parameters (uint32_t size_queue , 41 uint32_t nb_instruction , 42 uint32_t size_branch_update_prediction, 43 uint32_t size_general_data , 44 bool is_toplevel=false); 42 public : Parameters (uint32_t size_queue , 43 Tifetch_queue_scheme_t queue_scheme , 44 uint32_t nb_instruction , 45 uint32_t size_branch_update_prediction, 46 uint32_t size_general_data , 47 bool is_toplevel=false); 45 48 // public : Parameters (Parameters & param) ; 46 49 public : ~Parameters () ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h
r135 r136 18 18 namespace ifetch_unit { 19 19 namespace ifetch_queue { 20 21 typedef enum 22 { 23 IFETCH_QUEUE_SCHEME_NO_ASSOC // Read only head 24 ,IFETCH_QUEUE_SCHEME_FULL_ASSOC // Scan all slot 25 } Tifetch_queue_scheme_t; 20 26 21 27 typedef enum … … 60 66 }; // end namespace core 61 67 }; // end namespace behavioural 68 69 template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t>(const morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t& x) 70 { 71 switch (x) 72 { 73 case morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_NO_ASSOC : return "no_assoc" ; break; 74 case morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_FULL_ASSOC : return "full_assoc"; break; 75 default : return ""; break; 76 } 77 }; 78 79 template<> inline morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t fromString<morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t>(const std::string& x) 80 { 81 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_NO_ASSOC ))) == 0) or 82 (x.compare("no_assoc") == 0)) 83 return morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_NO_ASSOC; 84 if ( (x.compare(toString(static_cast<uint32_t>(morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_FULL_ASSOC))) == 0) or 85 (x.compare("full_assoc") == 0)) 86 return morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::IFETCH_QUEUE_SCHEME_FULL_ASSOC; 87 88 throw (ErrorMorpheo ("<fromString> : Unknow string : \""+x+"\"")); 89 }; 62 90 63 91 template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::ifetch_queue_state_t>(const morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::ifetch_queue_state_t& x) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp
r132 r136 74 74 if (usage_is_set(_usage,USE_SYSTEMC)) 75 75 { 76 // Function pointer 77 switch (_param->_queue_scheme) 78 { 79 case IFETCH_QUEUE_SCHEME_NO_ASSOC : 80 { 81 function_transition = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_no_assoc_transition ; 82 function_genMoore = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_no_assoc_genMoore ; 83 84 break; 85 } 86 case IFETCH_QUEUE_SCHEME_FULL_ASSOC : 87 { 88 function_transition = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_full_assoc_transition ; 89 function_genMoore = &morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue::Ifetch_queue::function_full_assoc_genMoore ; 90 91 break; 92 } 93 default : 94 { 95 break; 96 } 97 } 98 76 99 log_printf(INFO,Ifetch_queue,FUNCTION,_("<%s> Method - constant"),_name.c_str()); 77 100 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_allocation.cpp
r112 r136 84 84 ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); 85 85 ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); 86 ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION,"instruction",Tinstruction_t,_param->_size_instruction); 86 ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction); 87 ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address); 88 ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); 89 ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); 90 ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); 87 91 88 92 ALLOC1_INTERFACE_END(_param->_nb_instruction); 89 93 } 90 {91 ALLOC0_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage."));94 // { 95 // ALLOC0_INTERFACE_BEGIN("decod",OUT, EAST, _("Send instruction bundle to the decod's stage.")); 92 96 93 ALLOC0_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address );94 ALLOC0_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr );95 ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state );96 ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth );97 ALLOC0_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch);97 // ALLOC0_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address ); 98 // ALLOC0_SIGNAL_OUT(out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr ); 99 // ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state ); 100 // ALLOC0_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth ); 101 // ALLOC0_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); 98 102 99 ALLOC0_INTERFACE_END();100 }103 // ALLOC0_INTERFACE_END(); 104 // } 101 105 102 106 // ~~~~~[ Interface "icache_rsp" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 132 136 if (usage_is_set(_usage,USE_SYSTEMC)) 133 137 { 134 ALLOC1(internal_DECOD_VAL,Tcontrol_t,_param->_nb_instruction); 135 138 ALLOC1(internal_DECOD_VAL ,Tcontrol_t,_param->_nb_instruction); 139 if (_param->_queue_scheme == IFETCH_QUEUE_SCHEME_FULL_ASSOC) 140 { 141 ALLOC1(internal_DECOD_PTR ,uint32_t ,_param->_nb_instruction); 142 ALLOC1(internal_DECOD_SLOT,uint32_t ,_param->_nb_instruction); 143 } 144 136 145 _queue = new ifetch_queue_entry_t * [_param->_size_queue]; 137 146 for (uint32_t i=0;i<_param->_size_queue; i++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp
r123 r136 41 41 DELETE1_SIGNAL( in_DECOD_ACK ,_param->_nb_instruction,1); 42 42 DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_nb_instruction,_param->_size_instruction); 43 DELETE0_SIGNAL(out_DECOD_ADDRESS ,_param->_size_instruction_address); 44 DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR ,_param->_size_inst_ifetch_ptr ); 45 DELETE0_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_size_branch_state ); 46 DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth ); 47 DELETE0_SIGNAL(out_DECOD_EXCEPTION ,_param->_size_exception_ifetch); 43 DELETE1_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_instruction,_param->_size_instruction_address); 44 DELETE1_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_nb_instruction,_param->_size_branch_state); 45 DELETE1_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_instruction,_param->_size_depth); 46 DELETE1_SIGNAL(out_DECOD_EXCEPTION ,_param->_nb_instruction,_param->_size_exception_ifetch); 47 // DELETE0_SIGNAL(out_DECOD_ADDRESS ,_param->_size_instruction_address); 48 // DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR ,_param->_size_inst_ifetch_ptr ); 49 // DELETE0_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_size_branch_state ); 50 // DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth ); 51 // DELETE0_SIGNAL(out_DECOD_EXCEPTION ,_param->_size_exception_ifetch); 48 52 49 53 DELETE0_SIGNAL( in_ICACHE_RSP_VAL ,1); … … 60 64 if (usage_is_set(_usage,USE_SYSTEMC)) 61 65 { 62 DELETE1(internal_DECOD_VAL,_param->_nb_instruction); 66 DELETE1(internal_DECOD_VAL ,_param->_nb_instruction); 67 if (_param->_queue_scheme == IFETCH_QUEUE_SCHEME_FULL_ASSOC) 68 { 69 DELETE1(internal_DECOD_PTR ,_param->_nb_instruction); 70 DELETE1(internal_DECOD_SLOT,_param->_nb_instruction); 71 } 63 72 64 73 for (uint32_t i=0;i<_param->_size_queue; i++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp
r132 r136 24 24 log_function(Ifetch_queue,FUNCTION,_name.c_str()); 25 25 26 if (PORT_READ(in_NRESET)) 27 { 28 // ========================================================== 29 // =====[ ADDRESS ]========================================== 30 // ========================================================== 31 { 32 internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); 33 34 log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS_ACK : %d",internal_ADDRESS_ACK); 35 36 if (_param->_have_port_ifetch_queue_ptr) 37 PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); 38 } 39 40 // ========================================================== 41 // =====[ DECOD ]============================================ 42 // ========================================================== 43 { 44 bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP); 45 46 for (uint32_t i=0; i<_param->_nb_instruction; i++) 47 { 48 internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i]; 49 50 log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD_VAL [%d] : %d",i,internal_DECOD_VAL [i]); 51 52 PORT_WRITE(out_DECOD_INSTRUCTION [i], _queue[reg_PTR_READ]->_instruction [i]); 53 } 54 55 PORT_WRITE(out_DECOD_ADDRESS , _queue[reg_PTR_READ]->_address ); 56 if (_param->_have_port_inst_ifetch_ptr) 57 PORT_WRITE(out_DECOD_INST_IFETCH_PTR , _queue[reg_PTR_READ]->_inst_ifetch_ptr ); 58 PORT_WRITE(out_DECOD_BRANCH_STATE , _queue[reg_PTR_READ]->_branch_state ); 59 if (_param->_have_port_depth) 60 PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID, _queue[reg_PTR_READ]->_branch_update_prediction_id); 61 PORT_WRITE(out_DECOD_EXCEPTION , _queue[reg_PTR_READ]->_exception ); 62 } 63 } 64 else 65 { 66 // Reset 67 internal_ADDRESS_ACK = 0; 68 for (uint32_t i=0; i<_param->_nb_instruction; i++) 69 internal_DECOD_VAL [i] = 0; 70 71 } 72 73 // Write Output 74 PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); 75 for (uint32_t i=0; i<_param->_nb_instruction; i++) 76 PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); 26 (this->*function_genMoore) (); 77 27 78 28 log_end(Ifetch_queue,FUNCTION); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp
r128 r136 25 25 log_function(Ifetch_queue,FUNCTION,_name.c_str()); 26 26 27 if (PORT_READ(in_NRESET) == 0) 28 { 29 reg_PTR_READ = 0; 30 reg_PTR_WRITE = 0; 31 32 for (uint32_t i=0; i<_param->_size_queue; i++) 33 { 34 _queue [i]->_state = IFETCH_QUEUE_STATE_EMPTY; 35 _queue [i]->_address = 0; // not necessary 36 _queue [i]->_inst_ifetch_ptr = 0; // not necessary 37 _queue [i]->_branch_state = 0; // not necessary 38 _queue [i]->_branch_update_prediction_id = 0; // not necessary 39 _queue [i]->_exception = 0; // not necessary 40 41 for (uint32_t j=0; j<_param->_nb_instruction; j++) 42 { 43 _queue [i]->_instruction [j] = 0; // not necessary 44 _queue [i]->_instruction_enable [j] = 0; // not necessary 45 } 46 } 47 } 48 else 49 { 50 // ========================================================== 51 // =====[ ADDRESS ]========================================== 52 // ========================================================== 53 if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK) 54 { 55 log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : Transaction"); 56 log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); 57 log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : 0x%x",PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS)); 58 59 // New slot in ifetch_queue is allocated 60 61 _queue[reg_PTR_WRITE]->_state = IFETCH_QUEUE_STATE_WAIT_RSP; 62 63 #ifdef STATISTICS 64 if (usage_is_set(_usage,USE_STATISTICS)) 65 (*_sum_transaction_address) ++; 66 #endif 67 68 for (uint32_t i=0; i<_param->_nb_instruction; i++) 69 { 70 Tcontrol_t enable = PORT_READ(in_ADDRESS_INSTRUCTION_ENABLE [i]); 71 #ifdef STATISTICS 72 if (usage_is_set(_usage,USE_STATISTICS)) 73 (*_sum_inst_enable) += enable; 74 #endif 75 _queue[reg_PTR_WRITE]->_instruction_enable [i] = enable; 76 } 77 78 _queue[reg_PTR_WRITE]->_address = PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS); 79 _queue[reg_PTR_WRITE]->_inst_ifetch_ptr = (_param->_have_port_inst_ifetch_ptr)?PORT_READ(in_ADDRESS_INST_IFETCH_PTR ):0; 80 _queue[reg_PTR_WRITE]->_branch_state = PORT_READ(in_ADDRESS_BRANCH_STATE); 81 _queue[reg_PTR_WRITE]->_branch_update_prediction_id = (_param->_have_port_depth)?PORT_READ(in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID):0; 82 83 reg_PTR_WRITE = (reg_PTR_WRITE+1)%_param->_size_queue; 84 } 85 86 // ========================================================== 87 // =====[ DECOD ]============================================ 88 // ========================================================== 89 bool have_instruction_decod = false; 90 bool have_instruction_enable = false; 91 for (uint32_t i=0; i<_param->_nb_instruction; i++) 92 { 93 if (internal_DECOD_VAL [i] and PORT_READ(in_DECOD_ACK[i])) 94 { 95 log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD [%d] : Transaction",i); 96 97 have_instruction_decod = true; 98 _queue[reg_PTR_READ]->_instruction_enable [i] = false; 99 } 100 have_instruction_enable |= _queue[reg_PTR_READ]->_instruction_enable [i]; 101 } 102 103 // Test if all is decoded 104 if (have_instruction_decod and not have_instruction_enable) 105 { 106 // all is decod 107 _queue[reg_PTR_READ]->_state = IFETCH_QUEUE_STATE_EMPTY; 108 reg_PTR_READ = (reg_PTR_READ+1)%_param->_size_queue; 109 } 110 111 // ========================================================== 112 // =====[ ICACHE_RSP ]======================================= 113 // ========================================================== 114 if (PORT_READ(in_ICACHE_RSP_VAL) and internal_ICACHE_RSP_ACK) 115 { 116 log_printf(TRACE,Ifetch_queue,FUNCTION," * ICACHE_RSP : Transaction"); 117 118 Tpacket_t ptr = (_param->_have_port_ifetch_queue_ptr)?PORT_READ(in_ICACHE_RSP_PACKET_ID):0; 119 120 for (uint32_t i=0; i<_param->_nb_instruction; i++) 121 _queue[ptr]->_instruction [i] = PORT_READ(in_ICACHE_RSP_INSTRUCTION [i]); 122 123 switch (PORT_READ(in_ICACHE_RSP_ERROR)) 124 { 125 case ICACHE_ERROR_NONE : _queue[ptr]->_exception = EXCEPTION_IFETCH_NONE ; break; 126 case ICACHE_ERROR_BUS_ERROR : _queue[ptr]->_exception = EXCEPTION_IFETCH_BUS_ERROR; break; 127 default : ERRORMORPHEO(FUNCTION,"icache_rsp_error : unknow value."); 128 } 129 130 switch (_queue[ptr]->_state) 131 { 132 case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_HAVE_RSP; break; 133 case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : _queue[ptr]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; 134 default : ERRORMORPHEO(FUNCTION,"icache_rsp : invalid ifetch_queue state."); 135 } 136 } 137 138 // ========================================================== 139 // =====[ EVENT_RESET ]====================================== 140 // ========================================================== 141 if (PORT_READ(in_EVENT_RESET_VAL) and internal_EVENT_RESET_ACK) 142 { 143 log_printf(TRACE,Ifetch_queue,FUNCTION," * EVENT_RESET : Transaction"); 144 145 // Scan all entry of queue and test the status 146 for (uint32_t i=0; i<_param->_size_queue; i++) 147 switch (_queue[i]->_state) 148 { 149 case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : break; 150 case IFETCH_QUEUE_STATE_WAIT_RSP : _queue[i]->_state = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP; break; 151 default : _queue[i]->_state = IFETCH_QUEUE_STATE_EMPTY ; break; 152 } 153 154 // all entry is empty (or wait respons to flush) 155 // reset ptr 156 // 1) reg_PTR_READ = reg_PTR_WRITE = = 0 157 // 2) reg_PTR_READ = reg_PTR_WRITE 158 // In method 1), the probalitie than the entry pointed by reg_PTR_WRITE is a slot with state "error_wait_rsp" is more importate that the method 2) 159 reg_PTR_READ = reg_PTR_WRITE; 160 } 161 162 #if defined(DEBUG) and (DEBUG >= DEBUG_TRACE) 163 log_printf(TRACE,Ifetch_queue,FUNCTION," * Dump ifetch_queue"); 164 log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); 165 log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_READ : %d",reg_PTR_READ ); 166 for (uint32_t i=0; i<_param->_size_queue; i++) 167 { 168 log_printf(TRACE,Ifetch_queue,FUNCTION," * [%d] 0x%.8x (0x%.8x) %d - %d %d %d - %s", 169 i, 170 _queue [i]->_address, 171 _queue [i]->_address<<2, 172 _queue [i]->_inst_ifetch_ptr, 173 _queue [i]->_branch_state, 174 _queue [i]->_branch_update_prediction_id, 175 _queue [i]->_exception, 176 toString(_queue [i]->_state).c_str() 177 ); 178 179 for (uint32_t j=0; j<_param->_nb_instruction; j++) 180 log_printf(TRACE,Ifetch_queue,FUNCTION," * %d 0x%.8x", _queue [i]->_instruction_enable[j], _queue [i]->_instruction[j]); 181 } 182 #endif 183 184 #ifdef STATISTICS 185 if (usage_is_set(_usage,USE_STATISTICS)) 186 for (uint32_t i=0; i<_param->_size_queue; i++) 187 switch (_queue[i]->_state) 188 { 189 case IFETCH_QUEUE_STATE_EMPTY : break; 190 case IFETCH_QUEUE_STATE_WAIT_RSP : (*_sum_use_queue_wait_rsp ) ++; break; 191 case IFETCH_QUEUE_STATE_HAVE_RSP : (*_sum_use_queue_have_rsp ) ++; break; 192 case IFETCH_QUEUE_STATE_ERROR_WAIT_RSP : (*_sum_use_queue_error_wait_rsp) ++; break; 193 default : break; 194 } 195 #endif 196 } 27 (this->*function_transition) (); 197 28 198 29 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp
r135 r136 19 19 #undef FUNCTION 20 20 #define FUNCTION "Ifetch_queue::Parameters" 21 Parameters::Parameters (uint32_t size_queue , 22 uint32_t nb_instruction , 23 uint32_t size_branch_update_prediction, 24 uint32_t size_general_data , 25 bool is_toplevel) 21 Parameters::Parameters (uint32_t size_queue , 22 Tifetch_queue_scheme_t queue_scheme , 23 uint32_t nb_instruction , 24 uint32_t size_branch_update_prediction, 25 uint32_t size_general_data , 26 bool is_toplevel) 26 27 { 27 28 log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin"); … … 29 30 _nb_instruction_in_queue = size_queue ; 30 31 _size_queue = size_queue/nb_instruction ; 32 _queue_scheme = queue_scheme ; 31 33 _nb_instruction = nb_instruction ; 32 34 // _size_branch_update_prediction = size_branch_update_prediction; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_msg_error.cpp
r113 r136 29 29 test.error(_("Size of ifetch queue must be a multiple of nb_instruction.\n")); 30 30 31 switch (_queue_scheme) 32 { 33 case IFETCH_QUEUE_SCHEME_NO_ASSOC : 34 case IFETCH_QUEUE_SCHEME_FULL_ASSOC : 35 { 36 break; 37 } 38 default : 39 { 40 test.error(toString(_("Ifetch queue scheme '%s' is not supported. Please wait a next revision.\n"),toString(_queue_scheme).c_str())); 41 break; 42 } 43 } 44 31 45 if (_size_queue == 1) 32 46 test.warning(_("To best perfomance, size_queue must be > 1.\n")); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters_print.cpp
r88 r136 28 28 xml.balise_open("ifetch_queue"); 29 29 xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); 30 xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); 30 31 xml.singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction )); xml.singleton_end(); 31 32 // xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Ifetch_unit.h
r101 r136 98 98 public : SC_IN (Tcontrol_t ) ** in_DECOD_ACK ;//[nb_instruction] 99 99 public : SC_OUT(Tinstruction_t ) ** out_DECOD_INSTRUCTION ;//[nb_instruction] 100 //public : SC_OUT(Tcontext_t ) * out_DECOD_CONTEXT_ID ; 101 public : SC_OUT(Tgeneral_address_t ) * out_DECOD_ADDRESS ; 102 public : SC_OUT(Tinst_ifetch_ptr_t ) * out_DECOD_INST_IFETCH_PTR ; 103 public : SC_OUT(Tbranch_state_t ) * out_DECOD_BRANCH_STATE ; 104 public : SC_OUT(Tprediction_ptr_t ) * out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; 105 public : SC_OUT(Texception_t ) * out_DECOD_EXCEPTION ; 100 //public : SC_OUT(Tcontext_t ) ** out_DECOD_CONTEXT_ID ; 101 public : SC_OUT(Tgeneral_address_t ) ** out_DECOD_ADDRESS ; 102 public : SC_OUT(Tbranch_state_t ) ** out_DECOD_BRANCH_STATE ; 103 public : SC_OUT(Tprediction_ptr_t ) ** out_DECOD_BRANCH_UPDATE_PREDICTION_ID ; 104 public : SC_OUT(Texception_t ) ** out_DECOD_EXCEPTION ; 106 105 107 106 // ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/include/Parameters.h
r88 r136 27 27 //-----[ fields ]------------------------------------------------------------ 28 28 public : uint32_t _size_queue ; 29 public : ifetch_queue::Tifetch_queue_scheme_t 30 _queue_scheme ; 29 31 public : uint32_t _nb_instruction ; 30 32 //public : uint32_t _size_address ; … … 44 46 //-----[ methods ]----------------------------------------------------------- 45 47 public : Parameters (uint32_t size_queue , 48 ifetch_queue::Tifetch_queue_scheme_t 49 queue_scheme , 46 50 uint32_t nb_instruction , 47 51 uint32_t size_branch_update_prediction, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_allocation.cpp
r131 r136 116 116 // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 117 117 { 118 ALLOC0_INTERFACE_BEGIN("decod",OUT , EAST, _("Send bundle to the decod unit."));119 120 //ALLOC0_SIGNAL_OUT (out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id);121 ALLOC0_SIGNAL_OUT (out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address);122 ALLOC0_SIGNAL_OUT (out_DECOD_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t,_param->_size_inst_ifetch_ptr);123 ALLOC0_SIGNAL_OUT (out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state);124 ALLOC0_SIGNAL_OUT (out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth);125 ALLOC0_SIGNAL_OUT (out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch);126 127 ALLOC0_INTERFACE_END();128 }129 {130 118 ALLOC1_INTERFACE_BEGIN("decod",OUT , EAST, _("Send bundle to the decod unit."),_param->_nb_instruction); 131 119 132 120 ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL); 133 121 ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK); 122 134 123 ALLOC1_SIGNAL_OUT(out_DECOD_INSTRUCTION ,"instruction" ,Tinstruction_t ,_param->_size_instruction); 124 ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_address_t,_param->_size_instruction_address); 125 ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state); 126 ALLOC1_SIGNAL_OUT(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); 127 ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch); 135 128 136 129 ALLOC1_INTERFACE_END(_param->_nb_instruction); … … 405 398 PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_INSTRUCTION" , 406 399 dest,"out_DECOD_"+toString(i)+"_INSTRUCTION" ); 400 PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_ADDRESS" , 401 dest,"out_DECOD_"+toString(i)+"_ADDRESS" ); 402 PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_BRANCH_STATE" , 403 dest,"out_DECOD_"+toString(i)+"_BRANCH_STATE" ); 404 if (_param->_have_port_depth) 405 PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID", 406 dest,"out_DECOD_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID"); 407 PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_EXCEPTION" , 408 dest,"out_DECOD_"+toString(i)+"_EXCEPTION" ); 407 409 } 408 409 PORT_MAP(_component,src ,"out_DECOD_ADDRESS" ,dest,"out_DECOD_ADDRESS" );410 if (_param->_have_port_inst_ifetch_ptr)411 PORT_MAP(_component,src ,"out_DECOD_INST_IFETCH_PTR" ,dest,"out_DECOD_INST_IFETCH_PTR" );412 PORT_MAP(_component,src ,"out_DECOD_BRANCH_STATE" ,dest,"out_DECOD_BRANCH_STATE" );413 if (_param->_have_port_depth)414 PORT_MAP(_component,src ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID",dest,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID");415 PORT_MAP(_component,src ,"out_DECOD_EXCEPTION" ,dest,"out_DECOD_EXCEPTION" );416 410 } 417 411 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp
r128 r136 54 54 DELETE1_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_instruction,1); 55 55 56 // DELETE0_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_size_context_id);57 DELETE0_SIGNAL(out_DECOD_ADDRESS ,_param->_size_instruction_address);58 DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR ,_param->_size_inst_ifetch_ptr);59 DELETE0_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_size_branch_state);60 DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);61 DELETE0_SIGNAL(out_DECOD_EXCEPTION ,_param->_size_exception_ifetch);62 56 DELETE1_SIGNAL(out_DECOD_VAL ,_param->_nb_instruction,1); 63 57 DELETE1_SIGNAL( in_DECOD_ACK ,_param->_nb_instruction,1); 64 58 DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_nb_instruction,_param->_size_instruction); 59 // DELETE1_SIGNAL(out_DECOD_CONTEXT_ID ,_param->_nb_instruction,_param->_size_context_id); 60 DELETE1_SIGNAL(out_DECOD_ADDRESS ,_param->_nb_instruction,_param->_size_instruction_address); 61 DELETE1_SIGNAL(out_DECOD_BRANCH_STATE ,_param->_nb_instruction,_param->_size_branch_state); 62 DELETE1_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_nb_instruction,_param->_size_depth); 63 DELETE1_SIGNAL(out_DECOD_EXCEPTION ,_param->_nb_instruction,_param->_size_exception_ifetch); 65 64 66 65 DELETE0_SIGNAL( in_EVENT_VAL ,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters.cpp
r88 r136 19 19 #define FUNCTION "Ifetch_unit::Parameters" 20 20 Parameters::Parameters (uint32_t size_queue , 21 ifetch_queue::Tifetch_queue_scheme_t 22 queue_scheme , 21 23 uint32_t nb_instruction , 22 24 uint32_t size_branch_update_prediction, … … 28 30 29 31 _size_queue = size_queue ; 32 _queue_scheme = queue_scheme ; 30 33 _nb_instruction = nb_instruction ; 31 34 // _size_branch_update_prediction = size_branch_update_prediction; … … 40 43 _param_ifetch_queue = new morpheo::behavioural::core::multi_front_end::front_end::ifetch_unit::ifetch_queue:: Parameters 41 44 (size_queue , 45 queue_scheme , 42 46 nb_instruction , 43 47 size_branch_update_prediction, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Parameters_print.cpp
r88 r136 27 27 // xml.balise_open("ifetch_unit"); 28 28 // xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); 29 // xml.singleton_begin("queue_scheme "); xml.attribut("value",toString(_queue_scheme )); xml.singleton_end(); 29 30 // xml.singleton_begin("nb_instruction "); xml.attribut("value",toString(_nb_instruction )); xml.singleton_end(); 30 31 // // xml.singleton_begin("size_branch_update_prediction"); xml.attribut("value",toString(_size_branch_update_prediction)); xml.singleton_end(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Parameters_msg_error.cpp
r81 r136 26 26 Parameters_test test ("Prediction_unit"); 27 27 28 for (uint32_t i=0; i<_nb_context; ++i) 29 if ((_nb_instruction[i] > 1) and (_ufpt_size_queue[i] < 2)) 30 test.error(toString(_("context \"%d\" : can fetch must than 1 instruction per cycle, size of Update Fetch Prediction Table must be less 1\n"),i)); 31 28 32 log_printf(FUNC,Prediction_unit,FUNCTION,"End"); 29 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/include/Parameters.h
r111 r136 41 41 // ifetch_unit 42 42 public : uint32_t * _size_ifetch_queue ;//[nb_context] 43 public : ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 44 * _ifetch_queue_scheme ;//[nb_context] 43 45 public : uint32_t * _nb_inst_fetch ;//[nb_context] 44 46 public : bool ** _instruction_implemeted ;//[nb_context][nb_inst_fetch] … … 111 113 morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), 112 114 // ifetch_unit 113 uint32_t * size_ifetch_queue , 114 uint32_t * nb_inst_fetch , 115 bool ** instruction_implemeted , 116 uint32_t * link_context_to_decod_unit , 115 uint32_t * size_ifetch_queue ,//[nb_context] 116 ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 117 * ifetch_queue_scheme ,//[nb_context] 118 uint32_t * nb_inst_fetch ,//[nb_context] 119 bool ** instruction_implemeted ,//[nb_context] 120 uint32_t * link_context_to_decod_unit ,//[nb_context] 117 121 // decod_unit 118 122 uint32_t * size_decod_queue ,//[nb_decod_unit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp
r123 r136 449 449 ////out_DECOD_CONTEXT_ID 450 450 451 COMPONENT_MAP(_component,src ,"out_DECOD_ADDRESS" ,dest, "in_IFETCH_"+toString(num_context)+"_ADDRESS" );452 if (_param->_have_port_inst_ifetch_ptr)453 COMPONENT_MAP(_component,src ,"out_DECOD_INST_IFETCH_PTR" ,dest, "in_IFETCH_"+toString(num_context)+"_INST_IFETCH_PTR" );454 COMPONENT_MAP(_component,src ,"out_DECOD_BRANCH_STATE" ,dest, "in_IFETCH_"+toString(num_context)+"_BRANCH_STATE" );455 if (_param->_have_port_depth)456 COMPONENT_MAP(_component,src ,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID",dest, "in_IFETCH_"+toString(num_context)+"_BRANCH_UPDATE_PREDICTION_ID");457 COMPONENT_MAP(_component,src ,"out_DECOD_EXCEPTION" ,dest, "in_IFETCH_"+toString(num_context)+"_EXCEPTION" );458 459 451 for (uint32_t j=0; j<_param->_nb_inst_fetch [i];++j) 460 452 { … … 471 463 COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j)+ "_INSTRUCTION", 472 464 dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_INSTRUCTION"); 465 466 COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_ADDRESS", 467 dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_ADDRESS"); 468 // if (_param->_have_port_inst_ifetch_ptr) 469 // COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_INST_IFETCH_PTR", 470 // dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_INST_IFETCH_PTR"); 471 COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_BRANCH_STATE", 472 dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_BRANCH_STATE"); 473 if (_param->_have_port_depth) 474 COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_BRANCH_UPDATE_PREDICTION_ID", 475 dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_BRANCH_UPDATE_PREDICTION_ID"); 476 COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(j) +"_EXCEPTION", 477 dest, "in_IFETCH_"+toString(num_context)+"_"+toString(j)+"_EXCEPTION"); 478 479 473 480 } 474 481 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Parameters.cpp
r128 r136 24 24 morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void), 25 25 // ifetch_unit 26 uint32_t * size_ifetch_queue , 27 uint32_t * nb_inst_fetch , 28 bool ** instruction_implemeted , 29 uint32_t * link_context_to_decod_unit , 26 uint32_t * size_ifetch_queue ,//[nb_context] 27 ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 28 * ifetch_queue_scheme ,//[nb_context] 29 uint32_t * nb_inst_fetch ,//[nb_context] 30 bool ** instruction_implemeted ,//[nb_context] 31 uint32_t * link_context_to_decod_unit ,//[nb_context] 30 32 // decod_unit 31 33 uint32_t * size_decod_queue ,//[nb_decod_unit] … … 74 76 _translate_num_context_to_num_thread = translate_num_context_to_num_thread ; 75 77 _size_ifetch_queue = size_ifetch_queue ; 78 _ifetch_queue_scheme = ifetch_queue_scheme ; 76 79 _nb_inst_fetch = nb_inst_fetch ; 77 80 _instruction_implemeted = instruction_implemeted ; … … 125 128 { 126 129 _param_ifetch_unit [i] = new behavioural::core::multi_front_end::front_end::ifetch_unit::Parameters 127 (_size_ifetch_queue [i] , 128 _nb_inst_fetch [i] , 129 log2(_upt_size_queue[i]) , 130 (_size_ifetch_queue [i] , 131 _ifetch_queue_scheme[i] , 132 _nb_inst_fetch [i] , 133 log2(_upt_size_queue[i]) , 130 134 size_instruction_address ); 131 135 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h
r131 r136 159 159 //public : SC_IN (Toperation_t ) ** in_COMMIT_OPERATION ;//[nb_inst_commit] 160 160 //public : SC_IN (Ttype_t ) ** in_COMMIT_TYPE ;//[nb_inst_commit] 161 public : SC_IN (Tcontrol_t ) ** in_COMMIT_CANCEL ;//[nb_inst_commit] 161 162 public : SC_IN (Tspecial_data_t ) ** in_COMMIT_FLAGS ;//[nb_inst_commit] 162 163 public : SC_IN (Texception_t ) ** in_COMMIT_EXCEPTION ;//[nb_inst_commit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
r135 r136 156 156 // ALLOC1_SIGNAL_IN ( in_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 157 157 // ALLOC1_SIGNAL_IN ( in_COMMIT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 158 ALLOC1_SIGNAL_IN ( in_COMMIT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 158 159 ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data ); 159 160 ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_deallocation.cpp
r134 r136 104 104 // DELETE1_SIGNAL( in_COMMIT_OPERATION ,_param->_nb_inst_commit,_param->_size_operation ); 105 105 // DELETE1_SIGNAL( in_COMMIT_TYPE ,_param->_nb_inst_commit,_param->_size_type ); 106 DELETE1_SIGNAL( in_COMMIT_CANCEL ,_param->_nb_inst_commit,1 ); 106 107 DELETE1_SIGNAL( in_COMMIT_FLAGS ,_param->_nb_inst_commit,_param->_size_general_data ); 107 108 DELETE1_SIGNAL( in_COMMIT_EXCEPTION ,_param->_nb_inst_commit,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r134 r136 426 426 Ttype_t type = entry->type; 427 427 Tcontrol_t no_sequence = PORT_READ(in_COMMIT_NO_SEQUENCE [x]); 428 // Tcontrol_t cancel = PORT_READ(in_COMMIT_CANCEL [x]); 428 429 429 430 #if 0 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h
r122 r136 126 126 public : SC_OUT(Toperation_t ) ** out_ISSUE_OUT_OPERATION ;//[nb_inst_issue] 127 127 public : SC_OUT(Ttype_t ) ** out_ISSUE_OUT_TYPE ;//[nb_inst_issue] 128 public : SC_OUT(Tcontrol_t ) ** out_ISSUE_OUT_CANCEL ;//[nb_inst_issue] 128 129 public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE;//[nb_inst_issue] 129 130 public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_OUT_STORE_QUEUE_PTR_READ ;//[nb_inst_issue] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Types.h
r122 r136 21 21 { 22 22 ISSUE_QUEUE_SCHEME_IN_ORDER // Each instruction is issue in of order 23 // 23 // ,ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER // Each bundle is issue in order. In bundle, an instruction is issue out of order 24 24 ,ISSUE_QUEUE_SCHEME_OUT_OF_ORDER // Each instruction is issue out of order 25 25 } Tissue_queue_scheme_t; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp
r128 r136 130 130 ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 131 131 ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 132 ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_CANCEL ,"cancel" ,Tcontrol_t ,1); 132 133 ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ); 133 134 ALLOC1_SIGNAL_OUT(out_ISSUE_OUT_STORE_QUEUE_PTR_READ ,"store_queue_ptr_read" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp
r128 r136 83 83 DELETE1_SIGNAL(out_ISSUE_OUT_OPERATION ,_param->_nb_inst_issue,_param->_size_operation ); 84 84 DELETE1_SIGNAL(out_ISSUE_OUT_TYPE ,_param->_nb_inst_issue,_param->_size_type ); 85 DELETE1_SIGNAL(out_ISSUE_OUT_CANCEL ,_param->_nb_inst_issue,1); 85 86 DELETE1_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); 86 87 DELETE1_SIGNAL(out_ISSUE_OUT_STORE_QUEUE_PTR_READ ,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp
r123 r136 57 57 PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); 58 58 PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); 59 PORT_WRITE(out_ISSUE_OUT_CANCEL [index], 0 ); 59 60 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); 60 61 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [index], entry->_store_queue_ptr_read ); … … 132 133 PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); 133 134 PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); 135 PORT_WRITE(out_ISSUE_OUT_CANCEL [index], 0 ); 134 136 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); 135 137 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [index], entry->_store_queue_ptr_read ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp
r123 r136 126 126 PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); 127 127 PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); 128 PORT_WRITE(out_ISSUE_OUT_CANCEL [i], 0 ); 128 129 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); 129 130 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [i], entry->_store_queue_ptr_read ); … … 189 190 PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); 190 191 PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); 192 PORT_WRITE(out_ISSUE_OUT_CANCEL [i], 0 ); 191 193 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); 192 194 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_READ [i], entry->_store_queue_ptr_read ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
r117 r136 43 43 if (// (_queue_scheme == ISSUE_QUEUE_SCHEME_IN_BUNDLE_ORDER) or 44 44 (_queue_scheme == ISSUE_QUEUE_SCHEME_OUT_OF_ORDER )) 45 test. warning(toString(_("Can have deadlock with the queue scheme \"%s\".\n"),toString(_queue_scheme).c_str()));45 test.error(toString(_("Can have deadlock with the queue scheme \"%s\".\n"),toString(_queue_scheme).c_str())); 46 46 47 47 if (not is_multiple(_size_queue, _nb_bank)) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h
r122 r136 53 53 public : Stat * _stat; 54 54 55 55 //private : counter_t * _stat_nb_inst_issue_stall_by_registerfile; 56 56 //private : counter_t * _stat_nb_inst_issue_stall_by_rename_unit ; 57 57 private : counter_t * _stat_nb_inst_issue_stall_by_commit_unit ; … … 73 73 74 74 // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 75 public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[sum_inst_insert]76 public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[sum_inst_insert]77 public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[sum_inst_insert]78 public : SC_OUT(Tgeneral_address_t ) ** out_INSERT_RD_NUM_REG ;//[sum_inst_insert]79 public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[sum_inst_insert]80 public : SC_OUT(Tspecial_address_t ) ** out_INSERT_RE_NUM_REG ;//[sum_inst_insert]75 // public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[sum_inst_insert] 76 // public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[sum_inst_insert] 77 // public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[sum_inst_insert] 78 // public : SC_OUT(Tgeneral_address_t ) ** out_INSERT_RD_NUM_REG ;//[sum_inst_insert] 79 // public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[sum_inst_insert] 80 // public : SC_OUT(Tspecial_address_t ) ** out_INSERT_RE_NUM_REG ;//[sum_inst_insert] 81 81 82 82 public : SC_IN (Tcontrol_t ) *** in_INSERT_RENAME_UNIT_VAL ;//[nb_rename_unit][nb_inst_insert] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/Parameters.h
r88 r136 50 50 //public : uint32_t _size_context_id ; 51 51 public : uint32_t _size_rename_id ; 52 52 //public : uint32_t _sum_inst_insert ; 53 53 //public : uint32_t _sum_inst_retire ; 54 54 public : uint32_t * _translate_front_end_id_to_rename_unit ;//[nb_front_end] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue.cpp
r132 r136 119 119 sensitive << (*(in_NRESET)); 120 120 { 121 uint32_t x=0;121 // uint32_t x=0; 122 122 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 123 123 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) 124 sensitive << (*(in_INSERT_ACK [x++] ))124 sensitive // << (*(in_INSERT_ACK [x++] )) 125 125 << (*(in_INSERT_RENAME_UNIT_VAL [i][j])) 126 126 << (*(in_INSERT_RENAME_UNIT_NO_EXECUTE [i][j])) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_allocation.cpp
r122 r136 67 67 68 68 // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 69 {70 ALLOC1_INTERFACE_BEGIN("insert",OUT, WEST,_("insert's interface"),_param->_sum_inst_insert);71 72 ALLOC1_SIGNAL_OUT (out_INSERT_VAL ,"VAL" ,Tcontrol_t ,1 );73 ALLOC1_SIGNAL_IN ( in_INSERT_ACK ,"ACK" ,Tcontrol_t ,1 );74 ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 );75 ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t ,_param->_size_general_register);76 ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 );77 ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t ,_param->_size_special_register);78 79 ALLOC1_INTERFACE_END(_param->_sum_inst_insert);80 }69 // { 70 // ALLOC1_INTERFACE_BEGIN("insert",OUT, WEST,_("insert's interface"),_param->_sum_inst_insert); 71 72 // ALLOC1_SIGNAL_OUT (out_INSERT_VAL ,"VAL" ,Tcontrol_t ,1 ); 73 // ALLOC1_SIGNAL_IN ( in_INSERT_ACK ,"ACK" ,Tcontrol_t ,1 ); 74 // ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ); 75 // ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t ,_param->_size_general_register); 76 // ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ); 77 // ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t ,_param->_size_special_register); 78 79 // ALLOC1_INTERFACE_END(_param->_sum_inst_insert); 80 // } 81 81 82 82 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_deallocation.cpp
r128 r136 31 31 DELETE2_SIGNAL(out_RENAME_RENAME_UNIT_FRONT_END_ID ,_param->_nb_front_end,_param->_nb_inst_decod[it1],_param->_size_front_end_id ); 32 32 33 DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 );34 DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 );35 DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 );36 DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register);37 DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 );38 DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register);33 // DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 ); 34 // DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 ); 35 // DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 ); 36 // DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register); 37 // DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 ); 38 // DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register); 39 39 40 40 DELETE2_SIGNAL( in_INSERT_RENAME_UNIT_VAL ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1],1 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert.cpp
r128 r136 26 26 if (PORT_READ(in_NRESET)) 27 27 { 28 uint32_t x=0;28 // uint32_t x=0; 29 29 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 30 30 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) … … 57 57 Tspecial_address_t special_address_msb = i << _param->_size_special_register; 58 58 59 PORT_WRITE(out_INSERT_RD_USE [x] ,WRITE_RD);60 PORT_WRITE(out_INSERT_RD_NUM_REG [x] ,general_address_msb | NUM_REG_RD_PHY_NEW);61 PORT_WRITE(out_INSERT_RE_USE [x] ,WRITE_RE);62 PORT_WRITE(out_INSERT_RE_NUM_REG [x] ,special_address_msb | NUM_REG_RE_PHY_NEW);59 // PORT_WRITE(out_INSERT_RD_USE [x] ,WRITE_RD); 60 // PORT_WRITE(out_INSERT_RD_NUM_REG [x] ,general_address_msb | NUM_REG_RD_PHY_NEW); 61 // PORT_WRITE(out_INSERT_RE_USE [x] ,WRITE_RE); 62 // PORT_WRITE(out_INSERT_RE_NUM_REG [x] ,special_address_msb | NUM_REG_RE_PHY_NEW); 63 63 64 64 if (_param->_have_port_front_end_id) … … 112 112 PORT_WRITE(out_INSERT_ISSUE_QUEUE_NUM_REG_RE [i][j],special_address_msb | NUM_REG_RE_PHY_NEW); 113 113 114 x ++;114 // x ++; 115 115 } 116 116 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp
r123 r136 26 26 if (PORT_READ(in_NRESET)) 27 27 { 28 uint32_t x=0;28 // uint32_t x=0; 29 29 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 30 30 { … … 33 33 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) 34 34 { 35 Tcontrol_t ack = PORT_READ(in_INSERT_ACK [x] );35 // Tcontrol_t ack = PORT_READ(in_INSERT_ACK [x] ); 36 36 Tcontrol_t rename_unit_val = PORT_READ(in_INSERT_RENAME_UNIT_VAL [i][j]); 37 37 Tcontrol_t rename_unit_no_execute = PORT_READ(in_INSERT_RENAME_UNIT_NO_EXECUTE [i][j]); … … 41 41 // if not execute -> don't route to issue_queue 42 42 43 Tcontrol_t val = (44 rename_unit_val and45 commit_unit_ack and46 (rename_unit_no_execute or47 issue_queue_ack));43 // Tcontrol_t val = ( 44 // rename_unit_val and 45 // commit_unit_ack and 46 // (rename_unit_no_execute or 47 // issue_queue_ack)); 48 48 Tcontrol_t rename_unit_ack = ( 49 ack and49 // ack and 50 50 commit_unit_ack and 51 51 (rename_unit_no_execute or 52 52 issue_queue_ack)); 53 53 Tcontrol_t commit_unit_val = ( 54 ack and54 // ack and 55 55 rename_unit_val and 56 56 (rename_unit_no_execute or 57 57 issue_queue_ack)); 58 58 Tcontrol_t issue_queue_val = ( 59 ack and59 // ack and 60 60 rename_unit_val and 61 61 commit_unit_ack and 62 62 not rename_unit_no_execute); 63 63 64 PORT_WRITE(out_INSERT_VAL [x] ,val );64 // PORT_WRITE(out_INSERT_VAL [x] ,val ); 65 65 PORT_WRITE(out_INSERT_RENAME_UNIT_ACK [i][j],rename_unit_ack); 66 66 PORT_WRITE(out_INSERT_COMMIT_UNIT_VAL [i][j],commit_unit_val); 67 67 PORT_WRITE(out_INSERT_ISSUE_QUEUE_VAL [i][j],issue_queue_val); 68 68 69 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * rename_unit [%d].inst_insert[%d] -> %d",i,j,x);70 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (RegisterFile) (w) : %d",val );71 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (RegisterFile) (r) : %d",ack );69 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * rename_unit [%d].inst_insert[%d]",i,j); 70 // log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_val (RegisterFile) (w) : %d",val ); 71 // log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_ack (RegisterFile) (r) : %d",ack ); 72 72 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_val (r) : %d",rename_unit_val ); 73 73 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_rename_unit_ack (w) : %d",rename_unit_ack ); … … 78 78 log_printf(TRACE,OOO_Engine_Glue,FUNCTION," * insert_issue_queue_ack (r) : %d",issue_queue_ack ); 79 79 80 x ++;80 // x ++; 81 81 } 82 82 } … … 84 84 else 85 85 { 86 uint32_t x=0;86 // uint32_t x=0; 87 87 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 88 88 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) 89 89 { 90 PORT_WRITE(out_INSERT_VAL [x] ,0);90 // PORT_WRITE(out_INSERT_VAL [x] ,0); 91 91 PORT_WRITE(out_INSERT_RENAME_UNIT_ACK [i][j],0); 92 92 PORT_WRITE(out_INSERT_COMMIT_UNIT_VAL [i][j],0); 93 93 PORT_WRITE(out_INSERT_ISSUE_QUEUE_VAL [i][j],0); 94 x ++;94 // x ++; 95 95 } 96 96 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp
r110 r136 27 27 param_statistics); 28 28 29 29 // _stat_nb_inst_issue_stall_by_registerfile = _stat->create_variable("nb_inst_issue_stall_by_registerfile"); 30 30 // _stat_nb_inst_issue_stall_by_rename_unit = _stat->create_variable("nb_inst_issue_stall_by_rename_unit" ); 31 31 _stat_nb_inst_issue_stall_by_commit_unit = _stat->create_variable("nb_inst_issue_stall_by_commit_unit" ); … … 33 33 34 34 // std::string nb_inst_issue_stall = "+ + nb_inst_issue_stall_by_registerfile nb_inst_issue_stall_by_rename_unit + nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue"; 35 std::string nb_inst_issue_stall = "+ nb_inst_issue_stall_by_ registerfile + nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue";35 std::string nb_inst_issue_stall = "+ nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue"; 36 36 37 37 // _stat->create_expr_percent ("percent_issue_stall_by_registerfile", "nb_inst_issue_stall_by_registerfile", nb_inst_issue_stall, _("Percent of instruction stalled by RegisterFile")); 38 38 // _stat->create_expr_percent ("percent_issue_stall_by_rename_unit" , "nb_inst_issue_stall_by_rename_unit" , nb_inst_issue_stall, _("Percent of instruction stalled by Rename_Unit") ); 39 39 _stat->create_expr_percent ("percent_issue_stall_by_commit_unit" , "nb_inst_issue_stall_by_commit_unit" , nb_inst_issue_stall, _("Percent of instruction stalled by Commit_Unit") ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp
r110 r136 26 26 if (usage_is_set(_usage,USE_STATISTICS)) 27 27 { 28 uint32_t x=0;28 // uint32_t x=0; 29 29 for (uint32_t i=0; i<_param->_nb_rename_unit; ++i) 30 30 for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j) … … 32 32 if (PORT_READ(in_INSERT_RENAME_UNIT_VAL [i][j])) 33 33 { 34 if (PORT_READ(in_INSERT_ACK [x]) == 0)35 (*_stat_nb_inst_issue_stall_by_registerfile) ++;34 // if (PORT_READ(in_INSERT_ACK [x]) == 0) 35 // (*_stat_nb_inst_issue_stall_by_registerfile) ++; 36 36 if (PORT_READ(in_INSERT_COMMIT_UNIT_ACK [i][j]) == 0) 37 37 (*_stat_nb_inst_issue_stall_by_commit_unit ) ++; … … 39 39 (*_stat_nb_inst_issue_stall_by_issue_queue ) ++; 40 40 } 41 x++;41 // x++; 42 42 } 43 43 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/Parameters.cpp
r128 r136 53 53 // _rename_unit_size_context_id = rename_unit_size_context_id ; 54 54 _size_rename_id = log2(_nb_rename_unit) ; 55 55 // _sum_inst_insert = 0; 56 56 // _sum_inst_retire = 0; 57 57 58 59 60 58 // for (uint32_t i=0; i<_nb_rename_unit; ++i) 59 // { 60 // _sum_inst_insert += _nb_inst_insert[i]; 61 61 // _sum_inst_retire += _nb_inst_retire[i]; 62 62 // } 63 63 64 64 ALLOC1(_translate_front_end_id_to_rename_unit,uint32_t,_nb_front_end); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h
r131 r136 77 77 //public : SC_IN (Toperation_t ) *** in_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_inst_execute] 78 78 //public : SC_IN (Ttype_t ) *** in_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_inst_execute] 79 public : SC_IN (Tcontrol_t ) *** in_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_inst_execute] 79 80 public : SC_IN (Tspecial_data_t ) *** in_EXECUTE_LOOP_FLAGS ;//[nb_execute_loop][nb_inst_execute] 80 81 public : SC_IN (Texception_t ) *** in_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_inst_execute] … … 92 93 //public : SC_OUT(Toperation_t ) ** out_COMMIT_OPERATION ;//[nb_inst_commit] 93 94 //public : SC_OUT(Ttype_t ) ** out_COMMIT_TYPE ;//[nb_inst_commit] 95 public : SC_OUT(Tcontrol_t ) ** out_COMMIT_CANCEL ;//[nb_inst_commit] 94 96 public : SC_OUT(Tspecial_data_t ) ** out_COMMIT_FLAGS ;//[nb_inst_commit] 95 97 public : SC_OUT(Texception_t ) ** out_COMMIT_EXCEPTION ;//[nb_inst_commit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit.cpp
r132 r136 153 153 // << (*(in_EXECUTE_LOOP_OPERATION [i][j])) 154 154 // << (*(in_EXECUTE_LOOP_TYPE [i][j])) 155 << (*(in_EXECUTE_LOOP_CANCEL [i][j])) 155 156 << (*(in_EXECUTE_LOOP_FLAGS [i][j])) 156 157 << (*(in_EXECUTE_LOOP_EXCEPTION [i][j])) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp
r122 r136 67 67 // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 68 68 // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE ,"type" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 69 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CANCEL ,"cancel" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 69 70 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 70 71 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); … … 88 89 // ALLOC1_SIGNAL_OUT(out_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); 89 90 // ALLOC1_SIGNAL_OUT(out_COMMIT_TYPE ,"type" ,Ttype_t ,_param->_size_type ); 91 ALLOC1_SIGNAL_OUT(out_COMMIT_CANCEL ,"cancel" ,Tcontrol_t ,1 ); 90 92 ALLOC1_SIGNAL_OUT(out_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_special_data); 91 93 ALLOC1_SIGNAL_OUT(out_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
r122 r136 35 35 // DELETE2_SIGNAL( in_EXECUTE_LOOP_OPERATION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_operation ); 36 36 // DELETE2_SIGNAL( in_EXECUTE_LOOP_TYPE ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_type ); 37 DELETE2_SIGNAL( in_EXECUTE_LOOP_CANCEL ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1 ); 37 38 DELETE2_SIGNAL( in_EXECUTE_LOOP_FLAGS ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_special_data); 38 39 DELETE2_SIGNAL( in_EXECUTE_LOOP_EXCEPTION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_exception ); … … 49 50 // DELETE1_SIGNAL(out_COMMIT_OPERATION ,_param->_nb_inst_commit,_param->_size_operation ); 50 51 // DELETE1_SIGNAL(out_COMMIT_TYPE ,_param->_nb_inst_commit,_param->_size_type ); 52 DELETE1_SIGNAL(out_COMMIT_CANCEL ,_param->_nb_inst_commit,1 ); 51 53 DELETE1_SIGNAL(out_COMMIT_FLAGS ,_param->_nb_inst_commit,_param->_size_special_data); 52 54 DELETE1_SIGNAL(out_COMMIT_EXCEPTION ,_param->_nb_inst_commit,_param->_size_exception ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp
r131 r136 111 111 //PORT_WRITE(out_COMMIT_OPERATION [i], PORT_READ(in_EXECUTE_LOOP_OPERATION [x][y])); 112 112 //PORT_WRITE(out_COMMIT_TYPE [i], PORT_READ(in_EXECUTE_LOOP_TYPE [x][y])); 113 PORT_WRITE(out_COMMIT_CANCEL [i], PORT_READ(in_EXECUTE_LOOP_CANCEL [x][y])); 113 114 PORT_WRITE(out_COMMIT_FLAGS [i], PORT_READ(in_EXECUTE_LOOP_FLAGS [x][y])); 114 115 PORT_WRITE(out_COMMIT_EXCEPTION [i], exception); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h
r123 r136 106 106 public : SC_OUT(Ttype_t ) ** out_ISSUE_TYPE ;//[nb_inst_issue] 107 107 public : SC_OUT(Toperation_t ) ** out_ISSUE_OPERATION ;//[nb_inst_issue] 108 public : SC_OUT(Tcontrol_t ) ** out_ISSUE_CANCEL ;//[nb_inst_issue] 108 109 public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_STORE_QUEUE_PTR_WRITE ;//[nb_inst_issue] 109 110 public : SC_OUT(Tlsq_ptr_t ) ** out_ISSUE_STORE_QUEUE_PTR_READ ;//[nb_inst_issue] … … 131 132 //public : SC_IN (Ttype_t ) *** in_EXECUTE_LOOP_TYPE ;//[nb_execute_loop][nb_inst_execute] 132 133 //public : SC_IN (Toperation_t ) *** in_EXECUTE_LOOP_OPERATION ;//[nb_execute_loop][nb_inst_execute] 134 public : SC_IN (Tcontrol_t ) *** in_EXECUTE_LOOP_CANCEL ;//[nb_execute_loop][nb_inst_execute] 133 135 public : SC_IN (Tspecial_data_t ) *** in_EXECUTE_LOOP_FLAGS ;//[nb_execute_loop][nb_inst_execute] 134 136 public : SC_IN (Texception_t ) *** in_EXECUTE_LOOP_EXCEPTION ;//[nb_execute_loop][nb_inst_execute] … … 137 139 public : SC_IN (Tgeneral_data_t ) *** in_EXECUTE_LOOP_DATA ;//[nb_execute_loop][nb_inst_execute] 138 140 139 // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~140 public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[nb_inst_insert]141 public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[nb_inst_insert]142 public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[nb_inst_insert]143 public : SC_OUT(Tgeneral_address_t) ** out_INSERT_RD_NUM_REG ;//[nb_inst_insert]144 public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[nb_inst_insert]145 public : SC_OUT(Tspecial_address_t) ** out_INSERT_RE_NUM_REG ;//[nb_inst_insert]141 // // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 142 // public : SC_OUT(Tcontrol_t ) ** out_INSERT_VAL ;//[nb_inst_insert] 143 // public : SC_IN (Tcontrol_t ) ** in_INSERT_ACK ;//[nb_inst_insert] 144 // public : SC_OUT(Tcontrol_t ) ** out_INSERT_RD_USE ;//[nb_inst_insert] 145 // public : SC_OUT(Tgeneral_address_t) ** out_INSERT_RD_NUM_REG ;//[nb_inst_insert] 146 // public : SC_OUT(Tcontrol_t ) ** out_INSERT_RE_USE ;//[nb_inst_insert] 147 // public : SC_OUT(Tspecial_address_t) ** out_INSERT_RE_NUM_REG ;//[nb_inst_insert] 146 148 147 149 // // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
r135 r136 101 101 ALLOC1_SIGNAL_OUT (out_ISSUE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ); 102 102 ALLOC1_SIGNAL_OUT (out_ISSUE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ); 103 ALLOC1_SIGNAL_OUT (out_ISSUE_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ); 103 104 ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); 104 105 ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_READ ,"STORE_QUEUE_PTR_READ" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr ); … … 132 133 // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 133 134 // _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 135 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CANCEL ,"CANCEL" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 134 136 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); 135 137 _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]); … … 141 143 } 142 144 143 // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~144 {145 ALLOC1_INTERFACE_BEGIN("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert);146 147 ALLOC1_VALACK_OUT (out_INSERT_VAL , VAL);148 ALLOC1_VALACK_IN ( in_INSERT_ACK , ACK);149 ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 );150 ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );151 ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 );152 ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );153 154 ALLOC1_INTERFACE_END(_param->_sum_inst_insert);155 }145 // // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 146 // { 147 // ALLOC1_INTERFACE_BEGIN("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert); 148 149 // ALLOC1_VALACK_OUT (out_INSERT_VAL , VAL); 150 // ALLOC1_VALACK_IN ( in_INSERT_ACK , ACK); 151 // ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 ); 152 // ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register ); 153 // ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 ); 154 // ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t,_param->_size_special_register ); 155 156 // ALLOC1_INTERFACE_END(_param->_sum_inst_insert); 157 // } 156 158 157 159 // // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 937 939 // COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_TYPE" , 938 940 // dest,"out_COMMIT_"+toString(i)+"_TYPE" ); 941 COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_CANCEL" , 942 dest,"out_COMMIT_"+toString(i)+"_CANCEL" ); 939 943 COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FLAGS" , 940 944 dest,"out_COMMIT_"+toString(i)+"_FLAGS" ); … … 1311 1315 PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_OPERATION" , 1312 1316 dest,"out_ISSUE_" +toString(i)+"_OPERATION" ); 1317 PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_CANCEL" , 1318 dest,"out_ISSUE_" +toString(i)+"_CANCEL" ); 1313 1319 PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE", 1314 1320 dest,"out_ISSUE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE"); … … 1391 1397 // PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" , 1392 1398 // dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" ); 1399 PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" , 1400 dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" ); 1393 1401 PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" , 1394 1402 dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" ); … … 1412 1420 ////out_COMMIT_OPERATION - component_commit_unit 1413 1421 ////out_COMMIT_TYPE - component_commit_unit 1422 // out_COMMIT_CANCEL - component_commit_unit 1414 1423 // out_COMMIT_FLAGS - component_commit_unit 1415 1424 // out_COMMIT_EXCEPTION - component_commit_unit … … 1601 1610 1602 1611 // ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1603 for (uint32_t i=0; i<_param->_sum_inst_insert; i++)1604 {1605 dest = _name;1606 #ifdef POSITION1607 _component->interface_map (src ,"insert_"+toString(i),1608 dest,"insert_"+toString(i));1609 #endif1610 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" ,1611 dest,"out_INSERT_"+toString(i)+"_VAL" );1612 PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" ,1613 dest, "in_INSERT_"+toString(i)+"_ACK" );1614 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE" ,1615 dest,"out_INSERT_"+toString(i)+"_RD_USE" );1616 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG",1617 dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG");1618 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE" ,1619 dest,"out_INSERT_"+toString(i)+"_RE_USE" );1620 PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG",1621 dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG");1622 }1612 // for (uint32_t i=0; i<_param->_sum_inst_insert; i++) 1613 // { 1614 // dest = _name; 1615 // #ifdef POSITION 1616 // _component->interface_map (src ,"insert_"+toString(i), 1617 // dest,"insert_"+toString(i)); 1618 // #endif 1619 // PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" , 1620 // dest,"out_INSERT_"+toString(i)+"_VAL" ); 1621 // PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" , 1622 // dest, "in_INSERT_"+toString(i)+"_ACK" ); 1623 // PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE" , 1624 // dest,"out_INSERT_"+toString(i)+"_RD_USE" ); 1625 // PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG", 1626 // dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG"); 1627 // PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE" , 1628 // dest,"out_INSERT_"+toString(i)+"_RE_USE" ); 1629 // PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG", 1630 // dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG"); 1631 // } 1623 1632 1624 1633 // in_INSERT_RENAME_UNIT_VAL - component_rename_unit -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_deallocation.cpp
r128 r136 64 64 DELETE1_SIGNAL(out_ISSUE_TYPE ,_param->_nb_inst_issue,_param->_size_type ); 65 65 DELETE1_SIGNAL(out_ISSUE_OPERATION ,_param->_nb_inst_issue,_param->_size_operation ); 66 DELETE1_SIGNAL(out_ISSUE_CANCEL ,_param->_nb_inst_issue,1 ); 66 67 DELETE1_SIGNAL(out_ISSUE_STORE_QUEUE_PTR_WRITE ,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); 67 68 DELETE1_SIGNAL(out_ISSUE_STORE_QUEUE_PTR_READ ,_param->_nb_inst_issue,_param->_size_store_queue_ptr ); … … 88 89 // DELETE2_SIGNAL( in_EXECUTE_LOOP_TYPE ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_type ); 89 90 // DELETE2_SIGNAL( in_EXECUTE_LOOP_OPERATION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_operation ); 91 DELETE2_SIGNAL( in_EXECUTE_LOOP_CANCEL ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],1 ); 90 92 DELETE2_SIGNAL( in_EXECUTE_LOOP_FLAGS ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_special_data ); 91 93 DELETE2_SIGNAL( in_EXECUTE_LOOP_EXCEPTION ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_exception ); … … 94 96 DELETE2_SIGNAL( in_EXECUTE_LOOP_DATA ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1],_param->_size_general_data ); 95 97 96 DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 );97 DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 );98 DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 );99 DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register );100 DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 );101 DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_special_register );98 // DELETE1_SIGNAL(out_INSERT_VAL ,_param->_sum_inst_insert,1 ); 99 // DELETE1_SIGNAL( in_INSERT_ACK ,_param->_sum_inst_insert,1 ); 100 // DELETE1_SIGNAL(out_INSERT_RD_USE ,_param->_sum_inst_insert,1 ); 101 // DELETE1_SIGNAL(out_INSERT_RD_NUM_REG ,_param->_sum_inst_insert,_param->_size_general_register ); 102 // DELETE1_SIGNAL(out_INSERT_RE_USE ,_param->_sum_inst_insert,1 ); 103 // DELETE1_SIGNAL(out_INSERT_RE_NUM_REG ,_param->_sum_inst_insert,_param->_size_special_register ); 102 104 103 105 // DELETE1_SIGNAL(out_RETIRE_VAL ,_param->_sum_inst_retire,1 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h
r120 r136 42 42 public : uint32_t _nb_thread ; 43 43 public : uint32_t * _size_ifetch_queue ;//[nb_thread] 44 public : multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 45 * _ifetch_queue_scheme ;//[nb_thread] 44 46 public : uint32_t * _nb_inst_fetch ;//[nb_thread] 45 47 public : bool ** _implement_group ;//[nb_thread][NB_GROUP] … … 217 219 // translate for front_end 218 220 public : uint32_t ** _front_end_size_ifetch_queue ;//[nb_front_end][nb_context] 221 public : multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 222 ** _front_end_ifetch_queue_scheme ;//[nb_front_end][nb_context] 219 223 public : uint32_t ** _front_end_nb_inst_fetch ;//[nb_front_end][nb_context] 220 224 public : bool *** _front_end_instruction_implemeted ;//[nb_front_end][nb_context][nb_instruction] … … 241 245 public : uint32_t ** _ooo_engine_nb_inst_decod ;//[nb_ooo_engine][ooo_engine_nb_front_end] 242 246 public : uint32_t ** _ooo_engine_nb_inst_insert ;//[nb_ooo_engine][ooo_engine_nb_rename_unit] 243 247 //public : uint32_t * _ooo_engine_nb_inst_insert_rob ;//[nb_ooo_engine][ooo_engine_nb_rename_unit] 244 248 public : uint32_t ** _ooo_engine_nb_inst_retire ;//[nb_ooo_engine][ooo_engine_nb_rename_unit] 245 249 public : uint32_t ** _ooo_engine_nb_inst_execute ;//[nb_ooo_engine][ooo_engine_nb_execute_loop] … … 294 298 public : uint32_t ** _execute_loop_nb_general_register ;//[nb_execute_loop][execute_loop_nb_ooo_engine] 295 299 public : uint32_t ** _execute_loop_nb_special_register ;//[nb_execute_loop][execute_loop_nb_ooo_engine] 296 300 //public : uint32_t ** _execute_loop_nb_inst_insert_rob ;//[nb_execute_loop][execute_loop_nb_ooo_engine] 297 301 public : uint32_t ** _execute_loop_nb_inst_retire_rob ;//[nb_execute_loop][execute_loop_nb_ooo_engine] 298 302 public : uint32_t ** _execute_loop_nb_execute_unit_port ;//[nb_execute_loop][nb_execute_unit] … … 361 365 uint32_t nb_thread , 362 366 uint32_t * size_ifetch_queue ,//[nb_thread] 367 multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 368 * ifetch_queue_scheme ,//[nb_thread] 363 369 uint32_t * nb_inst_fetch ,//[nb_thread] 364 370 bool ** implement_group ,//[nb_thread][NB_GROUP] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Core_allocation.cpp
r123 r136 730 730 COMPONENT_MAP(_component,src ,"out_ISSUE_" +toString(j)+"_OPERATION" , 731 731 dest, "in_ISSUE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_OPERATION" ); 732 COMPONENT_MAP(_component,src ,"out_ISSUE_" +toString(j)+"_CANCEL" , 733 dest, "in_ISSUE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_CANCEL" ); 732 734 COMPONENT_MAP(_component,src ,"out_ISSUE_" +toString(j)+"_STORE_QUEUE_PTR_WRITE", 733 735 dest, "in_ISSUE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); … … 793 795 // COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_" +toString(j)+"_"+toString(k)+"_OPERATION" , 794 796 // dest,"out_EXECUTE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_OPERATION" ); 797 COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_" +toString(j)+"_"+toString(k)+"_CANCEL" , 798 dest,"out_EXECUTE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_CANCEL" ); 795 799 COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_" +toString(j)+"_"+toString(k)+"_FLAGS" , 796 800 dest,"out_EXECUTE_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_FLAGS" ); … … 806 810 } 807 811 808 // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~809 for (uint32_t j=0; j<_param->_ooo_engine_nb_inst_insert_rob [i]; ++j)810 {811 dest = _name+"_glue";812 #ifdef POSITION813 _component->interface_map (src ,"insert_" +toString(j),814 dest,"insert_ooo_engine_"+toString(i)+"_"+toString(j));815 #endif812 // // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 813 // for (uint32_t j=0; j<_param->_ooo_engine_nb_inst_insert_rob [i]; ++j) 814 // { 815 // dest = _name+"_glue"; 816 // #ifdef POSITION 817 // _component->interface_map (src ,"insert_" +toString(j), 818 // dest,"insert_ooo_engine_"+toString(i)+"_"+toString(j)); 819 // #endif 816 820 817 COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_VAL" ,818 dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_VAL" );819 COMPONENT_MAP(_component,src , "in_INSERT_" +toString(j)+"_ACK" ,820 dest,"out_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_ACK" );821 COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_USE" ,822 dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_USE" );823 COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_NUM_REG",824 dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG");825 COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_USE" ,826 dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_USE" );827 COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_NUM_REG",828 dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG");829 }821 // COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_VAL" , 822 // dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_VAL" ); 823 // COMPONENT_MAP(_component,src , "in_INSERT_" +toString(j)+"_ACK" , 824 // dest,"out_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_ACK" ); 825 // COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_USE" , 826 // dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_USE" ); 827 // COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RD_NUM_REG", 828 // dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RD_NUM_REG"); 829 // COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_USE" , 830 // dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_USE" ); 831 // COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(j)+"_RE_NUM_REG", 832 // dest, "in_INSERT_OOO_ENGINE_"+toString(i)+"_"+toString(j)+"_RE_NUM_REG"); 833 // } 830 834 } 831 835 … … 878 882 COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_IN_" +toString(j)+"_TYPE" , 879 883 dest,"out_ISSUE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" ); 884 COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_IN_" +toString(j)+"_CANCEL" , 885 dest,"out_ISSUE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" ); 880 886 COMPONENT_MAP(_component,src , "in_EXECUTE_LOOP_IN_" +toString(j)+"_STORE_QUEUE_PTR_WRITE", 881 887 dest,"out_ISSUE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE"); … … 942 948 // COMPONENT_MAP(_component,src ,"out_EXECUTE_LOOP_OUT_" +toString(j)+"_TYPE" , 943 949 // dest, "in_EXECUTE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" ); 950 COMPONENT_MAP(_component,src ,"out_EXECUTE_LOOP_OUT_" +toString(j)+"_CANCEL" , 951 dest, "in_EXECUTE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CANCEL" ); 944 952 COMPONENT_MAP(_component,src ,"out_EXECUTE_LOOP_OUT_" +toString(j)+"_FLAGS" , 945 953 dest, "in_EXECUTE_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" ); … … 954 962 } 955 963 956 // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~957 for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j)958 for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert_rob[i][j]; ++k)959 {960 dest = _name+"_glue";961 #ifdef POSITION962 _component->interface_map (src ,"insert_rob_" +toString(j)+"_"+toString(k),963 dest,"insert_execute_loop_"+toString(i)+"_"+toString(j)+"_"+toString(k));964 #endif965 966 COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_VAL" ,967 dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL" );968 COMPONENT_MAP(_component,src ,"out_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_ACK" ,969 dest, "in_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_ACK" );970 COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_USE" ,971 dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_USE" );972 COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_NUM_REG",973 dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_NUM_REG");974 COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_USE" ,975 dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_USE" );976 COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_NUM_REG",977 dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_NUM_REG");978 }964 // // ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 965 // for (uint32_t j=0; j<_param->_execute_loop_nb_ooo_engine[i]; ++j) 966 // for (uint32_t k=0; k<_param->_execute_loop_nb_inst_insert_rob[i][j]; ++k) 967 // { 968 // dest = _name+"_glue"; 969 // #ifdef POSITION 970 // _component->interface_map (src ,"insert_rob_" +toString(j)+"_"+toString(k), 971 // dest,"insert_execute_loop_"+toString(i)+"_"+toString(j)+"_"+toString(k)); 972 // #endif 973 974 // COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_VAL" , 975 // dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_VAL" ); 976 // COMPONENT_MAP(_component,src ,"out_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_ACK" , 977 // dest, "in_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_ACK" ); 978 // COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_USE" , 979 // dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_USE" ); 980 // COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RD_NUM_REG", 981 // dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RD_NUM_REG"); 982 // COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_USE" , 983 // dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_USE" ); 984 // COMPONENT_MAP(_component,src , "in_INSERT_ROB_" +toString(j)+"_"+toString(k)+"_RE_NUM_REG", 985 // dest,"out_INSERT_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_"+toString(k)+"_RE_NUM_REG"); 986 // } 979 987 980 988 // ~~~~~[ Interface "dcache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp
r128 r136 79 79 uint32_t nb_thread , 80 80 uint32_t * size_ifetch_queue ,//[nb_thread] 81 multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 82 * ifetch_queue_scheme ,//[nb_thread] 81 83 uint32_t * nb_inst_fetch ,//[nb_thread] 82 84 bool ** implement_group ,//[nb_thread][NB_GROUP] … … 238 240 _nb_thread = nb_thread ; 239 241 _size_ifetch_queue = size_ifetch_queue ; 242 _ifetch_queue_scheme = ifetch_queue_scheme ; 240 243 _nb_inst_fetch = nb_inst_fetch ; 241 244 _implement_group = implement_group ; … … 452 455 // translate for front_end 453 456 ALLOC2(_front_end_size_ifetch_queue ,uint32_t ,_nb_front_end,_nb_context[it1]); 457 ALLOC2(_front_end_ifetch_queue_scheme ,multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t 458 ,_nb_front_end,_nb_context[it1]); 454 459 ALLOC2(_front_end_nb_inst_fetch ,uint32_t ,_nb_front_end,_nb_context[it1]); 455 460 ALLOC2(_front_end_link_decod_unit_with_context ,uint32_t ,_nb_front_end,_nb_context[it1]); … … 463 468 uint32_t num_thread = _link_thread_with_context[i][j]; 464 469 465 _front_end_size_ifetch_queue [i][j] = _size_ifetch_queue [num_thread]; 466 _front_end_nb_inst_fetch [i][j] = _nb_inst_fetch [num_thread]; 467 _front_end_ras_size_queue [i][j] = _ras_size_queue [num_thread]; 468 _front_end_upt_size_queue [i][j] = _upt_size_queue [num_thread]; 469 _front_end_ufpt_size_queue [i][j] = _ufpt_size_queue [num_thread]; 470 _front_end_size_ifetch_queue [i][j] = _size_ifetch_queue [num_thread]; 471 _front_end_ifetch_queue_scheme [i][j] = _ifetch_queue_scheme [num_thread]; 472 _front_end_nb_inst_fetch [i][j] = _nb_inst_fetch [num_thread]; 473 _front_end_ras_size_queue [i][j] = _ras_size_queue [num_thread]; 474 _front_end_upt_size_queue [i][j] = _upt_size_queue [num_thread]; 475 _front_end_ufpt_size_queue [i][j] = _ufpt_size_queue [num_thread]; 470 476 471 477 uint32_t num_decod_bloc = _link_decod_bloc_with_thread [num_thread]; … … 987 993 988 994 ALLOC2(_ooo_engine_nb_inst_insert ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); 989 995 // ALLOC1(_ooo_engine_nb_inst_insert_rob ,uint32_t ,_nb_ooo_engine); 990 996 ALLOC2(_ooo_engine_nb_inst_retire ,uint32_t ,_nb_ooo_engine,_nb_rename_unit[it1]); 991 997 ALLOC2(_ooo_engine_rename_select_priority ,Tpriority_t ,_nb_ooo_engine,_nb_rename_unit[it1]); … … 1001 1007 { 1002 1008 log_printf(TRACE,Core,FUNCTION,_("OOO_Engine [%d] - nb_rename_unit %d"),i,_nb_rename_unit[i]); 1003 1009 // _ooo_engine_nb_inst_insert_rob [i] = 0; 1004 1010 1005 1011 for (uint32_t j=0; j<_nb_rename_unit[i]; ++j) … … 1010 1016 1011 1017 _ooo_engine_nb_inst_insert [i][j] = _nb_inst_insert [num_rename_bloc]; 1012 1018 // _ooo_engine_nb_inst_insert_rob [i] += _nb_inst_insert [num_rename_bloc]; 1013 1019 _ooo_engine_nb_inst_retire [i][j] = _nb_inst_retire [num_rename_bloc]; 1014 1020 _ooo_engine_rename_select_priority [i][j] = _rename_select_priority [num_rename_bloc]; … … 1578 1584 ALLOC2(_execute_loop_nb_general_register ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 1579 1585 ALLOC2(_execute_loop_nb_special_register ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 1580 1581 1586 // ALLOC2(_execute_loop_nb_inst_insert_rob ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 1587 // ALLOC2(_execute_loop_nb_inst_retire_rob ,uint32_t,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 1582 1588 1583 1589 for (uint32_t i=0; i<_nb_execute_loop; ++i) … … 1603 1609 1604 1610 1605 uint32_t insert = 0; 1606 uint32_t retire = 0; 1611 // uint32_t insert = 0; 1612 // uint32_t retire = 0; 1613 // 1614 // for (uint32_t k=0; k<_nb_rename_unit[num_ooo_engine]; ++k) 1615 // { 1616 // insert = _ooo_engine_nb_inst_insert [num_ooo_engine][k]; 1617 // retire = _ooo_engine_nb_inst_retire [num_ooo_engine][k]; 1618 // } 1607 1619 1608 for (uint32_t k=0; k<_nb_rename_unit[num_ooo_engine]; ++k) 1609 { 1610 insert = _ooo_engine_nb_inst_insert [num_ooo_engine][k]; 1611 retire = _ooo_engine_nb_inst_retire [num_ooo_engine][k]; 1612 } 1613 1614 _execute_loop_nb_inst_insert_rob [i][j] = insert; 1615 _execute_loop_nb_inst_retire_rob [i][j] = retire; 1620 // _execute_loop_nb_inst_insert_rob [i][j] = insert; 1621 // _execute_loop_nb_inst_retire_rob [i][j] = retire; 1616 1622 } 1617 1623 … … 1942 1948 _get_custom_information , 1943 1949 _front_end_size_ifetch_queue [i], 1950 _front_end_ifetch_queue_scheme [i], 1944 1951 _front_end_nb_inst_fetch [i], 1945 1952 _front_end_instruction_implemeted [i], … … 2083 2090 _execute_loop_nb_general_register [i], 2084 2091 _execute_loop_nb_special_register [i], 2085 2086 2092 // _execute_loop_nb_inst_insert_rob [i], 2093 // _execute_loop_nb_inst_retire_rob [i], 2087 2094 2088 2095 _execution_unit_to_write_unit_priority [i], … … 2149 2156 _front_end_nb_inst_branch_complete ,//[nb_front_end] 2150 2157 _nb_inst_branch_complete ,//[nb_ooo_engine] 2151 2158 // _ooo_engine_nb_inst_insert_rob ,//[nb_ooo_engine] 2152 2159 _nb_inst_reexecute ,//[nb_ooo_engine] 2153 2160 _nb_inst_issue_queue ,//[nb_ooo_engine] … … 2223 2230 DELETE4(_execute_loop_read_unit_to_execution_unit_table_routing ,_nb_execute_loop,_nb_read_unit[it1],_nb_execute_unit[it1],_execute_loop_nb_execute_unit_port[it1][it2]); 2224 2231 DELETE2(_execute_loop_nb_execute_unit_port ,_nb_execute_loop,_nb_execute_unit[it1]); 2225 2226 2232 // DELETE2(_execute_loop_nb_inst_retire_rob ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 2233 // DELETE2(_execute_loop_nb_inst_insert_rob ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 2227 2234 DELETE2(_execute_loop_nb_special_register ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); 2228 2235 DELETE2(_execute_loop_nb_general_register ,_nb_execute_loop,_execute_loop_nb_ooo_engine[it1]); … … 2277 2284 DELETE2(_ooo_engine_rename_select_priority ,_nb_ooo_engine,_nb_rename_unit[it1]); 2278 2285 DELETE2(_ooo_engine_nb_inst_retire ,_nb_ooo_engine,_nb_rename_unit[it1]); 2279 2286 // DELETE1(_ooo_engine_nb_inst_insert_rob ,_nb_ooo_engine); 2280 2287 DELETE2(_ooo_engine_nb_inst_insert ,_nb_ooo_engine,_nb_rename_unit[it1]); 2281 2288 DELETE2(_ooo_engine_link_rename_unit_with_front_end ,_nb_ooo_engine,_ooo_engine_nb_front_end[it1]); … … 2303 2310 DELETE2(_front_end_link_decod_unit_with_context ,_nb_front_end,_nb_context[it1]); 2304 2311 DELETE2(_front_end_nb_inst_fetch ,_nb_front_end,_nb_context[it1]); 2312 DELETE2(_front_end_ifetch_queue_scheme ,_nb_front_end,_nb_ifetch_unit[it1]); 2305 2313 DELETE2(_front_end_size_ifetch_queue ,_nb_front_end,_nb_context[it1]); 2306 2314 DELETE1(_list_load_store_unit_with_execute_unit ,_nb_execute_loop); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters_print.cpp
r117 r136 40 40 str+= toString(MSG_INFORMATION)+" * THREAD ["+toString<uint32_t>(i)+"]\n"; 41 41 str+= toString(MSG_INFORMATION)+" * size_ifetch_queue : "+toString<uint32_t>(_size_ifetch_queue [i])+"\n"; 42 str+= toString(MSG_INFORMATION)+" * ifetch_queue_scheme : "+toString<multi_front_end::front_end::ifetch_unit::ifetch_queue::Tifetch_queue_scheme_t> 43 (_ifetch_queue_scheme[i])+"\n"; 42 44 str+= toString(MSG_INFORMATION)+" * nb_inst_fetch : "+toString<uint32_t>(_nb_inst_fetch [i])+"\n"; 43 45 str+= toString(MSG_INFORMATION)+" * ras_size_queue : "+toString<uint32_t>(_ras_size_queue [i])+"\n"; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
r135 r136 10 10 #define MORPHEO_MAJOR_VERSION "0" 11 11 #define MORPHEO_MINOR_VERSION "2" 12 #define MORPHEO_REVISION "13 5"12 #define MORPHEO_REVISION "136" 13 13 #define MORPHEO_CODENAME "Castor" 14 14 15 #define MORPHEO_DATE_DAY " 17"16 #define MORPHEO_DATE_MONTH " 07"15 #define MORPHEO_DATE_DAY "20" 16 #define MORPHEO_DATE_MONTH "10" 17 17 #define MORPHEO_DATE_YEAR "2009" 18 18 -
trunk/IPs/systemC/processor/Morpheo/Common/include/ErrorMorpheo.h
r117 r136 34 34 { 35 35 #ifdef DEBUG 36 _msg = toString(_(" \n%s at line %d, in file %s"),MSG_ERROR,line,file.c_str());37 _msg = toString(_(" \n%s <%s> %s"),MSG_ERROR,funcname.c_str(),msg.c_str());36 _msg = toString(_("%s at line %d, in file %s"),MSG_ERROR,line,file.c_str()); 37 _msg = toString(_("%s <%s> %s"),MSG_ERROR,funcname.c_str(),msg.c_str()); 38 38 #else 39 _msg = toString(_(" \n%s %s"),MSG_ERROR,msg.c_str());39 _msg = toString(_("%s %s"),MSG_ERROR,msg.c_str()); 40 40 #endif 41 msg("%s",_msg.c_str()); 41 42 } 42 43 public : ~ErrorMorpheo (void) throw() {} -
trunk/IPs/systemC/processor/Morpheo/Common/src/Message.cpp
r134 r136 39 39 log_file_generate = have_file; 40 40 41 #if 0 41 42 if (have_file) 42 43 { … … 63 64 } 64 65 else 66 #endif 65 67 { 66 68 log_stream = NULL; -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_01.cfg
r134 r136 1 1 <?xml version="1.0" encoding="ISO-8859-1" ?> 2 2 3 <core name="Instance_x 4_w8_01">3 <core name="Instance_x04_w08_01"> 4 4 5 5 <thread id="0,1,2,3"> 6 6 <parameter name="size_ifetch_queue" value="16" /> 7 <parameter name="ifetch_queue_scheme" value="0" /> 7 8 <parameter name="nb_inst_fetch" value="2" /> 8 9 <parameter name="ras_size_queue" value="8" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_02.cfg
r134 r136 1 1 <?xml version="1.0" encoding="ISO-8859-1" ?> 2 2 3 <core name="Instance_x 4_w8_02">3 <core name="Instance_x04_w08_02"> 4 4 5 5 <thread id="0,1,2,3"> 6 6 <parameter name="size_ifetch_queue" value="16" /> 7 <parameter name="ifetch_queue_scheme" value="0" /> 7 8 <parameter name="nb_inst_fetch" value="2" /> 8 9 <parameter name="ras_size_queue" value="8" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_03.cfg
r134 r136 1 1 <?xml version="1.0" encoding="ISO-8859-1" ?> 2 2 3 <core name="Instance_x 4_w8_03">3 <core name="Instance_x04_w08_03"> 4 4 5 5 <thread id="0,1,2,3"> 6 6 <parameter name="size_ifetch_queue" value="16" /> 7 <parameter name="ifetch_queue_scheme" value="0" /> 7 8 <parameter name="nb_inst_fetch" value="2" /> 8 9 <parameter name="ras_size_queue" value="8" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_04.cfg
r134 r136 1 1 <?xml version="1.0" encoding="ISO-8859-1" ?> 2 2 3 <core name="Instance_x 4_w8_04">3 <core name="Instance_x04_w08_04"> 4 4 5 5 <thread id="0,1,2,3"> 6 6 <parameter name="size_ifetch_queue" value="16" /> 7 <parameter name="ifetch_queue_scheme" value="0" /> 7 8 <parameter name="nb_inst_fetch" value="2" /> 8 9 <parameter name="ras_size_queue" value="8" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x04_w08_05.cfg
r134 r136 1 1 <?xml version="1.0" encoding="ISO-8859-1" ?> 2 2 3 <core name="Instance_x 4_w8_05">3 <core name="Instance_x04_w08_05"> 4 4 5 5 <thread id="0,1,2,3"> 6 6 <parameter name="size_ifetch_queue" value="16" /> 7 <parameter name="ifetch_queue_scheme" value="0" /> 7 8 <parameter name="nb_inst_fetch" value="2" /> 8 9 <parameter name="ras_size_queue" value="8" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo-Dhrystone.sim
r134 r136 23 23 <parameter name="simulation_nb_instruction" value="0" /> 24 24 <parameter name="simulation_file_with_pid" value="0" /> 25 <parameter name="simulation_file_with_date" value=" 0" />25 <parameter name="simulation_file_with_date" value="1" /> 26 26 27 27 <parameter name="debug_level" value="0" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen
r124 r136 16 16 <parameter name="nb_thread" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 17 17 <parameter name="size_ifetch_queue" min="1" max="64" step="* 2" default="2" level="..." description="..." /> 18 <parameter name="ifetch_queue_scheme" min="0" max="1" step="+ 1" default="0" level="..." description="0 : no_assoc, 1 : full_assoc" /> 18 19 <parameter name="nb_inst_fetch" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 19 20 <parameter name="implement_group" default="0" level="..." description="..." /> … … 48 49 <parameter name="nb_write_bloc" min="1" max="32" step="* 2" default="1" level="..." description="..." /> 49 50 <parameter name="size_write_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 50 <parameter name="size_execute_queue" min=" 1" max="16" step="* 2" default="2" level="..." description="..." />51 <parameter name="size_execute_queue" min="0" max="16" step="+ 1" default="2" level="..." description="..." /> 51 52 <parameter name="nb_bypass_write" min="0" max="16" step="+ 1" default="0" level="..." description="..." /> 52 53 <parameter name="write_queue_scheme" min="0" max="1" step="+ 1" default="0" level="..." description="0 : Moore, 1 : Mealy" /> … … 93 94 <parameter name="nb_execute_loop_select" min="1" max="8" step="* 2" default="1" level="..." description="..." /> 94 95 <parameter name="size_re_order_buffer" min="1" max="256" step="+ 1" default="1" level="..." description="..." /> 95 <parameter name="nb_re_order_buffer_bank" min="1" max=" 64"step="* 2" default="1" level="..." description="..." />96 <parameter name="nb_re_order_buffer_bank" min="1" max="256" step="* 2" default="1" level="..." description="..." /> 96 97 <parameter name="commit_priority" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> 97 98 <parameter name="commit_load_balancing" min="1" max="8" step="+ 1" default="1" level="..." description="..." /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim
r134 r136 17 17 <parameter name="directory_log" value="." /> 18 18 19 <parameter name="statistics_cycle_start" value=" 1000000"/>19 <parameter name="statistics_cycle_start" value="5" /> 20 20 <parameter name="statistics_period" value="0" /> 21 21 -
trunk/IPs/systemC/processor/Morpheo/Files/debug.cfg
r124 r136 5 5 <thread id="0,1,2,3"> 6 6 <parameter name="size_ifetch_queue" value="32" /> 7 <parameter name="ifetch_queue_scheme" value="0" /> 7 8 <parameter name="nb_inst_fetch" value="8" /> 8 9 <parameter name="ras_size_queue" value="16" /> -
trunk/IPs/systemC/processor/Morpheo/Files/debug.sim
r135 r136 4 4 5 5 <parameter name="use_systemc" value="1" /> 6 <parameter name="use_vhdl" value=" 1" />6 <parameter name="use_vhdl" value="0" /> 7 7 <parameter name="use_vhdl_testbench" value="0" /> 8 8 <parameter name="use_vhdl_testbench_assert" value="0" /> 9 9 <parameter name="use_position" value="0" /> 10 <parameter name="use_statistics" value=" 0" />10 <parameter name="use_statistics" value="1" /> 11 11 <parameter name="use_information" value="0" /> 12 12 <parameter name="use_header" value="0" /> … … 20 20 <parameter name="statistics_period" value="0" /> 21 21 22 <parameter name="simulation_nb_cycle" value=" 1000000" />22 <parameter name="simulation_nb_cycle" value="5000" /> 23 23 <parameter name="simulation_nb_instruction" value="0" /> 24 24 <parameter name="simulation_file_with_pid" value="0" /> … … 26 26 27 27 <parameter name="debug_level" value="3" /> 28 <parameter name="debug_cycle_start" value="0" 29 <parameter name="debug_cycle_stop" value=" 100"/>30 <parameter name="debug_nb_cycle" value=" 200000"/>28 <parameter name="debug_cycle_start" value="0" /> 29 <parameter name="debug_cycle_stop" value="5000" /> 30 <parameter name="debug_nb_cycle" value="10000000"/> 31 31 32 <parameter name="debug_log_file_generate" value=" 0" />32 <parameter name="debug_log_file_generate" value="1" /> 33 33 <parameter name="debug_idle_cycle" value="200" /> 34 <parameter name="debug_idle_time" value=" 20" />34 <parameter name="debug_idle_time" value="5" /> 35 35 36 36 <component name="Comparator" model="systemc" debug="1" /> … … 108 108 <component name="TopLevel" model="systemc" debug="1" /> 109 109 110 <component name="Behavioural" model="systemc" debug=" 0" />111 <component name="Interface" model="systemc" debug=" 0" />112 <component name="Allocation" model="systemc" debug=" 0" />110 <component name="Behavioural" model="systemc" debug="1" /> 111 <component name="Interface" model="systemc" debug="1" /> 112 <component name="Allocation" model="systemc" debug="1" /> 113 113 114 114 </parameters> -
trunk/IPs/systemC/processor/Morpheo/Script/execute.sh
r128 r136 137 137 if test ! -z "${COMMAND[${CPT}]}"; then 138 138 local NUM=$(printf %.${NB_DIGIT}d ${CPT}); 139 local MAX=$((${NB_COMMAND}-1)); 139 140 140 141 # echo " * {"$(my_date)"} <${ID}> execute command [${NUM}] : ${COMMAND[${CPT}]}"; 141 echo " * {"$(my_date)"} <${ID}> command [${NUM}/${ NB_COMMAND}] : execute";142 echo " * {"$(my_date)"} <${ID}> command [${NUM}/${MAX}] : execute"; 142 143 local PATH_CURRENT=${PWD}; 143 144 … … 155 156 ./${OUTPUT_FILE_CMD} &> ${OUTPUT_FILE_OUT}; 156 157 cd ${PATH_CURRENT} &> /dev/null; 157 echo " * {"$(my_date)"} <${ID}> command [${NUM}/${ NB_COMMAND}] : done";158 echo " * {"$(my_date)"} <${ID}> command [${NUM}/${MAX}] : done"; 158 159 fi; 159 160 done; -
trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_configuration.cpp
r115 r136 48 48 param->_nb_thread , 49 49 param->_size_ifetch_queue , 50 param->_ifetch_queue_scheme , 50 51 param->_nb_inst_fetch , 51 52 param->_implement_group , -
trunk/Makefile.flags
r135 r136 21 21 MORPHEO_FLAGS = -DSYSTEMC \ 22 22 -DDEBUG=DEBUG_TRACE \ 23 -DSTATISTICS\24 -DVHDL 23 -DVHDL \ 24 -DSTATISTICS 25 25 26 26 # -DTRANSLATION \ -
trunk/Platforms/Test/Makefile
r134 r136 79 79 BIN = Platforms_Test.x 80 80 EXEC = $(PATH_BIN)/$(BIN) 81 EXEC_PREFIX = $(NICE) -n $(PRIORITY) 82 # 81 EXEC_PREFIX = $(NICE) -n $(PRIORITY) 82 #$(VALGRIND) 83 83 EXEC_PARAMS = $(SYSTEMC_EXEC_PARAMS_$(SIMULATOR_SYSTEMC)) 84 84 -
trunk/Platforms/Test/data/debug/debug.cfg
r135 r136 1 1 ${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/debug.sim 2 2 ${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Morpheo.gen 3 ${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x 1_w8_2.cfg3 ${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/Files/Instance_x01_w04_02.cfg 4 4 ${MORPHEO_TOPLEVEL}/Softwares/Test/Test_000/bin/soft.x 5 5 0 -
trunk/Softwares/Makefile.Software
r124 r136 31 31 32 32 #-----[ To the compilation ]------------------------------------------------------ 33 OPTIMIZE = -O 2-std=c99 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float33 OPTIMIZE = -O3 -std=c99 -fomit-frame-pointer -fdelayed-branch -mror -mcmov -msext -mhard-mul -msoft-div -msoft-float 34 34 35 35 #Option : -
trunk/Softwares/SPECINT2000/Makefile.defs
r124 r136 7 7 # 8 8 9 NB_THREAD_MAX = 89 NB_THREAD_MAX = 1 10 10 11 BENCHS = \ 12 164.gzip \ 11 BENCHS = 164.gzip 13 12 14 # 175.vpr \ 15 16 # 176.gcc \ 17 # 181.mcf \ 18 # 255.vortex \ 19 # 256.bzip2 \ 20 # 300.twolf 21 13 # 164.gzip 14 # 175.vpr 15 # 176.gcc 16 # 181.mcf 17 # 255.vortex 18 # 256.bzip2 19 # 300.twolf 22 20 23 21 #164.gzip \ -
trunk/Softwares/SPECINT2000/src/include/workload.h
r124 r136 12 12 void (*WorkLoad[])() = 13 13 { 14 (void *) run_ 300_twolf14 (void *) run_164_gzip 15 15 }; 16 16 17 17 #define NB_WORKLOAD (sizeof(WorkLoad)/sizeof(void *)) 18 18 19 # ifndef NB_THREAD_MAX20 #error "NB_THREAD_MAX is undefined"21 # endif19 # ifndef NB_THREAD_MAX 20 # error "NB_THREAD_MAX is undefined" 21 # endif 22 22 23 23 #endif //workload_h -
trunk/Softwares/Test/Test_073/src/c/main.c
r121 r136 9 9 #include <stdlib.h> 10 10 11 static unsigned int x; 11 int f (int x) 12 { 13 int x1, x2, x3, x4, x5, x6, x7, x8; 14 15 x1=x2=x3=x4=x5=x6=x7=x8=1; 16 17 for (int i=0; i<x; ++i) 18 { 19 x1 += 2; 20 x2 += 3; 21 x3 += 5; 22 x4 += 7; 23 x5 += 9; 24 x6 +=11; 25 x7 +=13; 26 x8 +=17; 27 } 12 28 13 void f0 (); 14 void f1 (); 15 void f2 (); 16 void f3 (); 17 void f4 (); 18 void f5 (); 19 void f6 (); 20 void f7 (); 21 void f8 (); 22 void f9 (); 29 return x1+x2+x3+x4+x5+x6+x7+x8; 30 } 23 31 24 void f0 () { f1(); x++;}25 void f1 () { f2(); x++;}26 void f2 () { f3(); x++;}27 void f3 () { f4(); x++;}28 void f4 () { f5(); x++;}29 void f5 () { f6(); x++;}30 void f6 () { f7(); x++;}31 void f7 () { f8(); x++;}32 void f8 () { f9(); x++;}33 void f9 () { x++;}34 32 35 33 int main() 36 34 { 37 int i0,i1,i2,i3,i4; 38 const int it0 = 1000; 39 const int it1 = 100; 40 const int it3 = 10; 41 42 for (i0 = 0; i0 < it0; ++i0); 35 f(1000); 43 36 44 37 38 unsigned int * addr = (unsigned int*)((0xa0000000) + 4); 39 /* *(addr) = a+b+c+d; */ 40 *(addr) = 0; 45 41 46 47 /* f0 (); */48 49 unsigned int * addr = (unsigned int*)((0xa0000000) + 4);50 *(addr) = 0;51 52 42 /* _exit (0); */ 53 43
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