[78] | 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Update_Prediction_Table_transition.cpp 113 2009-04-14 18:39:12Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_front_end { |
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| 15 | namespace front_end { |
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| 16 | namespace prediction_unit { |
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| 17 | namespace update_prediction_table { |
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| 18 | |
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| 19 | #undef FUNCTION |
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| 20 | #define FUNCTION "Update_Prediction_Table::transition" |
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| 21 | void Update_Prediction_Table::transition (void) |
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| 22 | { |
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[88] | 23 | log_begin(Update_Prediction_Table,FUNCTION); |
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| 24 | log_function(Update_Prediction_Table,FUNCTION,_name.c_str()); |
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[78] | 25 | |
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[81] | 26 | if (PORT_READ(in_NRESET) == 0) |
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| 27 | { |
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[88] | 28 | // Initialisation |
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| 29 | |
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| 30 | reg_UPDATE_PRIORITY = 0; |
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| 31 | |
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| 32 | // All pointer is set at 0 |
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[81] | 33 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 34 | { |
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[88] | 35 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
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| 36 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
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| 37 | reg_UFPT_BOTTOM [i] = 0; |
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| 38 | reg_UFPT_TOP [i] = 0; |
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| 39 | reg_UFPT_UPDATE [i] = 0; |
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| 40 | reg_UFPT_NB_NEED_UPDATE [i] = 0; |
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[106] | 41 | reg_UFPT_NB_UPDATE [i] = 0; |
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[88] | 42 | |
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| 43 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; ++j) |
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| 44 | reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY; |
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| 45 | reg_UPT_BOTTOM [i] = 0; |
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| 46 | reg_UPT_TOP [i] = 0; |
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[95] | 47 | reg_UPT_TOP_EVENT [i] = 0; |
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[88] | 48 | reg_UPT_UPDATE [i] = 0; |
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[101] | 49 | reg_UPT_EMPTY [i] = true; |
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[88] | 50 | |
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| 51 | reg_IS_ACCURATE [i] = true; |
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[94] | 52 | |
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[105] | 53 | reg_EVENT_VAL [i] = false; |
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[88] | 54 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
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[112] | 55 | reg_EVENT_IS_BRANCH [i] = true; |
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[88] | 56 | } |
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[81] | 57 | } |
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| 58 | else |
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| 59 | { |
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[105] | 60 | bool flush_UFPT [_param->_nb_context]; |
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[94] | 61 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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[105] | 62 | { |
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| 63 | flush_UFPT [i] = false; |
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| 64 | } |
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[94] | 65 | |
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[81] | 66 | // =================================================================== |
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[88] | 67 | // =====[ GARBAGE COLLECTOR ]========================================= |
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| 68 | // =================================================================== |
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| 69 | |
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| 70 | // Each cycle, if the most lastest branch have update all prediction struction (state = end), free this slot |
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| 71 | // * Update state -> new status is "empty" |
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| 72 | // * Update pointer (bottom and accurate) |
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[105] | 73 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * GARBAGE COLLECTOR (BEGIN)"); |
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[88] | 74 | for (uint32_t i=0; i<_param->_nb_context; i++) |
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| 75 | { |
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| 76 | // UPDATE_FETCH_PREDICTION_TABLE |
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| 77 | { |
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| 78 | uint32_t bottom = reg_UFPT_BOTTOM [i]; |
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| 79 | |
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| 80 | // Test if state is end |
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| 81 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state == UPDATE_FETCH_PREDICTION_STATE_END) |
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| 82 | { |
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| 83 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d]",i,bottom); |
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| 84 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state = UPDATE_FETCH_PREDICTION_STATE_EMPTY",i,bottom); |
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| 85 | |
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| 86 | // Free slot |
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| 87 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][bottom]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
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| 88 | // Update pointer |
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| 89 | reg_UFPT_BOTTOM [i] = (bottom+1)%_param->_size_ufpt_queue[i]; |
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| 90 | } |
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| 91 | } |
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| 92 | |
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| 93 | // UPDATE_PREDICTION_TABLE |
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| 94 | { |
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[101] | 95 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
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[106] | 96 | bool end = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END); |
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| 97 | // bool end_ok = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_OK); |
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| 98 | // bool end_ko = (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END_KO); |
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[101] | 99 | // event_state_t event_state = reg_EVENT_STATE [i]; |
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[95] | 100 | |
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[88] | 101 | // Test if state is end |
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[106] | 102 | // if (end_ok or end_ko) |
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[112] | 103 | |
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| 104 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * state is STATE_END : %d",end); |
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| 105 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (before) : %d",reg_UPT_BOTTOM [i]); |
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| 106 | |
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[106] | 107 | if (end) |
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[88] | 108 | { |
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[111] | 109 | #if defined(DEBUG) and defined(DEBUG_Update_Prediction_Table) and (DEBUG_Update_Prediction_Table == true) |
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| 110 | if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._retire_ok) |
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| 111 | { |
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| 112 | uint32_t num_thread = _param->_translate_num_context_to_num_thread [i]; |
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| 113 | branchement_log_file [num_thread] |
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| 114 | << std::hex |
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[112] | 115 | << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_src << " " |
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| 116 | << "0x" << reg_UPDATE_PREDICTION_TABLE [i][bottom]._address_dest << " " |
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[111] | 117 | << std::dec |
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[112] | 118 | << reg_UPDATE_PREDICTION_TABLE [i][bottom]._good_take << " - " |
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[113] | 119 | << "[" << simulation_cycle() << "] " << " " |
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[112] | 120 | << reg_UPDATE_PREDICTION_TABLE [i][bottom]._miss_prediction << " " |
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| 121 | << reg_UPDATE_PREDICTION_TABLE [i][bottom]._ifetch_prediction << " " |
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| 122 | << "(" << (uint32_t)reg_UPDATE_PREDICTION_TABLE [i][bottom]._condition << ")" |
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[111] | 123 | << std::endl; |
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| 124 | } |
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| 125 | #endif |
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[88] | 126 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]",i,bottom); |
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| 127 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d]._state = UPDATE_PREDICTION_STATE_EMPTY",i,bottom); |
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| 128 | // Free slot |
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| 129 | reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY; |
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[95] | 130 | |
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[88] | 131 | // Update pointer |
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| 132 | reg_UPT_BOTTOM [i] = (bottom+1)%_param->_size_upt_queue[i]; |
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[106] | 133 | |
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[101] | 134 | if (reg_UPT_BOTTOM [i] == reg_UPT_TOP [i]) |
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| 135 | reg_UPT_EMPTY [i] = true; // free a slot |
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| 136 | |
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[95] | 137 | // if (bottom = reg_UPT_UPDATE [i]) |
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| 138 | // reg_UPT_UPDATE [i] = reg_UPT_BOTTOM [i]; |
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[112] | 139 | }// @@@ |
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| 140 | |
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| 141 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM (after ) : %d",reg_UPT_BOTTOM [i]); |
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| 142 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d",reg_EVENT_VAL [i]); |
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| 143 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d",reg_EVENT_UPT_PTR [i]); |
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| 144 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d",reg_EVENT_UPT_FULL[i]); |
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[105] | 145 | |
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[112] | 146 | if (reg_EVENT_VAL [i] and (reg_EVENT_UPT_PTR [i] == bottom)) |
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| 147 | { |
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| 148 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * END EVENT"); |
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| 149 | |
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| 150 | if ((reg_EVENT_IS_BRANCH [i] == false) and (reg_EVENT_UPT_FULL [i] == false)) |
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| 151 | reg_EVENT_STATE[i] = EVENT_STATE_OK; |
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| 152 | |
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| 153 | if ((reg_EVENT_IS_BRANCH [i] == true) or (reg_EVENT_UPT_FULL [i] == false)) |
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[95] | 154 | { |
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[112] | 155 | reg_EVENT_VAL [i] = false; |
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| 156 | // reg_EVENT_IS_BRANCH [i] = true; |
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| 157 | reg_UPT_TOP [i] = reg_UPT_TOP_EVENT [i]; |
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| 158 | reg_UPT_UPDATE [i] = reg_UPT_TOP_EVENT [i]; |
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| 159 | |
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| 160 | if (reg_UPT_BOTTOM [i] != reg_UPT_TOP [i]) |
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| 161 | reg_UPT_EMPTY [i] = false; |
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[95] | 162 | } |
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[106] | 163 | |
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[112] | 164 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
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| 165 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP_EVENT : %d",reg_UPT_TOP_EVENT [i]); |
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| 166 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [i]); |
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| 167 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
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| 168 | |
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[88] | 169 | } |
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[112] | 170 | |
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| 171 | if (end) |
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| 172 | reg_EVENT_UPT_FULL [i] = false; |
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[88] | 173 | } |
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| 174 | } |
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[106] | 175 | |
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[105] | 176 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * GARBAGE COLLECTOR (END)"); |
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[88] | 177 | |
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| 178 | // =================================================================== |
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[81] | 179 | // =====[ PREDICT ]=================================================== |
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| 180 | // =================================================================== |
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[88] | 181 | |
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| 182 | // An ifetch_unit compute next cycle and have an branch : predict_val is set |
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| 183 | // * Alloc new entry -> new status is "wait decod" |
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| 184 | // * Save input (to restore in miss or error) |
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| 185 | // * Update pointer |
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| 186 | |
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[81] | 187 | for (uint32_t i=0; i<_param->_nb_inst_predict; i++) |
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| 188 | if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i]) |
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| 189 | { |
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| 190 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; |
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[88] | 191 | uint32_t top = internal_PREDICT_UPDATE_PREDICTION_ID [i]; |
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[81] | 192 | |
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[88] | 193 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * PREDICT[%d] - Accepted",i); |
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| 194 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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| 195 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
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[81] | 196 | |
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[88] | 197 | #ifdef DEBUG_TEST |
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| 198 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
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| 199 | throw ERRORMORPHEO(FUNCTION,_("Predict : invalid state.")); |
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| 200 | #endif |
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[81] | 201 | |
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[88] | 202 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD (predict)",context,top); |
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| 203 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._state = UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD; |
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| 204 | |
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| 205 | Tbranch_condition_t condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); |
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| 206 | |
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| 207 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._condition = condition; |
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| 208 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); |
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| 209 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); |
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| 210 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_PREDICT_BTB_LAST_TAKE [i]); |
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| 211 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._is_accurate = PORT_READ(in_PREDICT_BTB_IS_ACCURATE [i]); |
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| 212 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._history = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0; |
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| 213 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_PREDICT_RAS_ADDRESS [i]); |
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| 214 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_PREDICT_RAS_INDEX [i]); |
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| 215 | |
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| 216 | reg_UFPT_TOP [context] = (top+1)%_param->_size_ufpt_queue [context]; |
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| 217 | // reg_UFPT_UPDATE [context] = reg_UFPT_TOP [context]; |
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| 218 | if (need_update(condition)) |
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[111] | 219 | { |
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| 220 | reg_UFPT_NB_NEED_UPDATE [context] ++; |
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| 221 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); |
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| 222 | |
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| 223 | } |
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[81] | 224 | } |
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| 225 | |
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| 226 | // =================================================================== |
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| 227 | // =====[ DECOD ]===================================================== |
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| 228 | // =================================================================== |
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[88] | 229 | |
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| 230 | |
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| 231 | // An decod is detected by decod stage |
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| 232 | // 1) Hit prediction : The instruction bundle have a branch predicted in ifetch stage and it is this branch |
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| 233 | // * Update state, wait_decod -> wait_end |
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| 234 | // * Pop ufpt -> push upt |
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| 235 | // * Update accurate register : if the predict stage have tagged this branch as not accurate, stop decod |
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| 236 | // 2) Miss : The instruction bundle have a branch but it is not predicted |
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| 237 | // * Flush ufpt |
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| 238 | // * decod information is write in upt |
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| 239 | |
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[81] | 240 | for (uint32_t i=0; i<_param->_nb_inst_decod; i++) |
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| 241 | if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i]) |
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| 242 | { |
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[88] | 243 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; |
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| 244 | Tcontrol_t miss_ifetch = PORT_READ(in_DECOD_MISS_IFETCH [i]); |
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| 245 | Tcontrol_t miss_decod = PORT_READ(in_DECOD_MISS_DECOD [i]); |
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| 246 | uint32_t upt_ptr_write = internal_DECOD_UPT_PTR_WRITE [i]; |
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| 247 | Tbranch_condition_t condition ; |
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| 248 | Tcontrol_t is_accurate; |
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[94] | 249 | Taddress_t address_src = PORT_READ(in_DECOD_BTB_ADDRESS_SRC [i]); |
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| 250 | Taddress_t address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]); |
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| 251 | Tcontrol_t last_take = PORT_READ(in_DECOD_BTB_LAST_TAKE [i]); |
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[81] | 252 | |
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[88] | 253 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * DECOD[%d] - Accepted",i); |
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| 254 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
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| 255 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch); |
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| 256 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_decod : %d",miss_decod); |
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| 257 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * upt_ptr_write : %d",upt_ptr_write); |
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[108] | 258 | |
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[88] | 259 | if (miss_ifetch or miss_decod) |
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[81] | 260 | { |
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[88] | 261 | // Have a miss !!! |
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[94] | 262 | #ifdef DEBUG_TEST |
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| 263 | if (reg_EVENT_STATE [context] != EVENT_STATE_OK) |
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| 264 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); |
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| 265 | #endif |
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[88] | 266 | if (reg_UFPT_NB_NEED_UPDATE [context] == 0) |
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| 267 | { |
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[94] | 268 | // Change state |
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| 269 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); |
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| 270 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
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[112] | 271 | // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT; |
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[88] | 272 | } |
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| 273 | else |
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| 274 | { |
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[105] | 275 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context); |
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| 276 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; |
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[88] | 277 | } |
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[81] | 278 | |
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[94] | 279 | // Flush UPFT |
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| 280 | flush_UFPT [context] = true; |
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| 281 | |
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[112] | 282 | reg_EVENT_IS_BRANCH [context] = true; |
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[98] | 283 | reg_EVENT_DEPTH [context] = upt_ptr_write; |
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[94] | 284 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
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| 285 | reg_EVENT_ADDRESS_DEST_VAL[context] = last_take; |
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| 286 | reg_EVENT_ADDRESS_DEST [context] = address_dest; |
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| 287 | |
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[88] | 288 | // Push upt (from decod interface) |
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| 289 | condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); |
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| 290 | is_accurate = PORT_READ(in_DECOD_IS_ACCURATE [i]); |
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| 291 | |
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| 292 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
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[94] | 293 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = address_src ; |
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| 294 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = address_dest; |
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| 295 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = last_take ; |
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[88] | 296 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
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| 297 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
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| 298 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = ; // static prediction |
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| 299 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = PORT_READ(in_DECOD_RAS_ADDRESS [i]); |
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| 300 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = PORT_READ(in_DECOD_RAS_INDEX [i]); |
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| 301 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = false; // static prediction |
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[81] | 302 | } |
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| 303 | else |
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| 304 | { |
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| 305 | // Normal case : branch is previous predicated, change state of branch |
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[88] | 306 | uint32_t ufpt_ptr_read = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; |
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[81] | 307 | |
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[88] | 308 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * ufpt_ptr_read : %d",ufpt_ptr_read); |
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| 309 | |
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| 310 | #ifdef DEBUG_TEST |
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| 311 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state != UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) |
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| 312 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid ufpt state.")); |
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| 313 | #endif |
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| 314 | // Change state |
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| 315 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (decod - hit)",context,ufpt_ptr_read); |
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| 316 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
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| 317 | |
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| 318 | // Push upt (from Pop ufpt) |
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| 319 | condition = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._condition; |
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| 320 | is_accurate = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._is_accurate; |
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| 321 | |
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| 322 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; |
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| 323 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_src ; |
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| 324 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_dest; |
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| 325 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._last_take ; |
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| 326 | // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; |
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| 327 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; |
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| 328 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._history = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._history ; |
---|
| 329 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._address_ras ; |
---|
| 330 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._index_ras = reg_UPDATE_FETCH_PREDICTION_TABLE [context][ufpt_ptr_read]._index_ras ; |
---|
[105] | 331 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._ifetch_prediction = true ; // prediction from ifetch |
---|
[88] | 332 | |
---|
| 333 | // Update pointer |
---|
| 334 | if (need_update(condition)) |
---|
| 335 | { |
---|
| 336 | reg_UFPT_NB_NEED_UPDATE [context] --; |
---|
[111] | 337 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); |
---|
| 338 | |
---|
[88] | 339 | } |
---|
[81] | 340 | } |
---|
[88] | 341 | |
---|
| 342 | // All case !!! |
---|
| 343 | #ifdef DEBUG_TEST |
---|
| 344 | if (reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 345 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid upt state.")); |
---|
| 346 | #endif |
---|
| 347 | |
---|
| 348 | // Change state |
---|
| 349 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write); |
---|
| 350 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END; |
---|
[111] | 351 | reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok = false; |
---|
| 352 | |
---|
[88] | 353 | // Write new accurate |
---|
| 354 | #ifdef DEBUG_TEST |
---|
| 355 | if (not reg_IS_ACCURATE [context] and not is_accurate) |
---|
| 356 | throw ERRORMORPHEO(FUNCTION,_("Decod : invalid accurate flag.")); |
---|
| 357 | #endif |
---|
| 358 | reg_IS_ACCURATE [context] = is_accurate; |
---|
| 359 | |
---|
| 360 | // Update pointer |
---|
| 361 | reg_UPT_TOP [context] = (upt_ptr_write+1)%_param->_size_upt_queue [context]; |
---|
[101] | 362 | reg_UPT_EMPTY [context] = false; |
---|
[88] | 363 | // reg_UPT_UPDATE [context] = reg_UPT_TOP [context]; |
---|
[108] | 364 | |
---|
| 365 | // if (miss_ifetch or miss_decod) |
---|
| 366 | // reg_UPT_TOP_EVENT [context] = reg_UPT_TOP [context]; |
---|
[81] | 367 | } |
---|
| 368 | |
---|
| 369 | // =================================================================== |
---|
| 370 | // =====[ UPDATE ]==================================================== |
---|
| 371 | // =================================================================== |
---|
[95] | 372 | { |
---|
| 373 | bool can_continue [_param->_nb_context]; |
---|
| 374 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 375 | can_continue [i] = true; |
---|
[81] | 376 | |
---|
[95] | 377 | for (uint32_t i=0; i<_param->_nb_inst_update; i++) |
---|
| 378 | { |
---|
| 379 | Tcontext_t context = internal_UPDATE_CONTEXT_ID [i]; |
---|
| 380 | |
---|
| 381 | if ((internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) or |
---|
| 382 | (internal_UPDATE_VAL_WITHOUT_ACK [i] and can_continue [context])) |
---|
[88] | 383 | { |
---|
[112] | 384 | Tdepth_t depth = internal_UPDATE_DEPTH [i]; |
---|
[95] | 385 | |
---|
| 386 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPDATE[%d] - Accepted",i); |
---|
| 387 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 388 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 389 | |
---|
| 390 | if (internal_UPDATE_FROM_UFPT [i]) |
---|
[94] | 391 | { |
---|
[95] | 392 | // if free a slot, also all queue is updated |
---|
| 393 | // Last slot ? |
---|
[106] | 394 | // if (reg_UFPT_UPDATE [context] == reg_UFPT_BOTTOM [context]) |
---|
| 395 | if ((--reg_UFPT_NB_UPDATE [context])==0) |
---|
[112] | 396 | { |
---|
| 397 | switch (reg_EVENT_STATE [context]) |
---|
| 398 | { |
---|
| 399 | case EVENT_STATE_MISS_FLUSH_UFPT : |
---|
| 400 | { |
---|
| 401 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
---|
| 402 | // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT; |
---|
| 403 | |
---|
| 404 | break; |
---|
| 405 | } |
---|
| 406 | // impossible to have an update on ufpt and reg_upt_update>reg_upt_top |
---|
| 407 | case EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT : reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT ; break; |
---|
| 408 | case EVENT_STATE_EVENT_FLUSH_UFPT : reg_EVENT_STATE [context] = EVENT_STATE_OK ; break; |
---|
| 409 | case EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT: reg_EVENT_STATE [context] = EVENT_STATE_EVENT_FLUSH_UPT; break; |
---|
| 410 | default : break; |
---|
| 411 | } |
---|
| 412 | } |
---|
[95] | 413 | |
---|
| 414 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Fetch Prediction Table"); |
---|
| 415 | |
---|
| 416 | // Change state |
---|
[88] | 417 | #ifdef DEBUG_TEST |
---|
[95] | 418 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state != UPDATE_FETCH_PREDICTION_STATE_EVENT) |
---|
| 419 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid ufpt state.")); |
---|
[88] | 420 | #endif |
---|
[95] | 421 | |
---|
| 422 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UFPT [%d][%d].state <- UPDATE_FETCH_PREDICTION_STATE_END (update)",context,depth); |
---|
| 423 | |
---|
| 424 | reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._state = UPDATE_FETCH_PREDICTION_STATE_END; |
---|
[106] | 425 | |
---|
[95] | 426 | // Update pointer |
---|
| 427 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (before) : %d",reg_UFPT_UPDATE [context]); |
---|
| 428 | reg_UFPT_UPDATE [context] = ((depth==0)?_param->_size_ufpt_queue[context]:depth)-1; |
---|
| 429 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [context]); |
---|
| 430 | // Free a register that need update ? |
---|
| 431 | if (need_update(reg_UPDATE_FETCH_PREDICTION_TABLE [context][depth]._condition)) |
---|
[111] | 432 | { |
---|
| 433 | reg_UFPT_NB_NEED_UPDATE [context] --; |
---|
| 434 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); |
---|
| 435 | } |
---|
[94] | 436 | } |
---|
| 437 | else |
---|
| 438 | { |
---|
[95] | 439 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update Prediction Table"); |
---|
[112] | 440 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE (before) : %d",reg_UPT_UPDATE [context]); |
---|
| 441 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
| 442 | |
---|
[95] | 443 | // Change state |
---|
| 444 | #ifdef DEBUG_TEST |
---|
| 445 | if (internal_UPDATE_RAS [i]) |
---|
| 446 | { |
---|
| 447 | if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_EVENT) and |
---|
[105] | 448 | (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_KO ) ) |
---|
[95] | 449 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 450 | } |
---|
| 451 | else |
---|
| 452 | { |
---|
| 453 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_OK ) |
---|
| 454 | throw ERRORMORPHEO(FUNCTION,_("Update : invalid upt state.")); |
---|
| 455 | } |
---|
[88] | 456 | #endif |
---|
| 457 | |
---|
[95] | 458 | // bool have_event = ((reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO) or |
---|
| 459 | // (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_EVENT)); |
---|
[97] | 460 | #ifdef STATISTICS |
---|
| 461 | Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; |
---|
[111] | 462 | #endif |
---|
[97] | 463 | bool ok = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_OK); |
---|
[95] | 464 | bool ko = (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO); |
---|
[88] | 465 | |
---|
[111] | 466 | if (ok or ko) |
---|
[112] | 467 | { |
---|
| 468 | reg_UPDATE_PREDICTION_TABLE [context][depth]._retire_ok = true; |
---|
| 469 | reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_prediction = ko; |
---|
| 470 | } |
---|
[111] | 471 | |
---|
[95] | 472 | // Have an update, test the state to transiste to the good state |
---|
| 473 | if (ko) |
---|
| 474 | { |
---|
[101] | 475 | // Ko : wait end of all instruction |
---|
| 476 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO_WAIT_END (update)",context,depth); |
---|
| 477 | |
---|
| 478 | // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO_WAIT_END; |
---|
| 479 | |
---|
[95] | 480 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",context,depth); |
---|
| 481 | |
---|
| 482 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
[97] | 483 | |
---|
[112] | 484 | reg_EVENT_VAL [context] = true; |
---|
| 485 | reg_EVENT_UPT_PTR [context] = depth; |
---|
| 486 | // reg_EVENT_UPT_FULL [context] = 0; |
---|
| 487 | // reg_EVENT_UPT_FULL [i] = (not reg_UPT_EMPTY [i] and (bottom == reg_UPT_TOP [i])); |
---|
[105] | 488 | |
---|
[112] | 489 | |
---|
[97] | 490 | #ifdef STATISTICS |
---|
| 491 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 492 | (*_stat_nb_branch_miss [context][condition])++; |
---|
| 493 | #endif |
---|
[95] | 494 | } |
---|
| 495 | else |
---|
| 496 | { |
---|
[106] | 497 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_OK (update)",context,depth); |
---|
| 498 | // reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END_OK; |
---|
[97] | 499 | |
---|
[106] | 500 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (update)",context,depth); |
---|
| 501 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END; |
---|
[97] | 502 | |
---|
| 503 | #ifdef STATISTICS |
---|
| 504 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 505 | { |
---|
| 506 | if (ok) |
---|
| 507 | (*_stat_nb_branch_hit [context][condition]) ++; |
---|
| 508 | else |
---|
| 509 | (*_stat_nb_branch_unused [context]) ++; |
---|
| 510 | } |
---|
| 511 | #endif |
---|
[95] | 512 | } |
---|
| 513 | |
---|
| 514 | // Update pointer |
---|
| 515 | // * if update RAS : update pointer is decreaste until it equal at top pointer |
---|
[112] | 516 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * internal_UPDATE_RAS [%d] : %d",i,internal_UPDATE_RAS [i]); |
---|
| 517 | |
---|
[95] | 518 | if (internal_UPDATE_RAS [i]) |
---|
| 519 | { |
---|
| 520 | // if end_event, restart too bottom, else decrease pointer |
---|
| 521 | bool end_event = (reg_UPT_UPDATE [context] == reg_UPT_TOP [context]); |
---|
[112] | 522 | |
---|
| 523 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * end_event : %d",end_event); |
---|
| 524 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * bottom : %d",reg_UPT_BOTTOM[context]); |
---|
[95] | 525 | |
---|
| 526 | if (end_event) |
---|
| 527 | { |
---|
[112] | 528 | reg_UPT_UPDATE [context] = (end_event)?reg_UPT_BOTTOM[context]:(((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 529 | // reg_UPT_UPDATE [context] = reg_UPT_BOTTOM[context]; |
---|
[105] | 530 | |
---|
| 531 | if (reg_EVENT_STATE [context] == EVENT_STATE_EVENT_FLUSH_UPT) |
---|
| 532 | { |
---|
| 533 | reg_EVENT_STATE [context] = EVENT_STATE_OK; |
---|
| 534 | } |
---|
| 535 | else |
---|
[112] | 536 | { |
---|
| 537 | reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; |
---|
| 538 | // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UPT; |
---|
| 539 | } |
---|
[95] | 540 | } |
---|
| 541 | else |
---|
| 542 | { |
---|
| 543 | reg_UPT_UPDATE [context] = (((depth==0)?_param->_size_upt_queue[context]:depth)-1); |
---|
| 544 | } |
---|
| 545 | } |
---|
| 546 | else |
---|
| 547 | { |
---|
[112] | 548 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * next update"); |
---|
| 549 | |
---|
[95] | 550 | // increase pointer |
---|
| 551 | reg_UPT_UPDATE [context] = (depth+1)%_param->_size_upt_queue[context]; |
---|
| 552 | } |
---|
| 553 | |
---|
| 554 | // Free the branch with no accurate ? |
---|
[112] | 555 | if ((reg_UPDATE_PREDICTION_TABLE [context][depth]._is_accurate == false) and not ko) |
---|
[95] | 556 | reg_IS_ACCURATE [context] = true; |
---|
[112] | 557 | |
---|
| 558 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE (after ) : %d",reg_UPT_UPDATE[context]); |
---|
| 559 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
[94] | 560 | } |
---|
[88] | 561 | } |
---|
[95] | 562 | else |
---|
| 563 | can_continue [context] = false; |
---|
| 564 | } |
---|
[81] | 565 | |
---|
[95] | 566 | // Round robin |
---|
| 567 | reg_UPDATE_PRIORITY = (reg_UPDATE_PRIORITY+1)%_param->_nb_context; |
---|
| 568 | } |
---|
[81] | 569 | |
---|
[108] | 570 | // =================================================================== |
---|
| 571 | // =====[ BRANCH_COMPLETE ]=========================================== |
---|
| 572 | // =================================================================== |
---|
| 573 | |
---|
| 574 | // The branch is complete |
---|
| 575 | // * Hit prediction : |
---|
| 576 | // * update status |
---|
| 577 | // * Miss prediction : |
---|
| 578 | for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) |
---|
| 579 | if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) |
---|
| 580 | { |
---|
| 581 | Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; |
---|
| 582 | Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; |
---|
| 583 | Tcontrol_t miss = internal_BRANCH_COMPLETE_MISS_PREDICTION [i]; |
---|
| 584 | Tcontrol_t good_take = internal_BRANCH_COMPLETE_TAKE [i]; |
---|
| 585 | Taddress_t good_addr = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; |
---|
| 586 | |
---|
| 587 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_COMPLETE[%d] - Accepted",i); |
---|
[112] | 588 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); |
---|
| 589 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 590 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); |
---|
| 591 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
[108] | 592 | |
---|
| 593 | if (miss) |
---|
| 594 | { |
---|
| 595 | // Flush UPT |
---|
[111] | 596 | uint32_t top = reg_UPT_TOP [context]; |
---|
| 597 | uint32_t new_update = ((top==0)?_param->_size_upt_queue[context]:top)-1; |
---|
| 598 | |
---|
| 599 | Taddress_t address_src = reg_UPDATE_PREDICTION_TABLE [context][depth]._address_src; |
---|
| 600 | event_state_t event_state = reg_EVENT_STATE [context]; |
---|
| 601 | upt_state_t event_top = reg_UPDATE_PREDICTION_TABLE [context][top]._state; |
---|
[112] | 602 | |
---|
| 603 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * event_top : %s",toString(event_top).c_str()); |
---|
| 604 | |
---|
[111] | 605 | bool previous_ufpt_event = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 606 | (event_state == EVENT_STATE_MISS_FLUSH_UFPT ) or |
---|
| 607 | (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 608 | (event_state == EVENT_STATE_EVENT_FLUSH_UFPT )); |
---|
[108] | 609 | |
---|
[112] | 610 | bool previous_upt_event = (false |
---|
| 611 | or (event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) |
---|
| 612 | or (event_state == EVENT_STATE_MISS_FLUSH_UPT ) |
---|
| 613 | or (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) |
---|
| 614 | or (event_state == EVENT_STATE_EVENT_FLUSH_UPT ) |
---|
| 615 | or (event_top == UPDATE_PREDICTION_STATE_END_KO ) |
---|
| 616 | or (event_top == UPDATE_PREDICTION_STATE_KO ) |
---|
| 617 | // or (event_state == EVENT_STATE_WAIT_END_EVENT ) |
---|
| 618 | // or ((event_state == EVENT_STATE_UPDATE_CONTEXT ) |
---|
| 619 | // and (reg_EVENT_SOURCE [context] == EVENT_SOURCE_UPT)) |
---|
| 620 | ); |
---|
[109] | 621 | // bool update_ras = (new_update != depth); |
---|
[108] | 622 | |
---|
[111] | 623 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
| 624 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); |
---|
| 625 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); |
---|
| 626 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_upt_event : %d",previous_upt_event); |
---|
| 627 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * previous_ufpt_event : %d",previous_ufpt_event); |
---|
[112] | 628 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [context]); |
---|
| 629 | |
---|
[111] | 630 | // Have a miss !!! |
---|
| 631 | // Flush UPFT |
---|
[112] | 632 | flush_UFPT [context] |= not previous_ufpt_event; |
---|
[111] | 633 | |
---|
[109] | 634 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 635 | { |
---|
| 636 | for (uint32_t j=(depth+1)%_param->_size_upt_queue[context]; |
---|
| 637 | j!=top; |
---|
| 638 | j=(j+1)%_param->_size_upt_queue[context]) |
---|
[111] | 639 | { |
---|
| 640 | reg_UPDATE_PREDICTION_TABLE [context][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 641 | reg_UPDATE_PREDICTION_TABLE [context][j]._retire_ok = false; |
---|
| 642 | } |
---|
[109] | 643 | |
---|
[108] | 644 | |
---|
[109] | 645 | // reg_UPT_BOTTOM [context]; |
---|
| 646 | reg_UPT_TOP [context] = depth; |
---|
| 647 | // reg_UPT_TOP_EVENT [context] = top; |
---|
[112] | 648 | |
---|
[111] | 649 | if (not previous_upt_event) |
---|
[109] | 650 | { |
---|
| 651 | reg_UPT_TOP_EVENT [context] = top; |
---|
| 652 | reg_UPT_UPDATE [context] = new_update; |
---|
| 653 | } |
---|
| 654 | else |
---|
| 655 | { |
---|
| 656 | // Have event. Top index this slot |
---|
[111] | 657 | reg_UPDATE_PREDICTION_TABLE [context][top]._retire_ok = false; |
---|
| 658 | |
---|
| 659 | switch (event_top) |
---|
[109] | 660 | { |
---|
| 661 | case UPDATE_PREDICTION_STATE_END_KO : |
---|
| 662 | { |
---|
| 663 | // Have already update predictor |
---|
| 664 | reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_END; |
---|
[112] | 665 | reg_UPT_UPDATE [context] = new_update; |
---|
[109] | 666 | break; |
---|
| 667 | } |
---|
| 668 | case UPDATE_PREDICTION_STATE_KO : |
---|
| 669 | { |
---|
| 670 | // Doesn't have update predictor |
---|
| 671 | reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 672 | break; |
---|
| 673 | } |
---|
| 674 | default : |
---|
| 675 | { |
---|
[111] | 676 | // reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 677 | // break; |
---|
| 678 | |
---|
[108] | 679 | #ifdef DEBUG_TEST |
---|
[109] | 680 | throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
[108] | 681 | #endif |
---|
[109] | 682 | } |
---|
| 683 | } |
---|
| 684 | } |
---|
| 685 | |
---|
| 686 | if (reg_UPT_BOTTOM [context] == reg_UPT_TOP [context]) |
---|
| 687 | reg_UPT_EMPTY [context] = true; |
---|
| 688 | |
---|
| 689 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_KO (branch_complete, ifetch hit)",context,depth); |
---|
| 690 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; |
---|
[111] | 691 | |
---|
| 692 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE [%d] : %d",context,reg_UFPT_NB_NEED_UPDATE [context]); |
---|
| 693 | |
---|
| 694 | if ( (reg_UFPT_NB_NEED_UPDATE [context] > 0) or |
---|
| 695 | (reg_UFPT_NB_UPDATE [context] > 0)) |
---|
[108] | 696 | { |
---|
[109] | 697 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT (branch_complete - miss)",context); |
---|
| 698 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT; |
---|
[108] | 699 | } |
---|
[109] | 700 | else |
---|
| 701 | { |
---|
| 702 | // if (not previous_update_ras) |
---|
| 703 | { |
---|
| 704 | // have ras prediction ? |
---|
| 705 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UPT (branch_complete - miss)",context); |
---|
| 706 | |
---|
| 707 | reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UPT; |
---|
| 708 | |
---|
| 709 | } |
---|
| 710 | } |
---|
[112] | 711 | // reg_EVENT_SOURCE [context] = EVENT_SOURCE_UPT; |
---|
[109] | 712 | |
---|
| 713 | // else no update |
---|
| 714 | |
---|
[112] | 715 | reg_EVENT_IS_BRANCH [context] = true; |
---|
[109] | 716 | reg_EVENT_DEPTH [context] = depth; |
---|
| 717 | reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State |
---|
| 718 | reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; |
---|
| 719 | reg_EVENT_ADDRESS_DEST [context] = good_addr; |
---|
[108] | 720 | } |
---|
[109] | 721 | } |
---|
[108] | 722 | else |
---|
| 723 | { |
---|
| 724 | // Hit case |
---|
| 725 | |
---|
| 726 | // #ifdef DEBUG_TEST |
---|
| 727 | // if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 728 | // throw ERRORMORPHEO(FUNCTION,_("Branch complete : invalid upt state.")); |
---|
| 729 | // #endif |
---|
| 730 | |
---|
| 731 | if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_WAIT_END) |
---|
| 732 | { |
---|
| 733 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_OK (branch_complete, ifetch hit)",context,depth); |
---|
| 734 | reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; |
---|
| 735 | } |
---|
| 736 | } |
---|
| 737 | |
---|
[112] | 738 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s",toString(reg_EVENT_STATE [context]).c_str()); |
---|
| 739 | |
---|
[108] | 740 | // In all case : update good_take |
---|
| 741 | reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = good_take; |
---|
| 742 | |
---|
| 743 | // Write address_dest if need read register |
---|
| 744 | Tbranch_condition_t condition = reg_UPDATE_PREDICTION_TABLE [context][depth]._condition; |
---|
| 745 | |
---|
| 746 | if ((condition == BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK) or |
---|
| 747 | (condition == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK ) or |
---|
| 748 | (condition == BRANCH_CONDITION_READ_STACK ) ) |
---|
| 749 | reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = good_addr; |
---|
| 750 | } |
---|
| 751 | |
---|
[112] | 752 | |
---|
[94] | 753 | // =================================================================== |
---|
| 754 | // =====[ BRANCH_EVENT ]============================================== |
---|
| 755 | // =================================================================== |
---|
| 756 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 757 | if (internal_BRANCH_EVENT_VAL [i] and PORT_READ(in_BRANCH_EVENT_ACK [i])) |
---|
| 758 | { |
---|
[95] | 759 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * BRANCH_EVENT [%d] - Accepted",i); |
---|
[82] | 760 | |
---|
[107] | 761 | // if different : an other branch is occured |
---|
| 762 | if (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT) |
---|
| 763 | { |
---|
| 764 | // Change state |
---|
| 765 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i); |
---|
| 766 | |
---|
| 767 | reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT; |
---|
| 768 | } |
---|
[94] | 769 | } |
---|
| 770 | |
---|
| 771 | // =================================================================== |
---|
[95] | 772 | // =====[ EVENT ]===================================================== |
---|
| 773 | // =================================================================== |
---|
| 774 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
[97] | 775 | if (PORT_READ(in_EVENT_VAL [i]) and internal_EVENT_ACK [i]) |
---|
| 776 | { |
---|
[105] | 777 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT"); |
---|
| 778 | |
---|
[97] | 779 | //---------------------------------------------------------------- |
---|
| 780 | // Cases |
---|
| 781 | //---------------------------------------------------------------- |
---|
| 782 | // * EVENT_TYPE_NONE - nothing |
---|
| 783 | // * EVENT_TYPE_MISS_SPECULATION - Change state, reset pointer |
---|
| 784 | // * EVENT_TYPE_EXCEPTION - Flush upft and upt, Change state, reset pointer |
---|
| 785 | // * EVENT_TYPE_BRANCH_NO_ACCURATE - nothing : manage in decod and update |
---|
| 786 | // * EVENT_TYPE_SPR_ACCESS - nothing |
---|
| 787 | // * EVENT_TYPE_MSYNC - nothing |
---|
| 788 | // * EVENT_TYPE_PSYNC - nothing |
---|
| 789 | // * EVENT_TYPE_CSYNC - nothing |
---|
| 790 | |
---|
| 791 | Tevent_type_t event_type = PORT_READ(in_EVENT_TYPE [i]); |
---|
[105] | 792 | |
---|
[101] | 793 | // Test if end of miss -> all previous branch is complete |
---|
| 794 | // -> all next branch is finish |
---|
[105] | 795 | |
---|
| 796 | switch (event_type) |
---|
[97] | 797 | { |
---|
[105] | 798 | case EVENT_TYPE_BRANCH_MISS_SPECULATION : |
---|
| 799 | { |
---|
| 800 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_BRANCH_MISS_SPECULATION"); |
---|
| 801 | |
---|
[95] | 802 | #ifdef DEBUG_TEST |
---|
[105] | 803 | if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT) |
---|
| 804 | throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state.")); |
---|
[95] | 805 | #endif |
---|
[105] | 806 | |
---|
| 807 | // Change state |
---|
| 808 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); |
---|
| 809 | |
---|
| 810 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 811 | reg_IS_ACCURATE [i] = true; |
---|
[101] | 812 | |
---|
[106] | 813 | Tdepth_t depth = reg_EVENT_UPT_PTR [i]; |
---|
| 814 | |
---|
| 815 | if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO) |
---|
| 816 | { |
---|
| 817 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth); |
---|
| 818 | |
---|
| 819 | reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END; |
---|
| 820 | } |
---|
| 821 | |
---|
[101] | 822 | #ifdef DEBUG_TEST |
---|
[106] | 823 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO_WAIT_END) |
---|
| 824 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
[105] | 825 | // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO) |
---|
| 826 | // throw ERRORMORPHEO(FUNCTION,_("Event : invalid upt event state.")); |
---|
[101] | 827 | #endif |
---|
| 828 | |
---|
[106] | 829 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END_KO (update)",i,depth); |
---|
| 830 | |
---|
| 831 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END_KO; |
---|
| 832 | |
---|
[105] | 833 | break; |
---|
| 834 | } |
---|
| 835 | case EVENT_TYPE_LOAD_MISS_SPECULATION : |
---|
| 836 | case EVENT_TYPE_EXCEPTION : |
---|
| 837 | { |
---|
| 838 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_LOAD_MISS_SPECULATION"); |
---|
| 839 | |
---|
| 840 | // Have a miss !!! |
---|
| 841 | // Flush UPFT |
---|
| 842 | flush_UFPT [i] = true; |
---|
| 843 | |
---|
| 844 | // Flush UPT |
---|
[112] | 845 | uint32_t bottom = reg_UPT_BOTTOM [i]; |
---|
[108] | 846 | |
---|
[112] | 847 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * bottom : %d",bottom); |
---|
[105] | 848 | |
---|
[112] | 849 | // event_state_t event_state = reg_EVENT_STATE [i]; |
---|
| 850 | // bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 851 | // (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or |
---|
| 852 | // (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 853 | // (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); |
---|
[108] | 854 | |
---|
[112] | 855 | bool find = false; // have slot to update ??? |
---|
| 856 | Tdepth_t top = bottom; |
---|
| 857 | Tdepth_t update = bottom; |
---|
| 858 | bool empty = reg_UPT_EMPTY [i]; |
---|
[108] | 859 | |
---|
[112] | 860 | // flush all slot, because this event is in head of rob |
---|
| 861 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; ++j) |
---|
[106] | 862 | { |
---|
[112] | 863 | Tdepth_t x = (bottom+j)%_param->_size_upt_queue[i]; |
---|
| 864 | |
---|
| 865 | if ((reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_END) and |
---|
| 866 | (reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_EMPTY)) |
---|
| 867 | { |
---|
| 868 | find = true; // find a not empty slot |
---|
| 869 | reg_UPDATE_PREDICTION_TABLE [i][x]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 870 | reg_UPDATE_PREDICTION_TABLE [i][x]._retire_ok = false; |
---|
| 871 | update = x; |
---|
| 872 | } |
---|
[111] | 873 | |
---|
[112] | 874 | if (reg_UPDATE_PREDICTION_TABLE [i][x]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 875 | top = x+1; |
---|
[108] | 876 | } |
---|
[105] | 877 | |
---|
[112] | 878 | top = top%_param->_size_upt_queue[i]; |
---|
| 879 | |
---|
[108] | 880 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find : %d",find); |
---|
[112] | 881 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
[108] | 882 | |
---|
| 883 | // Test if have update slot |
---|
| 884 | if (find) |
---|
| 885 | { |
---|
| 886 | // TODO : special case : event is an exception on branch, also depth is not valid |
---|
[112] | 887 | reg_UPT_TOP [i] = top; // depth is again valid |
---|
[108] | 888 | reg_UPT_TOP_EVENT [i] = top; |
---|
| 889 | |
---|
| 890 | if (bottom == reg_UPT_TOP [i]) |
---|
| 891 | reg_UPT_EMPTY [i] = true; |
---|
[106] | 892 | } |
---|
[112] | 893 | reg_UPT_UPDATE [i] = update; |
---|
[108] | 894 | |
---|
[105] | 895 | // new state : |
---|
| 896 | // * test if ufpt is empty |
---|
| 897 | // * ok : flush upft and upt |
---|
| 898 | // * ko : test if have previous flush upt |
---|
| 899 | // * ok : nothing |
---|
| 900 | // * ko : flush upt |
---|
[112] | 901 | reg_EVENT_VAL [i] = find; |
---|
| 902 | reg_EVENT_IS_BRANCH [i] = false; |
---|
| 903 | reg_EVENT_UPT_PTR [i] = top; |
---|
| 904 | reg_EVENT_UPT_FULL [i] = (not empty and (bottom == reg_UPT_TOP [i])); |
---|
| 905 | reg_EVENT_DEPTH [i] = top; |
---|
| 906 | // reg_EVENT_ADDRESS_SRC [i] = address_src; // delay_slot is compute in I_State |
---|
| 907 | // reg_EVENT_ADDRESS_DEST_VAL[i] = good_take; |
---|
| 908 | // reg_EVENT_ADDRESS_DEST [i] = good_addr; |
---|
[108] | 909 | |
---|
[112] | 910 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM : %d",reg_UPT_BOTTOM [i]); |
---|
| 911 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
---|
| 912 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
---|
| 913 | |
---|
| 914 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d",reg_EVENT_VAL [i]); |
---|
| 915 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d",reg_EVENT_UPT_PTR [i]); |
---|
| 916 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d",reg_EVENT_UPT_FULL [i]); |
---|
[111] | 917 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
[112] | 918 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_UPDATE : %d",reg_UFPT_NB_UPDATE [i]); |
---|
| 919 | |
---|
[111] | 920 | if ( (reg_UFPT_NB_NEED_UPDATE [i] > 0) or |
---|
| 921 | (reg_UFPT_NB_UPDATE [i] > 0)) |
---|
[105] | 922 | { |
---|
[112] | 923 | if (find) |
---|
[105] | 924 | { |
---|
[112] | 925 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT (event - find)",i); |
---|
[105] | 926 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT; |
---|
| 927 | } |
---|
| 928 | else |
---|
| 929 | { |
---|
[112] | 930 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT (event - not find)",i); |
---|
| 931 | // reg_EVENT_VAL [i] = false; |
---|
| 932 | |
---|
[105] | 933 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT; |
---|
| 934 | } |
---|
| 935 | } |
---|
| 936 | else |
---|
| 937 | { |
---|
[112] | 938 | if (find) |
---|
[105] | 939 | { |
---|
| 940 | // have ras prediction ? |
---|
[112] | 941 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (event - find)",i); |
---|
[105] | 942 | |
---|
| 943 | reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UPT; |
---|
| 944 | } |
---|
| 945 | else |
---|
| 946 | { |
---|
[108] | 947 | // special case : nothing |
---|
[112] | 948 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (event - not find)",i); |
---|
[108] | 949 | |
---|
[112] | 950 | // reg_EVENT_VAL [i] = false; |
---|
| 951 | |
---|
[105] | 952 | reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 953 | } |
---|
| 954 | } |
---|
[108] | 955 | |
---|
[105] | 956 | // else no update |
---|
| 957 | |
---|
[112] | 958 | // Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_EVENT_DEPTH [i]):0; |
---|
| 959 | // uint32_t top = reg_UPT_TOP [i]; |
---|
| 960 | // uint32_t bottom = reg_UPT_BOTTOM [i]; |
---|
| 961 | // uint32_t new_update = ((top==0)?_param->_size_upt_queue[i]:top)-1; |
---|
| 962 | // // bool empty = reg_UPT_EMPTY [i]; |
---|
[105] | 963 | |
---|
[112] | 964 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); |
---|
| 965 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); |
---|
| 966 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * new_update : %d",new_update); |
---|
| 967 | |
---|
| 968 | // event_state_t event_state = reg_EVENT_STATE [i]; |
---|
| 969 | // bool previous_update_ras = ((event_state == EVENT_STATE_MISS_FLUSH_UFPT_AND_UPT ) or |
---|
| 970 | // (event_state == EVENT_STATE_MISS_FLUSH_UPT ) or |
---|
| 971 | // (event_state == EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT) or |
---|
| 972 | // (event_state == EVENT_STATE_EVENT_FLUSH_UPT)); |
---|
| 973 | |
---|
| 974 | // bool find = false; // have slot to update ??? |
---|
| 975 | // Tdepth_t depth_new = depth; |
---|
| 976 | |
---|
| 977 | // // flush all slot, because this event is in head of rob |
---|
| 978 | // for (uint32_t j=(depth+1)%_param->_size_upt_queue[i]; |
---|
| 979 | // //uint32_t j=bottom; |
---|
| 980 | // j!=top; |
---|
| 981 | // j=(j+1)%_param->_size_upt_queue[i]) |
---|
| 982 | // if ((reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_END) and |
---|
| 983 | // (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY)) |
---|
| 984 | // { |
---|
| 985 | // find = true; |
---|
| 986 | // reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 987 | // reg_UPDATE_PREDICTION_TABLE [i][j]._retire_ok = false; |
---|
| 988 | // } |
---|
| 989 | // else |
---|
| 990 | // if (not find) // while state == end or empty |
---|
| 991 | // depth_new ++; |
---|
| 992 | |
---|
| 993 | // if ((reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END) and |
---|
| 994 | // (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_EMPTY)) |
---|
| 995 | // { |
---|
| 996 | // find = true; |
---|
| 997 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 998 | // reg_UPDATE_PREDICTION_TABLE [i][depth]._retire_ok = false; |
---|
| 999 | |
---|
| 1000 | // } |
---|
| 1001 | // else |
---|
| 1002 | // // while state == end or empty |
---|
| 1003 | // depth = (depth_new+1)%_param->_size_upt_queue[i]; |
---|
| 1004 | |
---|
| 1005 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * find : %d",find); |
---|
| 1006 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth_new : %d",depth_new); |
---|
| 1007 | |
---|
| 1008 | // // Test if have update slot |
---|
| 1009 | // if (find) |
---|
| 1010 | // { |
---|
| 1011 | // // // flush all slot after the event |
---|
| 1012 | // // for (uint32_t j=(depth+1)%_param->_size_upt_queue[i]; |
---|
| 1013 | // // j!=top; |
---|
| 1014 | // // j=(j+1)%_param->_size_upt_queue[i]) |
---|
| 1015 | // // reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 1016 | |
---|
| 1017 | // // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_EVENT; |
---|
| 1018 | |
---|
| 1019 | // // reg_UPT_BOTTOM [i]; |
---|
| 1020 | // // TODO : special case : event is an exception on branch, also depth is not valid |
---|
| 1021 | // reg_UPT_TOP [i] = depth; // depth is again valid |
---|
| 1022 | // reg_UPT_TOP_EVENT [i] = top; |
---|
| 1023 | |
---|
| 1024 | // if (bottom == reg_UPT_TOP [i]) |
---|
| 1025 | // reg_UPT_EMPTY [i] = true; |
---|
| 1026 | // } |
---|
| 1027 | |
---|
| 1028 | // bool full = ((depth == top) and (top == bottom) and not reg_UPT_EMPTY [i]); |
---|
| 1029 | // bool update_ras = find and ((top != depth) or full); |
---|
| 1030 | |
---|
| 1031 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * update_ras : %d",update_ras); |
---|
| 1032 | |
---|
| 1033 | // if (not previous_update_ras and update_ras) |
---|
| 1034 | // reg_UPT_UPDATE [i] = new_update; |
---|
| 1035 | |
---|
| 1036 | // // new state : |
---|
| 1037 | // // * test if ufpt is empty |
---|
| 1038 | // // * ok : flush upft and upt |
---|
| 1039 | // // * ko : test if have previous flush upt |
---|
| 1040 | // // * ok : nothing |
---|
| 1041 | // // * ko : flush upt |
---|
| 1042 | // reg_EVENT_VAL [i] = update_ras; |
---|
| 1043 | // reg_EVENT_UPT_PTR [i] = depth; |
---|
| 1044 | |
---|
| 1045 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 1046 | // // if (reg_UFPT_NB_NEED_UPDATE [i] > 0) |
---|
| 1047 | // if ( (reg_UFPT_NB_NEED_UPDATE [i] > 0) or |
---|
| 1048 | // (reg_UFPT_NB_UPDATE [i] > 0)) |
---|
| 1049 | // { |
---|
| 1050 | // if (update_ras) |
---|
| 1051 | // { |
---|
| 1052 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT (branch_complete - miss)",i); |
---|
| 1053 | // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT_AND_UPT; |
---|
| 1054 | // } |
---|
| 1055 | // else |
---|
| 1056 | // { |
---|
| 1057 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UFPT (branch_complete - miss)",i); |
---|
| 1058 | // // reg_EVENT_VAL [i] = false; |
---|
| 1059 | |
---|
| 1060 | // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UFPT; |
---|
| 1061 | // } |
---|
| 1062 | // } |
---|
| 1063 | // else |
---|
| 1064 | // { |
---|
| 1065 | // // if (not previous_update_ras) |
---|
| 1066 | // if (update_ras) |
---|
| 1067 | // { |
---|
| 1068 | // // have ras prediction ? |
---|
| 1069 | // log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_EVENT_FLUSH_UPT (branch_complete - miss)",i); |
---|
| 1070 | |
---|
| 1071 | // reg_EVENT_STATE [i] = EVENT_STATE_EVENT_FLUSH_UPT; |
---|
| 1072 | // } |
---|
| 1073 | // else |
---|
| 1074 | // { |
---|
| 1075 | // // special case : nothing |
---|
| 1076 | // // reg_EVENT_VAL [i] = false; |
---|
| 1077 | |
---|
| 1078 | // reg_EVENT_STATE [i] = EVENT_STATE_OK; |
---|
| 1079 | // } |
---|
| 1080 | // } |
---|
| 1081 | |
---|
| 1082 | // // else no update |
---|
| 1083 | |
---|
| 1084 | // reg_EVENT_DEPTH [i] = depth; |
---|
| 1085 | // // reg_EVENT_ADDRESS_SRC [i] = address_src; // delay_slot is compute in I_State |
---|
| 1086 | // // reg_EVENT_ADDRESS_DEST_VAL[i] = good_take; |
---|
| 1087 | // // reg_EVENT_ADDRESS_DEST [i] = good_addr; |
---|
| 1088 | |
---|
[105] | 1089 | break; |
---|
| 1090 | } |
---|
| 1091 | default : |
---|
| 1092 | { |
---|
| 1093 | // nothing |
---|
| 1094 | break; |
---|
| 1095 | } |
---|
[97] | 1096 | } |
---|
| 1097 | } |
---|
[95] | 1098 | |
---|
| 1099 | // =================================================================== |
---|
[94] | 1100 | // =====[ FLUSH ]===================================================== |
---|
| 1101 | // =================================================================== |
---|
| 1102 | |
---|
| 1103 | for (uint32_t i=0; i<_param->_nb_context; ++i) |
---|
| 1104 | { |
---|
| 1105 | if (flush_UFPT [i]) |
---|
| 1106 | { |
---|
| 1107 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Flush Update Fetch Prediction Table"); |
---|
| 1108 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",i); |
---|
| 1109 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
| 1110 | |
---|
| 1111 | // It's to accelerate miss speculation |
---|
| 1112 | if (reg_UFPT_NB_NEED_UPDATE [i] == 0) |
---|
| 1113 | { |
---|
| 1114 | // No entry need prediction, flush all entry -> Reset |
---|
| 1115 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
| 1116 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state = UPDATE_FETCH_PREDICTION_STATE_EMPTY; |
---|
| 1117 | reg_UFPT_BOTTOM [i] = 0; |
---|
| 1118 | reg_UFPT_TOP [i] = 0; |
---|
| 1119 | // reg_UFPT_UPDATE [i]; |
---|
| 1120 | } |
---|
| 1121 | else |
---|
| 1122 | { |
---|
[111] | 1123 | uint32_t bottom = reg_UFPT_BOTTOM [i]; |
---|
[94] | 1124 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; ++j) |
---|
[111] | 1125 | { |
---|
| 1126 | uint32_t index = (bottom+j)%_param->_size_ufpt_queue[i]; |
---|
| 1127 | // EMPTY : no event |
---|
| 1128 | // END : already update |
---|
| 1129 | // EVENT : previous event |
---|
| 1130 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][index]._state == UPDATE_FETCH_PREDICTION_STATE_WAIT_DECOD) |
---|
| 1131 | { |
---|
| 1132 | reg_UFPT_UPDATE [i] = index; |
---|
| 1133 | reg_UFPT_NB_UPDATE [i] ++; |
---|
| 1134 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][index]._state = UPDATE_FETCH_PREDICTION_STATE_EVENT; |
---|
| 1135 | } |
---|
| 1136 | } |
---|
[106] | 1137 | |
---|
[111] | 1138 | // // TOP is next write slot : last slot is TOP-1 |
---|
| 1139 | // uint32_t top = reg_UFPT_TOP [i]; |
---|
| 1140 | // reg_UFPT_UPDATE [i] = ((top==0)?_param->_size_ufpt_queue[i]:top)-1; |
---|
[106] | 1141 | |
---|
| 1142 | // reg_UFPT_BOTTOM [i]; |
---|
| 1143 | // reg_UFPT_TOP [i]; |
---|
[94] | 1144 | } |
---|
[81] | 1145 | |
---|
[94] | 1146 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE (after ) : %d",reg_UFPT_UPDATE [i]); |
---|
| 1147 | |
---|
| 1148 | } |
---|
| 1149 | } |
---|
| 1150 | |
---|
[97] | 1151 | #ifdef STATISTICS |
---|
| 1152 | if (usage_is_set(_usage,USE_STATISTICS)) |
---|
| 1153 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 1154 | { |
---|
| 1155 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
| 1156 | if (reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state != UPDATE_FETCH_PREDICTION_STATE_EMPTY) |
---|
| 1157 | (*_stat_ufpt_queue_nb_elt [i]) ++; |
---|
| 1158 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
| 1159 | if (reg_UPDATE_PREDICTION_TABLE [i][j]._state != UPDATE_PREDICTION_STATE_EMPTY) |
---|
| 1160 | (*_stat_upt_queue_nb_elt [i]) ++; |
---|
| 1161 | } |
---|
| 1162 | #endif |
---|
| 1163 | |
---|
[94] | 1164 | // =================================================================== |
---|
| 1165 | // =====[ PRINT ]===================================================== |
---|
| 1166 | // =================================================================== |
---|
| 1167 | |
---|
[82] | 1168 | #if (DEBUG >= DEBUG_TRACE) |
---|
[88] | 1169 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Dump Update_Prediction_Table"); |
---|
| 1170 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPDATE_PRIORITY : %d",reg_UPDATE_PRIORITY); |
---|
[81] | 1171 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 1172 | { |
---|
[88] | 1173 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_IS_ACCURATE : %d",reg_IS_ACCURATE [i]); |
---|
[105] | 1174 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_VAL : %d" ,reg_EVENT_VAL [i]); |
---|
| 1175 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_PTR : %d" ,reg_EVENT_UPT_PTR [i]); |
---|
[112] | 1176 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_UPT_FULL : %d" ,reg_EVENT_UPT_FULL [i]); |
---|
[88] | 1177 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_STATE : %s" ,toString(reg_EVENT_STATE [i]).c_str()); |
---|
[112] | 1178 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_IS_BRANCH : %d" ,reg_EVENT_IS_BRANCH [i]); |
---|
[98] | 1179 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); |
---|
[108] | 1180 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_SRC : %.8x (%.8x)",reg_EVENT_ADDRESS_SRC [i],reg_EVENT_ADDRESS_SRC [i]<<2); |
---|
[94] | 1181 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST_VAL: %d" ,reg_EVENT_ADDRESS_DEST_VAL[i]); |
---|
[108] | 1182 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST : %.8x (%.8x)",reg_EVENT_ADDRESS_DEST [i],reg_EVENT_ADDRESS_DEST [i]<<2); |
---|
[88] | 1183 | |
---|
| 1184 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Fetch_Prediction_Table [%d]",i); |
---|
| 1185 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_BOTTOM : %d",reg_UFPT_BOTTOM [i]); |
---|
| 1186 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_TOP : %d",reg_UFPT_TOP [i]); |
---|
[94] | 1187 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_UPDATE : %d",reg_UFPT_UPDATE [i]); |
---|
[88] | 1188 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE : %d",reg_UFPT_NB_NEED_UPDATE [i]); |
---|
[106] | 1189 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_UPDATE : %d",reg_UFPT_NB_UPDATE [i]); |
---|
[88] | 1190 | for (uint32_t j=0; j<_param->_size_ufpt_queue[i]; j++) |
---|
[107] | 1191 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d, %.8d %.8x (%.8x) %.4d - %s", |
---|
[88] | 1192 | j, |
---|
| 1193 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._condition, |
---|
| 1194 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src, |
---|
[107] | 1195 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_src<<2, |
---|
[88] | 1196 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest, |
---|
[107] | 1197 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_dest<<2, |
---|
[88] | 1198 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._last_take, |
---|
| 1199 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 1200 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._history, |
---|
| 1201 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras, |
---|
[107] | 1202 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._address_ras<<2, |
---|
[88] | 1203 | reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 1204 | toString(reg_UPDATE_FETCH_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 1205 | ); |
---|
| 1206 | |
---|
| 1207 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Prediction_Table [%d]",i); |
---|
| 1208 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_BOTTOM : %d",reg_UPT_BOTTOM [i]); |
---|
| 1209 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP : %d",reg_UPT_TOP [i]); |
---|
[95] | 1210 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_TOP_EVENT : %d",reg_UPT_TOP_EVENT [i]); |
---|
[88] | 1211 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_UPDATE : %d",reg_UPT_UPDATE [i]); |
---|
[101] | 1212 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPT_EMPTY : %d",reg_UPT_EMPTY [i]); |
---|
[88] | 1213 | for (uint32_t j=0; j<_param->_size_upt_queue[i]; j++) |
---|
[107] | 1214 | log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %.4d, %.8x (%.8x) %.8x (%.8x), %.1d %.1d %.1d, %.8d %.8x (%.8x) %.4d - %s", |
---|
[88] | 1215 | j, |
---|
| 1216 | reg_UPDATE_PREDICTION_TABLE [i][j]._condition, |
---|
| 1217 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_src, |
---|
[107] | 1218 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_src<<2, |
---|
[88] | 1219 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest, |
---|
[107] | 1220 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_dest<<2, |
---|
[88] | 1221 | reg_UPDATE_PREDICTION_TABLE [i][j]._last_take, |
---|
| 1222 | reg_UPDATE_PREDICTION_TABLE [i][j]._good_take, |
---|
| 1223 | reg_UPDATE_PREDICTION_TABLE [i][j]._is_accurate, |
---|
| 1224 | reg_UPDATE_PREDICTION_TABLE [i][j]._history, |
---|
| 1225 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras, |
---|
[107] | 1226 | reg_UPDATE_PREDICTION_TABLE [i][j]._address_ras<<2, |
---|
[88] | 1227 | reg_UPDATE_PREDICTION_TABLE [i][j]._index_ras, |
---|
| 1228 | toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str() |
---|
| 1229 | ); |
---|
[81] | 1230 | } |
---|
[82] | 1231 | #endif |
---|
[108] | 1232 | |
---|
| 1233 | #ifdef DEBUG_TEST |
---|
| 1234 | for (uint32_t i=0; i<_param->_nb_context; i++) |
---|
| 1235 | { |
---|
| 1236 | if (reg_UFPT_NB_NEED_UPDATE [i] > _param->_size_ufpt_queue[i]) |
---|
| 1237 | throw ERRORMORPHEO(FUNCTION,toString(_("reg_UFPT_NB_NEED_UPDATE [%d] (%d) is > at size_ufpt_queue (%d).\n"),i,reg_UFPT_NB_NEED_UPDATE [i],_param->_size_ufpt_queue[i])); |
---|
| 1238 | if (reg_UFPT_NB_UPDATE [i] > _param->_size_ufpt_queue[i]) |
---|
| 1239 | throw ERRORMORPHEO(FUNCTION,toString(_("reg_UFPT_NB_UPDATE [%d] (%d) is > at size_ufpt_queue (%d).\n"),i,reg_UFPT_NB_UPDATE [i],_param->_size_ufpt_queue[i])); |
---|
[88] | 1240 | } |
---|
[108] | 1241 | #endif |
---|
[81] | 1242 | |
---|
[108] | 1243 | } |
---|
[81] | 1244 | |
---|
[108] | 1245 | |
---|
[78] | 1246 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
---|
| 1247 | end_cycle (); |
---|
| 1248 | #endif |
---|
[88] | 1249 | |
---|
| 1250 | log_end(Update_Prediction_Table,FUNCTION); |
---|
[78] | 1251 | }; |
---|
| 1252 | |
---|
| 1253 | }; // end namespace update_prediction_table |
---|
| 1254 | }; // end namespace prediction_unit |
---|
| 1255 | }; // end namespace front_end |
---|
| 1256 | }; // end namespace multi_front_end |
---|
| 1257 | }; // end namespace core |
---|
| 1258 | |
---|
| 1259 | }; // end namespace behavioural |
---|
| 1260 | }; // end namespace morpheo |
---|
| 1261 | #endif |
---|