- Timestamp:
- May 25, 2009, 7:40:26 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo
- Files:
-
- 2 added
- 50 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Icache_Access/src/Icache_Access_genMealy_req.cpp
r117 r119 44 44 uint32_t num_front_end = it->grp; 45 45 uint32_t num_context = it->elt; 46 47 log_printf(TRACE,Dcache_Access,FUNCTION," * Context [%d][%d]",num_front_end, num_context); 48 46 49 47 50 if (PORT_READ(in_CONTEXT_REQ_VAL [num_front_end][num_context])) … … 50 53 Tcontrol_t icache_req_ack = PORT_READ(in_ICACHE_REQ_ACK [num_port]); 51 54 52 log_printf(TRACE,Dcache_Access,FUNCTION," * num_port : %d",num_port); 55 log_printf(TRACE,Dcache_Access,FUNCTION," * context have request"); 56 log_printf(TRACE,Dcache_Access,FUNCTION," * num_port : %d",num_port); 57 log_printf(TRACE,Dcache_Access,FUNCTION," * icache_req_val: %d",icache_req_val [num_port]); 53 58 54 59 #ifdef STATISTICS … … 65 70 context_req_ack [num_front_end][num_context] = icache_req_ack; 66 71 67 log_printf(TRACE,Dcache_Access,FUNCTION," * kane - icache");68 69 72 if (_param->_have_port_icache_thread_id) 70 73 { 71 74 Tcontext_t num_thread = _param->_translate_context_to_thread[num_front_end][num_context]; 72 log_printf(TRACE,Dcache_Access,FUNCTION," * num_context : %d",num_context);73 75 log_printf(TRACE,Dcache_Access,FUNCTION," * num_thread : %d",num_thread ); 74 76 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h
r111 r119 136 136 // ---------------------------------------------------------- 137 137 138 // HAVE_DCACHE_RSP MUST_CHECK STD::DECOD_BARRIER138 // HAVE_DCACHE_RSP MUST_CHECK DECOD_BARRIER 139 139 // OPERATION_MEMORY_LOAD X X - 140 140 // OPERATION_MEMORY_LOCK - - - 141 // OPERATION_MEMORY_INVALIDATE - - X 141 // OPERATION_MEMORY_INVALIDATE - - X (mtspr) 142 142 // OPERATION_MEMORY_PREFETCH - - - 143 // OPERATION_MEMORY_FLUSH - - X 144 // OPERATION_MEMORY_SYNCHRONIZATION X - X 143 // OPERATION_MEMORY_FLUSH - - X (mtspr) 144 // OPERATION_MEMORY_SYNCHRONIZATION X - X (msync, psync, csync) 145 145 146 146 #define have_dcache_rsp(x) (is_operation_memory_load(x) or (x==OPERATION_MEMORY_SYNCHRONIZATION)) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r118 r119 255 255 else 256 256 { 257 // load_queue_push if speculative_access_queue have access at the dcache, or they have an event 258 bool load_queue_push = (_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._state == SPECULATIVE_ACCESS_QUEUE_WAIT_LOAD_QUEUE); 259 257 260 //================================================================ 258 261 // Interface "MEMORY_OUT" … … 898 901 899 902 _speculative_access_queue [index]._exception = exception; 900 901 log_printf(TRACE,Load_store_unit,FUNCTION," * index : %d",index);902 903 } 903 904 } … … 906 907 // Interface "DCACHE_REQ" 907 908 //================================================================ 908 bool load_queue_push = (_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._state == SPECULATIVE_ACCESS_QUEUE_WAIT_LOAD_QUEUE);909 910 909 if (( internal_DCACHE_REQ_VAL == 1) and 911 910 (PORT_READ(in_DCACHE_REQ_ACK[0]) == 1)) … … 948 947 if (load_queue_push) 949 948 { 949 log_printf(TRACE,Load_store_unit,FUNCTION," * load_queue_push"); 950 950 951 Tlsq_ptr_t ptr_write = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._load_queue_ptr_write; 951 952 Toperation_t operation = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._operation; 952 953 Texception_t exception = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._exception; 953 954 bool have_exception = (exception != EXCEPTION_MEMORY_NONE); 955 bool need_check= false; 954 956 955 957 if (have_exception) … … 963 965 { 964 966 // load 967 need_check = true; 965 968 _load_queue [ptr_write]._state = LOAD_QUEUE_WAIT_CHECK; 966 969 } … … 1020 1023 1021 1024 // Only load need check 1022 if (is_operation_memory_load(_load_queue [ptr_write]._operation)) 1025 if (need_check) 1026 // if (is_operation_memory_load(_load_queue [ptr_write]._operation)) 1023 1027 { 1024 1028 log_printf(TRACE,Load_store_unit,FUNCTION," * update nb_check"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/SelfTest/src/test.cpp
r112 r119 56 56 ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ," in_BRANCH_EVENT_ADDRESS_DEST_VAL ",Tcontrol_t ,_param->_nb_context); 57 57 ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ," in_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); 58 ALLOC1_SC_SIGNAL( in_BRANCH_EVENT_CAN_CONTINUE ," in_BRANCH_EVENT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_context); 58 59 59 60 ALLOC1_SC_SIGNAL( in_DECOD_EVENT_VAL ," in_DECOD_EVENT_VAL ",Tcontrol_t ,_param->_nb_decod_unit); … … 97 98 ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT ,"out_EVENT_ADDRESS_NEXT ",Taddress_t ,_param->_nb_context ); 98 99 ALLOC1_SC_SIGNAL(out_EVENT_ADDRESS_NEXT_VAL ,"out_EVENT_ADDRESS_NEXT_VAL ",Tcontrol_t ,_param->_nb_context ); 100 ALLOC1_SC_SIGNAL(out_EVENT_FLUSH_ONLY ,"out_EVENT_FLUSH_ONLY ",Tcontrol_t ,_param->_nb_context ); 99 101 ALLOC1_SC_SIGNAL(out_EVENT_IS_DS_TAKE ,"out_EVENT_IS_DS_TAKE ",Tcontrol_t ,_param->_nb_context ); 100 102 ALLOC1_SC_SIGNAL(out_EVENT_TYPE ,"out_EVENT_TYPE ",Tevent_type_t,_param->_nb_context ); 101 103 ALLOC1_SC_SIGNAL(out_EVENT_DEPTH ,"out_EVENT_DEPTH ",Tdepth_t ,_param->_nb_context ); 104 ALLOC1_SC_SIGNAL(out_EVENT_FLUSH_ONLY ,"out_EVENT_FLUSH_ONLY ",Tcontrol_t ,_param->_nb_context ); 102 105 103 106 ALLOC1_SC_SIGNAL(out_SPR_EVENT_VAL ,"out_SPR_EVENT_VAL ",Tcontrol_t ,_param->_nb_context ); … … 136 139 INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); 137 140 INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); 141 INSTANCE1_SC_SIGNAL(_Context_State, in_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context); 142 138 143 INSTANCE1_SC_SIGNAL(_Context_State, in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); 139 144 INSTANCE1_SC_SIGNAL(_Context_State,out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); … … 185 190 if (_param->_have_port_depth) 186 191 INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_DEPTH ,_param->_nb_context ); 192 INSTANCE1_SC_SIGNAL(_Context_State,out_EVENT_FLUSH_ONLY ,_param->_nb_context ); 187 193 188 194 INSTANCE1_SC_SIGNAL(_Context_State,out_SPR_EVENT_VAL ,_param->_nb_context ); … … 399 405 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 400 406 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 407 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 401 408 402 409 find = true; … … 477 484 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 478 485 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 486 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 479 487 480 488 find = true; … … 582 590 in_BRANCH_EVENT_ADDRESS_SRC [port]->write(0x400); 583 591 in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x500); 584 in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(0); 592 in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(0); 593 in_BRANCH_EVENT_CAN_CONTINUE [port]->write(0); 585 594 586 595 TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); … … 623 632 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 624 633 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 634 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 625 635 626 636 find = true; … … 672 682 in_BRANCH_EVENT_ADDRESS_DEST [port]->write(0x700); 673 683 in_BRANCH_EVENT_ADDRESS_DEST_VAL [port]->write(1); 684 in_BRANCH_EVENT_CAN_CONTINUE [port]->write(0); 674 685 675 686 TEST(Tcontrol_t, out_CONTEXT_DECOD_ENABLE[context]->read(), 1); … … 711 722 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),1); 712 723 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),1); 724 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 713 725 714 726 find = true; … … 779 791 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 780 792 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 793 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 781 794 782 795 find = true; … … 873 886 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 874 887 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 888 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 875 889 876 890 find = true; … … 968 982 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 969 983 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 984 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 970 985 971 986 find = true; … … 1063 1078 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 1064 1079 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 1080 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 1065 1081 1066 1082 find = true; … … 1158 1174 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 1159 1175 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 1176 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 1160 1177 1161 1178 find = true; … … 1253 1270 TEST(Tcontrol_t,out_EVENT_ADDRESS_NEXT_VAL [context]->read(),0); 1254 1271 TEST(Tcontrol_t,out_EVENT_IS_DS_TAKE [context]->read(),0); 1272 TEST(Tcontrol_t,out_EVENT_FLUSH_ONLY [context]->read(),0); 1255 1273 1256 1274 find = true; … … 1315 1333 DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); 1316 1334 DELETE1_SC_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); 1335 DELETE1_SC_SIGNAL( in_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context); 1336 1317 1337 DELETE1_SC_SIGNAL( in_DECOD_EVENT_VAL ,_param->_nb_decod_unit); 1318 1338 DELETE1_SC_SIGNAL(out_DECOD_EVENT_ACK ,_param->_nb_decod_unit); … … 1353 1373 DELETE1_SC_SIGNAL(out_EVENT_TYPE ,_param->_nb_context ); 1354 1374 DELETE1_SC_SIGNAL(out_EVENT_DEPTH ,_param->_nb_context ); 1375 DELETE1_SC_SIGNAL(out_EVENT_FLUSH_ONLY ,_param->_nb_context ); 1355 1376 DELETE1_SC_SIGNAL(out_SPR_EVENT_VAL ,_param->_nb_context ); 1356 1377 DELETE1_SC_SIGNAL( in_SPR_EVENT_ACK ,_param->_nb_context ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Context_State.h
r111 r119 72 72 public : SC_IN (Tcontrol_t ) ** in_BRANCH_EVENT_ADDRESS_DEST_VAL ;//[nb_context]// take or not 73 73 public : SC_IN (Taddress_t ) ** in_BRANCH_EVENT_ADDRESS_DEST ;//[nb_context] 74 public : SC_IN (Tcontrol_t ) ** in_BRANCH_EVENT_CAN_CONTINUE ;//[nb_context] 74 75 75 76 // ~~~~~[ Interface : "decod_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 120 121 public : SC_OUT(Tevent_type_t ) ** out_EVENT_TYPE ;//[nb_context] 121 122 public : SC_OUT(Tdepth_t ) ** out_EVENT_DEPTH ;//[nb_context] 123 public : SC_OUT(Tcontrol_t ) ** out_EVENT_FLUSH_ONLY ;//[nb_context] 122 124 123 125 // ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 155 157 private : Tcontrol_t * reg_EVENT_IS_DS_TAKE ;//[nb_context] 156 158 private : Tdepth_t * reg_EVENT_DEPTH ;//[nb_context] 159 private : Tcontrol_t * reg_EVENT_FLUSH_ONLY ;//[nb_context] 157 160 private : Tcontrol_t * reg_INTERRUPT_ENABLE ;//[nb_context] 158 161 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/include/Types.h
r117 r119 29 29 CONTEXT_STATE_KO_EXCEP_ADDR , // update address manager 30 30 CONTEXT_STATE_KO_EXCEP_SPR , // update spr (epc, esr, sr[DSX]) 31 // CONTEXT_STATE_KO_MISS_BRANCH_FAST_ADDR , // update address manager 32 // CONTEXT_STATE_KO_MISS_BRANCH_FAST_WAIT_UPDATE , // branch is complete, wait update by update_prediction_table 31 33 CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE , // branch is complete, wait update by update_prediction_table 32 34 CONTEXT_STATE_KO_MISS_BRANCH_ADDR , // update address manager … … 66 68 case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_ADDR : return "context_state_ko_excep_addr" ; break; 67 69 case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_EXCEP_SPR : return "context_state_ko_excep_spr" ; break; 70 // case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_FAST_WAIT_UPDATE : return "context_state_ko_miss_branch_fast_wait_update" ; break; 71 // case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_FAST_ADDR : return "context_state_ko_miss_branch_fast_addr" ; break; 68 72 case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE : return "context_state_ko_miss_branch_wait_update" ; break; 69 73 case morpheo::behavioural::core::multi_front_end::front_end::context_state::CONTEXT_STATE_KO_MISS_BRANCH_ADDR : return "context_state_ko_miss_branch_addr" ; break; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp
r112 r119 68 68 ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,"address_dest_val" ,Tcontrol_t ,1); 69 69 ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_ADDRESS_DEST ,"address_dest" ,Taddress_t ,_param->_size_instruction_address); 70 ALLOC1_SIGNAL_IN ( in_BRANCH_EVENT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1); 70 71 71 72 ALLOC1_INTERFACE_END(_param->_nb_context); … … 146 147 ALLOC1_SIGNAL_OUT(out_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type); 147 148 ALLOC1_SIGNAL_OUT(out_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); 149 ALLOC1_SIGNAL_OUT(out_EVENT_FLUSH_ONLY ,"flush_only" ,Tcontrol_t ,1); 148 150 149 151 ALLOC1_INTERFACE_END(_param->_nb_context); … … 216 218 ALLOC1(reg_EVENT_IS_DS_TAKE ,Tcontrol_t ,_param->_nb_context); 217 219 ALLOC1(reg_EVENT_DEPTH ,Tdepth_t ,_param->_nb_context); 220 ALLOC1(reg_EVENT_FLUSH_ONLY ,Tcontrol_t ,_param->_nb_context); 218 221 ALLOC1(reg_INTERRUPT_ENABLE ,Tcontrol_t ,_param->_nb_context); 219 222 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_deallocation.cpp
r112 r119 36 36 DELETE1_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context,1); 37 37 DELETE1_SIGNAL( in_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context,_param->_size_instruction_address); 38 DELETE1_SIGNAL( in_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context,1); 38 39 39 40 DELETE1_SIGNAL( in_DECOD_EVENT_VAL ,_param->_nb_decod_unit,1); … … 79 80 DELETE1_SIGNAL(out_EVENT_TYPE ,_param->_nb_context,_param->_size_event_type); 80 81 DELETE1_SIGNAL(out_EVENT_DEPTH ,_param->_nb_context,_param->_size_depth); 82 DELETE1_SIGNAL(out_EVENT_FLUSH_ONLY ,_param->_nb_context,1); 81 83 82 84 DELETE1_SIGNAL(out_SPR_EVENT_VAL ,_param->_nb_context,1); … … 107 109 DELETE1(reg_EVENT_IS_DS_TAKE ,_param->_nb_context); 108 110 DELETE1(reg_EVENT_DEPTH ,_param->_nb_context); 111 DELETE1(reg_EVENT_FLUSH_ONLY ,_param->_nb_context); 109 112 DELETE1(reg_INTERRUPT_ENABLE ,_param->_nb_context); 110 113 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_genMoore.cpp
r111 r119 50 50 Tevent_type_t type ;//[nb_context] 51 51 Tdepth_t depth = reg_EVENT_DEPTH [i]; 52 Tcontrol_t flush_only = reg_EVENT_FLUSH_ONLY [i]; 52 53 53 54 switch (state) … … 74 75 if (_param->_have_port_depth) 75 76 PORT_WRITE(out_EVENT_DEPTH [i], depth); 77 PORT_WRITE(out_EVENT_FLUSH_ONLY [i], flush_only); 76 78 77 79 log_printf(TRACE,Context_State,FUNCTION," * EVENT Context : %d", i); … … 83 85 log_printf(TRACE,Context_State,FUNCTION," * TYPE : %d", type); 84 86 log_printf(TRACE,Context_State,FUNCTION," * DEPTH : %d", depth); 87 log_printf(TRACE,Context_State,FUNCTION," * FLUSH_ONLY : %d", flush_only); 85 88 } 86 89 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_transition.cpp
r117 r119 328 328 else 329 329 { 330 reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_WAITEND; //@@@ TODO : make MISS fast (miss decod) 331 332 Tcontrol_t dest_val = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST_VAL[i]); 333 reg_EVENT_ADDRESS [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_SRC [i])+1; // address delay slot 334 reg_EVENT_ADDRESS_EPCR [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST [i]); // address_next 335 reg_EVENT_ADDRESS_EPCR_VAL [i] = dest_val; 336 //reg_EVENT_ADDRESS_EEAR [i] = 0; 337 reg_EVENT_ADDRESS_EEAR_VAL [i] = 0; 338 reg_EVENT_IS_DELAY_SLOT [i] = 1; 339 reg_EVENT_IS_DS_TAKE [i] = dest_val; 340 reg_EVENT_DEPTH [i] = depth; 330 Tcontrol_t can_continue = PORT_READ(in_BRANCH_EVENT_CAN_CONTINUE [i]); 331 Tcontrol_t dest_val = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST_VAL[i]); 332 333 log_printf(TRACE,Context_State,FUNCTION," * dest_val : %d",dest_val ); 334 log_printf(TRACE,Context_State,FUNCTION," * can_continue: %d",can_continue); 335 336 if (can_continue) 337 reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; 338 else 339 reg_STATE [i] = CONTEXT_STATE_KO_MISS_BRANCH_WAITEND; 340 341 reg_EVENT_ADDRESS [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_SRC [i])+1; // address delay slot 342 reg_EVENT_ADDRESS_EPCR [i] = PORT_READ(in_BRANCH_EVENT_ADDRESS_DEST [i]); // address_next 343 reg_EVENT_ADDRESS_EPCR_VAL [i] = dest_val; 344 //reg_EVENT_ADDRESS_EEAR [i] = 0; 345 reg_EVENT_ADDRESS_EEAR_VAL [i] = 0; 346 reg_EVENT_IS_DELAY_SLOT [i] = 1; 347 reg_EVENT_IS_DS_TAKE [i] = dest_val; 348 reg_EVENT_DEPTH [i] = depth; 349 reg_EVENT_FLUSH_ONLY [i] = can_continue; 341 350 } 342 351 } … … 363 372 Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur-depth_min):((depth_cur+depth_max-depth_min)); 364 373 Tdepth_t depth1 = (depth >=depth_min)?(depth -depth_min):((depth +depth_max-depth_min)); 365 // 366 // 374 // Tdepth_t depth0 = (depth_cur>=depth_min)?(depth_cur):((depth_cur+depth_max)); 375 // Tdepth_t depth1 = (depth >=depth_min)?(depth ):((depth +depth_max)); 367 376 368 377 // priority : miss_load > miss_branch > excep > spr/sync … … 390 399 if (is_valid) 391 400 { 392 // reg_STATE [context_id] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; 393 reg_STATE [context_id] = CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE; 394 reg_EVENT_DEPTH [context_id] = depth; 401 // reg_STATE [context_id] = CONTEXT_STATE_KO_MISS_BRANCH_ADDR; 402 reg_STATE [context_id] = CONTEXT_STATE_KO_MISS_BRANCH_WAIT_UPDATE; 403 reg_EVENT_DEPTH [context_id] = depth; 404 reg_EVENT_FLUSH_ONLY [context_id] = false; 395 405 } 396 406 } … … 524 534 //reg_EVENT_IS_DS_TAKE [context] = 0; 525 535 reg_EVENT_DEPTH [context] = depth; 536 reg_EVENT_FLUSH_ONLY [context] = false; 526 537 } 527 538 } … … 635 646 reg_EVENT_IS_DS_TAKE [context] = 0; 636 647 reg_EVENT_DEPTH [context] = depth; 648 reg_EVENT_FLUSH_ONLY [context] = false; 637 649 } 638 650 } … … 679 691 log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_IS_DS_TAKE : %d" ,reg_EVENT_IS_DS_TAKE [i]); 680 692 log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_DEPTH : %d" ,reg_EVENT_DEPTH [i]); 693 log_printf(TRACE,Context_State,FUNCTION," * reg_EVENT_FLUSH_ONLY : %d" ,reg_EVENT_FLUSH_ONLY [i]); 681 694 } 682 695 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp
r110 r119 63 63 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 64 64 { 65 log_printf(TRACE,Decod,FUNCTION," * DECOD [%d]",i); 66 65 67 while ((it != select->end()) and // have a no scanned "slot_in" ? 66 68 (decod_val [i] == false) and // have not a previous selected entry? … … 72 74 uint32_t y = it->elt; 73 75 76 log_printf(TRACE,Decod,FUNCTION," * IFETCH [%d][%d]",x,y); 77 log_printf(TRACE,Decod,FUNCTION," * in_IFETCH_VAL : %d",PORT_READ(in_IFETCH_VAL [x][y])); 78 log_printf(TRACE,Decod,FUNCTION," * can_continue : %d",can_continue [x] ); 79 74 80 // Test if this instruction is valid 75 81 if ((PORT_READ(in_IFETCH_VAL [x][y]) == 1) and // entry is valid 76 82 (can_continue [x] == 1)) // context can decod instruction (have not a previous event) 77 83 { 78 log_printf(TRACE,Decod,FUNCTION," * IFETCH [%d][%d]",x,y); 79 log_printf(TRACE,Decod,FUNCTION," * decod_ack [%d] : %d",i,PORT_READ(in_DECOD_ACK [i])); 84 log_printf(TRACE,Decod,FUNCTION," * decod_ack : %d",PORT_READ(in_DECOD_ACK [i])); 80 85 81 86 decod_val [i] = true; // fetch_val and decod_enable … … 97 102 { 98 103 // Decod ! 99 log_printf(TRACE,Decod,FUNCTION," * DECOD [%d]",i); 100 log_printf(TRACE,Decod,FUNCTION," * context : %d",x); 101 log_printf(TRACE,Decod,FUNCTION," * fetch : %d",y); 102 log_printf(TRACE,Decod,FUNCTION," * address : %.8x (%.8x)",addr,(addr<<2)); 103 log_printf(TRACE,Decod,FUNCTION," * is_delay_slot : %d",internal_CONTEXT_IS_DELAY_SLOT [x]); 104 log_printf(TRACE,Decod,FUNCTION," * address : %.8x (%.8x)",addr,(addr<<2)); 105 log_printf(TRACE,Decod,FUNCTION," * is_delay_slot : %d",internal_CONTEXT_IS_DELAY_SLOT [x]); 104 106 105 107 instruction_decod (_decod_instruction, _decod_param[x]); 106 108 107 log_printf(TRACE,Decod,FUNCTION," * address_next: %.8x (%.8x)",_decod_instruction->_address_next,(_decod_instruction->_address_next<<2));109 log_printf(TRACE,Decod,FUNCTION," * address_next : %.8x (%.8x)",_decod_instruction->_address_next,(_decod_instruction->_address_next<<2)); 108 110 } 109 111 else … … 166 168 167 169 // Branch predictor can accept : the depth is valid 168 log_printf(TRACE,Decod,FUNCTION," * context_depth_val: %d",PORT_READ(in_CONTEXT_DEPTH_VAL [x]));170 log_printf(TRACE,Decod,FUNCTION," * context_depth_val : %d",PORT_READ(in_CONTEXT_DEPTH_VAL [x])); 169 171 decod_val [i] &= PORT_READ(in_CONTEXT_DEPTH_VAL [x]); 170 172 ifetch_ack [x][y] &= PORT_READ(in_CONTEXT_DEPTH_VAL [x]); … … 172 174 if (type == TYPE_BRANCH) 173 175 { 174 log_printf(TRACE,Decod,FUNCTION," * typeis branch");175 log_printf(TRACE,Decod,FUNCTION," * predict_val: %d",ifetch_ack [x][y]);176 log_printf(TRACE,Decod,FUNCTION," * predict_ack: %d",PORT_READ(in_PREDICT_ACK [i]));177 178 log_printf(TRACE,Decod,FUNCTION," * address src: %.8x (%.8x)",_decod_instruction->_address ,_decod_instruction->_address <<2);179 log_printf(TRACE,Decod,FUNCTION," * address dest: %.8x (%.8x)",_decod_instruction->_address_next,_decod_instruction->_address_next<<2);176 log_printf(TRACE,Decod,FUNCTION," * Instruction is branch"); 177 log_printf(TRACE,Decod,FUNCTION," * predict_val : %d",ifetch_ack [x][y]); 178 log_printf(TRACE,Decod,FUNCTION," * predict_ack : %d",PORT_READ(in_PREDICT_ACK [i])); 179 180 log_printf(TRACE,Decod,FUNCTION," * address src : %.8x (%.8x)",_decod_instruction->_address ,_decod_instruction->_address <<2); 181 log_printf(TRACE,Decod,FUNCTION," * address dest : %.8x (%.8x)",_decod_instruction->_address_next,_decod_instruction->_address_next<<2); 180 182 181 183 // test if have already decod an branch : one branch per context … … 207 209 if (event_type != EVENT_TYPE_NONE) 208 210 { 211 log_printf(TRACE,Decod,FUNCTION," * Instruction make an EVENT (%s)",toString(event_type).c_str()); 212 log_printf(TRACE,Decod,FUNCTION," * context_event_ack : %d",PORT_READ(in_CONTEXT_EVENT_ACK)); 213 209 214 // speculative jump at the exception handler 210 215 // if type = TYPE_BRANCH, also event_type == EVENT_TYPE_NONE … … 243 248 244 249 log_printf(TRACE,Decod,FUNCTION," - num_(decod, context, fetch) : %d %d %d",i, x, y); 245 log_printf(TRACE,Decod,FUNCTION," - ifetch_ack : %d",ifetch_ack [x][y]);246 log_printf(TRACE,Decod,FUNCTION," - context_event_val : %d",context_event_val );247 log_printf(TRACE,Decod,FUNCTION," - predict_val : %d",predict_val [i] );248 log_printf(TRACE,Decod,FUNCTION," - decod_val : %d",decod_val [i] );250 log_printf(TRACE,Decod,FUNCTION," - ifetch_ack : %d",ifetch_ack [x][y]); 251 log_printf(TRACE,Decod,FUNCTION," - context_event_val : %d",context_event_val ); 252 log_printf(TRACE,Decod,FUNCTION," - predict_val : %d",predict_val [i] ); 253 log_printf(TRACE,Decod,FUNCTION," - decod_val : %d",decod_val [i] ); 249 254 250 255 it ++; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/SelfTest/src/test.cpp
r112 r119 87 87 ALLOC1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_TYPE ," in_EVENT_CONTEXT_STATE_TYPE ",Tevent_type_t,_param->_nb_context); 88 88 ALLOC1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_DEPTH ," in_EVENT_CONTEXT_STATE_DEPTH ",Tdepth_t ,_param->_nb_context); 89 ALLOC1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_FLUSH_ONLY ," in_EVENT_CONTEXT_STATE_FLUSH_ONLY ",Tcontrol_t,_param->_nb_context); 89 90 90 91 ALLOC1_SC_SIGNAL(out_DEPTH_CURRENT ,"out_DEPTH_CURRENT ",Tdepth_t ,_param->_nb_context); … … 161 162 if (_param->_have_port_depth) 162 163 INSTANCE1_SC_SIGNAL(_Front_end_Glue, in_EVENT_CONTEXT_STATE_DEPTH ,_param->_nb_context); 164 INSTANCE1_SC_SIGNAL(_Front_end_Glue, in_EVENT_CONTEXT_STATE_FLUSH_ONLY ,_param->_nb_context); 163 165 164 166 INSTANCE1_SC_SIGNAL(_Front_end_Glue, in_DEPTH_PREDICTION_UNIT_VAL ,_param->_nb_context); … … 273 275 DELETE1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_TYPE ,_param->_nb_context); 274 276 DELETE1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_DEPTH ,_param->_nb_context); 277 DELETE1_SC_SIGNAL( in_EVENT_CONTEXT_STATE_FLUSH_ONLY ,_param->_nb_context); 275 278 276 279 DELETE1_SC_SIGNAL(out_DEPTH_MIN ,_param->_nb_context); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/include/Front_end_Glue.h
r108 r119 111 111 public : SC_IN (Tevent_type_t ) ** in_EVENT_CONTEXT_STATE_TYPE ;//[nb_context] 112 112 public : SC_IN (Tdepth_t ) ** in_EVENT_CONTEXT_STATE_DEPTH ;//[nb_context] 113 public : SC_IN (Tcontrol_t ) ** in_EVENT_CONTEXT_STATE_FLUSH_ONLY ;//[nb_context] 113 114 114 115 // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue.cpp
r108 r119 147 147 << (*( in_EVENT_CONTEXT_STATE_ADDRESS_NEXT_VAL [i])) 148 148 << (*( in_EVENT_CONTEXT_STATE_IS_DS_TAKE [i])) 149 << (*( in_EVENT_CONTEXT_STATE_TYPE [i])); 149 << (*( in_EVENT_CONTEXT_STATE_TYPE [i])) 150 << (*( in_EVENT_CONTEXT_STATE_FLUSH_ONLY [i])) 151 ; 150 152 if (_param->_have_port_depth) 151 153 sensitive << (*( in_EVENT_CONTEXT_STATE_DEPTH [i])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_allocation.cpp
r112 r119 125 125 ALLOC1_SIGNAL_IN ( in_EVENT_CONTEXT_STATE_TYPE ,"CONTEXT_STATE_TYPE" ,Tevent_type_t ,_param->_size_event_type); 126 126 ALLOC1_SIGNAL_IN ( in_EVENT_CONTEXT_STATE_DEPTH ,"CONTEXT_STATE_DEPTH" ,Tdepth_t ,_param->_size_depth); 127 ALLOC1_SIGNAL_IN ( in_EVENT_CONTEXT_STATE_FLUSH_ONLY ,"CONTEXT_STATE_FLUSH_ONLY" ,Tcontrol_t ,1); 127 128 128 129 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_deallocation.cpp
r108 r119 69 69 DELETE1_SIGNAL( in_EVENT_CONTEXT_STATE_TYPE ,_param->_nb_context,_param->_size_event_type); 70 70 DELETE1_SIGNAL( in_EVENT_CONTEXT_STATE_DEPTH ,_param->_nb_context,_param->_size_depth); 71 DELETE1_SIGNAL( in_EVENT_CONTEXT_STATE_FLUSH_ONLY ,_param->_nb_context,1); 71 72 72 73 DELETE1_SIGNAL(out_DEPTH_MIN ,_param->_nb_context,_param->_size_depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Front_end_Glue/src/Front_end_Glue_genMealy_event.cpp
r97 r119 49 49 PORT_WRITE(out_EVENT_PREDICTION_UNIT_DEPTH [i],depth); 50 50 } 51 Tcontrol_t flush_only = PORT_READ(in_EVENT_CONTEXT_STATE_FLUSH_ONLY [i]); 51 52 52 53 … … 56 57 Tcontrol_t context_state_val = PORT_READ(in_EVENT_CONTEXT_STATE_VAL [i]); 57 58 58 Tcontrol_t val = (//ack and 59 Tcontrol_t val = ( not flush_only and 60 //ack and 59 61 ifetch_unit_ack and 60 62 prediction_unit_ack and 61 context_state_val 63 context_state_val 64 62 65 ); 63 Tcontrol_t ifetch_unit_val = ( ack and 66 // Tcontrol_t ifetch_unit_val = ( ack and 67 // //ifetch_unit_ack and 68 // prediction_unit_ack and 69 // context_state_val 70 // ); 71 Tcontrol_t ifetch_unit_val = ( ( 72 flush_only or 73 ack ) and 64 74 //ifetch_unit_ack and 65 75 prediction_unit_ack and 66 context_state_val 76 context_state_val 67 77 ); 68 Tcontrol_t prediction_unit_val = ( ack and 78 79 // Tcontrol_t prediction_unit_val = ( ack and 80 // ifetch_unit_ack and 81 // //prediction_unit_ack and 82 // context_state_val 83 // ); 84 85 Tcontrol_t prediction_unit_val = ( ( 86 flush_only or 87 ack ) and 69 88 ifetch_unit_ack and 70 89 //prediction_unit_ack and 71 context_state_val 90 context_state_val 72 91 ); 92 93 73 94 Tcontrol_t context_state_ack = ( ack and 74 95 ifetch_unit_ack and … … 97 118 log_printf(TRACE,Front_end_Glue,FUNCTION," * address_next_val : %d",address_next_val); 98 119 log_printf(TRACE,Front_end_Glue,FUNCTION," * is_ds_take : %d",is_ds_take ); 120 log_printf(TRACE,Front_end_Glue,FUNCTION," * flush_only : %d",flush_only ); 99 121 } 100 122 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp
r111 r119 189 189 reg_PC_NEXT_IS_DS_TAKE = PORT_READ(in_EVENT_IS_DS_TAKE); 190 190 // reg_PC_NEXT_INST_IFETCH_PTR = 0; 191 //reg_PC_NEXT_BRANCH_STATE = BRANCH_STATE_NONE;191 reg_PC_NEXT_BRANCH_STATE = BRANCH_STATE_NONE; 192 192 // reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = 0; 193 193 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp
r88 r119 26 26 // =====[ ADDRESS ]========================================== 27 27 // ========================================================== 28 internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); 29 30 PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); 31 if (_param->_have_port_ifetch_queue_ptr) 32 PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); 28 { 29 internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY); 30 31 PORT_WRITE(out_ADDRESS_ACK , internal_ADDRESS_ACK); 32 if (_param->_have_port_ifetch_queue_ptr) 33 PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE); 34 } 33 35 34 36 // ========================================================== 35 37 // =====[ DECOD ]============================================ 36 38 // ========================================================== 37 bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP); 38 39 for (uint32_t i=0; i<_param->_nb_instruction; i++) 40 { 41 internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i]; 42 PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); 43 PORT_WRITE(out_DECOD_INSTRUCTION [i], _queue[reg_PTR_READ]->_instruction [i]); 44 } 45 46 PORT_WRITE(out_DECOD_ADDRESS , _queue[reg_PTR_READ]->_address ); 47 if (_param->_have_port_inst_ifetch_ptr) 48 PORT_WRITE(out_DECOD_INST_IFETCH_PTR , _queue[reg_PTR_READ]->_inst_ifetch_ptr ); 49 PORT_WRITE(out_DECOD_BRANCH_STATE , _queue[reg_PTR_READ]->_branch_state ); 50 if (_param->_have_port_depth) 51 PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID, _queue[reg_PTR_READ]->_branch_update_prediction_id); 52 PORT_WRITE(out_DECOD_EXCEPTION , _queue[reg_PTR_READ]->_exception ); 39 { 40 bool ack = (_queue[reg_PTR_READ]->_state == IFETCH_QUEUE_STATE_HAVE_RSP); 41 42 for (uint32_t i=0; i<_param->_nb_instruction; i++) 43 { 44 internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i]; 45 PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]); 46 PORT_WRITE(out_DECOD_INSTRUCTION [i], _queue[reg_PTR_READ]->_instruction [i]); 47 } 48 49 PORT_WRITE(out_DECOD_ADDRESS , _queue[reg_PTR_READ]->_address ); 50 if (_param->_have_port_inst_ifetch_ptr) 51 PORT_WRITE(out_DECOD_INST_IFETCH_PTR , _queue[reg_PTR_READ]->_inst_ifetch_ptr ); 52 PORT_WRITE(out_DECOD_BRANCH_STATE , _queue[reg_PTR_READ]->_branch_state ); 53 if (_param->_have_port_depth) 54 PORT_WRITE(out_DECOD_BRANCH_UPDATE_PREDICTION_ID, _queue[reg_PTR_READ]->_branch_update_prediction_id); 55 PORT_WRITE(out_DECOD_EXCEPTION , _queue[reg_PTR_READ]->_exception ); 56 } 53 57 54 58 log_printf(FUNC,Ifetch_queue,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp
r101 r119 23 23 { 24 24 log_begin(Ifetch_queue,FUNCTION); 25 log_function(Ifetch_queue,FUNCTION,_name.c_str()); 25 26 26 27 if (PORT_READ(in_NRESET) == 0) … … 39 40 if (PORT_READ(in_ADDRESS_VAL) and internal_ADDRESS_ACK) 40 41 { 42 log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : Transaction"); 43 log_printf(TRACE,Ifetch_queue,FUNCTION," * reg_PTR_WRITE : %d",reg_PTR_WRITE); 44 log_printf(TRACE,Ifetch_queue,FUNCTION," * ADDRESS : 0x%x",PORT_READ(in_ADDRESS_INSTRUCTION_ADDRESS)); 45 41 46 // New slot in ifetch_queue is allocated 42 47 … … 75 80 if (internal_DECOD_VAL [i] and PORT_READ(in_DECOD_ACK[i])) 76 81 { 82 log_printf(TRACE,Ifetch_queue,FUNCTION," * DECOD [%d] : Transaction",i); 83 77 84 have_instruction_decod = true; 78 85 _queue[reg_PTR_READ]->_instruction_enable [i] = false; … … 94 101 if (PORT_READ(in_ICACHE_RSP_VAL) and internal_ICACHE_RSP_ACK) 95 102 { 103 log_printf(TRACE,Ifetch_queue,FUNCTION," * ICACHE_RSP : Transaction"); 104 96 105 Tpacket_t ptr = (_param->_have_port_ifetch_queue_ptr)?PORT_READ(in_ICACHE_RSP_PACKET_ID):0; 97 106 … … 119 128 if (PORT_READ(in_EVENT_RESET_VAL) and internal_EVENT_RESET_ACK) 120 129 { 130 log_printf(TRACE,Ifetch_queue,FUNCTION," * EVENT_RESET : Transaction"); 131 121 132 // Scan all entry of queue and test the status 122 133 for (uint32_t i=0; i<_param->_size_queue; i++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_genMealy_predict.cpp
r115 r119 1 1 2 #ifdef SYSTEMC 2 3 /* … … 8 9 9 10 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h" 11 // #include <assert.h> 10 12 11 13 namespace morpheo { … … 46 48 { 47 49 Thistory_t bht_num_reg = address & _param->_bht_address_mask; 50 51 // #ifdef DEBUG_TEST 52 // assert(bht_num_reg < _param->_bht_nb_shifter); 53 // #endif 54 48 55 Thistory_t bht_history = reg_BHT [bht_num_reg]; 49 56 pht_bht_history = bht_history; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_transition.cpp
r115 r119 8 8 9 9 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h" 10 // #include <assert.h> 10 11 11 12 namespace morpheo { … … 53 54 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_num_reg : %d",bht_num_reg); 54 55 56 // #ifdef DEBUG_TEST 57 // assert(bht_num_reg < _param->_bht_nb_shifter); 58 // #endif 59 55 60 Thistory_t bht_history = reg_BHT[bht_num_reg]; 56 61 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (old): %x",bht_history); … … 135 140 pht_bht_history = bht_history; 136 141 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * bht_history (new): %x",bht_history); 142 143 // #ifdef DEBUG_TEST 144 // assert(bht_num_reg < _param->_bht_nb_shifter); 145 // #endif 146 137 147 reg_BHT [bht_num_reg] = bht_history; 138 148 } … … 170 180 171 181 #if defined(DEBUG) and DEBUG_Two_Level_Branch_Predictor and (DEBUG >= DEBUG_TRACE) 172 if (1) 182 183 # if 0 173 184 { 174 185 log_printf(TRACE,Two_Level_Branch_Predictor,FUNCTION," * Dump Two_Level_Branch_Predictor"); … … 190 201 break; 191 202 else 192 str+=toString("[%.4d] %.4x ",index,reg_BHT[index]); 203 { 204 str+=toString("[%.4d] %.4x ",index,reg_BHT[index]); 205 } 193 206 } 194 207 … … 232 245 } 233 246 } 247 # endif 234 248 #endif 235 249 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp
r111 r119 94 94 ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,"out_BRANCH_EVENT_ADDRESS_DEST_VAL ",Tcontrol_t ,_param->_nb_context); 95 95 ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,"out_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); 96 ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE ,"out_BRANCH_EVENT_CAN_CONTINUE ",Tcontrol_t ,_param->_nb_context); 96 97 97 98 ALLOC1_SC_SIGNAL( in_EVENT_VAL ," in_EVENT_VAL ",Tcontrol_t ,_param->_nb_context); … … 165 166 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); 166 167 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); 168 INSTANCE1_SC_SIGNAL(_Prediction_unit,out_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context); 167 169 168 170 INSTANCE1_SC_SIGNAL(_Prediction_unit, in_EVENT_VAL ,_param->_nb_context); … … 373 375 DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); 374 376 DELETE1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); 377 DELETE1_SC_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context); 375 378 376 379 DELETE1_SC_SIGNAL( in_EVENT_VAL ,_param->_nb_context); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp
r113 r119 120 120 ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL,"out_BRANCH_EVENT_ADDRESS_DEST_VAL",Tcontrol_t ,_param->_nb_context); 121 121 ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,"out_BRANCH_EVENT_ADDRESS_DEST ",Taddress_t ,_param->_nb_context); 122 ALLOC1_SC_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE ,"out_BRANCH_EVENT_CAN_CONTINUE" ,Tcontrol_t ,_param->_nb_context); 122 123 123 124 ALLOC1_SC_SIGNAL(out_UPDATE_VAL ,"out_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update); … … 216 217 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_EVENT_ADDRESS_DEST_VAL,_param->_nb_context); 217 218 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context); 219 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context); 218 220 219 221 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_VAL ,_param->_nb_inst_update); … … 948 950 if (event.take) 949 951 TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST [port]->read(),event.address_good); 952 TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE [port]->read(),not event.miss_commit); 950 953 951 954 event.address_src = 0; … … 1392 1395 if (event.take) 1393 1396 TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST [port]->read(),event.address_good); 1397 TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE [port]->read(),not event.miss_commit); 1394 1398 1395 1399 event.address_src = 0; … … 2022 2026 if (event.take_good) 2023 2027 TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST [port]->read(),event.address_good); 2028 TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE [port]->read(),not event.miss_commit); 2024 2029 2025 2030 event.address_src = 0; … … 2681 2686 if (event.take_good) 2682 2687 TEST(Taddress_t,out_BRANCH_EVENT_ADDRESS_DEST [port]->read(),event.address_good); 2683 2688 TEST(Taddress_t,out_BRANCH_EVENT_CAN_CONTINUE [port]->read(),not event.miss_commit); 2689 2684 2690 event.address_src = 0; 2685 2691 event.take = 0; … … 2860 2866 delete [] out_BRANCH_EVENT_ADDRESS_DEST_VAL; 2861 2867 delete [] out_BRANCH_EVENT_ADDRESS_DEST ; 2868 delete [] out_BRANCH_EVENT_CAN_CONTINUE ; 2862 2869 2863 2870 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h
r112 r119 72 72 public : Tptr_t _index_ras ; 73 73 //public : Tcontrol_t _ifetch_prediction; 74 //public : Tcontrol_t _miss_commit ; 74 75 }; 75 76 … … 87 88 public : Tptr_t _index_ras ; 88 89 public : Tcontrol_t _ifetch_prediction; // not in ufpt 90 public : Tcontrol_t _miss_commit ; // not in ufpt 89 91 90 92 // to branchement_log_file -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
r115 r119 125 125 public : SC_OUT(Tcontrol_t ) ** out_BRANCH_EVENT_ADDRESS_DEST_VAL ; //[nb_context] 126 126 public : SC_OUT(Taddress_t ) ** out_BRANCH_EVENT_ADDRESS_DEST ; //[nb_context] 127 public : SC_OUT(Tcontrol_t ) ** out_BRANCH_EVENT_CAN_CONTINUE ; //[nb_context] 127 128 128 129 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 193 194 private : Tcontrol_t * reg_EVENT_ADDRESS_DEST_VAL ; //[nb_context] // if miss ifetch, decod issue branch, dest must be reload 194 195 private : Taddress_t * reg_EVENT_ADDRESS_DEST ; //[nb_context] // Address dest 196 private : bool * reg_EVENT_CAN_CONTINUE ; //[nb_context] 195 197 196 198 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
r117 r119 129 129 ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,"address_dest_val",Tcontrol_t,1); 130 130 ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_instruction_address); 131 ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t,1); 131 132 132 133 ALLOC1_INTERFACE_END(_param->_nb_context); … … 232 233 ALLOC1(reg_EVENT_ADDRESS_DEST_VAL ,Tcontrol_t ,_param->_nb_context); 233 234 ALLOC1(reg_EVENT_ADDRESS_DEST ,Taddress_t ,_param->_nb_context); 235 ALLOC1(reg_EVENT_CAN_CONTINUE ,Tcontrol_t ,_param->_nb_context); 234 236 } 235 237 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp
r112 r119 81 81 DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context,1); 82 82 DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context,_param->_size_instruction_address); 83 DELETE1_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context,1); 83 84 84 85 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 160 161 DELETE1(reg_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context); 161 162 DELETE1(reg_EVENT_ADDRESS_DEST ,_param->_nb_context); 163 DELETE1(reg_EVENT_CAN_CONTINUE ,_param->_nb_context); 162 164 } 163 165 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMoore.cpp
r112 r119 287 287 PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST_VAL [i],reg_EVENT_ADDRESS_DEST_VAL [i]); 288 288 PORT_WRITE(out_BRANCH_EVENT_ADDRESS_DEST [i],reg_EVENT_ADDRESS_DEST [i]); 289 289 PORT_WRITE(out_BRANCH_EVENT_CAN_CONTINUE [i],reg_EVENT_CAN_CONTINUE [i]); 290 290 291 internal_BRANCH_EVENT_VAL [i] = val; 291 292 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
r115 r119 249 249 Taddress_t address_src = PORT_READ(in_DECOD_BTB_ADDRESS_SRC [i]); 250 250 Taddress_t address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]); 251 Tcontrol_t last_take= PORT_READ(in_DECOD_BTB_LAST_TAKE [i]);251 Tcontrol_t direction = PORT_READ(in_DECOD_BTB_LAST_TAKE [i]); 252 252 253 253 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * DECOD[%d] - Accepted",i); … … 259 259 if (miss_ifetch or miss_decod) 260 260 { 261 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss !!!"); 262 261 263 // Have a miss !!! 264 condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); 265 is_accurate = PORT_READ(in_DECOD_IS_ACCURATE [i]); 266 267 // if can_continue else don't wait the end of all instruction 268 // can_continue = not miss_commit and the destination is accurate (know) 269 Tcontrol_t can_continue = is_accurate; 270 262 271 #ifdef DEBUG_TEST 263 272 if (reg_EVENT_STATE [context] != EVENT_STATE_OK) 264 273 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid event state.")); 265 274 #endif 266 if (reg_UFPT_NB_NEED_UPDATE [context] == 0) 275 276 // miss_ifetch = branch is previously predict, but it's not the good 277 // * need flush ufpt 278 // miss_decod = branch was not detected 279 // * not necessary 280 281 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * can_continue: %d",can_continue); 282 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * direction : %d",direction ); 283 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss_ifetch : %d",miss_ifetch ); 284 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * change : %d",(not (can_continue and not direction and not miss_ifetch))); 285 286 // if can_continue (destination is know) and direction is not take, don't need flush fetch_unit. 287 if (not (can_continue and not direction and not miss_ifetch)) 267 288 { 268 // Change state 269 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); 270 reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; 271 // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT; 289 if (reg_UFPT_NB_NEED_UPDATE [context] == 0) 290 { 291 // Change state 292 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_UPDATE_CONTEXT (decod - miss - no flush ufpt)",context); 293 reg_EVENT_STATE [context] = EVENT_STATE_UPDATE_CONTEXT; 294 // reg_EVENT_SOURCE[context] = EVENT_SOURCE_UFPT; 295 } 296 else 297 { 298 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context); 299 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; 300 } 301 302 // Flush UPFT 303 flush_UFPT [context] = true; 304 305 reg_EVENT_IS_BRANCH [context] = true; 306 reg_EVENT_DEPTH [context] = upt_ptr_write; 307 reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State 308 reg_EVENT_ADDRESS_DEST_VAL[context] = direction; 309 reg_EVENT_ADDRESS_DEST [context] = address_dest; 310 reg_EVENT_CAN_CONTINUE [context] = can_continue; 272 311 } 273 else 274 { 275 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_MISS_FLUSH_UFPT (decod - miss - flush ufpt)",context); 276 reg_EVENT_STATE [context] = EVENT_STATE_MISS_FLUSH_UFPT; 277 } 278 279 // Flush UPFT 280 flush_UFPT [context] = true; 281 282 reg_EVENT_IS_BRANCH [context] = true; 283 reg_EVENT_DEPTH [context] = upt_ptr_write; 284 reg_EVENT_ADDRESS_SRC [context] = address_src; // delay_slot is compute in Context_State 285 reg_EVENT_ADDRESS_DEST_VAL[context] = last_take; 286 reg_EVENT_ADDRESS_DEST [context] = address_dest; 287 312 288 313 // Push upt (from decod interface) 289 condition = PORT_READ(in_DECOD_BTB_CONDITION [i]);290 is_accurate = PORT_READ(in_DECOD_IS_ACCURATE [i]);291 292 314 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._condition = condition; 293 315 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_src = address_src ; 294 316 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._address_dest = address_dest; 295 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = last_take;317 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._last_take = direction ; 296 318 // reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._good_take; 297 319 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._is_accurate = is_accurate; … … 336 358 reg_UFPT_NB_NEED_UPDATE [context] --; 337 359 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UFPT_NB_NEED_UPDATE (after) : %d",reg_UFPT_NB_NEED_UPDATE [context]); 338 339 360 } 340 361 } … … 349 370 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_WAIT_END (decod - hit)",context,upt_ptr_write); 350 371 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._state = UPDATE_PREDICTION_STATE_WAIT_END; 351 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok = false; 372 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._retire_ok = false; 373 reg_UPDATE_PREDICTION_TABLE [context][upt_ptr_write]._miss_commit = false; 352 374 353 375 // Write new accurate … … 356 378 throw ERRORMORPHEO(FUNCTION,_("Decod : invalid accurate flag.")); 357 379 #endif 380 381 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * is_accurate : %d",is_accurate); 382 358 383 reg_IS_ACCURATE [context] = is_accurate; 359 384 … … 728 753 reg_EVENT_ADDRESS_DEST_VAL[context] = good_take; 729 754 reg_EVENT_ADDRESS_DEST [context] = good_addr; 755 reg_EVENT_CAN_CONTINUE [context] = false; 756 730 757 } 758 reg_UPDATE_PREDICTION_TABLE [context][depth]._miss_commit = true; 731 759 } 732 760 else … … 770 798 771 799 // if different : an other branch is occured 772 if (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT)800 if (reg_EVENT_STATE [i] == EVENT_STATE_UPDATE_CONTEXT) 773 801 { 774 802 // Change state 775 803 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_WAIT_END_EVENT (branch_event)",i); 776 777 804 reg_EVENT_STATE [i] = EVENT_STATE_WAIT_END_EVENT; 778 805 } … … 809 836 { 810 837 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * type : EVENT_TYPE_BRANCH_MISS_SPECULATION"); 838 839 // #ifdef DEBUG_TEST 840 // if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT) 841 // throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state.")); 842 // #endif 843 // Special case : test if event and branch_complete ! 844 if (reg_EVENT_STATE [i] == EVENT_STATE_WAIT_END_EVENT) 845 { 811 846 812 #ifdef DEBUG_TEST 813 if (reg_EVENT_STATE [i] != EVENT_STATE_WAIT_END_EVENT) 814 throw ERRORMORPHEO(FUNCTION,_("Event : invalid event state.")); 815 #endif 816 817 // Change state 818 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); 819 820 reg_EVENT_STATE [i] = EVENT_STATE_OK; 821 reg_IS_ACCURATE [i] = true; 822 823 Tdepth_t depth = reg_EVENT_UPT_PTR [i]; 824 825 if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO) 826 { 827 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth); 847 // Change state 848 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * EVENT [%d] <- EVENT_STATE_OK (event)",i); 828 849 829 reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END; 830 } 831 850 reg_EVENT_STATE [i] = EVENT_STATE_OK; 851 reg_IS_ACCURATE [i] = true; 852 853 Tdepth_t depth = reg_EVENT_UPT_PTR [i]; 854 855 if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state == UPDATE_PREDICTION_STATE_END_KO) 856 { 857 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * UPT [%d][%d].state <- UPDATE_PREDICTION_STATE_END (event)",i,depth); 858 859 reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END; 860 } 861 832 862 #ifdef DEBUG_TEST 833 863 // if (reg_UPDATE_PREDICTION_TABLE [i][depth]._state != UPDATE_PREDICTION_STATE_END_KO_WAIT_END) … … 840 870 841 871 // reg_UPDATE_PREDICTION_TABLE [i][depth]._state = UPDATE_PREDICTION_STATE_END_KO; 842 872 } 843 873 break; 844 874 } … … 1191 1221 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST_VAL: %d" ,reg_EVENT_ADDRESS_DEST_VAL[i]); 1192 1222 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_ADDRESS_DEST : %.8x (%.8x)",reg_EVENT_ADDRESS_DEST [i],reg_EVENT_ADDRESS_DEST [i]<<2); 1223 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_EVENT_CAN_CONTINUE : %d" ,reg_EVENT_CAN_CONTINUE [i]); 1193 1224 1194 1225 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Fetch_Prediction_Table [%d]",i); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h
r111 r119 114 114 public : SC_OUT(Tcontrol_t ) ** out_BRANCH_EVENT_ADDRESS_DEST_VAL ; //[nb_context] 115 115 public : SC_OUT(Taddress_t ) ** out_BRANCH_EVENT_ADDRESS_DEST ; //[nb_context] 116 public : SC_OUT(Tcontrol_t ) ** out_BRANCH_EVENT_CAN_CONTINUE ; //[nb_context] 116 117 117 118 // ~~~~~[ Interface : "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp
r112 r119 132 132 ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,"address_dest_val",Tcontrol_t,1); 133 133 ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_address); 134 ALLOC1_SIGNAL_OUT(out_BRANCH_EVENT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t,1); 134 135 135 136 ALLOC1_INTERFACE_END(_param->_nb_context); … … 725 726 PORT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST_VAL",dest,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST_VAL"); 726 727 PORT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST" ,dest,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST" ); 728 PORT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE" ,dest,"out_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE" ); 727 729 } 728 730 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp
r111 r119 71 71 DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST_VAL ,_param->_nb_context,1); 72 72 DELETE1_SIGNAL(out_BRANCH_EVENT_ADDRESS_DEST ,_param->_nb_context,_param->_size_instruction_address); 73 DELETE1_SIGNAL(out_BRANCH_EVENT_CAN_CONTINUE ,_param->_nb_context,1); 73 74 74 75 DELETE1_SIGNAL( in_EVENT_VAL ,_param->_nb_context,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp
r112 r119 610 610 COMPONENT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST" , 611 611 dest, "in_BRANCH_EVENT_"+toString(i)+"_ADDRESS_DEST" ); 612 COMPONENT_MAP(_component,src ,"out_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE" , 613 dest, "in_BRANCH_EVENT_"+toString(i)+"_CAN_CONTINUE" ); 612 614 } 613 615 … … 1045 1047 COMPONENT_MAP(_component,src ,"out_EVENT_"+toString(i)+ "_DEPTH" , 1046 1048 dest, "in_EVENT_"+toString(i)+"_CONTEXT_STATE_DEPTH" ); 1049 COMPONENT_MAP(_component,src ,"out_EVENT_"+toString(i)+ "_FLUSH_ONLY" , 1050 dest, "in_EVENT_"+toString(i)+"_CONTEXT_STATE_FLUSH_ONLY" ); 1047 1051 } 1048 1052 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp
r117 r119 29 29 30 30 uint32_t bank_nb_access [_param->_nb_bank]; 31 Tcontrol_tcommit_ack [_param->_nb_inst_commit];31 uint32_t commit_ack [_param->_nb_inst_commit]; 32 32 33 33 // Initialisation -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
r118 r119 10 10 #define MORPHEO_MAJOR_VERSION "0" 11 11 #define MORPHEO_MINOR_VERSION "2" 12 #define MORPHEO_REVISION "11 8"12 #define MORPHEO_REVISION "119" 13 13 #define MORPHEO_CODENAME "Castor" 14 14 15 #define MORPHEO_DATE_DAY "2 0"15 #define MORPHEO_DATE_DAY "25" 16 16 #define MORPHEO_DATE_MONTH "05" 17 17 #define MORPHEO_DATE_YEAR "2009" -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_2.cfg
r118 r119 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 4" />53 <parameter name="size_load_queue" value=" 4" />52 <parameter name="size_store_queue" value="8" /> 53 <parameter name="size_load_queue" value="8" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_3.cfg
r118 r119 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 4" />53 <parameter name="size_load_queue" value=" 4" />52 <parameter name="size_store_queue" value="8" /> 53 <parameter name="size_load_queue" value="8" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w1_4.cfg
r118 r119 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 4" />53 <parameter name="size_load_queue" value=" 4" />52 <parameter name="size_store_queue" value="8" /> 53 <parameter name="size_load_queue" value="8" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_1.cfg
r118 r119 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 4" />53 <parameter name="size_load_queue" value=" 4" />52 <parameter name="size_store_queue" value="8" /> 53 <parameter name="size_load_queue" value="8" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_2.cfg
r118 r119 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 4" />53 <parameter name="size_load_queue" value=" 4" />52 <parameter name="size_store_queue" value="8" /> 53 <parameter name="size_load_queue" value="8" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_3.cfg
r118 r119 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 4" />53 <parameter name="size_load_queue" value=" 8" />52 <parameter name="size_store_queue" value="8" /> 53 <parameter name="size_load_queue" value="16" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w2_4.cfg
r118 r119 50 50 51 51 <load_store_unit id="0"> 52 <parameter name="size_store_queue" value=" 4" />53 <parameter name="size_load_queue" value=" 8" />52 <parameter name="size_store_queue" value="8" /> 53 <parameter name="size_load_queue" value="16" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="1" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_1.cfg
r118 r119 51 51 <load_store_unit id="0"> 52 52 <parameter name="size_store_queue" value="16" /> 53 <parameter name="size_load_queue" value=" 8" />53 <parameter name="size_load_queue" value="16" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="4" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w4_2.cfg
r118 r119 51 51 <load_store_unit id="0"> 52 52 <parameter name="size_store_queue" value="16" /> 53 <parameter name="size_load_queue" value=" 8" />53 <parameter name="size_load_queue" value="32" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="4" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_1.cfg
r118 r119 51 51 <load_store_unit id="0"> 52 52 <parameter name="size_store_queue" value="16" /> 53 <parameter name="size_load_queue" value=" 8" />53 <parameter name="size_load_queue" value="16" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="4" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Instance_x1_w8_2.cfg
r118 r119 51 51 <load_store_unit id="0"> 52 52 <parameter name="size_store_queue" value="16" /> 53 <parameter name="size_load_queue" value=" 8" />53 <parameter name="size_load_queue" value="32" /> 54 54 <parameter name="size_speculative_access_queue" value="4" /> 55 55 <parameter name="nb_port_check" value="4" /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen
r118 r119 53 53 54 54 <parameter name="nb_load_store_unit" min="1" max="16" step="* 2" default="1" level="..." description="..." /> 55 <parameter name="size_store_queue" min="2" max=" 16" step="* 2" default="2" level="..." description="..." />56 <parameter name="size_load_queue" min="1" max=" 16" step="* 2" default="2" level="..." description="..." />55 <parameter name="size_store_queue" min="2" max="32" step="* 2" default="2" level="..." description="..." /> 56 <parameter name="size_load_queue" min="1" max="32" step="* 2" default="2" level="..." description="..." /> 57 57 <parameter name="size_speculative_access_queue" min="1" max="16" step="* 2" default="2" level="..." description="..." /> 58 58 <parameter name="nb_port_check" min="1" max="16" step="* 2" default="1" level="..." description="..." /> -
trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim
r118 r119 15 15 <parameter name="directory_vhdl" value="." /> 16 16 <parameter name="directory_position" value="." /> 17 <parameter name="directory_log" value="/ dsk/l1/misc/Morpheo/log/"/>17 <parameter name="directory_log" value="/tmp/" /> 18 18 19 19 <parameter name="statistics_cycle_start" value="5" /> … … 90 90 <component name="Direction_Glue" model="systemc" debug="0" /> 91 91 <component name="Direction" model="systemc" debug="0" /> 92 <component name="Two_Level_Branch_Predictor" model="systemc" debug="0" /> 93 <component name="Meta_Predictor_Glue" model="systemc" debug="0" /> 94 <component name="Meta_Predictor" model="systemc" debug="0" /> 92 95 <component name="Prediction_unit_Glue" model="systemc" debug="0" /> 93 96 <component name="Return_Address_Stack" model="systemc" debug="0" /> -
trunk/IPs/systemC/processor/Morpheo/Files/debug.sim
r118 r119 15 15 <parameter name="directory_vhdl" value="." /> 16 16 <parameter name="directory_position" value="." /> 17 <parameter name="directory_log" value="/ dsk/l1/misc/Morpheo/log/"/>17 <parameter name="directory_log" value="/tmp/" /> 18 18 19 19 <parameter name="statistics_cycle_start" value="5" /> 20 20 <parameter name="statistics_period" value="0" /> 21 21 22 <parameter name="simulation_nb_cycle" value=" 500000" />22 <parameter name="simulation_nb_cycle" value="20000" /> 23 23 <parameter name="simulation_nb_instruction" value="0" /> 24 24 25 <parameter name="debug_level" value=" 0" />26 <parameter name="debug_cycle_start" value=" 4900"/>27 <parameter name="debug_cycle_stop" value=" 5050"/>25 <parameter name="debug_level" value="3" /> 26 <parameter name="debug_cycle_start" value="18000" /> 27 <parameter name="debug_cycle_stop" value="18100" /> 28 28 <parameter name="debug_have_log_file" value="0" /> 29 <parameter name="debug_idle_cycle" value=" 1000"/>29 <parameter name="debug_idle_cycle" value="200" /> 30 30 <parameter name="debug_idle_time" value="10" /> 31 31 … … 90 90 <component name="Direction_Glue" model="systemc" debug="1" /> 91 91 <component name="Direction" model="systemc" debug="1" /> 92 <component name="Two_Level_Branch_Predictor" model="systemc" debug="1" /> 93 <component name="Meta_Predictor_Glue" model="systemc" debug="1" /> 94 <component name="Meta_Predictor" model="systemc" debug="1" /> 92 95 <component name="Prediction_unit_Glue" model="systemc" debug="1" /> 93 96 <component name="Return_Address_Stack" model="systemc" debug="1" />
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