- Timestamp:
- Aug 8, 2007, 4:50:13 PM (17 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema
- Files:
-
- 8 added
- 1 deleted
- 11 edited
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CACHE_automate-fsm_dcache_req.fig (modified) (3 diffs)
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CACHE_bloc_COUNTER.fig (added)
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CACHE_bloc_QUEUE_READ_HIT.fig (modified) (1 diff)
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CACHE_bloc_QUEUE_REQ.fig (modified) (1 diff)
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CACHE_bloc_QUEUE_RSP.fig (modified) (1 diff)
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CACHE_bloc_RAM_DATA.fig (modified) (1 diff)
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CACHE_bloc_RAM_LOCK.fig (modified) (3 diffs)
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CACHE_coherence_memoire.fig (modified) (1 diff)
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CACHE_implementation_RAM_INFO.fig (deleted)
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CACHE_implementation_monolithic.fig (added)
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CACHE_implementation_multi-banc.fig (added)
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CACHE_implementation_multi-banc_x2_mono-port.fig (added)
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CACHE_implementation_multi-banc_x4_mono-port.fig (added)
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CACHE_overview-all.fig (added)
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CACHE_overview.fig (modified) (1 diff)
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CACHE_overview_basic.fig (modified) (1 diff)
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CACHE_overview_floor_plan.fig (added)
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CACHE_parameters.fig (added)
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CACHE_pipeline.fig (modified) (3 diffs)
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CACHE_protocole.fig (modified) (5 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_automate-fsm_dcache_req.fig
r42 r45 8 8 -2 9 9 1200 2 10 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 2700.000 5550 2700 5250 2550 5250 285011 3 0 1.00 60.00 120.0012 10 5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 6525.000 4725.000 6450 4200 6900 4350 7050 4800 13 11 3 0 1.00 60.00 120.00 … … 22 20 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5175.000 4725.000 5250 4200 4800 4350 4650 4800 23 21 3 0 1.00 60.00 120.00 24 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5362.500 3750.000 5550 3750 5250 3600 5250 390022 5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 6675.000 3675.000 6150 3750 6300 3300 6750 3150 25 23 3 0 1.00 60.00 120.00 26 6 5175 3675 6525 4425 27 1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 4050 600 300 5850 4050 6450 375028 4 1 0 50 -1 2 8 0.0000 0 105 420 5850 4050 Request\001 29 -6 30 6 5175 2625 6525 3375 31 1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 3000 600 300 5850 3000 6450 270032 4 1 0 50 -1 2 8 0.0000 0 90 210 5850 3000 Init\001 33 -6 24 5 1 0 1 0 7 50 -1 -1 0.000 0 0 1 0 6525.000 3375.000 7050 3300 6900 3750 6450 3900 25 3 0 1.00 60.00 120.00 26 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 5850.000 3637.500 6000 3750 5850 3450 5700 3750 27 3 0 1.00 60.00 120.00 28 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 4350.000 2587.500 4500 2700 4350 2400 4200 2700 29 3 0 1.00 60.00 120.00 30 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 7350.000 2587.500 7500 2700 7350 2400 7200 2700 31 3 0 1.00 60.00 120.00 34 32 6 6675 4725 8025 5475 35 33 1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 7350 5100 600 300 7350 5100 7950 4800 … … 42 40 4 1 0 50 -1 2 8 0.0000 0 105 780 4350 5025 QUEUE_REQ\001 43 41 -6 42 6 5175 3675 6525 4425 43 1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 5850 4050 600 300 5850 4050 6450 3750 44 4 1 0 50 -1 2 8 0.0000 0 105 420 5850 4050 Request\001 45 -6 46 6 3675 2625 5025 3375 47 1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 4350 3000 600 300 4350 3000 4950 2700 48 4 1 0 50 -1 2 8 0.0000 0 90 210 4350 3000 Init\001 49 -6 50 1 1 0 1 0 11 50 -1 20 0.000 1 0.0000 7350 3000 600 300 7350 3000 7950 2700 51 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 52 3 0 1.00 60.00 120.00 53 4800 3225 5400 3825 44 54 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 45 55 3 0 1.00 60.00 120.00 46 6450 2550 6300 2775 47 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 48 3 0 1.00 60.00 120.00 49 5850 3300 5850 3750 50 4 0 0 50 -1 0 8 0.0000 0 105 645 5925 3525 (3) : end_init\001 56 3450 3000 3750 3000 51 57 4 1 0 50 -1 0 8 0.0000 0 120 1230 7350 5850 (5) : queue_read_hit.full\001 52 58 4 2 0 50 -1 0 8 0.0000 0 120 1485 6675 5250 (6) : not(queue_read_hit.full)\001 53 59 4 1 0 50 -1 0 8 0.0000 0 120 990 4350 5850 (8) : queue_req.full\001 54 60 4 0 0 50 -1 0 8 0.0000 0 120 1245 5025 5100 (9) : not(queue_req.full)\001 55 4 2 0 50 -1 0 8 0.0000 0 105 885 5175 3525 (10) : not(A or B)\00156 4 0 0 50 -1 0 8 0.0000 0 120 2430 3750 6300 A : ((read and miss) or write).request_queue.full\00157 4 1 0 50 -1 0 8 0.0000 0 105 810 6525 2475 (1) : not(nreset)\00158 4 1 0 50 -1 0 8 0.0000 0 105 900 5175 2475 (2) : not(end_init)\00159 4 0 0 50 -1 0 8 0.0000 0 120 3345 3750 6450 B : ((read and not (miss)) or (type_others)) and queue_read_hit.full\00160 61 4 0 0 50 -1 0 8 0.0000 0 105 315 6975 4275 (4) : B\001 61 62 4 2 0 50 -1 0 8 0.0000 0 105 330 4725 4275 (7) : A\001 63 4 2 0 50 -1 0 8 0.0000 0 105 645 4950 3525 (3) : end_init\001 64 4 1 0 50 -1 2 8 0.0000 0 120 420 7350 3000 synchro\001 65 4 1 0 50 -1 0 8 0.0000 0 105 900 4350 2325 (2) : not(end_init)\001 66 4 1 0 50 -1 0 8 0.0000 0 105 885 5850 3300 (13) : not(A or B)\001 67 4 0 0 50 -1 0 8 0.0000 0 120 1200 7125 3525 (12) : queue_info.empty\001 68 4 1 0 50 -1 0 8 0.0000 0 120 1455 7350 2325 (11) : not(queue_info.empty)\001 69 4 2 0 50 -1 0 8 0.0000 0 105 390 6600 3000 (10) : C\001 70 4 0 0 50 -1 0 8 0.0000 0 120 2940 3750 6300 A : ((read and miss) or write).request_queue.full and not C\001 71 4 0 0 50 -1 0 8 0.0000 0 120 3825 3750 6450 B : ((read and not (miss)) or (type_others)) and queue_read_hit.fulland not C\001 72 4 0 0 50 -1 0 8 0.0000 0 120 1305 3750 6600 C : type = synchronisation\001 73 4 2 0 50 -1 0 8 0.0000 0 105 810 3375 3000 (1) : not(nreset)\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_bloc_QUEUE_READ_HIT.fig
r44 r45 8 8 -2 9 9 1200 2 10 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 10 6 3825 2925 7275 4725 11 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 12 4950 3450 6150 3450 6150 4350 4950 4350 13 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 14 5850 3450 5850 4350 15 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 16 5550 4350 5550 3450 17 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 11 18 3 0 1.00 60.00 120.00 12 4650 3 600 4950 360013 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 219 4650 3150 5100 3150 5100 3450 20 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 14 21 3 0 1.00 60.00 120.00 15 4950 3750 4650 3750 16 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 17 4950 3450 6150 3450 6150 4650 4950 4650 18 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 19 5850 3450 5850 4650 20 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 21 5550 4650 5550 3450 22 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 23 3 0 1.00 60.00 120.00 24 6150 3600 6450 3600 25 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 26 3 0 1.00 60.00 120.00 27 6450 3750 6150 3750 28 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 3 29 3 0 1.00 60.00 120.00 30 4650 4275 4725 4275 4950 4275 22 6000 3450 6000 3150 6450 3150 31 23 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 32 24 3 0 1.00 60.00 120.00 33 6150 4275 6450 4275 34 4 1 0 50 -1 2 8 0.0000 0 105 1185 5550 3375 QUEUE_READ_HIT\001 35 4 2 0 50 -1 0 8 6.2832 0 90 630 4500 3750 WRITE_ack\001 36 4 2 0 50 -1 0 8 6.2832 0 90 615 4500 3600 WRITE_val\001 37 4 2 0 50 -1 0 8 6.2832 0 90 675 4500 4275 WRITE_num\001 38 4 0 0 50 -1 0 8 6.2832 0 90 570 6600 3750 READ_ack\001 39 4 0 0 50 -1 0 8 6.2832 0 90 555 6600 3600 READ_val\001 40 4 0 0 50 -1 0 8 6.2832 0 90 615 6600 4275 READ_num\001 25 6150 3900 6450 3900 26 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 27 3 0 1.00 60.00 120.00 28 4650 3900 4950 3900 29 2 1 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 2 30 4800 3825 4725 3975 31 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 32 3 0 1.00 60.00 120.00 33 5100 4350 5100 4650 4650 4650 34 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 35 3 0 1.00 60.00 120.00 36 6450 4650 6000 4650 6000 4350 37 4 1 0 50 -1 2 8 0.0000 0 105 1185 5550 3000 QUEUE_READ_HIT\001 38 4 2 0 50 -1 0 8 0.0000 0 90 615 4500 3150 WRITE_val\001 39 4 0 0 50 -1 0 8 0.0000 0 90 555 6600 3150 READ_val\001 40 4 2 0 50 -1 0 8 0.0000 0 90 675 4500 3900 WRITE_num\001 41 4 0 0 50 -1 0 8 0.0000 0 90 615 6600 3900 READ_num\001 42 4 2 0 50 -1 0 8 0.0000 0 105 420 4725 4125 [1:6] bits\001 43 4 2 0 50 -1 0 8 0.0000 0 90 630 4500 4650 WRITE_ack\001 44 4 0 0 50 -1 0 8 0.0000 0 90 570 6600 4650 READ_ack\001 45 -6 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_bloc_QUEUE_REQ.fig
r44 r45 8 8 -2 9 9 1200 2 10 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 10 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 11 4950 5550 6150 5550 6150 6450 4950 6450 12 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 13 5850 5550 5850 6450 14 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 15 5550 6450 5550 5550 16 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 11 17 3 0 1.00 60.00 120.00 12 4650 3600 4950 360013 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 218 4650 5250 5100 5250 5100 5550 19 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 14 20 3 0 1.00 60.00 120.00 15 4950 3750 4650 3750 16 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 17 4950 3450 6150 3450 6150 4650 4950 4650 18 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 19 5850 3450 5850 4650 20 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 21 5550 4650 5550 3450 22 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 23 3 0 1.00 60.00 120.00 24 6150 3600 6450 3600 25 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 26 3 0 1.00 60.00 120.00 27 6450 3750 6150 3750 28 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 3 29 3 0 1.00 60.00 120.00 30 4650 4275 4725 4275 4950 4275 21 6000 5550 6000 5250 6450 5250 31 22 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 32 23 3 0 1.00 60.00 120.00 33 6150 4275 6450 4275 34 4 2 0 50 -1 0 8 0.0000 0 90 630 4500 3750 WRITE_ack\001 35 4 2 0 50 -1 0 8 0.0000 0 90 615 4500 3600 WRITE_val\001 36 4 2 0 50 -1 0 8 0.0000 0 90 675 4500 4275 WRITE_num\001 37 4 0 0 50 -1 0 8 0.0000 0 90 570 6600 3750 READ_ack\001 38 4 0 0 50 -1 0 8 0.0000 0 90 555 6600 3600 READ_val\001 39 4 0 0 50 -1 0 8 0.0000 0 90 615 6600 4275 READ_num\001 40 4 1 0 50 -1 2 8 0.0000 0 105 780 5550 3375 QUEUE_REQ\001 24 6150 6000 6450 6000 25 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 26 3 0 1.00 60.00 120.00 27 4650 6000 4950 6000 28 2 1 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 2 29 4800 5925 4725 6075 30 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 31 3 0 1.00 60.00 120.00 32 5100 6450 5100 6750 4650 6750 33 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 34 3 0 1.00 60.00 120.00 35 6450 6750 6000 6750 6000 6450 36 4 2 0 50 -1 0 8 0.0000 0 90 615 4500 5250 WRITE_val\001 37 4 0 0 50 -1 0 8 0.0000 0 90 555 6600 5250 READ_val\001 38 4 2 0 50 -1 0 8 0.0000 0 90 675 4500 6000 WRITE_num\001 39 4 0 0 50 -1 0 8 0.0000 0 90 615 6600 6000 READ_num\001 40 4 2 0 50 -1 0 8 0.0000 0 105 420 4725 6225 [1:6] bits\001 41 4 2 0 50 -1 0 8 0.0000 0 90 630 4500 6750 WRITE_ack\001 42 4 0 0 50 -1 0 8 0.0000 0 90 570 6600 6750 READ_ack\001 43 4 1 0 50 -1 2 8 0.0000 0 105 780 5550 5100 QUEUE_REQ\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_bloc_QUEUE_RSP.fig
r44 r45 8 8 -2 9 9 1200 2 10 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 10 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 11 4807 5556 6007 5556 6007 6456 4807 6456 12 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 13 5707 5556 5707 6456 14 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 15 5407 6456 5407 5556 16 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 11 17 3 0 1.00 60.00 120.00 12 4 650 3600 4950 360013 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 218 4507 5256 4957 5256 4957 5556 19 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 14 20 3 0 1.00 60.00 120.00 15 4950 3750 4650 3750 16 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 17 4950 3450 6150 3450 6150 4650 4950 4650 18 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 19 5850 3450 5850 4650 20 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 21 5550 4650 5550 3450 22 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 23 3 0 1.00 60.00 120.00 24 6150 3600 6450 3600 25 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 26 3 0 1.00 60.00 120.00 27 6450 3750 6150 3750 21 5857 5556 5857 5256 6307 5256 28 22 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 29 23 3 0 1.00 60.00 120.00 30 6150 4275 6450 4275 24 6007 6006 6307 6006 25 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 26 3 0 1.00 60.00 120.00 27 4957 6456 4957 6756 4507 6756 28 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 3 29 3 0 1.00 60.00 120.00 30 6307 6756 5857 6756 5857 6456 31 31 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 32 32 3 0 1.00 60.00 120.00 33 4650 4275 4950 4275 33 4507 5706 4807 5706 34 2 1 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 2 35 4657 5631 4582 5781 34 36 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 35 37 3 0 1.00 60.00 120.00 36 4650 4425 4950 4425 38 4507 6006 4807 6006 39 2 1 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 2 40 4657 5931 4582 6081 37 41 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 38 42 3 0 1.00 60.00 120.00 39 4650 4125 4950 4125 43 4507 6300 4807 6300 44 2 1 0 1 0 27 50 -1 20 0.000 0 0 -1 0 0 2 45 4650 6225 4575 6375 40 46 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 41 47 3 0 1.00 60.00 120.00 42 6 150 4125 6450 412548 6007 5700 6307 5700 43 49 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 44 50 3 0 1.00 60.00 120.00 45 6150 4425 6450 4425 46 4 2 0 50 -1 0 8 0.0000 0 90 630 4500 3750 WRITE_ack\001 47 4 2 0 50 -1 0 8 0.0000 0 90 615 4500 3600 WRITE_val\001 48 4 0 0 50 -1 0 8 0.0000 0 90 570 6600 3750 READ_ack\001 49 4 0 0 50 -1 0 8 0.0000 0 90 555 6600 3600 READ_val\001 50 4 1 0 50 -1 2 8 0.0000 0 105 750 5550 3375 QUEUE_RSP\001 51 4 0 0 50 -1 0 8 0.0000 0 90 615 6600 4125 READ_num\001 52 4 0 0 50 -1 0 8 0.0000 0 105 600 6600 4275 READ_line\001 53 4 0 0 50 -1 0 8 0.0000 0 90 660 6600 4425 READ_error\001 54 4 2 0 50 -1 0 8 0.0000 0 90 675 4500 4125 WRITE_num\001 55 4 2 0 50 -1 0 8 0.0000 0 105 660 4500 4275 WRITE_line\001 56 4 2 0 50 -1 0 8 0.0000 0 90 720 4500 4425 WRITE_error\001 51 6007 6300 6307 6300 52 4 2 0 50 -1 0 8 0.0000 0 90 615 4357 5256 WRITE_val\001 53 4 0 0 50 -1 0 8 0.0000 0 90 555 6457 5256 READ_val\001 54 4 2 0 50 -1 0 8 0.0000 0 90 630 4357 6756 WRITE_ack\001 55 4 0 0 50 -1 0 8 0.0000 0 90 570 6457 6756 READ_ack\001 56 4 2 0 50 -1 0 8 0.0000 0 90 675 4357 5706 WRITE_num\001 57 4 2 0 50 -1 0 8 0.0000 0 105 420 4575 5850 [1:6] bits\001 58 4 2 0 50 -1 0 8 0.0000 0 105 660 4357 6006 WRITE_line\001 59 4 2 0 50 -1 0 8 0.0000 0 90 720 4350 6300 WRITE_error\001 60 4 2 0 50 -1 0 8 0.0000 0 90 225 4582 6456 1 bit\001 61 4 2 0 50 -1 0 8 0.0000 0 105 660 4575 6150 [32:4096] bits\001 62 4 0 0 50 -1 0 8 0.0000 0 90 615 6450 5700 READ_num\001 63 4 0 0 50 -1 0 8 0.0000 0 90 660 6450 6300 READ_error\001 64 4 0 0 50 -1 0 8 0.0000 0 105 600 6457 6006 READ_line\001 65 4 1 0 50 -1 2 8 0.0000 0 105 750 5400 5100 QUEUE_RSP\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_bloc_RAM_DATA.fig
r44 r45 8 8 -2 9 9 1200 2 10 6 6150 3525 7200 3825 10 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 11 6150 4650 6150 3450 4950 3450 4950 4650 6150 4650 12 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 13 3 0 1.00 60.00 120.00 14 4650 4125 4950 4125 15 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 1 2 16 3 0 1.00 60.00 120.00 17 3 0 1.00 60.00 120.00 18 4950 4575 4650 4575 11 19 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 12 20 3 0 1.00 60.00 120.00 13 6450 3600 6150 360021 4650 3525 4950 3525 14 22 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 15 23 3 0 1.00 60.00 120.00 16 6150 3750 6450 3750 17 4 0 0 50 -1 0 8 0.0000 0 90 615 6525 3600 WRITE_val\001 18 4 0 0 50 -1 0 8 0.0000 0 90 630 6525 3750 WRITE_ack\001 19 -6 20 6 3975 3525 4950 3825 24 4950 3675 4650 3675 25 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 26 3 0 1.00 60.00 120.00 27 4650 4350 4950 4350 28 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 29 3 0 1.00 60.00 120.00 30 4650 3900 4950 3900 21 31 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 22 32 3 0 1.00 60.00 120.00 23 4650 3600 4950 360033 6450 3525 6150 3525 24 34 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 25 35 3 0 1.00 60.00 120.00 26 4950 3750 4650 3750 27 4 2 0 50 -1 0 8 0.0000 0 90 555 4575 3600 READ_val\001 28 4 2 0 50 -1 0 8 0.0000 0 90 570 4575 3750 READ_ack\001 29 -6 30 6 6150 3975 7650 4650 31 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 5 36 6150 3675 6450 3675 37 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 32 38 3 0 1.00 60.00 120.00 33 6450 4 425 6375 4425 6300 4425 6225 4425 6150 442534 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 539 6450 4575 6150 4575 40 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 35 41 3 0 1.00 60.00 120.00 36 6450 4 575 6375 4575 6300 4575 6225 4575 6150 457537 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 542 6450 4275 6150 4275 43 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 38 44 3 0 1.00 60.00 120.00 39 6450 4275 6375 4275 6300 4275 6225 4275 6150 4275 40 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 5 41 3 0 1.00 60.00 120.00 42 6450 4125 6375 4125 6300 4125 6225 4125 6150 4125 43 4 0 0 50 -1 0 8 0.0000 0 105 660 6525 4575 WRITE_line\001 44 4 0 0 50 -1 0 8 0.0000 0 105 750 6525 4125 WRITE_index\001 45 4 0 0 50 -1 0 8 0.0000 0 90 690 6525 4275 WRITE_bank\001 46 4 0 0 50 -1 0 8 0.0000 0 105 1080 6525 4425 WRITE_byte_enable\001 47 -6 48 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 49 6150 4650 6150 3450 4950 3450 4950 4650 6150 4650 50 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 5 51 3 0 1.00 60.00 120.00 52 4650 4125 4725 4125 4800 4125 4875 4125 4950 4125 53 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 5 54 3 0 1.00 60.00 120.00 55 4650 4275 4725 4275 4800 4275 4875 4275 4950 4275 56 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 5 57 3 0 1.00 60.00 120.00 58 4950 4575 4875 4575 4800 4575 4725 4575 4650 4575 59 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 5 60 3 0 1.00 60.00 120.00 61 4650 4425 4725 4425 4800 4425 4875 4425 4950 4425 45 6450 3975 6150 3975 46 4 2 0 50 -1 0 8 0.0000 0 105 510 4575 4575 REQ_data\001 47 4 0 0 50 -1 0 8 0.0000 0 105 495 6525 4575 RSP_line\001 48 4 2 0 50 -1 0 8 0.0000 0 105 465 4575 3525 REQ_val\001 49 4 2 0 50 -1 0 8 0.0000 0 105 480 4575 3675 REQ_ack\001 50 4 2 0 50 -1 0 8 0.0000 0 120 600 4575 3900 REQ_index\001 51 4 2 0 50 -1 0 8 0.0000 0 105 540 4575 4125 REQ_bank\001 52 4 2 0 50 -1 0 8 0.0000 0 105 930 4575 4350 REQ_byte_enable\001 53 4 2 0 50 -1 0 8 0.0000 0 105 420 4800 4275 [0:4] bits\001 54 4 2 0 50 -1 0 8 0.0000 0 105 480 4800 4050 [0:10] bits\001 55 4 2 0 50 -1 0 8 0.0000 0 105 480 4800 4500 [4:14] bits\001 56 4 2 0 50 -1 0 8 0.0000 0 105 570 4800 4725 {32;64} bits\001 57 4 0 0 50 -1 0 8 0.0000 0 90 450 6525 3525 RSP_val\001 58 4 0 0 50 -1 0 8 0.0000 0 90 465 6525 3675 RSP_ack\001 59 4 0 0 50 -1 0 8 0.0000 0 90 525 6525 4275 RSP_bank\001 60 4 0 0 50 -1 0 8 0.0000 0 105 585 6525 3975 RSP_index\001 61 4 0 0 50 -1 0 8 0.0000 0 105 660 6300 4725 [32:4096] bits\001 62 62 4 1 0 50 -1 2 8 0.0000 0 105 720 5550 4050 RAM_DATA\001 63 4 2 0 50 -1 0 8 0.0000 0 105 690 4575 4125 READ_index\00164 4 2 0 50 -1 0 8 0.0000 0 90 630 4575 4275 READ_bank\00165 4 2 0 50 -1 0 8 0.0000 0 90 600 4575 4575 READ_data\00166 4 2 0 50 -1 0 8 0.0000 0 105 1020 4575 4425 READ_byte_enable\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_bloc_RAM_LOCK.fig
r44 r45 8 8 -2 9 9 1200 2 10 6 3975 3525 4950 382511 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 212 3 0 1.00 60.00 120.0013 4650 3600 4950 360014 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 215 3 0 1.00 60.00 120.0016 4950 3750 4650 375017 4 2 0 50 -1 0 8 0.0000 0 90 555 4575 3600 READ_val\00118 4 2 0 50 -1 0 8 0.0000 0 90 570 4575 3750 READ_ack\00119 -620 10 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 21 11 6150 4650 6150 3450 4950 3450 4950 4650 6150 4650 22 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 523 3 0 1.00 60.00 120.0024 4650 3975 4725 3975 4800 3975 4875 3975 4950 397525 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 526 3 0 1.00 60.00 120.0027 4650 4125 4725 4125 4800 4125 4875 4125 4950 412528 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 529 3 0 1.00 60.00 120.0030 4950 4425 4875 4425 4800 4425 4725 4425 4650 442531 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 532 3 0 1.00 60.00 120.0033 4950 4575 4875 4575 4800 4575 4725 4575 4650 457534 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 535 3 0 1.00 60.00 120.0036 4950 4275 4875 4275 4800 4275 4725 4275 4650 427537 12 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 38 13 3 0 1.00 60.00 120.00 … … 77 52 3 0 1.00 60.00 120.00 78 53 5925 3150 5925 3300 5925 3375 5925 3450 79 4 2 0 50 -1 0 8 0.0000 0 90 630 4575 4125 READ_bank\001 80 4 2 0 50 -1 0 8 0.0000 0 105 690 4575 3975 READ_index\001 81 4 2 0 50 -1 0 8 0.0000 0 105 645 4575 4275 READ_valid\001 82 4 2 0 50 -1 0 8 0.0000 0 105 1080 4575 4425 READ_lock_by_read\001 83 4 2 0 50 -1 0 8 0.0000 0 120 1140 4575 4575 READ_lock_by_write\001 54 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 55 3 0 1.00 60.00 120.00 56 6450 3600 6150 3600 57 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 58 3 0 1.00 60.00 120.00 59 6150 3750 6450 3750 60 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 61 3 0 1.00 60.00 120.00 62 6450 3975 6150 3975 63 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 64 3 0 1.00 60.00 120.00 65 6450 4125 6150 4125 66 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 67 3 0 1.00 60.00 120.00 68 6150 4575 6450 4575 69 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 70 3 0 1.00 60.00 120.00 71 6150 4275 6450 4275 72 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 73 3 0 1.00 60.00 120.00 74 6150 4425 6450 4425 75 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 76 3 0 1.00 60.00 120.00 77 4650 3600 4950 3600 78 2 1 2 1 0 11 50 -1 -1 3.000 0 0 -1 1 0 2 79 3 0 1.00 60.00 120.00 80 4950 3750 4650 3750 81 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 82 3 0 1.00 60.00 120.00 83 4650 3975 4950 3975 84 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 85 3 0 1.00 60.00 120.00 86 4650 4125 4950 4125 87 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 88 3 0 1.00 60.00 120.00 89 4950 4575 4650 4575 90 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 91 3 0 1.00 60.00 120.00 92 4950 4275 4650 4275 93 2 1 0 1 0 11 50 -1 -1 0.000 0 0 -1 1 0 2 94 3 0 1.00 60.00 120.00 95 4950 4425 4650 4425 84 96 4 1 0 50 -1 2 8 0.0000 0 105 720 5550 4050 RAM_LOCK\001 85 4 2 0 50 -1 0 8 -0.78540 105 930 5025 3075 WRITE_REQ_val\00186 4 2 0 50 -1 0 8 -0.78540 105 945 5175 3075 WRITE_REQ_ack\00187 4 2 0 50 -1 0 8 -0.78540 120 1065 5475 3075 WRITE_REQ_index\00188 4 2 0 50 -1 0 8 -0.78540 105 1005 5625 3075 WRITE_REQ_bank\00189 4 2 0 50 -1 0 8 -0.78540 120 1020 5775 3075 WRITE_REQ_valid\00190 4 2 0 50 -1 0 8 -0.78540 105 1455 5925 3075 WRITE_REQ_lock_by_read\00191 4 2 0 50 -1 0 8 -0.78540 120 1515 6075 3075 WRITE_REQ_lock_by_write\00197 4 2 0 50 -1 0 8 5.4978 0 105 930 5025 3075 WRITE_REQ_val\001 98 4 2 0 50 -1 0 8 5.4978 0 105 945 5175 3075 WRITE_REQ_ack\001 99 4 2 0 50 -1 0 8 5.4978 0 120 1065 5475 3075 WRITE_REQ_index\001 100 4 2 0 50 -1 0 8 5.4978 0 105 1005 5625 3075 WRITE_REQ_bank\001 101 4 2 0 50 -1 0 8 5.4978 0 120 1020 5775 3075 WRITE_REQ_valid\001 102 4 2 0 50 -1 0 8 5.4978 0 105 1455 5925 3075 WRITE_REQ_lock_by_read\001 103 4 2 0 50 -1 0 8 5.4978 0 120 1515 6075 3075 WRITE_REQ_lock_by_write\001 92 104 4 2 0 50 -1 0 8 0.7854 0 90 915 5025 5100 WRITE_RSP_val\001 93 105 4 2 0 50 -1 0 8 0.7854 0 90 930 5175 5100 WRITE_RSP_ack\001 … … 97 109 4 2 0 50 -1 0 8 0.7854 0 105 1440 5925 5100 WRITE_RSP_lock_by_read\001 98 110 4 2 0 50 -1 0 8 0.7854 0 120 1500 6075 5100 WRITE_RSP_lock_by_write\001 111 4 2 0 50 -1 0 8 0.0000 0 105 870 4575 3600 READ_REQ_val\001 112 4 2 0 50 -1 0 8 0.0000 0 105 885 4575 3750 READ_REQ_ack\001 113 4 2 0 50 -1 0 8 0.0000 0 120 1005 4575 3975 READ_REQ_index\001 114 4 2 0 50 -1 0 8 0.0000 0 105 945 4575 4125 READ_REQ_bank\001 115 4 2 0 50 -1 0 8 0.0000 0 120 960 4575 4275 READ_REQ_valid\001 116 4 2 0 50 -1 0 8 0.0000 0 105 1395 4575 4425 READ_REQ_lock_by_read\001 117 4 2 0 50 -1 0 8 0.0000 0 120 1455 4575 4575 READ_REQ_lock_by_write\001 118 4 0 0 50 -1 0 8 6.2832 0 90 1080 6525 3600 READ_VICTIM_val\001 119 4 0 0 50 -1 0 8 6.2832 0 90 1095 6525 3750 READ_VICTIM_ack\001 120 4 0 0 50 -1 0 8 6.2832 0 105 1215 6525 3975 READ_VICTIM_index\001 121 4 0 0 50 -1 0 8 6.2832 0 90 1155 6525 4125 READ_VICTIM_bank\001 122 4 0 0 50 -1 0 8 6.2832 0 105 1170 6525 4275 READ_VICTIM_valid\001 123 4 0 0 50 -1 0 8 6.2832 0 105 1605 6525 4425 READ_VICTIM_lock_by_read\001 124 4 0 0 50 -1 0 8 6.2832 0 120 1665 6525 4575 READ_VICTIM_lock_by_write\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_coherence_memoire.fig
r42 r45 8 8 -2 9 9 1200 2 10 5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5193.750 4050.000 4800 3675 4650 4050 4800 442511 10 5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5193.750 2700.000 4800 2325 4650 2700 4800 3075 12 11 5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5193.750 5100.000 4800 4725 4650 5100 4800 5475 12 6 3600 3300 5100 4200 13 5 1 0 1 0 7 50 -1 -1 0.000 0 1 0 0 5193.750 3750.000 4800 3375 4650 3750 4800 4125 14 4 0 0 50 -1 0 12 0.0000 4 15 135 4950 3750 ...\001 15 4 2 0 50 -1 0 12 0.0000 4 135 585 4500 3600 Access\001 16 4 2 0 50 -1 0 12 0.0000 4 135 690 4500 4050 variables\001 17 4 2 0 50 -1 0 12 0.0000 4 135 840 4500 3825 to a shared\001 18 -6 13 19 4 0 0 50 -1 0 12 0.0000 4 135 375 4950 3300 Lock\001 14 20 4 0 0 50 -1 0 12 0.0000 4 135 600 4950 4650 UnLock\001 15 4 0 0 50 -1 0 12 0.0000 4 15 135 4950 4050 ...\00116 21 4 0 0 50 -1 0 12 0.0000 4 15 135 4950 2700 ...\001 17 22 4 0 0 50 -1 0 12 0.0000 4 15 135 4950 5100 ...\001 18 4 2 0 50 -1 0 12 0.0000 4 135 585 4500 3900 Access\00119 23 4 2 0 50 -1 0 12 0.0000 4 135 810 4500 2550 No access\001 20 24 4 2 0 50 -1 0 12 0.0000 4 135 810 4500 4950 No access\001 21 25 4 2 0 50 -1 0 12 0.0000 4 135 690 4500 3000 variables\001 22 4 2 0 50 -1 0 12 0.0000 4 135 690 4500 4350 variables\00123 4 2 0 50 -1 0 12 0.0000 4 135 840 4500 4125 to a shared\00124 26 4 2 0 50 -1 0 12 0.0000 4 135 840 4500 2775 to a shared\001 25 27 4 2 0 50 -1 0 12 0.0000 4 135 840 4500 5175 to a shared\001 26 28 4 2 0 50 -1 0 12 0.0000 4 135 690 4500 5400 variables\001 27 4 0 0 50 -1 0 12 0.0000 4 180 2700 4950 3600 Flush (addressofshared variables)\00129 4 0 0 50 -1 0 12 0.0000 4 180 3945 4950 4350 Flush and Invalidation (address of shared variables)\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview.fig
r42 r45 8 8 -2 9 9 1200 2 10 6 3900 4425 9000 6000 11 6 3900 4425 9000 6000 12 6 5850 5400 7050 6000 13 2 2 0 1 0 27 200 -1 20 0.000 0 0 -1 0 0 5 14 5850 6000 7050 6000 7050 5400 5850 5400 5850 6000 15 4 1 0 200 -1 3 8 0.0000 0 105 690 6450 5700 RAM_LOCK\001 16 -6 17 1 3 0 1 0 7 200 -1 0 3.000 1 0.0000 5475 5925 19 19 5475 5925 5456 5926 18 1 3 0 1 0 7 200 -1 0 3.000 1 0.0000 7275 5775 19 19 7275 5775 7256 5776 19 1 3 0 1 0 7 200 -1 0 3.000 1 0.0000 5550 5475 19 19 5550 5475 5531 5476 20 2 1 0 1 0 7 200 -1 -1 3.000 0 0 -1 1 0 3 21 3 0 1.00 60.00 120.00 22 5850 5550 4275 5550 4275 4425 23 2 1 0 1 0 7 200 -1 -1 3.000 0 0 -1 1 0 3 24 3 0 1.00 60.00 120.00 25 4125 4425 4125 5700 5850 5700 26 2 1 0 1 0 7 200 -1 -1 3.000 0 0 -1 1 0 3 27 3 0 1.00 60.00 120.00 28 5850 5850 3975 5850 3975 4425 29 2 1 0 1 0 7 200 -1 -1 4.000 0 0 -1 1 0 3 30 3 0 1.00 60.00 120.00 31 9000 4500 9000 5625 7050 5625 32 2 1 0 1 0 7 200 -1 -1 3.000 0 0 -1 1 0 2 33 3 0 1.00 60.00 120.00 34 5475 5925 5850 5925 35 2 1 0 1 0 7 200 -1 -1 3.000 0 0 -1 1 0 2 36 3 0 1.00 60.00 120.00 37 5550 5475 5850 5475 38 2 1 0 1 0 7 200 -1 -1 4.000 0 0 -1 1 0 2 39 3 0 1.00 60.00 120.00 40 7275 5775 7050 5775 41 4 0 0 200 -1 0 6 0.0000 4 90 450 4350 5475 access_lock\001 42 4 0 0 200 -1 0 6 0.0000 4 90 480 4200 5625 request_lock\001 43 4 0 0 200 -1 0 6 0.0000 4 90 465 4050 5775 victim_lock\001 44 4 2 0 200 -1 0 6 0.0000 4 90 480 8925 5550 respons_lock\001 45 -6 46 -6 47 6 2700 3900 7200 6300 48 6 2700 4275 3525 4950 49 6 2700 4500 3300 4950 50 1 1 0 1 0 7 201 -1 20 0.000 1 0.0000 3000 4725 225 150 3000 4725 3225 4575 51 4 1 0 201 -1 0 8 0.0000 0 90 345 3000 4725 Victim\001 52 -6 53 2 1 0 1 0 7 201 -1 -1 4.000 0 0 -1 1 0 2 54 3 0 1.00 60.00 120.00 55 3225 4575 3525 4275 56 -6 57 1 3 0 1 0 7 201 -1 0 3.000 1 0.0000 5475 3975 19 19 5475 3975 5456 3976 58 2 1 0 1 0 7 201 -1 -1 3.000 0 0 -1 1 0 2 59 3 0 1.00 60.00 120.00 60 4425 3975 5850 3975 61 2 1 0 1 0 7 201 -1 -1 3.000 0 0 -1 1 0 2 62 3 0 1.00 60.00 120.00 63 5475 3975 5475 6300 64 4 2 0 201 -1 0 6 0.0000 4 75 540 7200 6150 address - bank\001 65 4 2 0 201 -1 0 6 0.0000 4 60 255 5025 4050 victim\001 66 -6 10 67 6 6150 3150 6750 3450 11 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 468 2 1 0 1 0 11 100 -1 20 0.000 0 0 -1 0 0 4 12 69 6150 3450 6750 3450 6750 3150 6150 3150 13 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 270 2 1 0 1 0 11 100 -1 20 0.000 0 0 -1 0 0 2 14 71 6600 3150 6600 3450 15 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 272 2 1 0 1 0 11 100 -1 20 0.000 0 0 -1 0 0 2 16 73 6450 3150 6450 3450 17 74 -6 18 6 4350 3450 5400 4425 19 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4875.000 4162.500 4725 4275 4875 4350 5025 4275 20 3 0 1.00 60.00 120.00 21 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 5043.750 3900.000 5175 3975 5175 3825 5025 3750 22 3 0 1.00 60.00 120.00 23 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 4706.250 3900.000 4725 3750 4575 3825 4575 3975 24 3 0 1.00 60.00 120.00 25 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4875 3675 150 150 4875 3675 5025 3675 26 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 5175 4125 150 150 5175 4125 5325 4125 27 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 4575 4125 150 150 4575 4125 4725 4125 28 -6 29 6 7500 3450 8550 4425 30 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8025.000 4162.500 7875 4275 8025 4350 8175 4275 31 3 0 1.00 60.00 120.00 32 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 7856.250 3900.000 7875 3750 7725 3825 7725 3975 33 3 0 1.00 60.00 120.00 34 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8193.750 3900.000 8325 3975 8325 3825 8175 3750 35 3 0 1.00 60.00 120.00 36 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8025 3675 150 150 8025 3675 8175 3675 37 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8325 4125 150 150 8325 4125 8475 4125 38 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 7725 4125 150 150 7725 4125 7875 4125 39 -6 40 6 4425 5025 5325 5475 41 1 1 0 1 0 7 50 -1 20 0.000 1 0.0000 4875 5250 375 150 4875 5250 5250 5100 42 4 1 0 50 -1 0 8 0.0000 0 90 345 4875 5250 Victim\001 43 -6 44 6 4050 6300 4350 6900 45 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 46 4050 6300 4050 6900 4350 6900 4350 6300 47 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 48 4350 6750 4050 6750 49 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 50 4350 6600 4050 6600 51 -6 52 6 8550 6300 8850 6900 53 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 4 54 8550 6900 8550 6300 8850 6300 8850 6900 55 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 56 8850 6450 8550 6450 57 2 1 0 1 0 11 50 -1 20 0.000 0 0 -1 0 0 2 58 8850 6600 8550 6600 59 -6 60 6 7500 7350 8550 8325 61 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8025.000 8062.500 7875 8175 8025 8250 8175 8175 62 3 0 1.00 60.00 120.00 63 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 8193.750 7800.000 8325 7875 8325 7725 8175 7650 64 3 0 1.00 60.00 120.00 65 5 1 0 1 0 14 50 -1 -1 0.000 0 1 1 0 7856.250 7800.000 7875 7650 7725 7725 7725 7875 66 3 0 1.00 60.00 120.00 67 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8025 7575 150 150 8025 7575 8175 7575 68 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 8325 8025 150 150 8325 8025 8475 8025 69 1 3 0 1 0 14 50 -1 20 0.000 1 0.0000 7725 8025 150 150 7725 8025 7875 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trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_overview_basic.fig
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5550 3150 val - ack\001 314 4 1 0 100 -1 2 10 0.0000 0 105 1245 6450 8400 VCI Interconnect\001 315 4 2 0 100 -1 0 6 0.0000 4 60 165 8100 7875 data\001 316 4 1 0 100 -1 0 8 0.0000 0 105 570 7350 7500 line_buffer\001 317 4 0 0 100 -1 0 6 0.0000 4 45 180 8400 7500 error\001 318 4 0 0 100 -1 0 6 0.0000 4 75 345 8550 7275 val - ack\001 319 4 0 0 100 -1 0 6 0.0000 4 75 345 8550 8025 val - ack\001 320 4 1 0 100 -1 0 8 0.0000 0 90 525 8250 8400 VCI_RSP\001 321 4 0 0 100 -1 0 6 0.0000 4 75 345 4500 7950 val - ack\001 322 4 2 0 100 -1 0 6 0.0000 4 75 150 8175 4800 line\001 323 4 2 0 100 -1 0 6 0.0000 4 60 165 8100 3000 data\001 324 4 2 0 100 -1 0 6 0.0000 4 45 180 8250 4500 error\001 325 4 2 0 100 -1 0 6 0.0000 4 60 210 7800 6450 index\001 326 4 2 0 100 -1 0 6 0.0000 4 60 210 5025 7125 index\001 327 4 2 0 100 -1 0 8 0.0000 0 105 735 4425 6750 QUEUE_REQ\001 328 4 0 0 100 -1 0 6 0.0000 4 75 345 4050 6975 val - ack\001 329 4 0 0 100 -1 0 6 0.0000 4 75 345 3675 6525 val - ack\001 330 4 0 0 100 -1 3 8 0.0000 0 105 690 8475 6750 QUEUE_RSP\001 331 4 1 0 100 -1 3 8 0.0000 0 105 795 8250 2475 DCACHE_RSP\001 332 4 1 0 100 -1 3 8 0.0000 0 105 825 4650 2550 DCACHE_REQ\001 333 4 2 0 100 -1 3 8 0.0000 0 105 810 3450 7650 FSM_VCI_REQ\001 334 4 2 0 100 -1 3 8 0.0000 0 105 1140 3450 3975 FSM_DCACHE_REQ\001 335 4 0 0 100 -1 3 8 0.0000 0 105 780 9750 7650 FSM_VCI_RSP\001 336 4 0 0 100 -1 3 8 0.0000 0 105 1110 9750 3975 FSM_DCACHE_RSP\001 337 4 0 0 100 -1 0 6 0.0000 4 75 345 8625 3000 val - ack\001 338 4 2 0 100 -1 0 6 0.0000 4 60 120 5400 3900 Hit\001 339 4 0 0 100 -1 0 6 0.0000 4 75 180 5625 4350 bank\001 340 4 1 0 100 -1 0 8 0.0000 0 105 540 5325 8400 VCI_REQ\001 341 4 2 0 100 -1 0 6 0.0000 4 75 345 9375 6300 val - ack\001 342 4 2 0 100 -1 0 6 0.0000 4 90 285 8700 4275 priority\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_pipeline.fig
r44 r45 8 8 -2 9 9 1200 2 10 6 4500 3600 9300 405011 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 512 5100 3600 5100 4050 4500 4050 4500 3600 5100 360013 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 514 5700 3600 5700 4050 5100 4050 5100 3600 5700 360015 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 516 6300 3600 6300 4050 5700 4050 5700 3600 6300 360017 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 518 7500 3600 7500 4050 6300 4050 6300 3600 7500 360019 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 520 8700 3600 8700 4050 7500 4050 7500 3600 8700 360021 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 522 9300 3600 9300 4050 8700 4050 8700 3600 9300 360023 4 1 0 50 -1 0 8 0.0000 0 75 345 4800 3750 dcache\00124 4 1 0 50 -1 0 8 0.0000 0 105 375 4800 3975 request\00125 4 1 0 50 -1 0 8 0.0000 0 105 330 5400 3750 update\00126 4 1 0 50 -1 0 8 0.0000 0 75 285 5400 3975 status\00127 4 1 0 50 -1 0 8 0.0000 0 75 225 6000 3750 VCI\00128 4 1 0 50 -1 0 8 0.0000 0 105 375 6000 3975 request\00129 4 1 0 50 -1 0 8 0.0000 0 90 750 6900 3825 memory access\00130 4 1 0 50 -1 0 8 0.0000 0 75 225 8100 3750 VCI\00131 4 1 0 50 -1 0 8 0.0000 0 90 375 8100 3975 respons\00132 4 1 0 50 -1 0 8 0.0000 0 75 345 9000 3750 dcache\00133 4 1 0 50 -1 0 8 0.0000 0 90 375 9000 3975 respons\00134 -635 6 8100 4200 8700 465036 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 537 8700 4200 8700 4650 8100 4650 8100 4200 8700 420038 4 1 0 50 -1 0 8 0.0000 0 75 345 8400 4350 dcache\00139 4 1 0 50 -1 0 8 0.0000 0 90 375 8400 4575 respons\00140 -641 6 4500 3000 5700 345042 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 543 5100 3000 5100 3450 4500 3450 4500 3000 5100 300044 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 545 5700 3000 5700 3450 5100 3450 5100 3000 5700 300046 4 1 0 50 -1 0 8 0.0000 0 75 345 4800 3150 dcache\00147 4 1 0 50 -1 0 8 0.0000 0 105 375 4800 3375 request\00148 4 1 0 50 -1 0 8 0.0000 0 75 345 5400 3150 dcache\00149 4 1 0 50 -1 0 8 0.0000 0 90 375 5400 3375 respons\00150 -651 10 6 4500 5400 5700 5850 52 11 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 … … 62 21 5100 4200 5100 4650 4500 4650 4500 4200 5100 4200 63 22 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 64 5700 4200 5700 4650 5100 4650 5100 4200 5700 420065 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 566 6300 4200 6300 4650 5700 4650 5700 4200 6300 420067 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 568 7500 4200 7500 4650 6300 4650 6300 4200 7500 420069 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 570 8100 4200 8100 4650 7500 4650 7500 4200 8100 420071 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 572 23 5100 4800 5100 5250 4500 5250 4500 4800 5100 4800 73 24 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 74 25 5700 4800 5700 5250 5100 5250 5100 4800 5700 4800 75 2 1 0 1 0 29 50 -1 20 0.000 0 0 -1 0 0 2 76 5100 5025 5700 5025 26 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 27 5100 3600 5100 4050 4500 4050 4500 3600 5100 3600 28 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 29 5700 4200 5700 4650 5100 4650 5100 4200 5700 4200 30 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 31 6900 4200 6900 4650 5700 4650 5700 4200 6900 4200 32 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 33 7500 4200 7500 4650 6900 4650 6900 4200 7500 4200 34 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 35 5700 3600 5700 4050 5100 4050 5100 3600 5700 3600 36 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 37 6900 3600 6900 4050 5700 4050 5700 3600 6900 3600 38 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 39 8100 3600 8100 4050 6900 4050 6900 3600 8100 3600 40 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 41 8700 3600 8700 4050 8100 4050 8100 3600 8700 3600 42 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 43 5100 3000 5100 3450 4500 3450 4500 3000 5100 3000 44 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 45 5700 3000 5700 3450 5100 3450 5100 3000 5700 3000 46 2 4 0 1 0 29 50 -1 20 0.000 0 0 7 0 0 5 47 8100 4200 8100 4650 7500 4650 7500 4200 8100 4200 77 48 4 2 0 50 -1 0 8 0.0000 0 90 525 4200 3300 Read - Hit\001 78 49 4 2 0 50 -1 0 8 0.0000 0 90 600 4200 3900 Read - Miss\001 79 50 4 1 0 50 -1 0 8 0.0000 0 75 345 4800 4350 dcache\001 80 51 4 1 0 50 -1 0 8 0.0000 0 105 375 4800 4575 request\001 81 4 1 0 50 -1 0 8 0.0000 0 105 330 5400 4350 update\00182 4 1 0 50 -1 0 8 0.0000 0 75 285 5400 4575 status\00183 4 1 0 50 -1 0 8 0.0000 0 75 225 6000 4350 VCI\00184 4 1 0 50 -1 0 8 0.0000 0 105 375 6000 4575 request\00185 4 1 0 50 -1 0 8 0.0000 0 90 750 6900 4425 memory access\00186 4 1 0 50 -1 0 8 0.0000 0 75 225 7800 4350 VCI\00187 4 1 0 50 -1 0 8 0.0000 0 90 375 7800 4575 respons\00188 52 4 2 0 50 -1 0 8 0.0000 0 90 570 4200 4350 Write - Hit\001 89 53 4 2 0 50 -1 0 8 0.0000 0 90 645 4200 4575 Write - Miss\001 … … 94 58 4 2 0 50 -1 0 8 0.0000 0 75 255 4200 5550 Lock\001 95 59 4 2 0 50 -1 0 8 0.0000 0 75 450 4200 5775 Prefetch\001 96 4 1 0 50 -1 0 8 0.0000 0 105 330 5400 4875 update\001 97 4 1 0 50 -1 0 8 0.0000 0 90 375 5400 5250 respons\001 98 4 1 0 50 -1 0 8 0.0000 0 75 345 5400 5175 dcache\001 99 4 1 0 50 -1 0 8 0.0000 0 75 285 5400 4950 status\001 60 4 1 0 50 -1 0 8 0.0000 0 75 345 5400 4950 dcache\001 61 4 1 0 50 -1 0 8 0.0000 0 90 375 5400 5175 respons\001 62 4 1 0 50 -1 0 8 0.0000 0 75 345 4800 3750 dcache\001 63 4 1 0 50 -1 0 8 0.0000 0 105 375 4800 3975 request\001 64 4 1 0 50 -1 0 8 0.0000 0 75 225 5400 4350 VCI\001 65 4 1 0 50 -1 0 8 0.0000 0 105 375 5400 4575 request\001 66 4 1 0 50 -1 0 8 0.0000 0 90 750 6300 4425 memory access\001 67 4 1 0 50 -1 0 8 0.0000 0 75 225 7200 4350 VCI\001 68 4 1 0 50 -1 0 8 0.0000 0 90 375 7200 4575 respons\001 69 4 1 0 50 -1 0 8 0.0000 0 75 225 5400 3750 VCI\001 70 4 1 0 50 -1 0 8 0.0000 0 105 375 5400 3975 request\001 71 4 1 0 50 -1 0 8 0.0000 0 90 750 6300 3825 memory access\001 72 4 1 0 50 -1 0 8 0.0000 0 75 225 7500 3750 VCI\001 73 4 1 0 50 -1 0 8 0.0000 0 90 375 7500 3975 respons\001 74 4 1 0 50 -1 0 8 0.0000 0 75 345 8400 3750 dcache\001 75 4 1 0 50 -1 0 8 0.0000 0 90 375 8400 3975 respons\001 76 4 1 0 50 -1 0 8 0.0000 0 75 345 4800 3150 dcache\001 77 4 1 0 50 -1 0 8 0.0000 0 105 375 4800 3375 request\001 78 4 1 0 50 -1 0 8 0.0000 0 75 345 5400 3150 dcache\001 79 4 1 0 50 -1 0 8 0.0000 0 90 375 5400 3375 respons\001 80 4 1 0 50 -1 0 8 0.0000 0 75 345 7800 4350 dcache\001 81 4 1 0 50 -1 0 8 0.0000 0 90 375 7800 4575 respons\001 -
trunk/IPs/systemC/processor/Morpheo/Documentation/Source/Schema/CACHE_protocole.fig
r42 r45 3 3 Center 4 4 Inches 5 Letter6 100.005 A4 6 96.00 7 7 Single 8 8 -2 9 9 1200 2 10 6 2625 3750 6525 4650 10 6 9600 6150 10800 6450 11 2 4 0 1 0 4 50 -1 20 0.000 0 0 7 0 0 5 12 9600 6450 9600 6150 10800 6150 10800 6450 9600 6450 13 4 1 0 50 -1 0 8 0.0000 0 120 930 10200 6300 lock_by_write = 1\001 14 -6 15 6 9600 8700 10800 9000 16 2 4 0 1 0 14 50 -1 20 0.000 0 0 7 0 0 5 17 9600 9000 9600 8700 10800 8700 10800 9000 9600 9000 18 4 1 0 50 -1 0 8 0.0000 0 120 930 10200 8850 lock_by_write = 0\001 19 -6 11 20 6 4275 3750 5550 4350 12 21 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 … … 16 25 4 0 0 50 -1 0 8 0.0000 0 60 120 5400 3975 no\001 17 26 -6 18 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 19 3 0 1.00 60.00 120.00 20 5400 4050 6450 4050 6450 4650 21 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 22 3 0 1.00 60.00 120.00 23 4500 4050 2700 4050 2700 4650 24 -6 25 6 2625 6150 4275 7050 26 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 27 3 0 1.00 60.00 120.00 28 3000 6450 2700 6450 2700 7050 29 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 30 3 0 1.00 60.00 120.00 31 3900 6450 4200 6450 4200 7050 32 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 33 3900 6450 3450 6150 3000 6450 3450 6750 3900 6450 34 4 2 0 50 -1 0 8 0.0000 0 90 165 3000 6375 yes\001 35 4 0 0 50 -1 0 8 0.0000 0 60 120 3900 6375 no\001 36 4 1 0 50 -1 0 8 0.0000 0 75 225 3450 6375 lock\001 37 4 1 0 50 -1 0 8 0.0000 0 105 435 3450 6525 by read ?\001 38 -6 39 6 8625 4650 10275 5550 40 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 41 3 0 1.00 60.00 120.00 42 9000 4950 8700 4950 8700 5550 43 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 44 3 0 1.00 60.00 120.00 45 9900 4950 10200 4950 10200 5550 27 6 9600 8100 10800 8400 28 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 29 9600 8400 9600 8100 10800 8100 10800 8400 9600 8400 30 4 1 0 50 -1 0 8 0.0000 0 120 615 10200 8250 wait respons\001 31 -6 32 6 11100 8100 12300 8400 33 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 34 11100 8400 11100 8100 12300 8100 12300 8400 11100 8400 35 4 1 0 50 -1 0 8 0.0000 0 120 615 11700 8250 wait respons\001 36 -6 37 6 9600 7350 10800 7800 38 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 39 9600 7800 9600 7350 10800 7350 10800 7800 9600 7800 40 4 1 0 50 -1 0 8 0.0000 0 90 420 10200 7500 write in \001 41 4 1 0 50 -1 0 8 0.0000 0 105 735 10200 7725 QUEUE_REQ\001 42 -6 43 6 9600 6750 10800 7050 44 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 45 9600 7050 9600 6750 10800 6750 10800 7050 9600 7050 46 4 1 0 50 -1 0 8 0.0000 0 105 1005 10200 6900 write RAM_DATA\001 47 -6 48 6 11100 7350 12300 7800 49 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 50 11100 7800 11100 7350 12300 7350 12300 7800 11100 7800 51 4 1 0 50 -1 0 8 0.0000 0 105 735 11700 7725 QUEUE_REQ\001 52 4 1 0 50 -1 0 8 0.0000 0 90 420 11700 7500 write in \001 53 -6 54 6 5775 4650 7050 5250 55 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 56 6900 4950 6450 4650 6000 4950 6450 5250 6900 4950 57 4 1 0 50 -1 0 8 0.0000 0 90 240 6450 4875 valid\001 58 4 1 0 50 -1 0 8 0.0000 0 90 390 6450 5025 victim ?\001 59 4 0 0 50 -1 0 8 0.0000 0 60 120 6900 4875 no\001 60 4 2 0 50 -1 0 8 0.0000 0 90 165 6000 4875 yes\001 61 -6 62 6 9000 4650 9900 5250 46 63 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 47 64 9900 4950 9450 4650 9000 4950 9450 5250 9900 4950 48 4 2 0 50 -1 0 8 0.0000 0 90 165 9000 4875 yes\001 49 4 0 0 50 -1 0 8 0.0000 0 60 120 9900 4875 no\001 50 4 1 0 50 -1 0 8 0.0000 0 75 225 9450 4875 lock\001 51 4 1 0 50 -1 0 8 0.0000 0 105 435 9450 5025 by read ?\001 52 -6 53 6 9600 8100 10800 8400 54 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 55 9600 8400 9600 8100 10800 8100 10800 8400 9600 8400 56 4 1 0 50 -1 0 8 0.0000 0 105 1005 10200 8250 write RAM_DATA\001 57 -6 58 6 9600 6450 10800 8100 59 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 60 3 0 1.00 60.00 120.00 61 10200 6450 10200 6750 62 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 63 9600 7200 9600 6750 10800 6750 10800 7200 9600 7200 64 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 65 3 0 1.00 60.00 120.00 66 10200 7200 10200 7500 67 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 68 9600 7800 9600 7500 10800 7500 10800 7800 9600 7800 69 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 70 3 0 1.00 60.00 120.00 71 10200 7800 10200 8100 72 4 1 0 50 -1 0 8 0.0000 0 90 420 10200 6900 write in \001 73 4 1 0 50 -1 0 8 0.0000 0 105 735 10200 7125 QUEUE_REQ\001 74 4 1 0 50 -1 0 8 0.0000 0 120 615 10200 7650 wait respons\001 75 -6 76 6 10275 3750 11550 4350 77 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 78 11400 4050 10950 3750 10500 4050 10950 4350 11400 4050 79 4 1 0 50 -1 0 8 0.0000 0 90 240 10950 4050 Hit ?\001 80 4 2 0 50 -1 0 8 0.0000 0 90 165 10500 3975 yes\001 81 4 0 0 50 -1 0 8 0.0000 0 60 120 11400 3975 no\001 82 -6 83 6 11100 6750 12300 7200 84 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 85 11100 7200 11100 6750 12300 6750 12300 7200 11100 7200 86 4 1 0 50 -1 0 8 0.0000 0 105 735 11700 7125 QUEUE_REQ\001 87 4 1 0 50 -1 0 8 0.0000 0 90 420 11700 6900 write in \001 88 -6 89 6 11100 7500 12300 7800 90 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 91 11100 7800 11100 7500 12300 7500 12300 7800 11100 7800 92 4 1 0 50 -1 0 8 0.0000 0 120 615 11700 7650 wait respons\001 93 -6 65 4 1 0 50 -1 0 8 0.0000 0 90 720 9450 5025 read or write ?\001 66 4 1 0 50 -1 0 8 0.0000 0 105 375 9450 4875 lock by\001 67 -6 68 6 2100 5550 3300 9300 69 6 2100 5550 3300 5850 70 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 71 2100 5850 2100 5550 3300 5550 3300 5850 2100 5850 72 4 1 0 50 -1 0 8 0.0000 0 105 585 2700 5700 req_ack = 0\001 73 -6 74 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 75 3 0 1.00 60.00 120.00 76 2700 5850 2700 9300 77 -6 78 6 2775 4650 4050 5250 79 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 80 3900 4950 3450 4650 3000 4950 3450 5250 3900 4950 81 4 0 0 50 -1 0 8 0.0000 0 60 120 3900 4875 no\001 82 4 2 0 50 -1 0 8 0.0000 0 90 165 3000 4875 yes\001 83 4 1 0 50 -1 0 8 0.0000 0 105 375 3450 4875 lock by\001 84 4 1 0 50 -1 0 8 0.0000 0 75 285 3450 5025 read ?\001 85 -6 86 6 3600 5550 4800 9300 87 6 3600 7350 4800 7800 88 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 89 3600 7800 3600 7350 4800 7350 4800 7800 3600 7800 90 4 1 0 50 -1 0 8 0.0000 0 90 420 4200 7500 write in \001 91 4 1 0 50 -1 0 8 0.0000 0 105 1095 4200 7725 QUEUE_READ_HIT\001 92 -6 93 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 94 3 0 1.00 60.00 120.00 95 4200 7800 4200 9300 96 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 97 3 0 1.00 60.00 120.00 98 4200 5850 4200 6750 99 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 100 3600 5850 3600 5550 4800 5550 4800 5850 3600 5850 101 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 102 3 0 1.00 60.00 120.00 103 4200 7050 4200 7350 104 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 105 3600 7050 3600 6750 4800 6750 4800 7050 3600 7050 106 4 1 0 50 -1 0 8 0.0000 0 105 585 4200 5700 req_ack = 1\001 107 4 1 0 50 -1 0 8 0.0000 0 90 945 4200 6900 read RAM_DATA\001 108 -6 109 6 5100 5550 6300 9300 94 110 6 5100 6750 6300 7200 95 111 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 … … 102 118 5100 8400 5100 8100 6300 8100 6300 8400 5100 8400 103 119 4 1 0 50 -1 0 8 0.0000 0 105 1005 5700 8250 write RAM_DATA\001 104 -6105 6 3600 7650 4800 8100106 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5107 3600 8100 3600 7650 4800 7650 4800 8100 3600 8100108 4 1 0 50 -1 0 8 0.0000 0 90 420 4200 7800 write in \001109 4 1 0 50 -1 0 8 0.0000 0 105 1095 4200 8025 QUEUE_READ_HIT\001110 120 -6 111 121 6 5100 6150 6300 6450 … … 114 124 4 1 0 50 -1 0 8 0.0000 0 105 870 5700 6300 lock_by_read = 1\001 115 125 -6 116 6 9600 6150 10800 6450 117 2 4 0 1 0 4 50 -1 20 0.000 0 0 7 0 0 5 118 9600 6450 9600 6150 10800 6150 10800 6450 9600 6450 119 4 1 0 50 -1 0 8 0.0000 0 120 930 10200 6300 lock_by_write = 1\001 120 -6 121 6 11100 6150 12300 6450 126 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 127 3 0 1.00 60.00 120.00 128 5700 9000 5700 9300 129 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 130 3 0 1.00 60.00 120.00 131 5700 5850 5700 6150 132 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 133 3 0 1.00 60.00 120.00 134 5700 6450 5700 6750 135 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 136 3 0 1.00 60.00 120.00 137 5700 7200 5700 7500 138 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 139 5100 7800 5100 7500 6300 7500 6300 7800 5100 7800 140 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 141 3 0 1.00 60.00 120.00 142 5700 7800 5700 8100 143 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 144 3 0 1.00 60.00 120.00 145 5700 8400 5700 8700 146 2 4 0 1 0 14 50 -1 20 0.000 0 0 7 0 0 5 147 5100 9000 5100 8700 6300 8700 6300 9000 5100 9000 148 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 149 5100 5850 5100 5550 6300 5550 6300 5850 5100 5850 150 4 1 0 50 -1 0 8 0.0000 0 105 585 5700 5700 req_ack = 1\001 151 4 1 0 50 -1 0 8 0.0000 0 120 615 5700 7650 wait respons\001 152 4 1 0 50 -1 0 8 0.0000 0 105 870 5700 8850 lock_by_read = 0\001 153 -6 154 6 6600 5550 7800 9300 155 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 156 3 0 1.00 60.00 120.00 157 7200 5850 7200 9300 158 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 159 6600 5850 6600 5550 7800 5550 7800 5850 6600 5850 160 4 1 0 50 -1 0 8 0.0000 0 105 585 7200 5700 req_ack = 0\001 161 -6 162 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 163 3 0 1.00 60.00 120.00 164 7500 3150 4950 3150 4950 3750 165 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 166 8400 3150 7950 2850 7500 3150 7950 3450 8400 3150 167 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 168 3 0 1.00 60.00 120.00 169 10200 5850 10200 6150 170 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 171 3 0 1.00 60.00 120.00 172 10200 8400 10200 8700 173 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 174 3 0 1.00 60.00 120.00 175 11400 4050 12450 4050 12450 4650 176 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 177 3 0 1.00 60.00 120.00 178 10500 4050 9450 4050 9450 4650 179 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 180 3 0 1.00 60.00 120.00 181 12000 4950 11700 4950 11700 5550 182 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 183 3 0 1.00 60.00 120.00 184 12900 4950 13200 4950 13200 5550 185 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 186 3 0 1.00 60.00 120.00 187 11700 5850 11700 6150 188 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 189 12900 4950 12450 4650 12000 4950 12450 5250 12900 4950 190 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 191 3 0 1.00 60.00 120.00 192 8400 3150 10950 3150 10950 3750 193 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 194 3 0 1.00 60.00 120.00 195 8700 5850 8700 9300 196 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 197 3 0 1.00 60.00 120.00 198 10200 9000 10200 9300 199 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 200 3 0 1.00 60.00 120.00 201 11700 9150 11700 9300 202 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 203 3 0 1.00 60.00 120.00 204 13200 5850 13200 9300 205 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 206 3 0 1.00 60.00 120.00 207 6000 4950 5700 4950 5700 5550 208 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 209 3 0 1.00 60.00 120.00 210 6900 4950 7200 4950 7200 5550 211 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 212 12600 5850 12600 5550 13800 5550 13800 5850 12600 5850 213 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 214 11100 5850 11100 5550 12300 5550 12300 5850 11100 5850 215 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 216 9600 5850 9600 5550 10800 5550 10800 5850 9600 5850 217 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 218 8100 5850 8100 5550 9300 5550 9300 5850 8100 5850 219 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 220 3 0 1.00 60.00 120.00 221 7950 2550 7950 2850 222 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 223 3 0 1.00 60.00 120.00 224 5400 4050 6450 4050 6450 4650 225 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 226 3 0 1.00 60.00 120.00 227 4500 4050 3450 4050 3450 4650 122 228 2 4 0 1 0 4 50 -1 20 0.000 0 0 7 0 0 5 123 229 11100 6450 11100 6150 12300 6150 12300 6450 11100 6450 124 4 1 0 50 -1 0 8 0.0000 0 120 930 11700 6300 lock_by_write = 1\001 125 -6 126 6 9600 8700 10800 9000 230 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 231 3 0 1.00 60.00 120.00 232 9000 4950 8700 4950 8700 5550 233 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 234 3 0 1.00 60.00 120.00 235 9900 4950 10200 4950 10200 5550 236 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 237 3 0 1.00 60.00 120.00 238 10200 6450 10200 6750 239 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 240 3 0 1.00 60.00 120.00 241 10200 7800 10200 8100 242 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 243 3 0 1.00 60.00 120.00 244 11700 8400 11700 8550 245 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 246 3 0 1.00 60.00 120.00 247 10200 7050 10200 7350 248 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 249 3 0 1.00 60.00 120.00 250 11700 7800 11700 8100 251 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 252 3 0 1.00 60.00 120.00 253 11700 6450 11700 7350 254 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 255 11400 4050 10950 3750 10500 4050 10950 4350 11400 4050 256 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 257 3 0 1.00 60.00 120.00 258 3900 4950 4200 4950 4200 5550 259 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 260 3 0 1.00 60.00 120.00 261 3000 4950 2700 4950 2700 5550 262 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 263 2100 9600 2100 9300 13800 9300 13800 9600 2100 9600 264 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 265 2100 2550 2100 2250 13800 2250 13800 2550 2100 2550 127 266 2 4 0 1 0 14 50 -1 20 0.000 0 0 7 0 0 5 128 9600 9000 9600 8700 10800 8700 10800 9000 9600 9000 129 4 1 0 50 -1 0 8 0.0000 0 120 930 10200 8850 lock_by_write = 0\001 130 -6 131 6 11100 8700 12300 9000 132 2 4 0 1 0 14 50 -1 20 0.000 0 0 7 0 0 5 133 11100 9000 11100 8700 12300 8700 12300 9000 11100 9000 134 4 1 0 50 -1 0 8 0.0000 0 90 555 11700 8850 invalid line\001 135 -6 136 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 137 3 0 1.00 60.00 120.00 138 3450 5850 3450 6150 139 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 140 3 0 1.00 60.00 120.00 141 2250 4950 1950 4950 1950 5550 142 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 143 3 0 1.00 60.00 120.00 144 3150 4950 3450 4950 3450 5550 145 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 146 3150 4950 2700 4650 2250 4950 2700 5250 3150 4950 147 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2 148 3 0 1.00 60.00 120.00 149 4200 8100 4200 9300 150 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 151 3 0 1.00 60.00 120.00 152 4200 7350 4200 7650 153 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 154 3 0 1.00 60.00 120.00 155 7500 3150 4950 3150 4950 3750 156 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 157 8400 3150 7950 2850 7500 3150 7950 3450 8400 3150 158 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 159 3 0 1.00 60.00 120.00 160 10200 5850 10200 6150 161 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 162 3 0 1.00 60.00 120.00 163 10200 8400 10200 8700 164 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 165 3 0 1.00 60.00 120.00 166 11400 4050 12450 4050 12450 4650 167 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 168 3 0 1.00 60.00 120.00 169 10500 4050 9450 4050 9450 4650 170 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 171 3 0 1.00 60.00 120.00 172 12000 4950 11700 4950 11700 5550 173 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 174 3 0 1.00 60.00 120.00 175 12900 4950 13200 4950 13200 5550 176 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 177 3 0 1.00 60.00 120.00 178 11700 5850 11700 6150 179 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 180 12900 4950 12450 4650 12000 4950 12450 5250 12900 4950 181 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 182 3 0 1.00 60.00 120.00 183 11700 6450 11700 6750 184 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 185 3 0 1.00 60.00 120.00 186 11700 7200 11700 7500 187 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 188 3 0 1.00 60.00 120.00 189 11700 7800 11700 8700 190 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 191 1350 9600 1350 9300 13800 9300 13800 9600 1350 9600 192 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 193 3 0 1.00 60.00 120.00 194 8400 3150 10950 3150 10950 3750 195 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 196 3 0 1.00 60.00 120.00 197 5700 9000 5700 9300 198 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 199 3 0 1.00 60.00 120.00 200 7200 5850 7200 9300 201 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 202 3 0 1.00 60.00 120.00 203 8700 5850 8700 9300 204 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 205 3 0 1.00 60.00 120.00 206 1950 5850 1950 9300 207 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 208 3 0 1.00 60.00 120.00 209 2700 7350 2700 7650 210 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 211 3 0 1.00 60.00 120.00 212 2700 8100 2700 8400 213 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 214 2100 8700 2100 8400 3300 8400 3300 8700 2100 8700 215 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 216 3 0 1.00 60.00 120.00 217 2700 8700 2700 9300 218 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 219 3 0 1.00 60.00 120.00 220 10200 9000 10200 9300 221 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 222 3 0 1.00 60.00 120.00 223 11700 9000 11700 9300 224 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 225 3 0 1.00 60.00 120.00 226 13200 5850 13200 9300 227 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 228 3 0 1.00 60.00 120.00 229 6000 4950 5700 4950 5700 5550 230 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 3 231 3 0 1.00 60.00 120.00 232 6900 4950 7200 4950 7200 5550 233 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 234 3 0 1.00 60.00 120.00 235 5700 5850 5700 6150 236 2 1 0 1 0 7 50 -1 20 0.000 0 0 -1 0 0 5 237 6900 4950 6450 4650 6000 4950 6450 5250 6900 4950 238 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 239 3 0 1.00 60.00 120.00 240 5700 6450 5700 6750 241 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 242 3 0 1.00 60.00 120.00 243 5700 7200 5700 7500 244 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 245 5100 7800 5100 7500 6300 7500 6300 7800 5100 7800 246 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 247 3 0 1.00 60.00 120.00 248 5700 7800 5700 8100 249 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 250 3 0 1.00 60.00 120.00 251 5700 8400 5700 8700 252 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 253 3600 7350 3600 7050 4800 7050 4800 7350 3600 7350 254 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 255 2100 8100 2100 7650 3300 7650 3300 8100 2100 8100 256 2 4 0 1 0 7 50 -1 20 0.000 0 0 7 0 0 5 257 2100 7350 2100 7050 3300 7050 3300 7350 2100 7350 258 2 4 0 1 0 14 50 -1 20 0.000 0 0 7 0 0 5 259 5100 9000 5100 8700 6300 8700 6300 9000 5100 9000 260 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 261 12600 5850 12600 5550 13800 5550 13800 5850 12600 5850 262 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 263 11100 5850 11100 5550 12300 5550 12300 5850 11100 5850 264 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 265 9600 5850 9600 5550 10800 5550 10800 5850 9600 5850 266 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 267 8100 5850 8100 5550 9300 5550 9300 5850 8100 5850 268 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 269 6600 5850 6600 5550 7800 5550 7800 5850 6600 5850 270 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 271 5100 5850 5100 5550 6300 5550 6300 5850 5100 5850 272 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 273 2850 5850 2850 5550 4050 5550 4050 5850 2850 5850 274 2 4 0 1 0 11 50 -1 20 0.000 0 0 7 0 0 5 275 1350 5850 1350 5550 2550 5550 2550 5850 1350 5850 276 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2 277 3 0 1.00 60.00 120.00 278 7950 2550 7950 2850 279 4 1 0 50 -1 0 8 0.0000 0 105 585 3450 5700 req_ack = 1\001 280 4 2 0 50 -1 0 8 0.0000 0 90 165 2250 4875 yes\001 281 4 0 0 50 -1 0 8 0.0000 0 60 120 3150 4875 no\001 282 4 1 0 50 -1 0 8 0.0000 0 75 225 2700 4875 lock\001 283 4 1 0 50 -1 0 8 0.0000 0 120 495 2700 5025 by write ?\001 284 4 1 0 50 -1 0 8 0.0000 0 105 585 1950 5700 req_ack = 0\001 285 4 1 0 50 -1 0 8 0.0000 0 75 660 2700 7200 uncached = 1\001 286 4 1 0 50 -1 0 8 0.0000 0 90 945 4200 7200 read RAM_DATA\001 267 11100 9150 11100 8550 12300 8550 12300 9150 11100 9150 287 268 4 1 0 50 -1 0 8 0.0000 0 105 255 7950 3150 Type\001 288 269 4 2 0 50 -1 0 8 0.0000 0 75 210 7500 3075 read\001 … … 296 277 4 1 0 50 -1 0 8 0.0000 0 105 585 11700 5700 req_ack = 1\001 297 278 4 1 0 50 -1 0 8 0.0000 0 75 195 7950 9450 End\001 298 4 1 0 50 -1 0 8 0.0000 0 90 420 2700 7800 write in \001299 4 1 0 50 -1 0 8 0.0000 0 105 735 2700 8025 QUEUE_REQ\001300 4 1 0 50 -1 0 8 0.0000 0 120 615 2700 8550 wait respons\001301 4 1 0 50 -1 0 8 0.0000 0 90 240 6450 4875 valid\001302 4 1 0 50 -1 0 8 0.0000 0 90 390 6450 5025 victim ?\001303 4 0 0 50 -1 0 8 0.0000 0 60 120 6900 4875 no\001304 4 2 0 50 -1 0 8 0.0000 0 90 165 6000 4875 yes\001305 4 1 0 50 -1 0 8 0.0000 0 105 585 7200 5700 req_ack = 0\001306 4 1 0 50 -1 0 8 0.0000 0 105 585 5700 5700 req_ack = 1\001307 4 1 0 50 -1 0 8 0.0000 0 120 615 5700 7650 wait respons\001308 4 1 0 50 -1 0 8 0.0000 0 105 870 5700 8850 lock_by_read = 0\001309 279 4 0 0 50 -1 0 8 0.0000 0 90 270 8400 3075 write\001 280 4 1 0 50 -1 0 8 0.0000 0 105 285 7950 2400 Begin\001 281 4 1 0 50 -1 0 8 0.0000 0 120 930 11700 6225 lock_by_write = 1\001 282 4 2 0 50 -1 0 8 0.0000 0 90 165 9000 4875 yes\001 283 4 0 0 50 -1 0 8 0.0000 0 60 120 9900 4875 no\001 284 4 2 0 50 -1 0 8 0.0000 0 90 165 10500 3975 yes\001 285 4 0 0 50 -1 0 8 0.0000 0 60 120 11400 3975 no\001 286 4 1 0 50 -1 0 8 0.0000 0 90 240 10950 4050 Hit ?\001 287 4 1 0 50 -1 0 8 0.0000 0 105 870 11700 6375 lock_by_read = 1\001 288 4 1 0 50 -1 0 8 0.0000 0 105 870 11700 8850 lock_by_read = 0\001 289 4 1 0 50 -1 0 8 0.0000 0 120 930 11700 8700 lock_by_write = 0\001 290 4 1 0 50 -1 0 8 0.0000 0 105 645 11700 9000 invalide_line\001
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