source: trunk/platforms

Revision Log Mode:


Legend:

Added
Modified
Copied or renamed
Diff Rev Age Author Log Message
(edit) @298   12 years alain Bug fixing in the NIC constructor
(edit) @278   12 years bouyer The ring is cpu-ungry, so give one thread per ring when running under …
(edit) @275   12 years bouyer This VHDL implementation uses rings, use rings here too.
(edit) @274   12 years bouyer Add a platform describing as closely as possible the hardware that is …
(edit) @264   12 years bouyer We have big servers, so use some parallelism here
(edit) @263   12 years alain Introducing a network controller (vci_multi_nic) in the I0 cluster.
(edit) @261   12 years alain The tsarv4_generic_mmu platform has been modified to use the …
(edit) @259   12 years almaless Introduce ALMOS used platforms for TSAR. See the package's README …
(edit) @257   12 years almaless - Adding two arguments: BLKSZ (sector size) and THREADS (OpenMP …
(edit) @255   12 years alain Two modifications in the "tsarv4_generic_mmu" platform: 1) improving …
(edit) @249   12 years meunier Formatting of topcell and cluster files
(edit) @247   12 years cfuguet Introducing new CLEANUP transaction address specification in the …
(edit) @243   12 years fraga Adding platform using vci_io_bridge
(edit) @242   12 years fraga Reparing erroneous commit
(edit) @241   12 years fraga Adding platform using vci_io_bridge
(edit) @234   13 years almaless Bug-fix: use the loader's reference instead a copy of it. The ram …
(edit) @226   13 years cfuguet New tsar v1 monocluster platform
(edit) @208   13 years alain Introducing a mono-processor architecture using the cc_xcache_v4
(edit) @207   13 years alain Introducing a mono-pprocesseur architecture using cc_vcache_V4
(edit) @190   13 years zzhang fix some bugs in vdspin platform
(edit) @189   13 years alain Introducing tsarv4_generic_mmu platform
(edit) @182   13 years choichil Replacing simple_ram to synthetic_target
(edit) @179   13 years choichil Platform to extract results for broadcast
(edit) @175   14 years kane vci_cc_xcache_wrapper_v4 : suppress one state (CC_UPDATE)
(edit) @172   14 years alain
(edit) @169   14 years simerabe adding parameters for new vci_cc_xcache_wrapper_v4 version (cmp)
(edit) @168   14 years alain Moving to the vci_cc_xcache_wrapper_v4 implementing the multicores …
(edit) @167   14 years kane delete all timeout reference (multi write buffer)
(edit) @166   14 years kane (1) add modif from previous version (before merging), (2) add two …
(edit) @165   14 years kane In vci_cc_xcache_wrapper : (1) fix compilation directive, (2) replace …
(edit) @156   14 years alain Moving the sof_filter and soft_transpose software applications to the …
(edit) @155   14 years alain ntroducing the tsarv4_generic_ring platform
(edit) @154   14 years alain Introducing the tsarv4_generic_xbar platform
(edit) @152   14 years kane Re add vci_cc_xcache_wrapper_v4 "multi-cache" edition and (1) fix …
(edit) @144   14 years kane in vci_cc_xcache_wrapper_v4 : (1) Fix bug in MISS_VICTIM state, (2) …
(edit) @143   14 years kane fix bug in ccxcachev4, save cpu_info in memcachev4
(edit) @140   14 years kane yAjout du multi_cache : plusieurs processeur peuvent ce partager le …
(edit) @137   14 years simerabe replacing old ring versions with new one
(edit) @134   14 years kane add multi write buffer in cc_xcache_v4
(edit) @133   14 years choichil Platform with more parameters
(edit) @121   14 years choichil Generic platform for VDSPIN tests and measurements
(edit) @117   14 years alain Introducing two generic hardware platforms: - tsarv4_vgmn_generic_32 - …
(edit) @112   14 years choichil Platform that works…
(edit) @107   14 years guthmull Add a simple TsarV4 platform
(edit) @105   14 years choichil PF ended
(edit) @103   14 years choichil Platform using vci_simple_ram which is not the svn working copy (allow …
(edit) @100   14 years choichil Deleting modelsim files
(edit) @99   14 years choichil Platform without targets
(edit) @97   14 years choichil Draft of new platform with VciSyntheticInitiator? and VDSPIN
(edit) @95   14 years choichil Platform with DMA and FB
(edit) @94   14 years choichil Deleting work directory
(edit) @93   14 years choichil Platform with DMA
(edit) @92   14 years choichil Platform with DMA VHDL
(edit) @87   14 years simerabe platform for new vdspin_router/vci_local_ring_fast
(edit) @86   14 years simerabe simple_ring_fast platform
(edit) @85   14 years simerabe removing duplicate ring_signals_2
(edit) @46   15 years alain
(edit) @43   15 years guthmull Don't generate the software
(edit) @42   15 years guthmull Add a pf similar to the fpga one
(edit) @30   15 years nipo Fix netlist
(edit) @28   15 years nipo Set outdir to '.' to make sccom happy
(edit) @27   15 years guthmull Add v1 phys platform
(edit) @25   15 years nipo Uniformize 40 bit addresses
(edit) @24   15 years nipo Remove loggers
(edit) @23   15 years nipo Add non coherent platform
(edit) @22   15 years bouyer Fix CPU address
(edit) @21   15 years nipo Add DSX-based platform definition
(edit) @10   15 years simerabe changing broadcast offset on vci_ring_initiator
(edit) @9   15 years simerabe updating multi-cluster platform
(edit) @8   15 years simerabe new ring components for systemcass
(add) @3   15 years nipo Import platforms
Note: See TracRevisionLog for help on using the revision log.