- Timestamp:
- May 16, 2009, 4:42:39 PM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine
- Files:
-
- 47 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h
r110 r117 60 60 public : uint32_t ** _array_size_depth ;//[nb_front_end][nb_context] 61 61 //public : uint32_t _max_size_depth ; 62 public : Tpacket_t _shift_num_bank ; 63 public : Tpacket_t _mask_size_bank ; 62 63 //public : Tpacket_t _shift_num_bank ; 64 public : Tpacket_t _mask_num_bank ; 65 public : Tpacket_t _shift_num_slot ; 66 //public : Tpacket_t _mask_num_slot ; 67 64 68 65 69 //public : bool _have_port_front_end_id ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp
r112 r117 336 336 337 337 #if defined(DEBUG) and defined(DEBUG_Commit_unit) and (DEBUG_Commit_unit == true) 338 directory_init (); 339 338 340 instruction_log_file = new std::ofstream [_param->_nb_thread]; 339 341 for (uint32_t i=0; i<_param->_nb_thread; ++i) 340 342 if (_param->_have_thread [i]) 341 343 { 342 std::string filename = "Instruction_flow-thread_" + toString(i) +".log";344 std::string filename = MORPHEO_LOG+"/"+toString(getpid())+"-Instruction_flow-thread_"+toString(i)+"-"+toString(getpid())+".log"; 343 345 344 346 instruction_log_file [i] .open(filename.c_str() ,std::ios::out | std::ios::trunc); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_commit.cpp
r100 r117 49 49 // packet_id number can 50 50 Tpacket_t packet_id = (_param->_have_port_rob_ptr )?PORT_READ(in_COMMIT_PACKET_ID [i]):0; 51 uint32_t num_bank = packet_id >> _param->_shift_num_bank;51 uint32_t num_bank = packet_id & _param->_mask_num_bank; 52 52 uint32_t num_bank_access = bank_nb_access [num_bank]; 53 53 … … 62 62 internal_BANK_COMMIT_NUM_INST [num_bank][num_bank_access] = i; 63 63 64 Tpacket_t num_packet = packet_id & _param->_mask_size_bank;64 Tpacket_t num_packet = packet_id >> _param->_shift_num_slot; 65 65 66 66 // find the good entry !!! -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_insert.cpp
r112 r117 99 99 insert_ack [num_rename_unit][num_inst_insert] = true; 100 100 101 Tpacket_t packet_id = (( num_bank << _param->_shift_num_bank) | reg_BANK_PTR [num_bank]);101 Tpacket_t packet_id = ((reg_BANK_PTR [num_bank] << _param->_shift_num_slot) | num_bank); 102 102 103 103 #ifdef SYSTEMC_VHDL_COMPATIBILITY -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp
r115 r117 392 392 log_printf(TRACE,Commit_unit,FUNCTION," * front_end_id : %d",front_end_id ); 393 393 log_printf(TRACE,Commit_unit,FUNCTION," * context_id : %d",context_id ); 394 log_printf(TRACE,Commit_unit,FUNCTION," * rob_ptr : %d",(( num_bank << _param->_shift_num_bank) | entry->ptr));394 log_printf(TRACE,Commit_unit,FUNCTION," * rob_ptr : %d",((entry->ptr << _param->_shift_num_slot) | num_bank)); 395 395 log_printf(TRACE,Commit_unit,FUNCTION," * num_thread : %d",num_thread ); 396 396 log_printf(TRACE,Commit_unit,FUNCTION," * type : %s",toString(type).c_str()); … … 740 740 num_bank , 741 741 (*it)->ptr , 742 (( num_bank << _param->_shift_num_bank) | (*it)->ptr),742 (((*it)->ptr << _param->_shift_num_slot) | num_bank), 743 743 (*it)->front_end_id , 744 744 (*it)->context_id , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp
r110 r117 71 71 _max_nb_inst_retire = max<uint32_t>(_nb_inst_retire,_nb_rename_unit); 72 72 _size_bank = _size_queue/_nb_bank; 73 _shift_num_bank = log2(_size_bank); 74 _mask_size_bank = gen_mask<Tpacket_t>(log2(_size_bank)); 73 74 // _shift_num_bank = 0; 75 _mask_num_bank = gen_mask<Tpacket_t>(log2(_nb_bank)); 76 _shift_num_slot = log2(_nb_bank); 77 // _mask_num_slot = gen_mask<Tpacket_t>(log2(_size_bank)); 75 78 76 79 _have_port_rename_unit_id = _size_rename_unit_id > 0; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_min.cfg
r111 r117 13 13 1 1 *2 # size_store_queue_ptr 14 14 0 0 *2 # size_load_queue_ptr 15 1 1 *2 # nb_inst_issue16 15 1 1 *2 # nb_inst_rename [0] [nb_rename_unit] 17 16 1 1 *2 # nb_inst_reexecute … … 19 18 1 1 *2 # priority 20 19 1 1 *2 # load_balancing 21 1 1 +1 # table_routing [0][0] [nb_rename_unit][nb_inst_issue]22 1 1 +1 # table_issue_type [0][TYPE_ALU ] [nb_inst_issue][nb_type]23 1 1 +1 # table_issue_type [0][TYPE_SHIFT ] [nb_inst_issue][nb_type]24 1 1 +1 # table_issue_type [0][TYPE_MOVE ] [nb_inst_issue][nb_type]25 1 1 +1 # table_issue_type [0][TYPE_TEST ] [nb_inst_issue][nb_type]26 1 1 +1 # table_issue_type [0][TYPE_MUL ] [nb_inst_issue][nb_type]27 1 1 +1 # table_issue_type [0][TYPE_DIV ] [nb_inst_issue][nb_type]28 1 1 +1 # table_issue_type [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]29 1 1 +1 # table_issue_type [0][TYPE_FIND ] [nb_inst_issue][nb_type]30 1 1 +1 # table_issue_type [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]31 1 1 +1 # table_issue_type [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]32 1 1 +1 # table_issue_type [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]33 1 1 +1 # table_issue_type [0][TYPE_MEMORY ] [nb_inst_issue][nb_type] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_mono_rename_unit.cfg
r111 r117 13 13 1 1 *2 # size_store_queue_ptr 14 14 0 0 *2 # size_load_queue_ptr 15 2 2 *4 # nb_inst_issue16 15 1 4 *4 # nb_inst_rename [0] [nb_rename_unit] 17 16 1 4 *4 # nb_inst_reexecute … … 19 18 1 1 *2 # priority 20 19 1 1 *2 # load_balancing 21 1 1 +1 # table_routing [0][0] [nb_rename_unit][nb_inst_issue]22 1 1 +1 # table_routing [0][1] [nb_rename_unit][nb_inst_issue]23 1 1 +1 # table_issue_type [0][TYPE_ALU ] [nb_inst_issue][nb_type]24 1 1 +1 # table_issue_type [0][TYPE_SHIFT ] [nb_inst_issue][nb_type]25 1 1 +1 # table_issue_type [0][TYPE_MOVE ] [nb_inst_issue][nb_type]26 1 1 +1 # table_issue_type [0][TYPE_TEST ] [nb_inst_issue][nb_type]27 0 0 +1 # table_issue_type [0][TYPE_MUL ] [nb_inst_issue][nb_type]28 0 0 +1 # table_issue_type [0][TYPE_DIV ] [nb_inst_issue][nb_type]29 1 1 +1 # table_issue_type [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]30 1 1 +1 # table_issue_type [0][TYPE_FIND ] [nb_inst_issue][nb_type]31 0 0 +1 # table_issue_type [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]32 0 0 +1 # table_issue_type [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]33 0 0 +1 # table_issue_type [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]34 1 1 +1 # table_issue_type [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]35 1 1 +1 # table_issue_type [1][TYPE_ALU ] [nb_inst_issue][nb_type]36 1 1 +1 # table_issue_type [1][TYPE_SHIFT ] [nb_inst_issue][nb_type]37 1 1 +1 # table_issue_type [1][TYPE_MOVE ] [nb_inst_issue][nb_type]38 1 1 +1 # table_issue_type [1][TYPE_TEST ] [nb_inst_issue][nb_type]39 1 1 +1 # table_issue_type [1][TYPE_MUL ] [nb_inst_issue][nb_type]40 1 1 +1 # table_issue_type [1][TYPE_DIV ] [nb_inst_issue][nb_type]41 0 0 +1 # table_issue_type [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]42 0 0 +1 # table_issue_type [1][TYPE_FIND ] [nb_inst_issue][nb_type]43 1 1 +1 # table_issue_type [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]44 1 1 +1 # table_issue_type [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]45 1 1 +1 # table_issue_type [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]46 0 0 +1 # table_issue_type [1][TYPE_MEMORY ] [nb_inst_issue][nb_type] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/config_multi_rename_unit.cfg
r111 r117 13 13 1 1 *2 # size_store_queue_ptr 14 14 0 0 *2 # size_load_queue_ptr 15 4 4 *4 # nb_inst_issue16 15 4 4 *4 # nb_inst_rename [0] [nb_rename_unit] 17 16 1 1 *4 # nb_inst_rename [1] [nb_rename_unit] … … 22 21 1 1 *2 # priority 23 22 1 1 *2 # load_balancing 24 1 1 +1 # table_routing [0][0] [nb_rename_unit][nb_inst_issue]25 1 1 +1 # table_routing [0][1] [nb_rename_unit][nb_inst_issue]26 0 0 +1 # table_routing [0][2] [nb_rename_unit][nb_inst_issue]27 0 0 +1 # table_routing [0][3] [nb_rename_unit][nb_inst_issue]28 1 1 +1 # table_routing [1][0] [nb_rename_unit][nb_inst_issue]29 1 1 +1 # table_routing [1][1] [nb_rename_unit][nb_inst_issue]30 0 0 +1 # table_routing [1][2] [nb_rename_unit][nb_inst_issue]31 0 0 +1 # table_routing [1][3] [nb_rename_unit][nb_inst_issue]32 0 0 +1 # table_routing [2][0] [nb_rename_unit][nb_inst_issue]33 0 0 +1 # table_routing [2][1] [nb_rename_unit][nb_inst_issue]34 1 1 +1 # table_routing [2][2] [nb_rename_unit][nb_inst_issue]35 1 1 +1 # table_routing [2][3] [nb_rename_unit][nb_inst_issue]36 0 0 +1 # table_routing [3][0] [nb_rename_unit][nb_inst_issue]37 0 0 +1 # table_routing [3][1] [nb_rename_unit][nb_inst_issue]38 1 1 +1 # table_routing [3][2] [nb_rename_unit][nb_inst_issue]39 1 1 +1 # table_routing [3][3] [nb_rename_unit][nb_inst_issue]40 1 1 +1 # table_issue_type [0][TYPE_ALU ] [nb_inst_issue][nb_type]41 1 1 +1 # table_issue_type [0][TYPE_SHIFT ] [nb_inst_issue][nb_type]42 1 1 +1 # table_issue_type [0][TYPE_MOVE ] [nb_inst_issue][nb_type]43 1 1 +1 # table_issue_type [0][TYPE_TEST ] [nb_inst_issue][nb_type]44 1 1 +1 # table_issue_type [0][TYPE_MUL ] [nb_inst_issue][nb_type]45 1 1 +1 # table_issue_type [0][TYPE_DIV ] [nb_inst_issue][nb_type]46 1 1 +1 # table_issue_type [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]47 1 1 +1 # table_issue_type [0][TYPE_FIND ] [nb_inst_issue][nb_type]48 1 1 +1 # table_issue_type [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]49 1 1 +1 # table_issue_type [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]50 1 1 +1 # table_issue_type [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]51 1 1 +1 # table_issue_type [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]52 1 1 +1 # table_issue_type [1][TYPE_ALU ] [nb_inst_issue][nb_type]53 1 1 +1 # table_issue_type [1][TYPE_SHIFT ] [nb_inst_issue][nb_type]54 1 1 +1 # table_issue_type [1][TYPE_MOVE ] [nb_inst_issue][nb_type]55 1 1 +1 # table_issue_type [1][TYPE_TEST ] [nb_inst_issue][nb_type]56 1 1 +1 # table_issue_type [1][TYPE_MUL ] [nb_inst_issue][nb_type]57 1 1 +1 # table_issue_type [1][TYPE_DIV ] [nb_inst_issue][nb_type]58 1 1 +1 # table_issue_type [1][TYPE_EXTEND ] [nb_inst_issue][nb_type]59 1 1 +1 # table_issue_type [1][TYPE_FIND ] [nb_inst_issue][nb_type]60 1 1 +1 # table_issue_type [1][TYPE_SPECIAL] [nb_inst_issue][nb_type]61 1 1 +1 # table_issue_type [1][TYPE_CUSTOM ] [nb_inst_issue][nb_type]62 1 1 +1 # table_issue_type [1][TYPE_BRANCH ] [nb_inst_issue][nb_type]63 1 1 +1 # table_issue_type [1][TYPE_MEMORY ] [nb_inst_issue][nb_type]64 1 1 +1 # table_issue_type [2][TYPE_ALU ] [nb_inst_issue][nb_type]65 1 1 +1 # table_issue_type [2][TYPE_SHIFT ] [nb_inst_issue][nb_type]66 1 1 +1 # table_issue_type [2][TYPE_MOVE ] [nb_inst_issue][nb_type]67 1 1 +1 # table_issue_type [2][TYPE_TEST ] [nb_inst_issue][nb_type]68 1 1 +1 # table_issue_type [2][TYPE_MUL ] [nb_inst_issue][nb_type]69 1 1 +1 # table_issue_type [2][TYPE_DIV ] [nb_inst_issue][nb_type]70 1 1 +1 # table_issue_type [2][TYPE_EXTEND ] [nb_inst_issue][nb_type]71 1 1 +1 # table_issue_type [2][TYPE_FIND ] [nb_inst_issue][nb_type]72 1 1 +1 # table_issue_type [2][TYPE_SPECIAL] [nb_inst_issue][nb_type]73 1 1 +1 # table_issue_type [2][TYPE_CUSTOM ] [nb_inst_issue][nb_type]74 1 1 +1 # table_issue_type [2][TYPE_BRANCH ] [nb_inst_issue][nb_type]75 1 1 +1 # table_issue_type [2][TYPE_MEMORY ] [nb_inst_issue][nb_type]76 1 1 +1 # table_issue_type [3][TYPE_ALU ] [nb_inst_issue][nb_type]77 1 1 +1 # table_issue_type [3][TYPE_SHIFT ] [nb_inst_issue][nb_type]78 1 1 +1 # table_issue_type [3][TYPE_MOVE ] [nb_inst_issue][nb_type]79 1 1 +1 # table_issue_type [3][TYPE_TEST ] [nb_inst_issue][nb_type]80 1 1 +1 # table_issue_type [3][TYPE_MUL ] [nb_inst_issue][nb_type]81 1 1 +1 # table_issue_type [3][TYPE_DIV ] [nb_inst_issue][nb_type]82 1 1 +1 # table_issue_type [3][TYPE_EXTEND ] [nb_inst_issue][nb_type]83 1 1 +1 # table_issue_type [3][TYPE_FIND ] [nb_inst_issue][nb_type]84 1 1 +1 # table_issue_type [3][TYPE_SPECIAL] [nb_inst_issue][nb_type]85 1 1 +1 # table_issue_type [3][TYPE_CUSTOM ] [nb_inst_issue][nb_type]86 1 1 +1 # table_issue_type [3][TYPE_BRANCH ] [nb_inst_issue][nb_type]87 1 1 +1 # table_issue_type [3][TYPE_MEMORY ] [nb_inst_issue][nb_type] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/main.cpp
r111 r117 8 8 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/include/test.h" 9 9 10 #define NB_PARAMS 1 810 #define NB_PARAMS 17 11 11 12 12 void usage (int argc, char * argv[]) … … 27 27 err (_(" * size_store_queue_ptr (uint32_t )\n")); 28 28 err (_(" * size_load_queue_ptr (uint32_t )\n")); 29 err (_(" * nb_inst_issue (uint32_t )\n"));30 29 err (_(" * nb_inst_rename [nb_rename_unit] (uint32_t )\n")); 31 30 err (_(" * nb_inst_reexecute (uint32_t )\n")); … … 33 32 err (_(" * priority (Tpriority_t )\n")); 34 33 err (_(" * load_balancing (Tload_balancing_t )\n")); 35 err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n"));36 err (_(" * table_routing[nb_inst_issue][nb_type] (bool )\n"));37 err (_(" * TYPE_ALU \n"));38 err (_(" * TYPE_SHIFT \n"));39 err (_(" * TYPE_MOVE \n"));40 err (_(" * TYPE_TEST \n"));41 err (_(" * TYPE_MUL \n"));42 err (_(" * TYPE_DIV \n"));43 err (_(" * TYPE_EXTEND \n"));44 err (_(" * TYPE_FIND \n"));45 err (_(" * TYPE_SPECIAL\n"));46 err (_(" * TYPE_CUSTOM \n"));47 err (_(" * TYPE_BRANCH \n"));48 err (_(" * TYPE_MEMORY \n"));34 // err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n")); 35 // err (_(" * table_issue_type [nb_inst_issue][nb_type] (bool )\n")); 36 // err (_(" * TYPE_ALU \n")); 37 // err (_(" * TYPE_SHIFT \n")); 38 // err (_(" * TYPE_MOVE \n")); 39 // err (_(" * TYPE_TEST \n")); 40 // err (_(" * TYPE_MUL \n")); 41 // err (_(" * TYPE_DIV \n")); 42 // err (_(" * TYPE_EXTEND \n")); 43 // err (_(" * TYPE_FIND \n")); 44 // err (_(" * TYPE_SPECIAL\n")); 45 // err (_(" * TYPE_CUSTOM \n")); 46 // err (_(" * TYPE_BRANCH \n")); 47 // err (_(" * TYPE_MEMORY \n")); 49 48 50 49 exit (1); … … 68 67 uint32_t _nb_rename_unit = fromString<uint32_t >(argv[x++]); 69 68 70 if (argc <= static_cast<int>(2+NB_PARAMS+_nb_rename_unit))69 if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit)) 71 70 usage (argc, argv); 72 71 … … 81 80 uint32_t _size_store_queue_ptr = fromString<uint32_t >(argv[x++]); 82 81 uint32_t _size_load_queue_ptr = fromString<uint32_t >(argv[x++]); 83 82 //uint32_t _nb_inst_issue = fromString<uint32_t >(argv[x++]); 84 83 uint32_t * _nb_inst_rename = new uint32_t [_nb_rename_unit]; 85 84 for (uint32_t i=0; i<_nb_rename_unit; i++) … … 90 89 Tload_balancing_t _load_balancing = fromString<Tload_balancing_t>(argv[x++]); 91 90 92 if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit+(_nb_rename_unit+12)*_nb_inst_issue))93 usage (argc, argv);91 // if (argc != static_cast<int>(2+NB_PARAMS+_nb_rename_unit+(_nb_rename_unit+12)*_nb_inst_issue)) 92 // usage (argc, argv); 94 93 95 bool ** _table_routing = new bool * [_nb_rename_unit];96 for (uint32_t i=0; i<_nb_rename_unit; i++)97 {98 _table_routing [i] = new bool [_nb_inst_issue];99 for (uint32_t j=0; j<_nb_inst_issue; j++)100 _table_routing [i][j] = fromString<bool>(argv[x++]);101 }94 // bool ** _table_routing = new bool * [_nb_rename_unit]; 95 // for (uint32_t i=0; i<_nb_rename_unit; i++) 96 // { 97 // _table_routing [i] = new bool [_nb_inst_issue]; 98 // for (uint32_t j=0; j<_nb_inst_issue; j++) 99 // _table_routing [i][j] = fromString<bool>(argv[x++]); 100 // } 102 101 103 bool ** _table_issue_type = new bool * [_nb_inst_issue];104 for (uint32_t i=0; i<_nb_inst_issue; i++)105 {106 _table_issue_type [i] = new bool [_nb_inst_issue];102 // bool ** _table_issue_type = new bool * [_nb_inst_issue]; 103 // for (uint32_t i=0; i<_nb_inst_issue; i++) 104 // { 105 // _table_issue_type [i] = new bool [_nb_inst_issue]; 107 106 108 _table_issue_type [i][TYPE_ALU ] = fromString<bool>(argv[x++]);109 _table_issue_type [i][TYPE_SHIFT ] = fromString<bool>(argv[x++]);110 _table_issue_type [i][TYPE_MOVE ] = fromString<bool>(argv[x++]);111 _table_issue_type [i][TYPE_TEST ] = fromString<bool>(argv[x++]);112 _table_issue_type [i][TYPE_MUL ] = fromString<bool>(argv[x++]);113 _table_issue_type [i][TYPE_DIV ] = fromString<bool>(argv[x++]);114 _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);115 _table_issue_type [i][TYPE_FIND ] = fromString<bool>(argv[x++]);116 _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);117 _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);118 _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);119 _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);120 }107 // _table_issue_type [i][TYPE_ALU ] = fromString<bool>(argv[x++]); 108 // _table_issue_type [i][TYPE_SHIFT ] = fromString<bool>(argv[x++]); 109 // _table_issue_type [i][TYPE_MOVE ] = fromString<bool>(argv[x++]); 110 // _table_issue_type [i][TYPE_TEST ] = fromString<bool>(argv[x++]); 111 // _table_issue_type [i][TYPE_MUL ] = fromString<bool>(argv[x++]); 112 // _table_issue_type [i][TYPE_DIV ] = fromString<bool>(argv[x++]); 113 // _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]); 114 // _table_issue_type [i][TYPE_FIND ] = fromString<bool>(argv[x++]); 115 // _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]); 116 // _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]); 117 // _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]); 118 // _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]); 119 // } 121 120 122 121 int _return = EXIT_SUCCESS; … … 137 136 _size_store_queue_ptr , 138 137 _size_load_queue_ptr , 139 _nb_inst_issue ,138 // _nb_inst_issue , 140 139 _nb_inst_rename , 141 140 _nb_inst_reexecute , … … 143 142 _priority , 144 143 _load_balancing , 145 _table_routing ,146 _table_issue_type ,144 // _table_routing , 145 // _table_issue_type , 147 146 true // is_toplevel 148 147 ); … … 173 172 delete [] _nb_inst_rename; 174 173 175 for (uint32_t i=0; i<_nb_rename_unit; i++)176 delete [] _table_routing [i];177 delete [] _table_routing ;178 for (uint32_t i=0; i<_nb_inst_issue; i++)179 delete [] _table_issue_type [i];180 delete [] _table_issue_type;174 // for (uint32_t i=0; i<_nb_rename_unit; i++) 175 // delete [] _table_routing [i]; 176 // delete [] _table_routing ; 177 // for (uint32_t i=0; i<_nb_inst_issue; i++) 178 // delete [] _table_issue_type [i]; 179 // delete [] _table_issue_type; 181 180 182 181 return (_return); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp
r110 r117 48 48 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 49 49 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 50 51 sc_signal<Tcontrol_t > *** in_ISSUE_IN_VAL ; 52 sc_signal<Tcontrol_t > *** out_ISSUE_IN_ACK ; 53 sc_signal<Tcontext_t > *** in_ISSUE_IN_CONTEXT_ID ; 54 sc_signal<Tcontext_t > *** in_ISSUE_IN_FRONT_END_ID ; 55 sc_signal<Tpacket_t > *** in_ISSUE_IN_PACKET_ID ; 56 sc_signal<Toperation_t > *** in_ISSUE_IN_OPERATION ; 57 sc_signal<Ttype_t > *** in_ISSUE_IN_TYPE ; 58 sc_signal<Tlsq_ptr_t > *** in_ISSUE_IN_STORE_QUEUE_PTR_WRITE ; 59 sc_signal<Tlsq_ptr_t > *** in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE ; 60 sc_signal<Tcontrol_t > *** in_ISSUE_IN_HAS_IMMEDIAT ; 61 sc_signal<Tgeneral_data_t > *** in_ISSUE_IN_IMMEDIAT ; 62 sc_signal<Tcontrol_t > *** in_ISSUE_IN_READ_RA ; 63 sc_signal<Tgeneral_address_t> *** in_ISSUE_IN_NUM_REG_RA ; 64 sc_signal<Tcontrol_t > *** in_ISSUE_IN_READ_RB ; 65 sc_signal<Tgeneral_address_t> *** in_ISSUE_IN_NUM_REG_RB ; 66 sc_signal<Tcontrol_t > *** in_ISSUE_IN_READ_RC ; 67 sc_signal<Tspecial_address_t> *** in_ISSUE_IN_NUM_REG_RC ; 68 sc_signal<Tcontrol_t > *** in_ISSUE_IN_WRITE_RD ; 69 sc_signal<Tgeneral_address_t> *** in_ISSUE_IN_NUM_REG_RD ; 70 sc_signal<Tcontrol_t > *** in_ISSUE_IN_WRITE_RE ; 71 sc_signal<Tspecial_address_t> *** in_ISSUE_IN_NUM_REG_RE ; 72 sc_signal<Tcontrol_t > ** in_REEXECUTE_VAL ; 73 sc_signal<Tcontrol_t > ** out_REEXECUTE_ACK ; 74 sc_signal<Tcontext_t > ** in_REEXECUTE_CONTEXT_ID ; 75 sc_signal<Tcontext_t > ** in_REEXECUTE_FRONT_END_ID ; 76 sc_signal<Tpacket_t > ** in_REEXECUTE_PACKET_ID ; 77 sc_signal<Toperation_t > ** in_REEXECUTE_OPERATION ; 78 sc_signal<Ttype_t > ** in_REEXECUTE_TYPE ; 79 sc_signal<Tlsq_ptr_t > ** in_REEXECUTE_STORE_QUEUE_PTR_WRITE; 80 sc_signal<Tlsq_ptr_t > ** in_REEXECUTE_LOAD_QUEUE_PTR_WRITE ; 81 sc_signal<Tcontrol_t > ** in_REEXECUTE_HAS_IMMEDIAT ; 82 sc_signal<Tgeneral_data_t > ** in_REEXECUTE_IMMEDIAT ; 83 sc_signal<Tcontrol_t > ** in_REEXECUTE_READ_RA ; 84 sc_signal<Tgeneral_address_t> ** in_REEXECUTE_NUM_REG_RA ; 85 sc_signal<Tcontrol_t > ** in_REEXECUTE_READ_RB ; 86 sc_signal<Tgeneral_address_t> ** in_REEXECUTE_NUM_REG_RB ; 87 sc_signal<Tcontrol_t > ** in_REEXECUTE_READ_RC ; 88 sc_signal<Tspecial_address_t> ** in_REEXECUTE_NUM_REG_RC ; 89 sc_signal<Tcontrol_t > ** in_REEXECUTE_WRITE_RD ; 90 sc_signal<Tgeneral_address_t> ** in_REEXECUTE_NUM_REG_RD ; 91 sc_signal<Tcontrol_t > ** in_REEXECUTE_WRITE_RE ; 92 sc_signal<Tspecial_address_t> ** in_REEXECUTE_NUM_REG_RE ; 93 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_VAL ; 94 sc_signal<Tcontrol_t > ** in_ISSUE_OUT_ACK ; 95 sc_signal<Tcontext_t > ** out_ISSUE_OUT_CONTEXT_ID ; 96 sc_signal<Tcontext_t > ** out_ISSUE_OUT_FRONT_END_ID ; 97 sc_signal<Tpacket_t > ** out_ISSUE_OUT_PACKET_ID ; 98 sc_signal<Toperation_t > ** out_ISSUE_OUT_OPERATION ; 99 sc_signal<Ttype_t > ** out_ISSUE_OUT_TYPE ; 100 sc_signal<Tlsq_ptr_t > ** out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE; 101 sc_signal<Tlsq_ptr_t > ** out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE ; 102 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_HAS_IMMEDIAT ; 103 sc_signal<Tgeneral_data_t > ** out_ISSUE_OUT_IMMEDIAT ; 104 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_READ_RA ; 105 sc_signal<Tgeneral_address_t> ** out_ISSUE_OUT_NUM_REG_RA ; 106 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_READ_RB ; 107 sc_signal<Tgeneral_address_t> ** out_ISSUE_OUT_NUM_REG_RB ; 108 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_READ_RC ; 109 sc_signal<Tspecial_address_t> ** out_ISSUE_OUT_NUM_REG_RC ; 110 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_WRITE_RD ; 111 sc_signal<Tgeneral_address_t> ** out_ISSUE_OUT_NUM_REG_RD ; 112 sc_signal<Tcontrol_t > ** out_ISSUE_OUT_WRITE_RE ; 113 sc_signal<Tspecial_address_t> ** out_ISSUE_OUT_NUM_REG_RE ; 50 114 51 115 ALLOC2_SC_SIGNAL( in_ISSUE_IN_VAL ," in_ISSUE_IN_VAL ",Tcontrol_t ,_param->_nb_rename_unit,_param->_nb_inst_rename[it1]); … … 309 373 Ttype_t type = out_ISSUE_OUT_TYPE[i]->read(); 310 374 TEST(Ttype_t,type, tab_type[imm%NB_TYPE]); 311 TEST(bool ,_param->_table_issue_type[i][type],true);375 // TEST(bool ,_param->_table_issue_type[i][type],true); 312 376 } 313 377 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h
r111 r117 38 38 //public : uint32_t _size_store_queue_ptr ; 39 39 //public : uint32_t _size_load_queue_ptr ; 40 public : uint32_t _nb_inst_issue ;41 40 public : uint32_t * _nb_inst_rename ;//[nb_rename_unit] 42 41 public : uint32_t _nb_inst_reexecute ; … … 44 43 public : Tpriority_t _priority ; 45 44 public : Tload_balancing_t _load_balancing ; 46 47 45 //public : bool ** _table_routing ;//[nb_rename_unit][nb_inst_issue] 46 //public : bool ** _table_issue_type ;//[nb_inst_issue][nb_type] 48 47 public : uint32_t _size_reexecute_queue ; 49 48 49 public : uint32_t _nb_inst_issue ; 50 50 //public : uint32_t _nb_bank_select_out ; 51 51 public : uint32_t _max_nb_inst_rename ; … … 74 74 uint32_t size_store_queue_ptr , 75 75 uint32_t size_load_queue_ptr , 76 uint32_t nb_inst_issue ,76 // uint32_t nb_inst_issue , 77 77 uint32_t * nb_inst_rename , 78 78 uint32_t nb_inst_reexecute , … … 80 80 Tpriority_t priority , 81 81 Tload_balancing_t load_balancing , 82 bool ** table_routing ,83 bool ** table_issue_type ,82 // bool ** table_routing , 83 // bool ** table_issue_type , 84 84 bool is_toplevel=false); 85 85 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_in_order_genMealy_issue_out.cpp
r115 r117 30 30 Tcontrol_t val [_param->_nb_inst_issue]; 31 31 32 uint32_t index=0; 32 33 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 33 34 val [i] = 0; 34 35 36 //-------------------------------------- 35 37 // From Reexecute_queue 38 //-------------------------------------- 36 39 40 // scan all reexecute_queue slot ... 37 41 // uint32_t num_reexecute_entry = 0; 38 42 for (std::list<entry_t*>::iterator it=_reexecute_queue.begin(); … … 42 46 entry_t* entry = (*it); 43 47 44 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 45 // test if no previous transaction and can accept this type 46 if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) 47 { 48 // find a issue port 49 val [i] = 1; 50 51 if (_param->_have_port_context_id) 52 PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [i], entry->_context_id ); 53 if (_param->_have_port_front_end_id) 54 PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [i], entry->_front_end_id ); 55 if (_param->_have_port_rob_ptr ) 56 PORT_WRITE(out_ISSUE_OUT_PACKET_ID [i], entry->_packet_id ); 57 PORT_WRITE(out_ISSUE_OUT_OPERATION [i], entry->_operation ); 58 PORT_WRITE(out_ISSUE_OUT_TYPE [i], entry->_type ); 59 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write); 60 if (_param->_have_port_load_queue_ptr) 61 PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [i], entry->_load_queue_ptr_write ); 62 PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [i], entry->_has_immediat ); 63 PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [i], entry->_immediat ); 64 PORT_WRITE(out_ISSUE_OUT_READ_RA [i], entry->_read_ra ); 65 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [i], entry->_num_reg_ra ); 66 PORT_WRITE(out_ISSUE_OUT_READ_RB [i], entry->_read_rb ); 67 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [i], entry->_num_reg_rb ); 68 PORT_WRITE(out_ISSUE_OUT_READ_RC [i], entry->_read_rc ); 69 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [i], entry->_num_reg_rc ); 70 PORT_WRITE(out_ISSUE_OUT_WRITE_RD [i], entry->_write_rd ); 71 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [i], entry->_num_reg_rd ); 72 PORT_WRITE(out_ISSUE_OUT_WRITE_RE [i], entry->_write_re ); 73 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [i], entry->_num_reg_re ); 48 val [index] = 1; 49 50 if (_param->_have_port_context_id) 51 PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [index], entry->_context_id ); 52 if (_param->_have_port_front_end_id) 53 PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [index], entry->_front_end_id ); 54 if (_param->_have_port_rob_ptr ) 55 PORT_WRITE(out_ISSUE_OUT_PACKET_ID [index], entry->_packet_id ); 56 PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); 57 PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); 58 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); 59 if (_param->_have_port_load_queue_ptr) 60 PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [index], entry->_load_queue_ptr_write ); 61 PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [index], entry->_has_immediat ); 62 PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [index], entry->_immediat ); 63 PORT_WRITE(out_ISSUE_OUT_READ_RA [index], entry->_read_ra ); 64 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [index], entry->_num_reg_ra ); 65 PORT_WRITE(out_ISSUE_OUT_READ_RB [index], entry->_read_rb ); 66 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [index], entry->_num_reg_rb ); 67 PORT_WRITE(out_ISSUE_OUT_READ_RC [index], entry->_read_rc ); 68 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [index], entry->_num_reg_rc ); 69 PORT_WRITE(out_ISSUE_OUT_WRITE_RD [index], entry->_write_rd ); 70 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [index], entry->_num_reg_rd ); 71 PORT_WRITE(out_ISSUE_OUT_WRITE_RE [index], entry->_write_re ); 72 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [index], entry->_num_reg_re ); 74 73 75 internal_ISSUE_OUT_FROM_REEXECUTE [i] = true;76 // internal_ISSUE_OUT_NUM_BANK [i] = num_reexecute_entry;77 internal_ISSUE_OUT_ENTRY [i] = entry;74 internal_ISSUE_OUT_FROM_REEXECUTE [index] = true; 75 // internal_ISSUE_OUT_NUM_BANK [index] = num_reexecute_entry; 76 internal_ISSUE_OUT_ENTRY [index] = entry; 78 77 79 break; // stop scan 80 } 81 // num_reexecute_entry ++; 78 index ++; // next slot 82 79 } 80 81 //-------------------------------------- 82 // From Issue_queue 83 //-------------------------------------- 84 index = _param->_nb_inst_reexecute; 83 85 84 // From Issue_queue 86 log_printf(TRACE,Issue_queue,FUNCTION," * From Issue_queue"); 87 88 // for all instruction in issue_queue head ... 85 89 for (uint32_t i=0; i<_param->_nb_bank; ++i) 86 90 { … … 89 93 log_printf(TRACE,Issue_queue,FUNCTION," * Bank [%d]",num_bank); 90 94 91 bool find = false;95 // bool find = false; 92 96 93 // Have instruction ?97 // ... test if have an instruction 94 98 if (not _issue_queue [num_bank].empty()) 95 99 { 96 100 log_printf(TRACE,Issue_queue,FUNCTION," * Not Empty !!!"); 97 101 102 // read instruction 98 103 entry_t* entry = _issue_queue [num_bank].front(); 99 104 100 // have valid instruction, search a valid issue slot. 101 for (uint32_t j=0; j<_param->_nb_inst_issue; j++) 102 { 103 Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [j]); 105 // Tcontrol_t issue_ack = PORT_READ(in_ISSUE_OUT_ACK [index]); 106 107 log_printf(TRACE,Issue_queue,FUNCTION," * Issue [%d]",index); 108 // log_printf(TRACE,Issue_queue,FUNCTION," * issue_ack : %d",issue_ack); 109 // log_printf(TRACE,Issue_queue,FUNCTION," * previous transaction : %d",val[index]); 110 // log_printf(TRACE,Issue_queue,FUNCTION," * can issue type : %d",_param->_table_issue_type [index][entry->_type]); 104 111 105 log_printf(TRACE,Issue_queue,FUNCTION," * Issue [%d]",j); 106 log_printf(TRACE,Issue_queue,FUNCTION," * issue_ack : %d",issue_ack); 107 log_printf(TRACE,Issue_queue,FUNCTION," * previous transaction : %d",val[j]); 108 log_printf(TRACE,Issue_queue,FUNCTION," * can issue type : %d",_param->_table_issue_type [j][entry->_type]); 112 // in_order : test if find a valid read_unit 113 // if (issue_ack) 114 // { 115 // log_printf(TRACE,Issue_queue,FUNCTION," * find !!!"); 116 117 // find = true; 118 // } 109 119 110 // test if no previous transaction and can accept this type 111 if (not val[j] and 112 _param->_table_issue_type [j][entry->_type] and 113 issue_ack) 114 { 115 log_printf(TRACE,Issue_queue,FUNCTION," * find !!!"); 116 117 // find a issue port 118 val [j] = 1; 119 120 if (_param->_have_port_context_id) 121 PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [j], entry->_context_id ); 122 if (_param->_have_port_front_end_id) 123 PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [j], entry->_front_end_id ); 124 if (_param->_have_port_rob_ptr ) 125 PORT_WRITE(out_ISSUE_OUT_PACKET_ID [j], entry->_packet_id ); 126 PORT_WRITE(out_ISSUE_OUT_OPERATION [j], entry->_operation ); 127 PORT_WRITE(out_ISSUE_OUT_TYPE [j], entry->_type ); 128 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [j], entry->_store_queue_ptr_write); 129 if (_param->_have_port_load_queue_ptr) 130 PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [j], entry->_load_queue_ptr_write ); 131 PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [j], entry->_has_immediat ); 132 PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [j], entry->_immediat ); 133 PORT_WRITE(out_ISSUE_OUT_READ_RA [j], entry->_read_ra ); 134 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [j], entry->_num_reg_ra ); 135 PORT_WRITE(out_ISSUE_OUT_READ_RB [j], entry->_read_rb ); 136 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [j], entry->_num_reg_rb ); 137 PORT_WRITE(out_ISSUE_OUT_READ_RC [j], entry->_read_rc ); 138 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [j], entry->_num_reg_rc ); 139 PORT_WRITE(out_ISSUE_OUT_WRITE_RD [j], entry->_write_rd ); 140 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [j], entry->_num_reg_rd ); 141 PORT_WRITE(out_ISSUE_OUT_WRITE_RE [j], entry->_write_re ); 142 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [j], entry->_num_reg_re ); 143 144 internal_ISSUE_OUT_FROM_REEXECUTE [j] = false; 145 internal_ISSUE_OUT_NUM_BANK [j] = num_bank; 146 internal_ISSUE_OUT_ENTRY [j] = entry; 147 148 find = true; 149 break; // find : stop scan 150 } 151 } 120 // find a issue port 121 val [index] = true; // instruction is valid 122 123 if (_param->_have_port_context_id) 124 PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID [index], entry->_context_id ); 125 if (_param->_have_port_front_end_id) 126 PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID [index], entry->_front_end_id ); 127 if (_param->_have_port_rob_ptr ) 128 PORT_WRITE(out_ISSUE_OUT_PACKET_ID [index], entry->_packet_id ); 129 PORT_WRITE(out_ISSUE_OUT_OPERATION [index], entry->_operation ); 130 PORT_WRITE(out_ISSUE_OUT_TYPE [index], entry->_type ); 131 PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [index], entry->_store_queue_ptr_write); 132 if (_param->_have_port_load_queue_ptr) 133 PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE [index], entry->_load_queue_ptr_write ); 134 PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT [index], entry->_has_immediat ); 135 PORT_WRITE(out_ISSUE_OUT_IMMEDIAT [index], entry->_immediat ); 136 PORT_WRITE(out_ISSUE_OUT_READ_RA [index], entry->_read_ra ); 137 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA [index], entry->_num_reg_ra ); 138 PORT_WRITE(out_ISSUE_OUT_READ_RB [index], entry->_read_rb ); 139 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB [index], entry->_num_reg_rb ); 140 PORT_WRITE(out_ISSUE_OUT_READ_RC [index], entry->_read_rc ); 141 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC [index], entry->_num_reg_rc ); 142 PORT_WRITE(out_ISSUE_OUT_WRITE_RD [index], entry->_write_rd ); 143 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD [index], entry->_num_reg_rd ); 144 PORT_WRITE(out_ISSUE_OUT_WRITE_RE [index], entry->_write_re ); 145 PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE [index], entry->_num_reg_re ); 146 147 internal_ISSUE_OUT_FROM_REEXECUTE [index] = false; 148 internal_ISSUE_OUT_NUM_BANK [index] = num_bank; 149 internal_ISSUE_OUT_ENTRY [index] = entry; 150 151 index ++; // next slot 152 152 } 153 153 154 if (not find) 155 break; // stop scan (in order) 154 // if (not find) 155 // { 156 // log_printf(TRACE,Issue_queue,FUNCTION," * Not find. Stop Scan (in order)"); 157 158 // break; // stop scan (in order) 159 // } 156 160 } 157 161 162 // Output 158 163 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 159 164 { 160 165 internal_ISSUE_OUT_VAL [i] = val [i]; 161 166 PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]); 167 168 // // Type invalid to the Core_Glue network 169 // if (not val [i]) // == empty 170 // PORT_WRITE(out_ISSUE_OUT_TYPE [i], TYPE_INVALID); 162 171 } 163 172 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_function_out_of_order_genMoore.cpp
r111 r117 109 109 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 110 110 // test if no previous transaction and can accept this type 111 if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) 111 if ((val[i] == 0) 112 // and _param->_table_issue_type [i][entry->_type] 113 ) 112 114 { 113 115 // find a issue port … … 168 170 for (uint32_t i=0; i<_param->_nb_inst_issue; i++) 169 171 // test if no previous transaction and can accept this type 170 if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type]) 172 if ((val[i] == 0) 173 // and _param->_table_issue_type [i][entry->_type] 174 ) 171 175 { 172 176 // find a issue port -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp
r111 r117 106 106 log_printf(TRACE,Issue_queue,FUNCTION," * Dump Issue_queue"); 107 107 108 if (_param->_queue_scheme == ISSUE_QUEUE_SCHEME_IN_ORDER) 109 { 110 log_printf(TRACE,Issue_queue,FUNCTION," * reg_NUM_BANK_HEAD : %d",reg_NUM_BANK_HEAD); 111 log_printf(TRACE,Issue_queue,FUNCTION," * reg_NUM_BANK_TAIL : %d",reg_NUM_BANK_TAIL); 112 } 113 108 114 for (uint32_t i=0; i<_param->_nb_bank; i++) 109 115 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp
r111 r117 32 32 uint32_t size_store_queue_ptr , 33 33 uint32_t size_load_queue_ptr , 34 uint32_t nb_inst_issue ,34 // uint32_t nb_inst_issue , 35 35 uint32_t * nb_inst_rename , 36 36 uint32_t nb_inst_reexecute , … … 38 38 Tpriority_t priority , 39 39 Tload_balancing_t load_balancing , 40 bool ** table_routing ,41 bool ** table_issue_type ,40 // bool ** table_routing , 41 // bool ** table_issue_type , 42 42 bool is_toplevel ) 43 43 { … … 50 50 _queue_scheme = queue_scheme ; 51 51 _nb_bank = nb_bank ; 52 52 // _nb_inst_issue = nb_inst_issue ; 53 53 _nb_inst_rename = nb_inst_rename ; 54 54 _nb_inst_reexecute = nb_inst_reexecute ; … … 56 56 _priority = priority ; 57 57 _load_balancing = load_balancing ; 58 59 58 // _table_routing = table_routing ; 59 // _table_issue_type = table_issue_type ; 60 60 _size_reexecute_queue = nb_inst_reexecute ; 61 61 62 log_printf(TRACE,Issue_queue,FUNCTION," * table_routing [nb_rename_unit][nb_inst_issue]"); 63 for (uint32_t i=0; i<_nb_rename_unit; ++i) 64 for (uint32_t j=0; j<_nb_inst_issue; ++j) 65 if (_table_routing [i][j]) 66 log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j); 62 _nb_inst_issue = _nb_inst_reexecute+_nb_bank; 63 64 // log_printf(TRACE,Issue_queue,FUNCTION," * table_routing [nb_rename_unit][nb_inst_issue]"); 65 // for (uint32_t i=0; i<_nb_rename_unit; ++i) 66 // for (uint32_t j=0; j<_nb_inst_issue; ++j) 67 // if (_table_routing [i][j]) 68 // log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j); 67 69 68 log_printf(TRACE,Issue_queue,FUNCTION," * table_issue_type [nb_inst_issue][nb_type]");69 for (uint32_t i=0; i<_nb_inst_issue; ++i)70 for (uint32_t j=0; j<_nb_type; ++j)71 if (_table_issue_type [i][j])72 log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j);70 // log_printf(TRACE,Issue_queue,FUNCTION," * table_issue_type [nb_inst_issue][nb_type]"); 71 // for (uint32_t i=0; i<_nb_inst_issue; ++i) 72 // for (uint32_t j=0; j<_nb_type; ++j) 73 // if (_table_issue_type [i][j]) 74 // log_printf(TRACE,Issue_queue,FUNCTION," [%d][%d] -> true",i,j); 73 75 74 76 _max_nb_inst_rename = max<uint32_t>(_nb_inst_rename,_nb_rename_unit); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters_msg_error.cpp
r111 r117 48 48 test.error(toString(_("nb_bank (%d) must be a multiple of size_queue (%d).\n"),_nb_bank,_size_queue)); 49 49 50 if (not is_multiple(_nb_bank, _nb_inst_issue))51 test.error(toString(_("nb_inst_issue (%d) must be a multiple of nb_bank (%d) .\n"),_nb_inst_issue,_nb_bank));50 // if (not is_multiple(_nb_bank, _nb_inst_issue)) 51 // test.error(toString(_("nb_inst_issue (%d) must be a multiple of nb_bank (%d) .\n"),_nb_inst_issue,_nb_bank)); 52 52 53 53 if (_nb_rename_unit_select > _nb_rename_unit) … … 57 57 test.warning(_("For better performance, the bank's size (size_queue/nb_bank) must be > 1.\n")); 58 58 59 for (uint32_t i=0; i<_nb_rename_unit; i++)60 {61 bool type_present [_nb_type];59 // for (uint32_t i=0; i<_nb_rename_unit; i++) 60 // { 61 // bool type_present [_nb_type]; 62 62 63 for (uint32_t j=0; j<_nb_type; j++)64 type_present [j] = not is_type_valid(j);63 // for (uint32_t j=0; j<_nb_type; j++) 64 // type_present [j] = not is_type_valid(j); 65 65 66 bool find = false;67 for (uint32_t j=0; j<_nb_inst_issue; j++)68 if (_table_routing [i][j])69 {70 find = true;66 // bool find = false; 67 // for (uint32_t j=0; j<_nb_inst_issue; j++) 68 // if (_table_routing [i][j]) 69 // { 70 // find = true; 71 71 72 for (uint32_t k=0; k<_nb_type; k++)73 type_present [k] |= _table_issue_type [j][k];74 }72 // for (uint32_t k=0; k<_nb_type; k++) 73 // type_present [k] |= _table_issue_type [j][k]; 74 // } 75 75 76 if (not find)77 test.error(toString(_("Rename_unit [%d] is not connected with a issue slot.\n"),i));78 else79 for (uint32_t j=0; j<_nb_type; j++)80 if (not type_present [j] and not is_type_optionnal(j))81 test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str()));82 }76 // if (not find) 77 // test.error(toString(_("Rename_unit [%d] is not connected with a issue slot.\n"),i)); 78 // else 79 // for (uint32_t j=0; j<_nb_type; j++) 80 // if (not type_present [j] and not is_type_optionnal(j)) 81 // test.error(toString(_("Rename_unit [%d] can't issue instruction's type \"%s\".\n"),i,toString(j).c_str())); 82 // } 83 83 84 84 if ((_priority != PRIORITY_ROUND_ROBIN)) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/SelfTest/src/test.cpp
r88 r117 153 153 ALLOC1_SC_SIGNAL( in_COMMIT_ACK ," in_COMMIT_ACK ",Tcontrol_t ,_param->_nb_inst_commit); 154 154 ALLOC1_SC_SIGNAL(out_COMMIT_WEN ,"out_COMMIT_WEN ",Tcontrol_t ,_param->_nb_inst_commit); 155 156 155 //ALLOC1_SC_SIGNAL(out_COMMIT_CONTEXT_ID ,"out_COMMIT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_commit); 156 //ALLOC1_SC_SIGNAL(out_COMMIT_FRONT_END_ID ,"out_COMMIT_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_commit); 157 157 ALLOC1_SC_SIGNAL(out_COMMIT_PACKET_ID ,"out_COMMIT_PACKET_ID ",Tpacket_t ,_param->_nb_inst_commit); 158 158 //ALLOC1_SC_SIGNAL(out_COMMIT_OPERATION ,"out_COMMIT_OPERATION ",Toperation_t ,_param->_nb_inst_commit); … … 234 234 INSTANCE1_SC_SIGNAL(_Reexecute_unit, in_COMMIT_ACK ,_param->_nb_inst_commit); 235 235 INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_WEN ,_param->_nb_inst_commit); 236 237 238 239 236 //if (_param->_have_port_context_id) 237 //INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_CONTEXT_ID ,_param->_nb_inst_commit); 238 //if (_param->_have_port_front_end_id) 239 //INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_FRONT_END_ID ,_param->_nb_inst_commit); 240 240 if (_param->_have_port_rob_ptr ) 241 241 INSTANCE1_SC_SIGNAL(_Reexecute_unit,out_COMMIT_PACKET_ID ,_param->_nb_inst_commit); … … 415 415 416 416 TEST(Tcontrol_t ,out_COMMIT_WEN [i]->read(),request[packet].commit_wen ); 417 if (_param->_have_port_context_id)418 TEST(Tcontext_t ,out_COMMIT_CONTEXT_ID [i]->read(),request[packet].context_id );419 if (_param->_have_port_front_end_id)420 TEST(Tcontext_t ,out_COMMIT_FRONT_END_ID [i]->read(),request[packet].front_end_id);417 // if (_param->_have_port_context_id) 418 // TEST(Tcontext_t ,out_COMMIT_CONTEXT_ID [i]->read(),request[packet].context_id ); 419 // if (_param->_have_port_front_end_id) 420 // TEST(Tcontext_t ,out_COMMIT_FRONT_END_ID [i]->read(),request[packet].front_end_id); 421 421 // TEST(Toperation_t ,out_COMMIT_OPERATION [i]->read(),request[packet].operation ); 422 422 // TEST(Ttype_t ,out_COMMIT_TYPE [i]->read(),request[packet].type ); … … 529 529 DELETE1_SC_SIGNAL( in_COMMIT_ACK ,_param->_nb_inst_commit); 530 530 DELETE1_SC_SIGNAL(out_COMMIT_WEN ,_param->_nb_inst_commit); 531 532 531 //DELETE1_SC_SIGNAL(out_COMMIT_CONTEXT_ID ,_param->_nb_inst_commit); 532 //DELETE1_SC_SIGNAL(out_COMMIT_FRONT_END_ID ,_param->_nb_inst_commit); 533 533 DELETE1_SC_SIGNAL(out_COMMIT_PACKET_ID ,_param->_nb_inst_commit); 534 534 //DELETE1_SC_SIGNAL(out_COMMIT_OPERATION ,_param->_nb_inst_commit); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/include/Reexecute_unit.h
r97 r117 87 87 public : SC_IN (Tcontrol_t ) ** in_COMMIT_ACK ;//[nb_inst_commit] 88 88 public : SC_OUT(Tcontrol_t ) ** out_COMMIT_WEN ;//[nb_inst_commit] 89 90 89 //public : SC_OUT(Tcontext_t ) ** out_COMMIT_CONTEXT_ID ;//[nb_inst_commit] 90 //public : SC_OUT(Tcontext_t ) ** out_COMMIT_FRONT_END_ID ;//[nb_inst_commit] 91 91 public : SC_OUT(Tpacket_t ) ** out_COMMIT_PACKET_ID ;//[nb_inst_commit] 92 92 //public : SC_OUT(Toperation_t ) ** out_COMMIT_OPERATION ;//[nb_inst_commit] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_allocation.cpp
r112 r117 83 83 ALLOC1_VALACK_IN ( in_COMMIT_ACK ,ACK); 84 84 ALLOC1_SIGNAL_OUT(out_COMMIT_WEN ,"wen" ,Tcontrol_t ,1); 85 86 85 // ALLOC1_SIGNAL_OUT(out_COMMIT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ); 86 // ALLOC1_SIGNAL_OUT(out_COMMIT_FRONT_END_ID ,"front_end_id",Tcontext_t ,_param->_size_front_end_id); 87 87 ALLOC1_SIGNAL_OUT(out_COMMIT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr ); 88 88 // ALLOC1_SIGNAL_OUT(out_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_deallocation.cpp
r115 r117 44 44 DELETE1_SIGNAL( in_COMMIT_ACK ,_param->_nb_inst_commit,1); 45 45 DELETE1_SIGNAL(out_COMMIT_WEN ,_param->_nb_inst_commit,1); 46 47 46 // DELETE1_SIGNAL(out_COMMIT_CONTEXT_ID ,_param->_nb_inst_commit,_param->_size_context_id ); 47 // DELETE1_SIGNAL(out_COMMIT_FRONT_END_ID ,_param->_nb_inst_commit,_param->_size_front_end_id); 48 48 DELETE1_SIGNAL(out_COMMIT_PACKET_ID ,_param->_nb_inst_commit,_param->_size_rob_ptr ); 49 49 // DELETE1_SIGNAL(out_COMMIT_OPERATION ,_param->_nb_inst_commit,_param->_size_operation ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Reexecute_unit/src/Reexecute_unit_genMealy_commit.cpp
r98 r117 101 101 if (commit_val) 102 102 { 103 if (_param->_have_port_context_id)104 PORT_WRITE(out_COMMIT_CONTEXT_ID [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID [x][y]));105 if (_param->_have_port_front_end_id)106 PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y]));103 // if (_param->_have_port_context_id) 104 // PORT_WRITE(out_COMMIT_CONTEXT_ID [i], PORT_READ(in_EXECUTE_LOOP_CONTEXT_ID [x][y])); 105 // if (_param->_have_port_front_end_id) 106 // PORT_WRITE(out_COMMIT_FRONT_END_ID [i], PORT_READ(in_EXECUTE_LOOP_FRONT_END_ID [x][y])); 107 107 if (_param->_have_port_rob_ptr ) 108 108 PORT_WRITE(out_COMMIT_PACKET_ID [i], PORT_READ(in_EXECUTE_LOOP_PACKET_ID [x][y])); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/test.cpp
r88 r117 77 77 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 78 78 79 sc_signal<Tcontrol_t > ** in_INSERT_VAL ; 80 sc_signal<Tcontrol_t > ** out_INSERT_ACK ; 81 sc_signal<Tcontext_t > ** in_INSERT_FRONT_END_ID ; 82 sc_signal<Tcontext_t > ** in_INSERT_CONTEXT_ID ; 83 sc_signal<Ttype_t > ** in_INSERT_TYPE ; 84 sc_signal<Toperation_t> ** in_INSERT_OPERATION ; 85 sc_signal<Tlsq_ptr_t > ** out_INSERT_STORE_QUEUE_PTR_WRITE; 86 sc_signal<Tlsq_ptr_t > ** out_INSERT_LOAD_QUEUE_PTR_WRITE ; 87 sc_signal<Tcontrol_t > ** in_RETIRE_VAL ; 88 sc_signal<Tcontrol_t > ** out_RETIRE_ACK ; 89 sc_signal<Tcontext_t > ** in_RETIRE_FRONT_END_ID ; 90 sc_signal<Tcontext_t > ** in_RETIRE_CONTEXT_ID ; 91 //sc_signal<Ttype_t > ** in_RETIRE_TYPE ; 92 //sc_signal<Toperation_t> ** in_RETIRE_OPERATION ; 93 sc_signal<Tcontrol_t > ** in_RETIRE_USE_STORE_QUEUE ; 94 sc_signal<Tcontrol_t > ** in_RETIRE_USE_LOAD_QUEUE ; 95 sc_signal<Tlsq_ptr_t > ** in_RETIRE_STORE_QUEUE_PTR_WRITE; 96 sc_signal<Tlsq_ptr_t > ** in_RETIRE_LOAD_QUEUE_PTR_WRITE ; 97 79 98 ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); 80 99 ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); … … 89 108 ALLOC1_SC_SIGNAL( in_RETIRE_FRONT_END_ID ," in_RETIRE_FRONT_END_ID ",Tcontext_t ,_param->_nb_inst_retire); 90 109 ALLOC1_SC_SIGNAL( in_RETIRE_CONTEXT_ID ," in_RETIRE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_retire); 91 // 92 // 110 //ALLOC1_SC_SIGNAL( in_RETIRE_TYPE ," in_RETIRE_TYPE ",Ttype_t ,_param->_nb_inst_retire); 111 //ALLOC1_SC_SIGNAL( in_RETIRE_OPERATION ," in_RETIRE_OPERATION ",Toperation_t,_param->_nb_inst_retire); 93 112 ALLOC1_SC_SIGNAL( in_RETIRE_USE_STORE_QUEUE ," in_RETIRE_USE_STORE_QUEUE ",Tcontrol_t ,_param->_nb_inst_retire); 94 113 ALLOC1_SC_SIGNAL( in_RETIRE_USE_LOAD_QUEUE ," in_RETIRE_USE_LOAD_QUEUE ",Tcontrol_t ,_param->_nb_inst_retire); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/SelfTest/src/test.cpp
r98 r117 79 79 ALLOC1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW," in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert); 80 80 81 82 83 84 85 86 81 //ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA ,"out_INSERT_STAT_LIST_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); 82 //ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY ,"out_INSERT_STAT_LIST_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); 83 //ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB ,"out_INSERT_STAT_LIST_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); 84 //ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY ,"out_INSERT_STAT_LIST_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); 85 //ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC ,"out_INSERT_STAT_LIST_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); 86 //ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,"out_INSERT_STAT_LIST_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); 87 87 ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD ,"out_INSERT_STAT_LIST_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); 88 ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD ,"out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD ",Tgeneral_address_t,_param->_nb_inst_insert); 88 89 ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ,"out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ",Tgeneral_address_t,_param->_nb_inst_insert); 89 90 ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE ,"out_INSERT_STAT_LIST_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); 91 ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD ,"out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD ",Tspecial_address_t,_param->_nb_inst_insert); 90 92 ALLOC1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ,"out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ",Tspecial_address_t,_param->_nb_inst_insert); 91 93 … … 157 159 INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue, in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert); 158 160 159 160 161 162 163 164 161 //INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RA ,_param->_nb_inst_insert); 162 //INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RA_PHY ,_param->_nb_inst_insert); 163 //INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RB ,_param->_nb_inst_insert); 164 //INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RB_PHY ,_param->_nb_inst_insert); 165 //INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_READ_RC ,_param->_nb_inst_insert); 166 //INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,_param->_nb_inst_insert); 165 167 INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RD ,_param->_nb_inst_insert); 168 INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert); 166 169 INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert); 167 170 INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_WRITE_RE ,_param->_nb_inst_insert); 171 INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert); 168 172 INSTANCE1_SC_SIGNAL(_Register_translation_unit_Glue,out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert); 169 173 … … 331 335 DELETE1_SC_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert); 332 336 333 334 335 336 337 338 337 //DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RA ,_param->_nb_inst_insert); 338 //DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY ,_param->_nb_inst_insert); 339 //DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RB ,_param->_nb_inst_insert); 340 //DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY ,_param->_nb_inst_insert); 341 //DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_READ_RC ,_param->_nb_inst_insert); 342 //DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,_param->_nb_inst_insert); 339 343 DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD ,_param->_nb_inst_insert); 344 DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert); 340 345 DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert); 341 346 DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE ,_param->_nb_inst_insert); 347 DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert); 342 348 DELETE1_SC_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert); 343 349 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h
r110 r117 108 108 public : SC_OUT(Tspecial_address_t) ** out_INSERT_STAT_LIST_NUM_REG_RC_PHY ;//[nb_inst_insert] 109 109 public : SC_OUT(Tcontrol_t ) ** out_INSERT_STAT_LIST_WRITE_RD ;//[nb_inst_insert] 110 public : SC_OUT(Tgeneral_address_t) ** out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD ;//[nb_inst_insert] 110 111 public : SC_OUT(Tgeneral_address_t) ** out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ;//[nb_inst_insert] 111 112 public : SC_OUT(Tcontrol_t ) ** out_INSERT_STAT_LIST_WRITE_RE ;//[nb_inst_insert] 113 public : SC_OUT(Tspecial_address_t) ** out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD ;//[nb_inst_insert] 112 114 public : SC_OUT(Tspecial_address_t) ** out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ;//[nb_inst_insert] 113 115 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp
r112 r117 97 97 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,"STAT_LIST_NUM_REG_RC_PHY" ,Tspecial_address_t,_param->_size_special_register ); 98 98 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RD ,"STAT_LIST_WRITE_RD" ,Tcontrol_t ,1); 99 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD ,"STAT_LIST_NUM_REG_RD_PHY_OLD" ,Tgeneral_address_t,_param->_size_general_register ); 99 100 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ,"STAT_LIST_NUM_REG_RD_PHY_NEW" ,Tgeneral_address_t,_param->_size_general_register ); 100 101 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RE ,"STAT_LIST_WRITE_RE" ,Tcontrol_t ,1); 102 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD ,"STAT_LIST_NUM_REG_RE_PHY_OLD" ,Tspecial_address_t,_param->_size_special_register ); 101 103 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ,"STAT_LIST_NUM_REG_RE_PHY_NEW" ,Tspecial_address_t,_param->_size_special_register ); 102 104 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp
r110 r117 59 59 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register ); 60 60 61 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA ,_param->_nb_inst_insert,1);62 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register );63 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB ,_param->_nb_inst_insert,1);64 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register );65 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC ,_param->_nb_inst_insert,1);66 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register );61 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA ,_param->_nb_inst_insert,1); 62 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 63 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB ,_param->_nb_inst_insert,1); 64 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 65 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC ,_param->_nb_inst_insert,1); 66 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); 67 67 DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD ,_param->_nb_inst_insert,1); 68 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert,_param->_size_general_register ); 68 69 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert,_param->_size_general_register ); 69 70 DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE ,_param->_nb_inst_insert,1); 71 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert,_param->_size_special_register ); 70 72 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register ); 71 73 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp
r101 r117 49 49 PORT_WRITE(out_INSERT_FREE_LIST_SPR_VAL [i], WRITE_RE ); 50 50 51 PORT_WRITE(out_INSERT_STAT_LIST_READ_RA [i], READ_RA );52 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY [i], NUM_REG_RA_PHY );53 PORT_WRITE(out_INSERT_STAT_LIST_READ_RB [i], READ_RB );54 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY [i], NUM_REG_RB_PHY );55 PORT_WRITE(out_INSERT_STAT_LIST_READ_RC [i], READ_RC );56 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY [i], NUM_REG_RC_PHY );51 PORT_WRITE(out_INSERT_STAT_LIST_READ_RA [i], READ_RA ); 52 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY [i], NUM_REG_RA_PHY ); 53 PORT_WRITE(out_INSERT_STAT_LIST_READ_RB [i], READ_RB ); 54 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY [i], NUM_REG_RB_PHY ); 55 PORT_WRITE(out_INSERT_STAT_LIST_READ_RC [i], READ_RC ); 56 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY [i], NUM_REG_RC_PHY ); 57 57 PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RD [i], WRITE_RD ); 58 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_OLD [i], NUM_REG_RD_PHY_OLD); 58 59 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW); 59 60 PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RE [i], WRITE_RE ); 61 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_OLD [i], NUM_REG_RE_PHY_OLD); 60 62 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); 61 63 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp
r113 r117 63 63 sc_signal<Tcontrol_t > ** in_INSERT_VAL ;//[nb_inst_insert] 64 64 sc_signal<Tcontrol_t > ** out_INSERT_ACK ;//[nb_inst_insert] 65 66 67 68 69 70 65 //sc_signal<Tcontrol_t > ** in_INSERT_READ_RA ;//[nb_inst_insert] 66 //sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RA_PHY ;//[nb_inst_insert] 67 //sc_signal<Tcontrol_t > ** in_INSERT_READ_RB ;//[nb_inst_insert] 68 //sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RB_PHY ;//[nb_inst_insert] 69 //sc_signal<Tcontrol_t > ** in_INSERT_READ_RC ;//[nb_inst_insert] 70 //sc_signal<Tspecial_address_t> ** in_INSERT_NUM_REG_RC_PHY ;//[nb_inst_insert] 71 71 sc_signal<Tcontrol_t > ** in_INSERT_WRITE_RD ;//[nb_inst_insert] 72 sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert] 72 73 sc_signal<Tgeneral_address_t> ** in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert] 73 74 sc_signal<Tcontrol_t > ** in_INSERT_WRITE_RE ;//[nb_inst_insert] 75 sc_signal<Tspecial_address_t> ** in_INSERT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert] 74 76 sc_signal<Tspecial_address_t> ** in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert] 75 77 sc_signal<Tcontrol_t > ** in_RETIRE_VAL ;//[nb_inst_retire] 76 78 sc_signal<Tcontrol_t > ** out_RETIRE_ACK ;//[nb_inst_retire] 77 79 sc_signal<Tcontrol_t > ** in_RETIRE_RESTORE ;//[nb_inst_retire] 78 79 80 81 82 83 80 //sc_signal<Tcontrol_t > ** in_RETIRE_READ_RA ;//[nb_inst_retire] 81 //sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RA_PHY ;//[nb_inst_retire] 82 //sc_signal<Tcontrol_t > ** in_RETIRE_READ_RB ;//[nb_inst_retire] 83 //sc_signal<Tgeneral_address_t> ** in_RETIRE_NUM_REG_RB_PHY ;//[nb_inst_retire] 84 //sc_signal<Tcontrol_t > ** in_RETIRE_READ_RC ;//[nb_inst_retire] 85 //sc_signal<Tspecial_address_t> ** in_RETIRE_NUM_REG_RC_PHY ;//[nb_inst_retire] 84 86 sc_signal<Tcontrol_t > ** in_RETIRE_WRITE_RD ;//[nb_inst_retire] 85 87 sc_signal<Tcontrol_t > ** in_RETIRE_RESTORE_RD_PHY_OLD;//[nb_inst_retire] … … 99 101 ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert); 100 102 ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert); 101 102 103 104 105 106 103 //ALLOC1_SC_SIGNAL( in_INSERT_READ_RA ," in_INSERT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert); 104 //ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY ," in_INSERT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); 105 //ALLOC1_SC_SIGNAL( in_INSERT_READ_RB ," in_INSERT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert); 106 //ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY ," in_INSERT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert); 107 //ALLOC1_SC_SIGNAL( in_INSERT_READ_RC ," in_INSERT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert); 108 //ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY ," in_INSERT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert); 107 109 ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD ," in_INSERT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert); 110 ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD," in_INSERT_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_insert); 108 111 ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW," in_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert); 109 112 ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE ," in_INSERT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert); 113 ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD," in_INSERT_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_insert); 110 114 ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW," in_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert); 111 115 ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire); 112 116 ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire); 113 117 ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE ," in_RETIRE_RESTORE ",Tcontrol_t ,_param->_nb_inst_retire); 114 115 116 117 118 119 118 //ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA ," in_RETIRE_READ_RA ",Tcontrol_t ,_param->_nb_inst_retire); 119 //ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ," in_RETIRE_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); 120 //ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB ," in_RETIRE_READ_RB ",Tcontrol_t ,_param->_nb_inst_retire); 121 //ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ," in_RETIRE_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_retire); 122 //ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC ," in_RETIRE_READ_RC ",Tcontrol_t ,_param->_nb_inst_retire); 123 //ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ," in_RETIRE_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_retire); 120 124 ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD ," in_RETIRE_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_retire); 121 125 ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD," in_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire); … … 145 149 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_VAL ,_param->_nb_inst_insert); 146 150 INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_INSERT_ACK ,_param->_nb_inst_insert); 147 148 149 150 151 152 151 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA ,_param->_nb_inst_insert); 152 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert); 153 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB ,_param->_nb_inst_insert); 154 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert); 155 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC ,_param->_nb_inst_insert); 156 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert); 153 157 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RD ,_param->_nb_inst_insert); 158 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert); 154 159 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert); 155 160 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RE ,_param->_nb_inst_insert); 161 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert); 156 162 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert); 157 163 … … 159 165 INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK ,_param->_nb_inst_retire); 160 166 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE ,_param->_nb_inst_retire); 161 162 163 164 165 166 167 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA ,_param->_nb_inst_retire); 168 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire); 169 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB ,_param->_nb_inst_retire); 170 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire); 171 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC ,_param->_nb_inst_retire); 172 //INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire); 167 173 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD ,_param->_nb_inst_retire); 168 174 INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire); … … 348 354 349 355 in_INSERT_VAL [i]->write((rand()%100) < percent_transaction_insert); 350 in_INSERT_READ_RA [i]->write(read_ra );351 in_INSERT_NUM_REG_RA_PHY [i]->write(ra);352 in_INSERT_READ_RB [i]->write(read_rb );353 in_INSERT_NUM_REG_RB_PHY [i]->write(rb);354 in_INSERT_READ_RC [i]->write(read_rc );355 in_INSERT_NUM_REG_RC_PHY [i]->write(rc);356 // in_INSERT_READ_RA [i]->write(read_ra ); 357 // in_INSERT_NUM_REG_RA_PHY [i]->write(ra); 358 // in_INSERT_READ_RB [i]->write(read_rb ); 359 // in_INSERT_NUM_REG_RB_PHY [i]->write(rb); 360 // in_INSERT_READ_RC [i]->write(read_rc ); 361 // in_INSERT_NUM_REG_RC_PHY [i]->write(rc); 356 362 in_INSERT_WRITE_RD [i]->write(write_rd); 357 363 in_INSERT_NUM_REG_RD_PHY_NEW [i]->write(rd); … … 394 400 395 401 in_RETIRE_VAL [i]->write((rand()%100) < percent_transaction_retire); 396 in_RETIRE_READ_RA [i]->write(read_ra );397 in_RETIRE_RESTORE [i]->write(0);398 in_RETIRE_NUM_REG_RA_PHY [i]->write(ra);399 in_RETIRE_READ_RB [i]->write(read_rb );400 in_RETIRE_NUM_REG_RB_PHY [i]->write(rb);401 in_RETIRE_READ_RC [i]->write(read_rc );402 in_RETIRE_NUM_REG_RC_PHY [i]->write(rc);402 // in_RETIRE_READ_RA [i]->write(read_ra ); 403 // in_RETIRE_RESTORE [i]->write(0); 404 // in_RETIRE_NUM_REG_RA_PHY [i]->write(ra); 405 // in_RETIRE_READ_RB [i]->write(read_rb ); 406 // in_RETIRE_NUM_REG_RB_PHY [i]->write(rb); 407 // in_RETIRE_READ_RC [i]->write(read_rc ); 408 // in_RETIRE_NUM_REG_RC_PHY [i]->write(rc); 403 409 in_RETIRE_WRITE_RD [i]->write(write_rd); 404 410 in_RETIRE_RESTORE_RD_PHY_OLD [i]->write(0); … … 454 460 if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read()) 455 461 { 456 Tcontrol_t read_ra = in_INSERT_READ_RA [i]->read();457 Tgeneral_address_t ra = in_INSERT_NUM_REG_RA_PHY [i]->read();458 Tcontrol_t read_rb = in_INSERT_READ_RB [i]->read();459 Tgeneral_address_t rb = in_INSERT_NUM_REG_RB_PHY [i]->read();460 Tcontrol_t read_rc = in_INSERT_READ_RC [i]->read();461 Tspecial_address_t rc = in_INSERT_NUM_REG_RC_PHY [i]->read();462 // Tcontrol_t read_ra = in_INSERT_READ_RA [i]->read(); 463 // Tgeneral_address_t ra = in_INSERT_NUM_REG_RA_PHY [i]->read(); 464 // Tcontrol_t read_rb = in_INSERT_READ_RB [i]->read(); 465 // Tgeneral_address_t rb = in_INSERT_NUM_REG_RB_PHY [i]->read(); 466 // Tcontrol_t read_rc = in_INSERT_READ_RC [i]->read(); 467 // Tspecial_address_t rc = in_INSERT_NUM_REG_RC_PHY [i]->read(); 462 468 Tgeneral_address_t rd_new = in_INSERT_NUM_REG_RD_PHY_NEW [i]->read(); 463 469 Tspecial_address_t re_new = in_INSERT_NUM_REG_RE_PHY_NEW [i]->read(); 464 470 465 471 LABEL("INSERT [%d] - Accepted",i); 466 LABEL(" * read_ra : %d",read_ra );467 LABEL(" * reg_ra : %d",ra );468 LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free );469 LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link );470 LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);471 LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter );472 LABEL(" * read_rb : %d",read_rb );473 LABEL(" * reg_rb : %d",rb );474 LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free );475 LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link );476 LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);477 LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter );478 LABEL(" * read_rc : %d",read_rc );479 LABEL(" * reg_rc : %d",rc );480 LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free );481 LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link );482 LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);483 LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter );472 // LABEL(" * read_ra : %d",read_ra ); 473 // LABEL(" * reg_ra : %d",ra ); 474 // LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free ); 475 // LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link ); 476 // LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid); 477 // LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter ); 478 // LABEL(" * read_rb : %d",read_rb ); 479 // LABEL(" * reg_rb : %d",rb ); 480 // LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free ); 481 // LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link ); 482 // LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid); 483 // LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter ); 484 // LABEL(" * read_rc : %d",read_rc ); 485 // LABEL(" * reg_rc : %d",rc ); 486 // LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free ); 487 // LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link ); 488 // LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid); 489 // LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter ); 484 490 LABEL(" * read_rd : %d",write_rd); 485 491 LABEL(" * reg_rd_new : %d",rd_new ); … … 495 501 LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter ); 496 502 497 if (read_ra)498 {499 gpr_status[ra]._counter ++;500 }501 if (read_rb)502 {503 gpr_status[rb]._counter ++;504 }505 if (read_rc)506 {507 spr_status[rc]._counter ++;508 }503 // if (read_ra) 504 // { 505 // gpr_status[ra]._counter ++; 506 // } 507 // if (read_rb) 508 // { 509 // gpr_status[rb]._counter ++; 510 // } 511 // if (read_rc) 512 // { 513 // spr_status[rc]._counter ++; 514 // } 509 515 if (write_rd) 510 516 { … … 544 550 { 545 551 Tcontrol_t restore = in_RETIRE_RESTORE [i]->read(); 546 Tcontrol_t read_ra = in_RETIRE_READ_RA [i]->read();547 Tgeneral_address_t ra = in_RETIRE_NUM_REG_RA_PHY [i]->read();548 Tcontrol_t read_rb = in_RETIRE_READ_RB [i]->read();549 Tgeneral_address_t rb = in_RETIRE_NUM_REG_RB_PHY [i]->read();550 Tcontrol_t read_rc = in_RETIRE_READ_RC [i]->read();551 Tspecial_address_t rc = in_RETIRE_NUM_REG_RC_PHY [i]->read();552 // Tcontrol_t read_ra = in_RETIRE_READ_RA [i]->read(); 553 // Tgeneral_address_t ra = in_RETIRE_NUM_REG_RA_PHY [i]->read(); 554 // Tcontrol_t read_rb = in_RETIRE_READ_RB [i]->read(); 555 // Tgeneral_address_t rb = in_RETIRE_NUM_REG_RB_PHY [i]->read(); 556 // Tcontrol_t read_rc = in_RETIRE_READ_RC [i]->read(); 557 // Tspecial_address_t rc = in_RETIRE_NUM_REG_RC_PHY [i]->read(); 552 558 Tcontrol_t write_rd = in_RETIRE_WRITE_RD [i]->read(); 553 559 Tcontrol_t restore_rd_old = in_RETIRE_RESTORE_RD_PHY_OLD [i]->read(); … … 561 567 LABEL("RETIRE [%d] - Accepted",i); 562 568 LABEL(" * restore : %d",restore); 563 LABEL(" * read_ra : %d",read_ra );564 LABEL(" * reg_ra : %d",ra );565 LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free );566 LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link );567 LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);568 LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter );569 LABEL(" * read_rb : %d",read_rb );570 LABEL(" * reg_rb : %d",rb );571 LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free );572 LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link );573 LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);574 LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter );575 LABEL(" * read_rc : %d",read_rc );576 LABEL(" * reg_rc : %d",rc );577 LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free );578 LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link );579 LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);580 LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter );569 // LABEL(" * read_ra : %d",read_ra ); 570 // LABEL(" * reg_ra : %d",ra ); 571 // LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free ); 572 // LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link ); 573 // LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid); 574 // LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter ); 575 // LABEL(" * read_rb : %d",read_rb ); 576 // LABEL(" * reg_rb : %d",rb ); 577 // LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free ); 578 // LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link ); 579 // LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid); 580 // LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter ); 581 // LABEL(" * read_rc : %d",read_rc ); 582 // LABEL(" * reg_rc : %d",rc ); 583 // LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free ); 584 // LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link ); 585 // LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid); 586 // LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter ); 581 587 LABEL(" * read_rd : %d",write_rd); 582 588 LABEL(" * restore_rd_old : %d",restore_rd_old); … … 604 610 LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter ); 605 611 606 if (read_ra)607 {608 gpr_status[ra]._counter --;609 }610 if (read_rb)611 {612 gpr_status[rb]._counter --;613 }614 if (read_rc)615 {616 spr_status[rc]._counter --;617 }612 // if (read_ra) 613 // { 614 // gpr_status[ra]._counter --; 615 // } 616 // if (read_rb) 617 // { 618 // gpr_status[rb]._counter --; 619 // } 620 // if (read_rc) 621 // { 622 // spr_status[rc]._counter --; 623 // } 618 624 if (write_rd) 619 625 { … … 721 727 delete [] in_INSERT_VAL ; 722 728 delete [] out_INSERT_ACK ; 723 724 725 726 727 728 729 //delete [] in_INSERT_READ_RA ; 730 //delete [] in_INSERT_NUM_REG_RA_PHY ; 731 //delete [] in_INSERT_READ_RB ; 732 //delete [] in_INSERT_NUM_REG_RB_PHY ; 733 //delete [] in_INSERT_READ_RC ; 734 //delete [] in_INSERT_NUM_REG_RC_PHY ; 729 735 delete [] in_INSERT_WRITE_RD ; 736 delete [] in_INSERT_NUM_REG_RD_PHY_OLD; 730 737 delete [] in_INSERT_NUM_REG_RD_PHY_NEW; 731 738 delete [] in_INSERT_WRITE_RE ; 739 delete [] in_INSERT_NUM_REG_RE_PHY_OLD; 732 740 delete [] in_INSERT_NUM_REG_RE_PHY_NEW; 733 741 delete [] in_RETIRE_VAL ; 734 742 delete [] out_RETIRE_ACK ; 735 743 delete [] in_RETIRE_RESTORE ; 736 737 738 739 740 741 744 //delete [] in_RETIRE_READ_RA ; 745 //delete [] in_RETIRE_NUM_REG_RA_PHY ; 746 //delete [] in_RETIRE_READ_RB ; 747 //delete [] in_RETIRE_NUM_REG_RB_PHY ; 748 //delete [] in_RETIRE_READ_RC ; 749 //delete [] in_RETIRE_NUM_REG_RC_PHY ; 742 750 delete [] in_RETIRE_WRITE_RD ; 743 751 delete [] in_RETIRE_RESTORE_RD_PHY_OLD; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h
r112 r117 72 72 public : SC_IN (Tspecial_address_t) ** in_INSERT_NUM_REG_RC_PHY ;//[nb_inst_insert] 73 73 public : SC_IN (Tcontrol_t ) ** in_INSERT_WRITE_RD ;//[nb_inst_insert] 74 public : SC_IN (Tgeneral_address_t) ** in_INSERT_NUM_REG_RD_PHY_OLD;//[nb_inst_insert] 74 75 public : SC_IN (Tgeneral_address_t) ** in_INSERT_NUM_REG_RD_PHY_NEW;//[nb_inst_insert] 75 76 public : SC_IN (Tcontrol_t ) ** in_INSERT_WRITE_RE ;//[nb_inst_insert] 77 public : SC_IN (Tspecial_address_t) ** in_INSERT_NUM_REG_RE_PHY_OLD;//[nb_inst_insert] 76 78 public : SC_IN (Tspecial_address_t) ** in_INSERT_NUM_REG_RE_PHY_NEW;//[nb_inst_insert] 77 79 78 80 // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 79 81 public : SC_IN (Tcontrol_t ) ** in_RETIRE_VAL ;//[nb_inst_retire] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Types.h
r112 r117 23 23 class stat_list_entry_t 24 24 { 25 public : bool _is_free ; // set = is present in free list 26 public : bool _is_link ; // set = is present in rat 27 //public : bool _is_valid; // set = an instruction have write in this register 28 //public : uint32_t _counter ; // number of register that must read this register 25 public : bool _is_free ; // set = is present in free list 26 public : bool _is_link ; // set = is present in rat 27 public : bool _is_use ; // set = is present in ROB (used by an instruction as destination) 28 // not necesseray in single thread mode : because an thread can't rename when they have an event 29 // in multi thread, the renaming continue and an old register can be reused 29 30 30 31 public : stat_list_entry_t (void) {}; … … 35 36 _is_free = 0; 36 37 _is_link = is_link; 37 // _is_valid = 1; 38 // _counter = 0; 38 _is_use = is_link; 39 39 } 40 40 41 // public : void insert_read (void) 42 // { 43 // _counter ++; 44 // } 41 public : void insert_write_old (void) 42 { 43 // old is not in the rat, but is already used (if miss prediction or event) 44 _is_link = 0; 45 } 45 46 46 public : void insert_write (void)47 public : void insert_write_new (void) 47 48 { 48 49 _is_free = 0; 49 50 _is_link = 1; 50 // _is_valid = 0;51 _is_use = 1; 51 52 } 52 53 // public : void retire_read (void)54 // {55 // _counter --;56 // }57 53 58 54 public : void retire_write_old (bool restore, bool restore_old) … … 62 58 // 1 0 0 - event and previous update 63 59 // 1 1 1 - event and first update 64 65 _is_link = restore and restore_old; 60 61 if (restore and restore_old) 62 { 63 _is_link = 1; 64 // _is_use = 1; // already set 65 } 66 else 67 { 68 // _is_link = 0; // already unset 69 _is_use = 0; 70 } 71 66 72 } 67 73 … … 73 79 74 80 if (restore) 75 _is_link = 0; 81 { 82 // test if is the actual mapping (in RAT) 83 if (_is_link) 84 _is_use = 0; 76 85 77 // in all case78 // _is_valid = 1; 86 _is_link = 0; 87 } 79 88 } 80 89 … … 84 93 } 85 94 86 // public : bool can_insert_read (uint32_t max_reader)87 // {88 // return ((_counter+1) < max_reader);89 // }90 91 95 public : bool can_free (void) 92 96 { 93 97 return ((_is_free == 0) and 94 (_is_link == 0) // and 95 // (_is_valid == 1) and // if is_link <- 0, then retire_write_old or reset 96 // (_counter == 0) 97 ); 98 (_is_link == 0) and 99 (_is_use == 0)); 98 100 } 99 101 … … 102 104 { 103 105 output << x._is_free << " " 104 << x._is_link // << " " 105 // << x._is_valid << " " 106 // << x._counter 107 ; 106 << x._is_link << " " 107 << x._is_use ; 108 108 109 109 return output; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_allocation.cpp
r112 r117 69 69 ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register); 70 70 ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ); 71 ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_OLD,"num_reg_rd_phy_old",Tgeneral_address_t,_param->_size_general_register); 71 72 ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_NEW,"num_reg_rd_phy_new",Tgeneral_address_t,_param->_size_general_register); 72 73 ALLOC1_SIGNAL_IN ( in_INSERT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ); 74 ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_OLD,"num_reg_re_phy_old",Tspecial_address_t,_param->_size_special_register); 73 75 ALLOC1_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW,"num_reg_re_phy_new",Tspecial_address_t,_param->_size_special_register); 74 76 75 77 ALLOC1_INTERFACE_END(_param->_nb_inst_insert); 76 78 } 77 79 78 80 // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 79 81 { 80 82 ALLOC1_INTERFACE_BEGIN("retire",IN,NORTH,_("Retire a renaming result"),_param->_nb_inst_retire); 81 83 82 84 ALLOC1_VALACK_IN ( in_RETIRE_VAL ,VAL); 83 85 ALLOC1_VALACK_OUT(out_RETIRE_ACK ,ACK); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_deallocation.cpp
r112 r117 39 39 DELETE1_SIGNAL( in_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register); 40 40 DELETE1_SIGNAL( in_INSERT_WRITE_RD ,_param->_nb_inst_insert,1 ); 41 DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register); 41 42 DELETE1_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register); 42 43 DELETE1_SIGNAL( in_INSERT_WRITE_RE ,_param->_nb_inst_insert,1 ); 44 DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register); 43 45 DELETE1_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register); 44 46 45 47 DELETE1_SIGNAL( in_RETIRE_VAL ,_param->_nb_inst_retire,1); 46 48 DELETE1_SIGNAL(out_RETIRE_ACK ,_param->_nb_inst_retire,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_transition.cpp
r112 r117 86 86 if (PORT_READ(in_INSERT_WRITE_RD [i])) 87 87 { 88 Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]); 89 90 log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RD - num_reg new : %d",num_reg); 91 92 uint32_t bank = num_reg >> _param->_shift_gpr; 93 uint32_t reg = num_reg & _param->_mask_gpr ; 94 gpr_stat_list [bank][reg].insert_write(); 88 { 89 Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_OLD [i]); 90 91 log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RD - num_reg old : %d",num_reg); 92 93 uint32_t bank = num_reg >> _param->_shift_gpr; 94 uint32_t reg = num_reg & _param->_mask_gpr ; 95 gpr_stat_list [bank][reg].insert_write_old(); 96 } 97 { 98 Tgeneral_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RD_PHY_NEW [i]); 99 100 log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RD - num_reg new : %d",num_reg); 101 102 uint32_t bank = num_reg >> _param->_shift_gpr; 103 uint32_t reg = num_reg & _param->_mask_gpr ; 104 gpr_stat_list [bank][reg].insert_write_new(); 105 } 95 106 } 96 107 97 108 if (PORT_READ(in_INSERT_WRITE_RE [i])) 98 109 { 99 Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]); 100 101 log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RE - num_reg new : %d",num_reg); 102 103 uint32_t bank = num_reg >> _param->_shift_spr; 104 uint32_t reg = num_reg & _param->_mask_spr ; 105 spr_stat_list [bank][reg].insert_write(); 106 } 110 { 111 Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_OLD [i]); 112 113 log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RE - num_reg old : %d",num_reg); 114 115 uint32_t bank = num_reg >> _param->_shift_spr; 116 uint32_t reg = num_reg & _param->_mask_spr ; 117 spr_stat_list [bank][reg].insert_write_old(); 118 } 119 { 120 Tspecial_address_t num_reg = PORT_READ(in_INSERT_NUM_REG_RE_PHY_NEW [i]); 121 122 log_printf(TRACE,Stat_List_unit,FUNCTION," * WRITE_RE - num_reg new : %d",num_reg); 123 124 uint32_t bank = num_reg >> _param->_shift_spr; 125 uint32_t reg = num_reg & _param->_mask_spr ; 126 spr_stat_list [bank][reg].insert_write_new(); 127 } 128 } 107 129 } 108 130 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/src/Register_translation_unit_allocation.cpp
r112 r117 638 638 COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RD" , 639 639 dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RD" ); 640 COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_OLD", 641 dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RD_PHY_OLD"); 640 642 COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW", 641 643 dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RD_PHY_NEW"); 642 644 COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_WRITE_RE" , 643 645 dest,"out_INSERT_"+toString(i)+"_STAT_LIST_WRITE_RE" ); 646 COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_OLD", 647 dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RE_PHY_OLD"); 644 648 COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW", 645 649 dest,"out_INSERT_"+toString(i)+"_STAT_LIST_NUM_REG_RE_PHY_NEW"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg
r112 r117 7 7 1 1 +1 # nb_inst_insert [0] [nb_rename_unit] 8 8 1 1 +1 # nb_inst_retire [0] [nb_rename_unit] 9 1 1 +1 # nb_inst_issue10 9 1 1 +1 # nb_inst_execute [0] [nb_execute_loop] 11 10 1 1 +1 # nb_inst_reexecute … … 28 27 1 1 +1 # issue_priority 29 28 1 1 +1 # issue_load_balancing 30 1 1 +1 # table_routing [0][0] [nb_rename_unit][nb_inst_issue]31 1 1 +1 # table_issue_type [0][TYPE_ALU ] [nb_inst_issue][nb_type]32 1 1 +1 # table_issue_type [0][TYPE_SHIFT ] [nb_inst_issue][nb_type]33 1 1 +1 # table_issue_type [0][TYPE_MOVE ] [nb_inst_issue][nb_type]34 1 1 +1 # table_issue_type [0][TYPE_TEST ] [nb_inst_issue][nb_type]35 1 1 +1 # table_issue_type [0][TYPE_MUL ] [nb_inst_issue][nb_type]36 1 1 +1 # table_issue_type [0][TYPE_DIV ] [nb_inst_issue][nb_type]37 1 1 +1 # table_issue_type [0][TYPE_EXTEND ] [nb_inst_issue][nb_type]38 1 1 +1 # table_issue_type [0][TYPE_FIND ] [nb_inst_issue][nb_type]39 1 1 +1 # table_issue_type [0][TYPE_SPECIAL] [nb_inst_issue][nb_type]40 1 1 +1 # table_issue_type [0][TYPE_CUSTOM ] [nb_inst_issue][nb_type]41 1 1 +1 # table_issue_type [0][TYPE_BRANCH ] [nb_inst_issue][nb_type]42 1 1 +1 # table_issue_type [0][TYPE_MEMORY ] [nb_inst_issue][nb_type]43 29 1 1 +1 # size_reexecute_queue 44 30 1 1 +1 # reexecute_priority -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp
r112 r117 9 9 #include "Behavioural/include/Allocation.h" 10 10 11 #define NB_PARAMS 2 411 #define NB_PARAMS 23 12 12 13 13 void usage (int argc, char * argv[]) … … 22 22 err (_(" * nb_inst_insert [nb_rename_unit] (uint32_t )\n")); 23 23 err (_(" * nb_inst_retire [nb_rename_unit] (uint32_t )\n")); 24 24 //err (_(" * nb_inst_issue (uint32_t )\n")); 25 25 err (_(" * nb_inst_execute [nb_execute_loop] (uint32_t )\n")); 26 26 err (_(" * nb_inst_reexecute (uint32_t )\n")); … … 43 43 err (_(" * issue_priority (Tpriority_t )\n")); 44 44 err (_(" * issue_load_balancing (Tload_balancing_t )\n")); 45 err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n"));46 err (_(" * table_issue_type [nb_inst_issue][nb_type] (bool )\n"));47 err (_(" * TYPE_ALU \n"));48 err (_(" * TYPE_SHIFT \n"));49 err (_(" * TYPE_MOVE \n"));50 err (_(" * TYPE_TEST \n"));51 err (_(" * TYPE_MUL \n"));52 err (_(" * TYPE_DIV \n"));53 err (_(" * TYPE_EXTEND \n"));54 err (_(" * TYPE_FIND \n"));55 err (_(" * TYPE_SPECIAL\n"));56 err (_(" * TYPE_CUSTOM \n"));57 err (_(" * TYPE_BRANCH \n"));58 err (_(" * TYPE_MEMORY \n"));45 // err (_(" * table_routing [nb_rename_unit][nb_inst_issue] (bool )\n")); 46 // err (_(" * table_issue_type [nb_inst_issue][nb_type] (bool )\n")); 47 // err (_(" * TYPE_ALU \n")); 48 // err (_(" * TYPE_SHIFT \n")); 49 // err (_(" * TYPE_MOVE \n")); 50 // err (_(" * TYPE_TEST \n")); 51 // err (_(" * TYPE_MUL \n")); 52 // err (_(" * TYPE_DIV \n")); 53 // err (_(" * TYPE_EXTEND \n")); 54 // err (_(" * TYPE_FIND \n")); 55 // err (_(" * TYPE_SPECIAL\n")); 56 // err (_(" * TYPE_CUSTOM \n")); 57 // err (_(" * TYPE_BRANCH \n")); 58 // err (_(" * TYPE_MEMORY \n")); 59 59 err (_(" * size_reexecute_queue (uint32_t )\n")); 60 60 err (_(" * reexecute_priority (Tpriority_t )\n")); … … 120 120 _nb_inst_retire [i] = fromString<uint32_t>(argv[x++]); 121 121 122 122 //uint32_t _nb_inst_issue = fromString<uint32_t >(argv[x++]); 123 123 uint32_t * _nb_inst_execute = new uint32_t [_nb_execute_loop]; 124 124 for (uint32_t i=0; i<_nb_execute_loop; i++) … … 152 152 Tpriority_t _issue_priority = fromString<Tpriority_t >(argv[x++]); 153 153 Tload_balancing_t _issue_load_balancing = fromString<Tload_balancing_t>(argv[x++]); 154 bool ** _table_routing = new bool * [_nb_rename_unit]; 155 for (uint32_t i=0; i<_nb_rename_unit; i++) 156 { 157 _table_routing [i] = new bool [_nb_inst_issue]; 158 for (uint32_t j=0; j<_nb_inst_issue; j++) 159 _table_routing [i][j] = fromString<bool>(argv[x++]); 160 } 161 162 if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue)) 154 // bool ** _table_routing = new bool * [_nb_rename_unit]; 155 // for (uint32_t i=0; i<_nb_rename_unit; i++) 156 // { 157 // _table_routing [i] = new bool [_nb_inst_issue]; 158 // for (uint32_t j=0; j<_nb_inst_issue; j++) 159 // _table_routing [i][j] = fromString<bool>(argv[x++]); 160 // } 161 162 if (argc <= static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop//+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue 163 )) 163 164 usage (argc, argv); 164 165 165 bool ** _table_issue_type = new bool * [_nb_inst_issue];166 for (uint32_t i=0; i<_nb_inst_issue; i++)167 {168 _table_issue_type [i] = new bool [MAX_TYPE];169 for (uint32_t j=0; j<MAX_TYPE; j++)170 _table_issue_type [i][j] = false;171 172 _table_issue_type [i][TYPE_ALU ] = fromString<bool>(argv[x++]);173 _table_issue_type [i][TYPE_SHIFT ] = fromString<bool>(argv[x++]);174 _table_issue_type [i][TYPE_MOVE ] = fromString<bool>(argv[x++]);175 _table_issue_type [i][TYPE_TEST ] = fromString<bool>(argv[x++]);176 _table_issue_type [i][TYPE_MUL ] = fromString<bool>(argv[x++]);177 _table_issue_type [i][TYPE_DIV ] = fromString<bool>(argv[x++]);178 _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]);179 _table_issue_type [i][TYPE_FIND ] = fromString<bool>(argv[x++]);180 _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]);181 _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]);182 _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]);183 _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]);184 }166 // bool ** _table_issue_type = new bool * [_nb_inst_issue]; 167 // for (uint32_t i=0; i<_nb_inst_issue; i++) 168 // { 169 // _table_issue_type [i] = new bool [MAX_TYPE]; 170 // for (uint32_t j=0; j<MAX_TYPE; j++) 171 // _table_issue_type [i][j] = false; 172 173 // _table_issue_type [i][TYPE_ALU ] = fromString<bool>(argv[x++]); 174 // _table_issue_type [i][TYPE_SHIFT ] = fromString<bool>(argv[x++]); 175 // _table_issue_type [i][TYPE_MOVE ] = fromString<bool>(argv[x++]); 176 // _table_issue_type [i][TYPE_TEST ] = fromString<bool>(argv[x++]); 177 // _table_issue_type [i][TYPE_MUL ] = fromString<bool>(argv[x++]); 178 // _table_issue_type [i][TYPE_DIV ] = fromString<bool>(argv[x++]); 179 // _table_issue_type [i][TYPE_EXTEND ] = fromString<bool>(argv[x++]); 180 // _table_issue_type [i][TYPE_FIND ] = fromString<bool>(argv[x++]); 181 // _table_issue_type [i][TYPE_SPECIAL] = fromString<bool>(argv[x++]); 182 // _table_issue_type [i][TYPE_CUSTOM ] = fromString<bool>(argv[x++]); 183 // _table_issue_type [i][TYPE_BRANCH ] = fromString<bool>(argv[x++]); 184 // _table_issue_type [i][TYPE_MEMORY ] = fromString<bool>(argv[x++]); 185 // } 185 186 186 187 uint32_t _size_reexecute_queue = fromString<uint32_t >(argv[x++]); … … 220 221 } 221 222 222 if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+3*_sum_nb_load_store_queue)) 223 if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+10*_nb_rename_unit+_nb_execute_loop+// _nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue 224 3*_sum_nb_load_store_queue)) 223 225 usage (argc, argv); 224 226 … … 294 296 _nb_inst_insert , 295 297 _nb_inst_retire , 296 298 // _nb_inst_issue , 297 299 _nb_inst_execute , 298 300 _nb_inst_reexecute , … … 315 317 _issue_priority , 316 318 _issue_load_balancing , 317 _table_routing ,318 _table_issue_type ,319 // _table_routing , 320 // _table_issue_type , 319 321 _size_reexecute_queue , 320 322 _reexecute_priority , … … 400 402 delete [] _rename_select_priority ; 401 403 402 for (uint32_t i=0; i<_nb_inst_issue; i++)403 delete [] _table_issue_type [i];404 delete [] _table_issue_type;405 406 for (uint32_t i=0; i<_nb_rename_unit; i++)407 delete [] _table_routing [i];408 delete [] _table_routing;404 // for (uint32_t i=0; i<_nb_inst_issue; i++) 405 // delete [] _table_issue_type [i]; 406 // delete [] _table_issue_type; 407 408 // for (uint32_t i=0; i<_nb_rename_unit; i++) 409 // delete [] _table_routing [i]; 410 // delete [] _table_routing; 409 411 410 412 delete [] _link_rename_unit_with_front_end; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp
r112 r117 52 52 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 53 53 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 54 55 sc_signal<Tcontrol_t > *** in_RENAME_VAL ; 56 sc_signal<Tcontrol_t > *** out_RENAME_ACK ; 57 sc_signal<Tcontext_t > *** in_RENAME_FRONT_END_ID ; 58 sc_signal<Tcontext_t > *** in_RENAME_CONTEXT_ID ; 59 sc_signal<Tdepth_t > *** in_RENAME_DEPTH ; 60 sc_signal<Ttype_t > *** in_RENAME_TYPE ; 61 sc_signal<Toperation_t > *** in_RENAME_OPERATION ; 62 sc_signal<Tcontrol_t > *** in_RENAME_NO_EXECUTE ; 63 sc_signal<Tcontrol_t > *** in_RENAME_IS_DELAY_SLOT ; 64 sc_signal<Taddress_t > *** in_RENAME_ADDRESS ; 65 sc_signal<Taddress_t > *** in_RENAME_ADDRESS_NEXT ; 66 sc_signal<Tcontrol_t > *** in_RENAME_HAS_IMMEDIAT ; 67 sc_signal<Tgeneral_data_t > *** in_RENAME_IMMEDIAT ; 68 sc_signal<Tcontrol_t > *** in_RENAME_READ_RA ; 69 sc_signal<Tgeneral_address_t> *** in_RENAME_NUM_REG_RA ; 70 sc_signal<Tcontrol_t > *** in_RENAME_READ_RB ; 71 sc_signal<Tgeneral_address_t> *** in_RENAME_NUM_REG_RB ; 72 sc_signal<Tcontrol_t > *** in_RENAME_READ_RC ; 73 sc_signal<Tspecial_address_t> *** in_RENAME_NUM_REG_RC ; 74 sc_signal<Tcontrol_t > *** in_RENAME_WRITE_RD ; 75 sc_signal<Tgeneral_address_t> *** in_RENAME_NUM_REG_RD ; 76 sc_signal<Tcontrol_t > *** in_RENAME_WRITE_RE ; 77 sc_signal<Tspecial_address_t> *** in_RENAME_NUM_REG_RE ; 78 sc_signal<Texception_t > *** in_RENAME_EXCEPTION_USE ; 79 sc_signal<Texception_t > *** in_RENAME_EXCEPTION ; 80 81 sc_signal<Tcontrol_t > ** out_ISSUE_VAL ; 82 sc_signal<Tcontrol_t > ** in_ISSUE_ACK ; 83 sc_signal<Tcontext_t > ** out_ISSUE_FRONT_END_ID ; 84 sc_signal<Tcontext_t > ** out_ISSUE_CONTEXT_ID ; 85 sc_signal<Tpacket_t > ** out_ISSUE_PACKET_ID ; 86 sc_signal<Ttype_t > ** out_ISSUE_TYPE ; 87 sc_signal<Toperation_t > ** out_ISSUE_OPERATION ; 88 sc_signal<Tlsq_ptr_t > ** out_ISSUE_STORE_QUEUE_PTR_WRITE ; 89 sc_signal<Tlsq_ptr_t > ** out_ISSUE_LOAD_QUEUE_PTR_WRITE ; 90 sc_signal<Tcontrol_t > ** out_ISSUE_HAS_IMMEDIAT ; 91 sc_signal<Tgeneral_data_t > ** out_ISSUE_IMMEDIAT ; 92 sc_signal<Tcontrol_t > ** out_ISSUE_READ_RA ; 93 sc_signal<Tgeneral_address_t> ** out_ISSUE_NUM_REG_RA ; 94 sc_signal<Tcontrol_t > ** out_ISSUE_READ_RB ; 95 sc_signal<Tgeneral_address_t> ** out_ISSUE_NUM_REG_RB ; 96 sc_signal<Tcontrol_t > ** out_ISSUE_READ_RC ; 97 sc_signal<Tspecial_address_t> ** out_ISSUE_NUM_REG_RC ; 98 sc_signal<Tcontrol_t > ** out_ISSUE_WRITE_RD ; 99 sc_signal<Tgeneral_address_t> ** out_ISSUE_NUM_REG_RD ; 100 sc_signal<Tcontrol_t > ** out_ISSUE_WRITE_RE ; 101 sc_signal<Tspecial_address_t> ** out_ISSUE_NUM_REG_RE ; 102 103 sc_signal<Tcontrol_t > *** in_EXECUTE_LOOP_VAL ; 104 sc_signal<Tcontrol_t > *** out_EXECUTE_LOOP_ACK ; 105 sc_signal<Tcontext_t > *** in_EXECUTE_LOOP_FRONT_END_ID ; 106 sc_signal<Tcontext_t > *** in_EXECUTE_LOOP_CONTEXT_ID ; 107 sc_signal<Tpacket_t > *** in_EXECUTE_LOOP_PACKET_ID ; 108 //sc_signal<Ttype_t > *** in_EXECUTE_LOOP_TYPE ; 109 //sc_signal<Toperation_t > *** in_EXECUTE_LOOP_OPERATION ; 110 sc_signal<Tspecial_data_t > *** in_EXECUTE_LOOP_FLAGS ; 111 sc_signal<Texception_t > *** in_EXECUTE_LOOP_EXCEPTION ; 112 sc_signal<Tcontrol_t > *** in_EXECUTE_LOOP_NO_SEQUENCE ; 113 sc_signal<Taddress_t > *** in_EXECUTE_LOOP_ADDRESS ; 114 sc_signal<Tgeneral_data_t > *** in_EXECUTE_LOOP_DATA ; 115 116 sc_signal<Tcontrol_t > ** out_INSERT_VAL ; 117 sc_signal<Tcontrol_t > ** in_INSERT_ACK ; 118 sc_signal<Tcontrol_t > ** out_INSERT_RD_USE ; 119 sc_signal<Tgeneral_address_t> ** out_INSERT_RD_NUM_REG ; 120 sc_signal<Tcontrol_t > ** out_INSERT_RE_USE ; 121 sc_signal<Tspecial_address_t> ** out_INSERT_RE_NUM_REG ; 122 123 //sc_signal<Tcontrol_t > ** out_RETIRE_VAL ; 124 //sc_signal<Tcontrol_t > ** in_RETIRE_ACK ; 125 //sc_signal<Tcontrol_t > ** out_RETIRE_RD_OLD_USE ; 126 //sc_signal<Tgeneral_address_t> ** out_RETIRE_RD_OLD_NUM_REG ; 127 //sc_signal<Tcontrol_t > ** out_RETIRE_RD_NEW_USE ; 128 //sc_signal<Tgeneral_address_t> ** out_RETIRE_RD_NEW_NUM_REG ; 129 //sc_signal<Tcontrol_t > ** out_RETIRE_RE_OLD_USE ; 130 //sc_signal<Tspecial_address_t> ** out_RETIRE_RE_OLD_NUM_REG ; 131 //sc_signal<Tcontrol_t > ** out_RETIRE_RE_NEW_USE ; 132 //sc_signal<Tspecial_address_t> ** out_RETIRE_RE_NEW_NUM_REG ; 133 134 sc_signal<Tcontrol_t > ** out_BRANCH_COMPLETE_VAL ; 135 sc_signal<Tcontrol_t > ** in_BRANCH_COMPLETE_ACK ; 136 sc_signal<Tcontext_t > ** out_BRANCH_COMPLETE_FRONT_END_ID ; 137 sc_signal<Tcontext_t > ** out_BRANCH_COMPLETE_CONTEXT_ID ; 138 sc_signal<Tdepth_t > ** out_BRANCH_COMPLETE_DEPTH ; 139 sc_signal<Taddress_t > ** out_BRANCH_COMPLETE_ADDRESS ; 140 sc_signal<Tcontrol_t > ** out_BRANCH_COMPLETE_NO_SEQUENCE ; 141 sc_signal<Tcontrol_t > ** in_BRANCH_COMPLETE_MISS_PREDICTION ; 142 143 sc_signal<Tcontrol_t > * out_COMMIT_EVENT_VAL ; 144 sc_signal<Tcontrol_t > * in_COMMIT_EVENT_ACK ; 145 sc_signal<Tcontext_t > * out_COMMIT_EVENT_FRONT_END_ID ; 146 sc_signal<Tcontext_t > * out_COMMIT_EVENT_CONTEXT_ID ; 147 sc_signal<Tdepth_t > * out_COMMIT_EVENT_DEPTH ; 148 sc_signal<Tevent_type_t > * out_COMMIT_EVENT_TYPE ; 149 sc_signal<Tcontrol_t > * out_COMMIT_EVENT_IS_DELAY_SLOT ; 150 sc_signal<Taddress_t > * out_COMMIT_EVENT_ADDRESS ; 151 sc_signal<Tcontrol_t > * out_COMMIT_EVENT_ADDRESS_EPCR_VAL ; 152 sc_signal<Taddress_t > * out_COMMIT_EVENT_ADDRESS_EPCR ; 153 sc_signal<Tcontrol_t > * out_COMMIT_EVENT_ADDRESS_EEAR_VAL ; 154 sc_signal<Tgeneral_data_t > * out_COMMIT_EVENT_ADDRESS_EEAR ; 155 156 sc_signal<Tcontrol_t > *** in_EVENT_VAL ; 157 sc_signal<Tcontrol_t > *** out_EVENT_ACK ; 158 sc_signal<Taddress_t > *** in_EVENT_ADDRESS ; 159 sc_signal<Taddress_t > *** in_EVENT_ADDRESS_NEXT ; 160 sc_signal<Tcontrol_t > *** in_EVENT_ADDRESS_NEXT_VAL ; 161 sc_signal<Tcontrol_t > *** in_EVENT_IS_DS_TAKE ; 162 163 sc_signal<Tcontrol_t > *** in_SPR_EVENT_VAL ; 164 sc_signal<Tcontrol_t > *** out_SPR_EVENT_ACK ; 165 sc_signal<Tspr_t > *** in_SPR_EVENT_EPCR ; 166 sc_signal<Tcontrol_t > *** in_SPR_EVENT_EEAR_WEN ; 167 sc_signal<Tspr_t > *** in_SPR_EVENT_EEAR ; 168 sc_signal<Tcontrol_t > *** in_SPR_EVENT_SR_DSX ; 169 sc_signal<Tcontrol_t > *** in_SPR_EVENT_SR_TO_ESR ; 170 171 sc_signal<Tcounter_t > *** out_NB_INST_COMMIT_ALL ; 172 sc_signal<Tcounter_t > *** out_NB_INST_COMMIT_MEM ; 173 sc_signal<Tcounter_t > *** in_NB_INST_DECOD_ALL ; 174 175 sc_signal<Tdepth_t > *** in_DEPTH_MIN ; 176 sc_signal<Tdepth_t > *** in_DEPTH_MAX ; 177 sc_signal<Tcontrol_t > *** in_DEPTH_FULL ; 178 179 sc_signal<Tcontrol_t > *** out_SPR_SR_IEE ; 180 sc_signal<Tcontrol_t > *** out_SPR_SR_EPH ; 54 181 55 182 ALLOC2_SC_SIGNAL( in_RENAME_VAL ," in_RENAME_VAL ",Tcontrol_t ,_param->_nb_front_end,_param->_nb_inst_decod[it1]); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/SelfTest/src/main.cpp
r115 r117 61 61 } 62 62 63 uint32_t num_thread = 0; 64 uint32_t ** _translate_num_context_to_num_thread = new uint32_t * [_nb_front_end]; 65 for (uint32_t i=0; i<_nb_front_end; i++) 66 { 67 _translate_num_context_to_num_thread [i] = new uint32_t [_nb_context[i]]; 68 for (uint32_t j=0; j<_nb_context[i]; j++) 69 _translate_num_context_to_num_thread [i][j] = num_thread ++; 70 } 71 63 72 int _return = EXIT_SUCCESS; 64 73 try … … 70 79 _nb_inst_reexecute , 71 80 _implement_group , 81 _translate_num_context_to_num_thread, 72 82 true //is_toplevel 73 83 ); … … 100 110 for (uint32_t i=0; i<_nb_front_end; i++) 101 111 { 112 delete [] _translate_num_context_to_num_thread [i]; 113 } 114 delete [] _translate_num_context_to_num_thread; 115 116 117 for (uint32_t i=0; i<_nb_front_end; i++) 118 { 102 119 for (uint32_t j=0; j<_nb_context[i]; j++) 103 120 delete [] _implement_group [i][j]; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Parameters.h
r88 r117 27 27 public : uint32_t _nb_inst_reexecute ; 28 28 public : bool *** _implement_group ;//[nb_front_end][nb_context][NB_GROUP] 29 public : uint32_t ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context] 29 30 30 31 public : uint32_t _max_nb_context ; … … 41 42 uint32_t nb_inst_reexecute , 42 43 bool *** implement_group , 44 uint32_t ** translate_num_context_to_num_thread, //[nb_front_end][nb_context] 43 45 bool is_toplevel=false 44 46 ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/SPR.h
r101 r117 545 545 // [0][21] CID 546 546 //---------------------------------------------------------- 547 class CID : public GENERIC 548 { 549 public : CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {}; 550 }; 551 552 //---------------------------------------------------------- 553 // [0][22] TID 554 //---------------------------------------------------------- 555 class TID : public GENERIC 556 { 557 public : TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) : GENERIC (num_front_end,num_context,param) {}; 558 }; 559 560 //---------------------------------------------------------- 561 // [0][23] TSR 547 class CID : public morpheo::behavioural::SPR 548 { 549 private: const Tspr_t _cpu_id : 32; // cpu_id reset value 550 public : Tspr_t cpu_id : 32; 551 552 public : CID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL): 553 _cpu_id ((param==NULL)?0:param->_translate_num_context_to_num_thread[num_front_end][num_context]) 554 {}; 555 public : void reset (void ) 556 { 557 cpu_id = _cpu_id; 558 }; 559 public : Tspr_t read (void ) 560 { 561 return ((cpu_id << 0)); 562 }; 563 public : void write (Tspr_t x) 564 { 565 cpu_id = x >> 0; 566 }; 567 }; 568 569 //---------------------------------------------------------- 570 // [0][22] TID - Thread Id 571 //---------------------------------------------------------- 572 class TID : public morpheo::behavioural::SPR 573 { 574 public : Tspr_t thread_id : 32; 575 576 public : TID (uint32_t num_front_end=0, uint32_t num_context=0,const Parameters * param=NULL) 577 {}; 578 public : void reset (void ) 579 { 580 }; 581 public : Tspr_t read (void ) 582 { 583 return ((thread_id << 0)); 584 }; 585 public : void write (Tspr_t x) 586 { 587 thread_id = x >> 0; 588 }; 589 }; 590 591 //---------------------------------------------------------- 592 // [0][23] TSR - Thread Status Register 562 593 //---------------------------------------------------------- 563 594 class TSR : public GENERIC -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Parameters.cpp
r88 r117 23 23 uint32_t nb_inst_reexecute , 24 24 bool *** implement_group , 25 uint32_t ** translate_num_context_to_num_thread, //[nb_front_end][nb_context] 25 26 bool is_toplevel 26 27 ) … … 32 33 _nb_inst_reexecute = nb_inst_reexecute; 33 34 _implement_group = implement_group ; 35 _translate_num_context_to_num_thread = translate_num_context_to_num_thread; 34 36 35 37 _max_nb_context = max<uint32_t>(_nb_context,_nb_front_end); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/src/Special_Register_unit_allocation.cpp
r112 r117 236 236 for (uint32_t j=0; j<_param->_nb_context[i]; j++) 237 237 for (uint32_t k=0; k<NB_GROUP; k++) 238 238 if (_param->_implement_group [i][j][k]) 239 239 { 240 240 241 for (uint32_t l=0; l<NB_REG_GROUP[k]; l++) 241 242 if (_spr [i][j][k][l] == NULL) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h
r112 r117 62 62 public : Tpriority_t _issue_priority ; 63 63 public : Tload_balancing_t _issue_load_balancing ; 64 public : bool ** _table_routing ;//[nb_rename_unit][nb_inst_issue]65 public : bool ** _table_issue_type ;//[nb_inst_issue][nb_type]64 // public : bool ** _table_routing ;//[nb_rename_unit][nb_inst_issue] 65 // public : bool ** _table_issue_type ;//[nb_inst_issue][nb_type] 66 66 // Reexecute 67 67 public : uint32_t _size_reexecute_queue ; … … 135 135 uint32_t * nb_inst_insert ,//[nb_rename_unit] 136 136 uint32_t * nb_inst_retire ,//[nb_rename_unit] 137 137 // uint32_t nb_inst_issue , 138 138 uint32_t * nb_inst_execute ,//[nb_execute_loop] 139 139 uint32_t nb_inst_reexecute , … … 159 159 Tpriority_t issue_priority , 160 160 Tload_balancing_t issue_load_balancing , 161 bool ** table_routing ,//[nb_rename_unit][nb_inst_issue]162 bool ** table_issue_type ,//[nb_inst_issue][nb_type]161 // bool ** table_routing ,//[nb_rename_unit][nb_inst_issue] 162 // bool ** table_issue_type ,//[nb_inst_issue][nb_type] 163 163 // Reexecute 164 164 uint32_t size_reexecute_queue , … … 173 173 uint32_t * nb_reg_free ,//[nb_rename_unit] 174 174 uint32_t * nb_rename_unit_bank ,//[nb_rename_unit] 175 // 175 // uint32_t * size_read_counter ,//[nb_rename_unit] 176 176 uint32_t * nb_load_store_queue ,//[nb_rename_unit] 177 177 uint32_t ** size_store_queue ,//[nb_rename_unit][nb_load_store_queue] -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp
r112 r117 674 674 COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STATE", 675 675 dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STATE"); 676 x++;677 ++it;678 676 } 677 x++; 678 ++it; 679 679 } 680 680 } … … 885 885 COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_WEN" , 886 886 dest,"out_COMMIT_"+toString(i)+"_WEN" ); 887 // if (_param->_have_port_context_id) 888 // COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_CONTEXT_ID" , 889 // dest,"out_COMMIT_"+toString(i)+"_CONTEXT_ID" ); 890 // if (_param->_have_port_front_end_id) 891 // COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FRONT_END_ID", 892 // dest,"out_COMMIT_"+toString(i)+"_FRONT_END_ID"); 887 893 if (_param->_have_port_rob_ptr) 888 894 COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_PACKET_ID" , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp
r112 r117 25 25 uint32_t * nb_inst_insert ,//[nb_rename_unit] 26 26 uint32_t * nb_inst_retire ,//[nb_rename_unit] 27 27 // uint32_t nb_inst_issue , 28 28 uint32_t * nb_inst_execute ,//[nb_execute_loop] 29 29 uint32_t nb_inst_reexecute , … … 49 49 Tpriority_t issue_priority , 50 50 Tload_balancing_t issue_load_balancing , 51 bool ** table_routing ,//[nb_rename_unit][nb_inst_issue]52 bool ** table_issue_type ,//[nb_inst_issue][nb_type]51 // bool ** table_routing ,//[nb_rename_unit][nb_inst_issue] 52 // bool ** table_issue_type ,//[nb_inst_issue][nb_type] 53 53 // Reexecute 54 54 uint32_t size_reexecute_queue , … … 63 63 uint32_t * nb_reg_free ,//[nb_rename_unit] 64 64 uint32_t * nb_rename_unit_bank ,//[nb_rename_unit] 65 // 65 // uint32_t * size_read_counter ,//[nb_rename_unit] 66 66 uint32_t * nb_load_store_queue ,//[nb_rename_unit] 67 67 uint32_t ** size_store_queue ,//[nb_rename_unit][nb_load_store_queue] … … 87 87 _nb_inst_insert = nb_inst_insert ; 88 88 _nb_inst_retire = nb_inst_retire ; 89 89 // _nb_inst_issue = nb_inst_issue ; 90 90 _nb_inst_execute = nb_inst_execute ; 91 91 _nb_inst_reexecute = nb_inst_reexecute ; … … 107 107 _issue_priority = issue_priority ; 108 108 _issue_load_balancing = issue_load_balancing ; 109 _table_routing = table_routing ;110 _table_issue_type = table_issue_type ;109 // _table_routing = table_routing ; 110 // _table_issue_type = table_issue_type ; 111 111 _size_reexecute_queue = size_reexecute_queue ; 112 112 _reexecute_priority = reexecute_priority ; … … 265 265 _commit_load_balancing , 266 266 _nb_rename_unit_select , 267 _nb_thread 267 _nb_thread , 268 268 _translate_num_context_to_num_thread 269 269 ); … … 284 284 size_store_queue_ptr , 285 285 size_load_queue_ptr , 286 286 // _nb_inst_issue , 287 287 _nb_inst_insert , 288 288 _nb_inst_reexecute , 289 289 _nb_rename_unit_select , 290 290 _issue_priority , 291 _issue_load_balancing ,292 _table_routing ,293 _table_issue_type291 _issue_load_balancing // , 292 // _table_routing , 293 // _table_issue_type 294 294 ); 295 296 _nb_inst_issue = _param_issue_queue->_nb_inst_issue; 295 297 296 298 _param_reexecute_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Parameters … … 319 321 _nb_context , 320 322 _nb_inst_reexecute , 321 _implement_group 323 _implement_group , 324 _translate_num_context_to_num_thread 322 325 ); 323 326 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters_print.cpp
r112 r117 58 58 str+= toString(MSG_INFORMATION)+" * issue_priority : "+toString<Tpriority_t >(_issue_priority )+"\n"; 59 59 str+= toString(MSG_INFORMATION)+" * issue_load_balancing : "+toString<Tload_balancing_t>(_issue_load_balancing )+"\n"; 60 61 62 63 64 65 60 // for (uint32_t i=0; i<_nb_rename_unit; ++i) 61 // for (uint32_t j=0; j<_nb_inst_issue ; ++j) 62 // str+= toString(MSG_INFORMATION)+" * table_routing ["+toString(i)+"]["+toString(j)+"] : "+toString<bool >(_table_routing [i][j] )+"\n";//[nb_rename_unit][nb_inst_issue] 63 // for (uint32_t i=0; i<_nb_inst_issue ; ++i) 64 // for (uint32_t j=0; j<_nb_type; ++j) 65 // str+= toString(MSG_INFORMATION)+" * table_issue_type ["+toString(i)+"]["+toString(j)+"] : "+toString<bool >(_table_issue_type [i][j] )+"\n";//[nb_inst_issue][nb_type] 66 66 str+= toString(MSG_INFORMATION)+" * size_reexecute_queue : "+toString<uint32_t >(_size_reexecute_queue )+"\n"; 67 67 str+= toString(MSG_INFORMATION)+" * reexecute_priority : "+toString<Tpriority_t >(_reexecute_priority )+"\n";
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