- Timestamp:
- Jan 19, 2008, 12:09:01 PM (17 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo
- Files:
-
- 37 added
- 22 deleted
- 119 edited
- 7 moved
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/configuration.cfg
r59 r71 1 1 Load_store_unit 2 2 2*2 # store_size_queue2 3 3 *2 # store_size_queue 3 3 2 2 *2 # load_size_queue 4 4 2 2 *2 # size_speculative_access_queue 5 5 2 2 +1 # nb_port_check 6 6 2 2 +1 # speculative_load {none,access,commit,bypass} 7 2 2 *2 # nb_context 8 16 16 *2 # nb_packet 7 2 2 *2 # nb_context 1 1 *2 8 2 2 *2 # nb_front_end 1 1 *2 9 2 2 *2 # nb_ooo_engine 1 1 *2 10 64 64 *2 # nb_packet 9 11 32 32 *2 # size_general_data 10 12 32 32 *2 # nb_general_register -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/test.h
r59 r71 7 7 */ 8 8 9 10 #include "Common/include/Time.h" 11 12 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/MemoryRequest.h" 13 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/Memory.h" 14 15 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/Cache.h" 16 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h" 17 9 18 #ifdef SYSTEMC 10 19 #include "systemc.h" … … 13 22 #include <string> 14 23 #include <iostream> 15 #include <sys/time.h>16 17 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h"18 24 19 25 using namespace std; … … 25 31 using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit; 26 32 using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit; 27 28 33 using namespace morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit; 29 34 30 void test 35 void test1 (string name, 31 36 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters * param); 32 37 33 class Time 34 { 35 private : timeval time_begin; 36 // private : timeval time_end; 37 38 public : Time () 39 { 40 gettimeofday(&time_begin ,NULL); 41 }; 42 43 public : ~Time () 44 { 45 cout << *this; 46 }; 47 48 public : friend ostream& operator<< (ostream& output_stream, 49 const Time & x) 50 { 51 timeval time_end; 52 53 gettimeofday(&time_end ,NULL); 54 55 uint32_t nb_cycles = static_cast<uint32_t>(sc_simulation_time()); 56 57 double average = static_cast<double>(nb_cycles) / static_cast<double>(time_end.tv_sec-x.time_begin.tv_sec); 58 59 output_stream << nb_cycles << "\t(" << average << " cycles / seconds )" << endl; 60 61 return output_stream; 62 } 63 }; 38 void test2 (void); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/main.cpp
r59 r71 8 8 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/test.h" 9 9 10 #define NB_PARAMS 11 10 #define number_of_test 2 11 12 #define NB_PARAMS 13 11 13 12 14 void usage (int argc, char * argv[]) … … 20 22 << " - speculative_load (uint32_t)" << endl 21 23 << " - nb_context (uint32_t)" << endl 24 << " - nb_front_end (uint32_t)" << endl 25 << " - nb_ooo_engine (uint32_t)" << endl 22 26 << " - nb_packet (uint32_t)" << endl 23 27 << " - size_general_data (uint32_t)" << endl … … 40 44 #endif 41 45 { 42 if (argc != 2+NB_PARAMS) 43 usage (argc, argv); 46 switch (number_of_test) 47 { 48 case 1 : 49 { 50 51 if (argc != 2+NB_PARAMS) 52 usage (argc, argv); 53 54 uint32_t x=1; 55 56 const string name = argv[x++]; 57 const uint32_t _size_store_queue = atoi(argv[x++]); 58 const uint32_t _size_load_queue = atoi(argv[x++]); 59 const uint32_t _size_speculative_access_queue = atoi(argv[x++]); 60 const uint32_t _nb_port_check = atoi(argv[x++]); 61 const Tspeculative_load_t _speculative_load = fromString<Tspeculative_load_t>(argv[x++]); 62 const uint32_t _nb_context = atoi(argv[x++]); 63 const uint32_t _nb_front_end = atoi(argv[x++]); 64 const uint32_t _nb_ooo_engine = atoi(argv[x++]); 65 const uint32_t _nb_packet = atoi(argv[x++]); 66 const uint32_t _size_general_data = atoi(argv[x++]); 67 const uint32_t _nb_general_register = atoi(argv[x++]); 68 const uint32_t _nb_operation = atoi(argv[x++]); 69 const uint32_t _nb_type = atoi(argv[x++]); 70 71 try 72 { 73 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters 74 ( 75 _size_store_queue , 76 _size_load_queue , 77 _size_speculative_access_queue, 78 _nb_port_check , 79 _speculative_load , 80 _nb_context , 81 _nb_front_end , 82 _nb_ooo_engine , 83 _nb_packet , 84 _size_general_data , 85 _nb_general_register , 86 _nb_operation , 87 _nb_type 88 ); 89 90 cout << param->print(1); 91 92 test1 (name,param); 93 94 } 95 catch (morpheo::ErrorMorpheo & error) 96 { 97 cout << "<" << name << "> : " << error.what (); 98 exit (EXIT_FAILURE); 99 } 100 catch (...) 101 { 102 cerr << "<" << name << "> : This test must generate a error" << endl; 103 exit (EXIT_FAILURE); 104 } 105 106 break; 107 } 108 case 2 : 109 { 110 try 111 { 112 test2 (); 113 } 114 catch (morpheo::ErrorMorpheo & error) 115 { 116 cout << error.what (); 117 exit (EXIT_FAILURE); 118 } 119 catch (...) 120 { 121 cerr << "This test must generate a error" << endl; 122 exit (EXIT_FAILURE); 123 } 124 125 break; 126 } 127 default : 128 { 129 std::cerr << "Invalid number of test" << std::endl; 130 exit (EXIT_FAILURE); 44 131 45 const string name = argv[1]; 46 const uint32_t _size_store_queue = atoi(argv[ 2]); 47 const uint32_t _size_load_queue = atoi(argv[ 3]); 48 const uint32_t _size_speculative_access_queue = atoi(argv[ 4]); 49 const uint32_t _nb_port_check = atoi(argv[ 5]); 50 const Tspeculative_load_t _speculative_load = fromString<Tspeculative_load_t>(argv[ 6]); 51 const uint32_t _nb_context = atoi(argv[ 7]); 52 const uint32_t _nb_packet = atoi(argv[ 8]); 53 const uint32_t _size_general_data = atoi(argv[ 9]); 54 const uint32_t _nb_general_register = atoi(argv[10]); 55 const uint32_t _nb_operation = atoi(argv[11]); 56 const uint32_t _nb_type = atoi(argv[12]); 57 58 try 59 { 60 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters 61 ( 62 _size_store_queue , 63 _size_load_queue , 64 _size_speculative_access_queue, 65 _nb_port_check , 66 _speculative_load , 67 _nb_context , 68 _nb_packet , 69 _size_general_data , 70 _nb_general_register , 71 _nb_operation , 72 _nb_type 73 ); 74 75 cout << param->print(1); 76 77 test (name,param); 132 break; 133 } 78 134 } 79 catch (morpheo::ErrorMorpheo & error) 80 { 81 cout << "<" << name << "> : " << error.what (); 82 exit (EXIT_FAILURE); 83 } 84 catch (...) 85 { 86 cerr << "<" << name << "> : This test must generate a error" << endl; 87 exit (EXIT_FAILURE); 88 } 89 135 90 136 return (EXIT_SUCCESS); 91 137 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test1.cpp
r62 r71 9 9 #include <queue> 10 10 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/include/test.h" 11 #include "Common/include/Test.h"12 #include "Common/include/BitManipulation.h"13 11 14 12 #define NB_ITERATION 1 15 #define CYCLE_MAX (128*NB_ITERATION) 16 17 #define LABEL(str) \ 18 { \ 19 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} " << str << endl; \ 20 } while(0) 21 22 static uint32_t cycle = 0; 23 24 #define SC_START(cycle_offset) \ 25 do \ 26 { \ 27 /*cout << "SC_START (begin)" << endl;*/ \ 28 \ 29 uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \ 30 if (cycle_current != cycle) \ 31 { \ 32 cycle = cycle_current; \ 33 cout << "##########[ cycle "<< cycle << " ]" << endl; \ 34 } \ 35 \ 36 if (cycle_current > CYCLE_MAX) \ 37 { \ 38 TEST_KO("Maximal cycles Reached"); \ 39 } \ 40 sc_start(cycle_offset); \ 41 /*cout << "SC_START (end )" << endl;*/ \ 42 } while(0) 43 44 45 46 //========================================================={MemoryRequest_t} 47 class MemoryRequest_t 48 { 49 public : double _cycle ; 50 public : Tcontext_t _context_id ; 51 public : Tpacket_t _packet_id ; 52 public : Toperation_t _operation ; 53 public : Ttype_t _type ; 54 public : Tlsq_ptr_t _store_queue_ptr_write; 55 public : Tlsq_ptr_t _load_queue_ptr_write ; 56 public : Tgeneral_data_t _immediat ; 57 public : Tgeneral_data_t _data_ra ; 58 public : Tgeneral_data_t _data_rb ; 59 public : Tcontrol_t _write_rd ; 60 public : Tgeneral_address_t _num_reg_rd ; 61 public : bool _write_spec_ko ; 62 63 MemoryRequest_t (void) 64 { 65 _cycle = 0; 66 _context_id = 0; 67 _packet_id = 0; 68 _operation = 0; 69 _type = 0; 70 _store_queue_ptr_write = 0; 71 _load_queue_ptr_write = 0; 72 _immediat = 0; 73 _data_ra = 0; 74 _data_rb = 0; 75 _write_rd = 0; 76 _num_reg_rd = 0; 77 _write_spec_ko = 0; 78 }; 79 80 MemoryRequest_t (double cycle , 81 Tcontext_t context_id , 82 Tpacket_t packet_id , 83 Toperation_t operation , 84 Ttype_t type , 85 Tlsq_ptr_t store_queue_ptr_write, 86 Tlsq_ptr_t load_queue_ptr_write , 87 Tgeneral_data_t immediat , 88 Tgeneral_data_t data_ra , 89 Tgeneral_data_t data_rb , 90 Tcontrol_t write_rd , 91 Tgeneral_address_t num_reg_rd , 92 bool write_spec_ko ) 93 { 94 _cycle = cycle ; 95 _context_id = context_id ; 96 _packet_id = packet_id ; 97 _operation = operation ; 98 _type = type ; 99 _store_queue_ptr_write = store_queue_ptr_write; 100 _load_queue_ptr_write = load_queue_ptr_write ; 101 _immediat = immediat ; 102 _data_ra = data_ra ; 103 _data_rb = data_rb ; 104 _write_rd = write_rd ; 105 _num_reg_rd = num_reg_rd ; 106 _write_spec_ko = write_spec_ko ; 107 } 108 109 void modif (double cycle , 110 Tcontext_t context_id , 111 Tpacket_t packet_id , 112 Toperation_t operation , 113 Ttype_t type , 114 Tlsq_ptr_t store_queue_ptr_write, 115 Tlsq_ptr_t load_queue_ptr_write , 116 Tgeneral_data_t immediat , 117 Tgeneral_data_t data_ra , 118 Tgeneral_data_t data_rb , 119 Tcontrol_t write_rd , 120 Tgeneral_address_t num_reg_rd , 121 bool write_spec_ko ) 122 { 123 _cycle = cycle ; 124 _context_id = context_id ; 125 _packet_id = packet_id ; 126 _operation = operation ; 127 _type = type ; 128 _store_queue_ptr_write = store_queue_ptr_write; 129 _load_queue_ptr_write = load_queue_ptr_write ; 130 _immediat = immediat ; 131 _data_ra = data_ra ; 132 _data_rb = data_rb ; 133 _write_rd = write_rd ; 134 _num_reg_rd = num_reg_rd ; 135 _write_spec_ko = write_spec_ko ; 136 } 137 138 bool operator< (const MemoryRequest_t & right) const 139 { 140 return _cycle > right._cycle; 141 } 142 143 friend ostream& operator<<(ostream &, const MemoryRequest_t &); 144 }; 145 146 ostream & operator << (ostream& os, const MemoryRequest_t & x) 147 { 148 return os << "<" << toString(x._cycle) << "> : " 149 << "{" << toString(static_cast<uint32_t>(x._packet_id)) << "}" << endl 150 << "\t * context_id : " << toString(static_cast<uint32_t>(x._context_id)) << endl 151 << "\t * operation / type / write_spec_ko : " << toString(static_cast<uint32_t>(x._operation)) << " " << toString(static_cast<uint32_t>(x._type)) << " " << toString(static_cast<uint32_t>(x._write_spec_ko)) << endl 152 << "\t * ptr_write store/load : " << toString(static_cast<uint32_t>(x._store_queue_ptr_write)) << " " << toString(static_cast<uint32_t>(x._load_queue_ptr_write)) << endl 153 << "\t * immediat / data_ra / data_rb : " << toString(static_cast<uint32_t>(x._immediat)) << " - " << toString(static_cast<uint32_t>(x._data_ra)) << " - " << toString(static_cast<uint32_t>(x._data_rb)) << endl 154 << "\t * write_rd / num_reg_rd : " << toString(static_cast<uint32_t>(x._write_rd)) << " " << toString(static_cast<uint32_t>(x._num_reg_rd)) << endl; 155 } 156 157 //================================================================{Memory_t} 158 class Memory_t 159 { 160 private : const uint32_t _nb_context; 161 private : const uint32_t _nb_word ; 162 private : const uint32_t _size_data ; 163 private : const Tdcache_address_t _mask_addr ; 164 private : Tdcache_data_t ** _data; 165 166 public : Memory_t (uint32_t nb_context, 167 uint32_t nb_word, 168 uint32_t size_data): 169 _nb_context (nb_context), 170 _nb_word (nb_word ), 171 _size_data (size_data ), 172 _mask_addr (gen_mask<Tdcache_address_t>(static_cast<uint32_t>(log2(ceil(static_cast<double>(size_data)))))) 173 { 174 _data = new Tdcache_data_t * [nb_context]; 175 176 for (uint32_t i=0; i<nb_context; i++) 177 { 178 _data [i] = new Tdcache_data_t [nb_word]; 179 180 for (uint32_t j=0; j<nb_word; j++) 181 _data [i][j] = rand()%(size_data); 182 } 183 } 184 185 public : ~Memory_t (void) 186 { 187 delete [] _data; 188 } 189 190 public : Tdcache_data_t access (uint32_t context, 191 Tdcache_address_t address, 192 Tdcache_type_t type, 193 Tdcache_data_t data) 194 { 195 return 0; 196 } 197 198 public : Tdcache_data_t read (uint32_t context, 199 Tdcache_address_t address, 200 Tdcache_type_t type) 201 { 202 // Address's Read must be aligned 203 204 if ((address & _mask_addr) != 0) 205 TEST_KO("<Memory_t::read> Address is not aligned"); 206 207 if (context>_nb_context) 208 TEST_KO("<Memory_t::read> nb context is too high"); 209 210 if (address>_nb_word) 211 TEST_KO("<Memory_t::read> address is too high"); 212 213 return _data [context][address]; 214 } 215 216 public : void write (uint32_t context, 217 Tdcache_address_t address, 218 Tdcache_type_t type, 219 Tdcache_data_t data) 220 { 221 if (context>_nb_context) 222 TEST_KO("<Memory_t::read> nb context is too high"); 223 224 if (address>_nb_word) 225 TEST_KO("<Memory_t::read> address is too high"); 226 227 Tdcache_address_t LSB = address & _mask; 228 Tdcache_address_t MSB = address & ~_mask; 229 230 Tdcache_data_t write_data = data; 231 Tdcache_data_t read_data = _data [context][MSB]; 232 233 // exemple to size_data = 32b 234 // LSB index_min 235 // 0 0 236 // 1 8 237 // 2 16 238 // 3 24 239 uint32_t index_min = LSB<<3; 240 uint32_t index_max = index_min; 241 // index max, dependant of access's size 242 243 switch (type) 244 { 245 246 247 } 248 } 249 }; 13 #define CYCLE_MAX (1024*NB_ITERATION) 14 15 #define LABEL(str) \ 16 { \ 17 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} " << str << endl; \ 18 } while(0) 19 20 #define SC_START(cycle_offset) \ 21 do \ 22 { \ 23 /*cout << "SC_START (begin)" << endl;*/ \ 24 \ 25 uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \ 26 if (cycle_offset != 0) \ 27 { \ 28 cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ 29 } \ 30 \ 31 if (cycle_current > CYCLE_MAX) \ 32 { \ 33 TEST_KO("Maximal cycles Reached"); \ 34 } \ 35 sc_start(cycle_offset); \ 36 /*cout << "SC_START (end )" << endl;*/ \ 37 } while(0) 38 250 39 251 40 //===================================================================={test} 252 void test (string name,41 void test1 (string name, 253 42 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters * _param) 254 43 { … … 256 45 257 46 #ifdef STATISTICS 258 morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5, 50);47 morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,0); 259 48 #endif 260 49 261 50 Load_store_unit * _Load_store_unit = new Load_store_unit (name.c_str(), 262 51 #ifdef STATISTICS 263 52 _parameters_statistics, 264 53 #endif 265 54 _param); 266 55 267 56 #ifdef SYSTEMC … … 277 66 sc_signal<Tcontrol_t > * out_MEMORY_IN_ACK = new sc_signal<Tcontrol_t > (rename.c_str()); 278 67 sc_signal<Tcontext_t > * in_MEMORY_IN_CONTEXT_ID = new sc_signal<Tcontext_t > (rename.c_str()); 68 sc_signal<Tcontext_t > * in_MEMORY_IN_FRONT_END_ID = new sc_signal<Tcontext_t > (rename.c_str()); 69 sc_signal<Tcontext_t > * in_MEMORY_IN_OOO_ENGINE_ID = new sc_signal<Tcontext_t > (rename.c_str()); 279 70 sc_signal<Tpacket_t > * in_MEMORY_IN_PACKET_ID = new sc_signal<Tpacket_t > (rename.c_str()); 280 71 sc_signal<Toperation_t > * in_MEMORY_IN_OPERATION = new sc_signal<Toperation_t > (rename.c_str()); … … 282 73 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 283 74 sc_signal<Tlsq_ptr_t > * in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t > (rename.c_str()); 284 //sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str());75 //sc_signal<Tcontrol_t > * in_MEMORY_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > (rename.c_str()); 285 76 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_IMMEDIAT = new sc_signal<Tgeneral_data_t > (rename.c_str()); 286 77 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RA = new sc_signal<Tgeneral_data_t > (rename.c_str()); 287 78 sc_signal<Tgeneral_data_t > * in_MEMORY_IN_DATA_RB = new sc_signal<Tgeneral_data_t > (rename.c_str()); 288 //sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str());289 sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str());79 //sc_signal<Tspecial_data_t > * in_MEMORY_IN_DATA_RC = new sc_signal<Tspecial_data_t > (rename.c_str()); 80 // sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RD = new sc_signal<Tcontrol_t > (rename.c_str()); 290 81 sc_signal<Tgeneral_address_t> * in_MEMORY_IN_NUM_REG_RD = new sc_signal<Tgeneral_address_t> (rename.c_str()); 291 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str());292 //sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str());293 294 sc_signal<Tcontrol_t > * out_MEMORY_OUT_VAL = new sc_signal<Tcontrol_t>(rename.c_str());295 sc_signal<Tcontrol_t > * in_MEMORY_OUT_ACK = new sc_signal<Tcontrol_t>(rename.c_str());296 sc_signal<Tcontext_t > * out_MEMORY_OUT_CONTEXT_ID = new sc_signal<Tcontext_t >(rename.c_str());297 sc_signal<T packet_t > * out_MEMORY_OUT_PACKET_ID = new sc_signal<Tpacket_t>(rename.c_str());298 sc_signal<T operation_t > * out_MEMORY_OUT_OPERATION = new sc_signal<Toperation_t>(rename.c_str());299 sc_signal<T type_t > * out_MEMORY_OUT_TYPE = new sc_signal<Ttype_t>(rename.c_str());300 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RD = new sc_signal<Tcontrol_t >(rename.c_str());301 sc_signal<Tgeneral_address_t> * out_MEMORY_OUT_NUM_REG_RD = new sc_signal<Tgeneral_address_t>(rename.c_str());302 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_DATA_RD = new sc_signal<Tgeneral_data_t >(rename.c_str());303 //sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE= new sc_signal<Tcontrol_t >(rename.c_str());304 //sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE= new sc_signal<Tspecial_address_t>(rename.c_str());305 //sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE= new sc_signal<Tspecial_data_t >(rename.c_str());306 sc_signal<Texception_t > * out_MEMORY_OUT_EXCEPTION = new sc_signal<Texception_t >(rename.c_str());82 //sc_signal<Tcontrol_t > * in_MEMORY_IN_WRITE_RE = new sc_signal<Tcontrol_t > (rename.c_str()); 83 //sc_signal<Tspecial_address_t> * in_MEMORY_IN_NUM_REG_RE = new sc_signal<Tspecial_address_t> (rename.c_str()); 84 85 sc_signal<Tcontrol_t > * out_MEMORY_OUT_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); 86 sc_signal<Tcontrol_t > * in_MEMORY_OUT_ACK = new sc_signal<Tcontrol_t >(rename.c_str()); 87 sc_signal<Tcontext_t > * out_MEMORY_OUT_CONTEXT_ID = new sc_signal<Tcontext_t >(rename.c_str()); 88 sc_signal<Tcontext_t > * out_MEMORY_OUT_FRONT_END_ID = new sc_signal<Tcontext_t >(rename.c_str()); 89 sc_signal<Tcontext_t > * out_MEMORY_OUT_OOO_ENGINE_ID = new sc_signal<Tcontext_t >(rename.c_str()); 90 sc_signal<Tpacket_t > * out_MEMORY_OUT_PACKET_ID = new sc_signal<Tpacket_t >(rename.c_str()); 91 sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RD = new sc_signal<Tcontrol_t >(rename.c_str()); 92 sc_signal<Tgeneral_address_t> * out_MEMORY_OUT_NUM_REG_RD = new sc_signal<Tgeneral_address_t>(rename.c_str()); 93 sc_signal<Tgeneral_data_t > * out_MEMORY_OUT_DATA_RD = new sc_signal<Tgeneral_data_t >(rename.c_str()); 94 //sc_signal<Tcontrol_t > * out_MEMORY_OUT_WRITE_RE = new sc_signal<Tcontrol_t >(rename.c_str()); 95 //sc_signal<Tspecial_address_t> * out_MEMORY_OUT_NUM_REG_RE = new sc_signal<Tspecial_address_t>(rename.c_str()); 96 //sc_signal<Tspecial_data_t > * out_MEMORY_OUT_DATA_RE = new sc_signal<Tspecial_data_t >(rename.c_str()); 97 sc_signal<Texception_t > * out_MEMORY_OUT_EXCEPTION = new sc_signal<Texception_t >(rename.c_str()); 307 98 308 99 sc_signal<Tcontrol_t > * out_DCACHE_REQ_VAL = new sc_signal<Tcontrol_t >(rename.c_str()); … … 312 103 sc_signal<Tdcache_address_t > * out_DCACHE_REQ_ADDRESS = new sc_signal<Tdcache_address_t >(rename.c_str()); 313 104 sc_signal<Tdcache_type_t > * out_DCACHE_REQ_TYPE = new sc_signal<Tdcache_type_t >(rename.c_str()); 314 sc_signal<Tcontrol_t > * out_DCACHE_REQ_UNCACHED = new sc_signal<Tcontrol_t >(rename.c_str());315 105 sc_signal<Tdcache_data_t > * out_DCACHE_REQ_WDATA = new sc_signal<Tdcache_data_t >(rename.c_str()); 316 106 … … 322 112 sc_signal<Tdcache_error_t > * in_DCACHE_RSP_ERROR = new sc_signal<Tdcache_error_t >(rename.c_str()); 323 113 324 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_size_load_queue];325 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_ CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_size_load_queue];326 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_size_load_queue];327 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_size_load_queue];114 sc_signal<Tcontrol_t > ** out_BYPASS_MEMORY_VAL = new sc_signal<Tcontrol_t > * [_param->_size_load_queue]; 115 sc_signal<Tcontext_t > ** out_BYPASS_MEMORY_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_size_load_queue]; 116 sc_signal<Tgeneral_address_t> ** out_BYPASS_MEMORY_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_size_load_queue]; 117 sc_signal<Tgeneral_data_t > ** out_BYPASS_MEMORY_DATA = new sc_signal<Tgeneral_data_t > * [_param->_size_load_queue]; 328 118 329 330 331 out_BYPASS_MEMORY_VAL [i] = new sc_signal<Tcontrol_t >;332 out_BYPASS_MEMORY_CONTEXT_ID [i] = new sc_signal<Tcontext_t >;333 out_BYPASS_MEMORY_NUM_REG [i] = new sc_signal<Tgeneral_address_t>;334 out_BYPASS_MEMORY_DATA [i] = new sc_signal<Tgeneral_data_t >;335 119 for (uint32_t i=0; i<_param->_size_load_queue; i++) 120 { 121 out_BYPASS_MEMORY_VAL [i] = new sc_signal<Tcontrol_t >(rename.c_str()); 122 out_BYPASS_MEMORY_OOO_ENGINE_ID [i] = new sc_signal<Tcontext_t >(rename.c_str()); 123 out_BYPASS_MEMORY_NUM_REG [i] = new sc_signal<Tgeneral_address_t>(rename.c_str()); 124 out_BYPASS_MEMORY_DATA [i] = new sc_signal<Tgeneral_data_t >(rename.c_str()); 125 } 336 126 337 127 /******************************************************** … … 346 136 (*(_Load_store_unit-> in_MEMORY_IN_VAL ))(*( in_MEMORY_IN_VAL )); 347 137 (*(_Load_store_unit->out_MEMORY_IN_ACK ))(*(out_MEMORY_IN_ACK )); 348 (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID ))(*( in_MEMORY_IN_CONTEXT_ID )); 349 (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); 138 if (_param->_have_port_context_id) 139 (*(_Load_store_unit-> in_MEMORY_IN_CONTEXT_ID ))(*( in_MEMORY_IN_CONTEXT_ID )); 140 if (_param->_have_port_front_end_id) 141 (*(_Load_store_unit-> in_MEMORY_IN_FRONT_END_ID ))(*( in_MEMORY_IN_FRONT_END_ID )); 142 if (_param->_have_port_ooo_engine_id) 143 (*(_Load_store_unit-> in_MEMORY_IN_OOO_ENGINE_ID ))(*( in_MEMORY_IN_OOO_ENGINE_ID )); 144 if (_param->_have_port_packet_id) 145 (*(_Load_store_unit-> in_MEMORY_IN_PACKET_ID ))(*( in_MEMORY_IN_PACKET_ID )); 350 146 (*(_Load_store_unit-> in_MEMORY_IN_OPERATION ))(*( in_MEMORY_IN_OPERATION )); 351 147 (*(_Load_store_unit-> in_MEMORY_IN_STORE_QUEUE_PTR_WRITE))(*( in_MEMORY_IN_STORE_QUEUE_PTR_WRITE)); 352 148 (*(_Load_store_unit-> in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ))(*( in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE )); 353 //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT ));149 //(*(_Load_store_unit-> in_MEMORY_IN_HAS_IMMEDIAT ))(*( in_MEMORY_IN_HAS_IMMEDIAT )); 354 150 (*(_Load_store_unit-> in_MEMORY_IN_IMMEDIAT ))(*( in_MEMORY_IN_IMMEDIAT )); 355 151 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RA ))(*( in_MEMORY_IN_DATA_RA )); 356 152 (*(_Load_store_unit-> in_MEMORY_IN_DATA_RB ))(*( in_MEMORY_IN_DATA_RB )); 357 //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC ));358 (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD ));153 //(*(_Load_store_unit-> in_MEMORY_IN_DATA_RC ))(*( in_MEMORY_IN_DATA_RC )); 154 // (*(_Load_store_unit-> in_MEMORY_IN_WRITE_RD ))(*( in_MEMORY_IN_WRITE_RD )); 359 155 (*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RD ))(*( in_MEMORY_IN_NUM_REG_RD )); 360 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); 361 //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); 362 363 (*(_Load_store_unit->out_MEMORY_OUT_VAL ))(*(out_MEMORY_OUT_VAL )); 364 (*(_Load_store_unit-> in_MEMORY_OUT_ACK ))(*( in_MEMORY_OUT_ACK )); 365 (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID ))(*(out_MEMORY_OUT_CONTEXT_ID )); 366 (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); 367 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD ))(*(out_MEMORY_OUT_WRITE_RD )); 368 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD ))(*(out_MEMORY_OUT_NUM_REG_RD )); 369 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD ))(*(out_MEMORY_OUT_DATA_RD )); 370 //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); 371 //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); 372 //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); 373 (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION ))(*(out_MEMORY_OUT_EXCEPTION )); 156 //(*(_Load_store_unit-> in_MEMORY_IN_WRITE_RE ))(*( in_MEMORY_IN_WRITE_RE )); 157 //(*(_Load_store_unit-> in_MEMORY_IN_NUM_REG_RE ))(*( in_MEMORY_IN_NUM_REG_RE )); 158 159 (*(_Load_store_unit->out_MEMORY_OUT_VAL ))(*(out_MEMORY_OUT_VAL )); 160 (*(_Load_store_unit-> in_MEMORY_OUT_ACK ))(*( in_MEMORY_OUT_ACK )); 161 if (_param->_have_port_context_id) 162 (*(_Load_store_unit->out_MEMORY_OUT_CONTEXT_ID ))(*(out_MEMORY_OUT_CONTEXT_ID )); 163 if (_param->_have_port_front_end_id) 164 (*(_Load_store_unit->out_MEMORY_OUT_FRONT_END_ID ))(*(out_MEMORY_OUT_FRONT_END_ID )); 165 if (_param->_have_port_ooo_engine_id) 166 (*(_Load_store_unit->out_MEMORY_OUT_OOO_ENGINE_ID ))(*(out_MEMORY_OUT_OOO_ENGINE_ID )); 167 if (_param->_have_port_packet_id) 168 (*(_Load_store_unit->out_MEMORY_OUT_PACKET_ID ))(*(out_MEMORY_OUT_PACKET_ID )); 169 (*(_Load_store_unit->out_MEMORY_OUT_WRITE_RD ))(*(out_MEMORY_OUT_WRITE_RD )); 170 (*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RD ))(*(out_MEMORY_OUT_NUM_REG_RD )); 171 (*(_Load_store_unit->out_MEMORY_OUT_DATA_RD ))(*(out_MEMORY_OUT_DATA_RD )); 172 //(*(_Load_store_unit->out_MEMORY_OUT_WRITE_RE ))(*(out_MEMORY_OUT_WRITE_RE )); 173 //(*(_Load_store_unit->out_MEMORY_OUT_NUM_REG_RE ))(*(out_MEMORY_OUT_NUM_REG_RE )); 174 //(*(_Load_store_unit->out_MEMORY_OUT_DATA_RE ))(*(out_MEMORY_OUT_DATA_RE )); 175 (*(_Load_store_unit->out_MEMORY_OUT_EXCEPTION ))(*(out_MEMORY_OUT_EXCEPTION )); 374 176 375 177 (*(_Load_store_unit->out_DCACHE_REQ_VAL ))(*(out_DCACHE_REQ_VAL )); 376 178 (*(_Load_store_unit-> in_DCACHE_REQ_ACK ))(*( in_DCACHE_REQ_ACK )); 377 (*(_Load_store_unit->out_DCACHE_REQ_CONTEXT_ID))(*(out_DCACHE_REQ_CONTEXT_ID)); 179 if (_param->_have_port_dcache_context_id) 180 (*(_Load_store_unit->out_DCACHE_REQ_CONTEXT_ID))(*(out_DCACHE_REQ_CONTEXT_ID)); 378 181 (*(_Load_store_unit->out_DCACHE_REQ_PACKET_ID ))(*(out_DCACHE_REQ_PACKET_ID )); 379 182 (*(_Load_store_unit->out_DCACHE_REQ_ADDRESS ))(*(out_DCACHE_REQ_ADDRESS )); 380 183 (*(_Load_store_unit->out_DCACHE_REQ_TYPE ))(*(out_DCACHE_REQ_TYPE )); 381 (*(_Load_store_unit->out_DCACHE_REQ_UNCACHED ))(*(out_DCACHE_REQ_UNCACHED ));382 184 (*(_Load_store_unit->out_DCACHE_REQ_WDATA ))(*(out_DCACHE_REQ_WDATA )); 383 185 384 186 (*(_Load_store_unit-> in_DCACHE_RSP_VAL ))(*( in_DCACHE_RSP_VAL )); 385 187 (*(_Load_store_unit->out_DCACHE_RSP_ACK ))(*(out_DCACHE_RSP_ACK )); 386 (*(_Load_store_unit-> in_DCACHE_RSP_CONTEXT_ID))(*( in_DCACHE_RSP_CONTEXT_ID)); 188 if (_param->_have_port_dcache_context_id) 189 (*(_Load_store_unit-> in_DCACHE_RSP_CONTEXT_ID))(*( in_DCACHE_RSP_CONTEXT_ID)); 387 190 (*(_Load_store_unit-> in_DCACHE_RSP_PACKET_ID ))(*( in_DCACHE_RSP_PACKET_ID )); 388 191 (*(_Load_store_unit-> in_DCACHE_RSP_RDATA ))(*( in_DCACHE_RSP_RDATA )); … … 393 196 for (uint32_t i=0; i<_param->_size_load_queue; i++) 394 197 { 395 (*(_Load_store_unit->out_BYPASS_MEMORY_VAL [i]))(*(out_BYPASS_MEMORY_VAL [i])); 396 (*(_Load_store_unit->out_BYPASS_MEMORY_CONTEXT_ID [i]))(*(out_BYPASS_MEMORY_CONTEXT_ID [i])); 397 (*(_Load_store_unit->out_BYPASS_MEMORY_NUM_REG [i]))(*(out_BYPASS_MEMORY_NUM_REG [i])); 398 (*(_Load_store_unit->out_BYPASS_MEMORY_DATA [i]))(*(out_BYPASS_MEMORY_DATA [i])); 198 (*(_Load_store_unit->out_BYPASS_MEMORY_VAL [i]))(*(out_BYPASS_MEMORY_VAL [i])); 199 if (_param->_have_port_ooo_engine_id) 200 (*(_Load_store_unit->out_BYPASS_MEMORY_OOO_ENGINE_ID [i]))(*(out_BYPASS_MEMORY_OOO_ENGINE_ID [i])); 201 (*(_Load_store_unit->out_BYPASS_MEMORY_NUM_REG [i]))(*(out_BYPASS_MEMORY_NUM_REG [i])); 202 (*(_Load_store_unit->out_BYPASS_MEMORY_DATA [i]))(*(out_BYPASS_MEMORY_DATA [i])); 399 203 } 400 204 } … … 409 213 410 214 const uint32_t seed = 0; 411 //const uint32_t seed = static_cast<uint32_t>(time(NULL));215 //const uint32_t seed = static_cast<uint32_t>(time(NULL)); 412 216 413 217 srand(seed); … … 416 220 const uint32_t nb_word = nb_request; 417 221 418 //const int32_t percent_transaction_memory_in = 100;419 const int32_t percent_transaction_memory_out = 100;420 const int32_t percent_transaction_dcache = 100;421 422 const int32_t percent_exception = 5;222 //const int32_t percent_transaction_memory_in = 100; 223 const int32_t percent_transaction_memory_out = 75; 224 const int32_t percent_transaction_dcache = 75; 225 226 const int32_t percent_exception = 0; 423 227 const int32_t percent_type_load = 0; 424 const int32_t percent_type_store = 100; 425 const int32_t percent_miss_spec = 0; 228 const int32_t percent_type_store = 50; 229 const int32_t percent_miss_spec = 20; 230 231 const uint32_t miss_rate = 10; 232 const uint32_t miss_penality = 5; 426 233 427 234 if ((percent_type_load + … … 439 246 priority_queue<MemoryRequest_t> fifo_request; 440 247 441 // emulation of cache 442 Tdcache_data_t cache_data [_param->_nb_context][nb_word]; 248 // emulation of memory 249 Memory_t * _memory = new Memory_t (1<<_param->_size_dcache_context_id, nb_word, _param->_size_general_data); 250 Cache_t * _cache = new Cache_t (miss_rate, miss_penality); 251 443 252 444 253 SC_START(0); 445 254 446 255 LABEL("Initialisation"); 447 448 // emulate a memory449 for (uint32_t i=0; i<_param->_nb_context; i++)450 for (uint32_t j=0; j<nb_word; j++)451 cache_data [i][j] = rand()%(1<<_param->_size_general_data);452 256 453 257 in_MEMORY_IN_VAL ->write(0); … … 462 266 LABEL("Loop of Test"); 463 267 464 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)268 try 465 269 { 466 LABEL("Iteration "+toString(iteration)); 467 468 LABEL("Structure's initialisation"); 469 470 nb_request_memory_in = 0; 471 nb_request_memory_out = 0; 472 nb_request_dcache = 0; 270 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) 271 { 272 LABEL("Iteration "+toString(iteration)); 273 274 LABEL("Structure's initialisation"); 275 276 nb_request_memory_in = 0; 277 nb_request_memory_out = 0; 278 nb_request_dcache = 0; 473 279 474 280 // Fill the request_queue 475 281 476 Tlsq_ptr_t store_queue_ptr_write = 0; 477 Tlsq_ptr_t load_queue_ptr_write = 0; 478 479 bool store_queue_use [_param->_size_store_queue]; 480 bool load_queue_use [_param->_size_load_queue ]; 481 482 for (uint32_t i=0; i<_param->_size_store_queue; i++) 483 store_queue_use [i] = false; 484 for (uint32_t i=0; i<_param->_size_load_queue ; i++) 485 load_queue_use [i] = false; 486 487 double current_cycle = sc_simulation_time(); 488 double cycle_min = current_cycle; 489 490 LABEL("Fifo request initialisation"); 491 // Init fifo_request 492 for (uint32_t i=0; i<nb_request; i++) 493 { 494 double cycle; 495 Tcontext_t context_id = rand () % _param->_nb_context; 496 Tpacket_t packet_id = i; 497 Tlsq_ptr_t store_queue_ptr_write_old = store_queue_ptr_write; 498 Tlsq_ptr_t load_queue_ptr_write_old = load_queue_ptr_write ; 499 Toperation_t operation; 282 Tlsq_ptr_t store_queue_ptr_write = 0; 283 Tlsq_ptr_t load_queue_ptr_write = 0; 284 285 bool store_queue_use [_param->_size_store_queue]; 286 uint32_t nb_store_slot_use = 0; 287 bool load_queue_use [_param->_size_load_queue ]; 288 289 for (uint32_t i=0; i<_param->_size_store_queue; i++) 290 store_queue_use [i] = false; 291 for (uint32_t i=0; i<_param->_size_load_queue ; i++) 292 load_queue_use [i] = false; 293 294 double current_cycle = sc_simulation_time(); 295 double cycle_min = current_cycle; 296 297 Toperation_t operation_store [4] = {OPERATION_MEMORY_STORE_8, 298 OPERATION_MEMORY_STORE_16, 299 OPERATION_MEMORY_STORE_32, 300 OPERATION_MEMORY_STORE_64}; 301 302 Toperation_t operation_load [8] = {OPERATION_MEMORY_LOAD_8_Z, 303 OPERATION_MEMORY_LOAD_8_S, 304 OPERATION_MEMORY_LOAD_16_Z, 305 OPERATION_MEMORY_LOAD_16_S, 306 OPERATION_MEMORY_LOAD_32_Z, 307 OPERATION_MEMORY_LOAD_32_S, 308 OPERATION_MEMORY_LOAD_64_Z, 309 OPERATION_MEMORY_LOAD_64_S}; 310 311 Toperation_t operation_other [5] = {OPERATION_MEMORY_LOCK , 312 OPERATION_MEMORY_INVALIDATE , 313 OPERATION_MEMORY_PREFETCH , 314 OPERATION_MEMORY_FLUSH , 315 OPERATION_MEMORY_SYNCHRONIZATION}; 316 317 318 const uint32_t nb_operation_store = (log2(_param->_size_general_data/8)+1); 319 const uint32_t nb_operation_load = 2*(log2(_param->_size_general_data/8)+1); 320 const uint32_t nb_operation_other = 5; 321 322 LABEL("Fifo request initialisation"); 323 // Init fifo_request 324 for (uint32_t i=0; i<nb_request; i++) 325 { 326 double cycle; 327 Tcontext_t context_id = 0; 328 Tcontext_t front_end_id = 0; 329 Tcontext_t ooo_engine_id = rand () % _param->_nb_ooo_engine; 330 Tpacket_t packet_id = i; 331 Tlsq_ptr_t store_queue_ptr_write_old = store_queue_ptr_write; 332 Tlsq_ptr_t load_queue_ptr_write_old = load_queue_ptr_write ; 333 Toperation_t operation; 500 334 501 int32_tpercent = rand()%100;502 503 uint32_tsize_queue;335 int32_t percent = rand()%100; 336 337 uint32_t size_queue; 504 338 505 if (percent <= seuil_type_load) 506 { 507 // LABEL(" * LOAD"); 508 operation = OPERATION_MEMORY_LOAD_16_S; 509 size_queue = _param->_size_load_queue; 510 load_queue_ptr_write = (load_queue_ptr_write+1) % (size_queue); 511 } 512 else 513 { 514 if (percent <= seuil_type_store) 339 if (percent < seuil_type_load) 515 340 { 516 // LABEL(" * STORE");517 operation = OPERATION_MEMORY_STORE_16;518 size_queue = _param->_size_store_queue;519 store_queue_ptr_write = (store_queue_ptr_write+1) % (size_queue);341 LABEL(" * LOAD"); 342 operation = operation_load[(rand()%nb_operation_load)]; 343 size_queue = _param->_size_load_queue; 344 load_queue_ptr_write = (load_queue_ptr_write+1) % (size_queue); 520 345 } 521 346 else 522 347 { 523 // LABEL(" * OTHERS"); 524 operation = OPERATION_MEMORY_PREFETCH; 525 size_queue = _param->_size_load_queue; 526 load_queue_ptr_write = (load_queue_ptr_write+1) % (size_queue); 348 if (percent < seuil_type_store) 349 { 350 LABEL(" * STORE"); 351 352 353 operation = operation_store[(rand()%nb_operation_store)]; 354 size_queue = _param->_size_store_queue; 355 store_queue_ptr_write = (store_queue_ptr_write+1) % (size_queue); 356 } 357 else 358 { 359 LABEL(" * OTHERS"); 360 operation = operation_other[(rand()%nb_operation_other)]; 361 // operation = operation_other[4]; 362 size_queue = _param->_size_load_queue; 363 load_queue_ptr_write = (load_queue_ptr_write+1) % (size_queue); 364 } 365 } 366 367 cycle = cycle_min; 368 cycle_min ++; 369 370 Ttype_t type = TYPE_MEMORY; 371 Tgeneral_data_t address = rand()%(nb_word); 372 Tgeneral_data_t offset = rand()%(nb_word); 373 374 // LABEL ("Address step 1 : "+toString(address)+" - "+toString(offset)); 375 376 percent = rand()%100; 377 if (percent > percent_exception) 378 address = address & (~ mask_memory_access(operation)); 379 380 // LABEL ("Address step 2 : "+toString(address)+" - mask : "+toString((~ mask_memory_access(operation)))); 381 382 if (offset > address) // max 383 offset = address; 384 385 Tgeneral_data_t immediat = offset; 386 Tgeneral_data_t data_ra = address - offset; 387 388 // LABEL ("Address step 3 : "+toString(address)+", "+toString(data_ra)+" - "+toString(immediat)); 389 390 Tgeneral_data_t data_rb = static_cast<Tgeneral_data_t>(rand()); 391 Tcontrol_t write_rd = 0; 392 Tgeneral_address_t num_reg_rd = 0; 393 bool write_spec_ko = is_operation_memory_store(operation) and ((rand()%100)<percent_miss_spec); 394 395 tab_request [i].modif(cycle , 396 context_id , 397 front_end_id , 398 ooo_engine_id , 399 packet_id , 400 operation , 401 type , 402 store_queue_ptr_write_old, 403 load_queue_ptr_write_old , 404 immediat , 405 data_ra , 406 data_rb , 407 write_rd , 408 num_reg_rd , 409 write_spec_ko); 410 411 cout << tab_request [i] << endl; 412 413 fifo_request.push(tab_request [i]); 414 415 double cycle_head = 0; 416 417 if (is_operation_memory_store(operation)) 418 { 419 cycle_head = cycle_min; 420 cycle_min ++; 421 422 cout << " * Write head : " << toString(cycle_head) 423 << endl 424 << endl; 425 426 fifo_request.push(MemoryRequest_t(cycle_head, 427 context_id, 428 front_end_id, 429 ooo_engine_id, 430 packet_id, 431 (write_spec_ko==true)?OPERATION_MEMORY_STORE_HEAD_KO:OPERATION_MEMORY_STORE_HEAD_OK, 432 type, 433 store_queue_ptr_write_old, 434 0, 435 0, 436 0, 437 0, 438 0, 439 0, 440 write_spec_ko)); 527 441 } 528 442 } 529 530 cycle = cycle_min; 531 cycle_min ++; 532 533 Ttype_t type = TYPE_MEMORY; 534 Tgeneral_data_t address = rand()%(nb_word); 535 Tgeneral_data_t offset = rand()%(nb_word); 536 537 percent = rand()%100; 538 if (percent > percent_exception) 539 address = address & (not mask_memory_access(operation)); 540 541 if (offset > address) // max 542 offset = address; 543 544 Tgeneral_data_t immediat = offset; 545 Tgeneral_data_t data_ra = address - offset; 546 Tgeneral_data_t data_rb = rand()%(1<<_param->_size_general_data); 547 Tcontrol_t write_rd = 0; 548 Tgeneral_address_t num_reg_rd = 0; 549 bool write_spec_ko = ((rand()%100)<percent_miss_spec); 550 551 tab_request [i].modif(cycle , 552 context_id , 553 packet_id , 554 operation , 555 type , 556 store_queue_ptr_write_old, 557 load_queue_ptr_write_old , 558 immediat , 559 data_ra , 560 data_rb , 561 write_rd , 562 num_reg_rd , 563 write_spec_ko 564 ); 565 566 cout << tab_request [i] << endl; 567 568 fifo_request.push(tab_request [i]); 569 570 double cycle_head = 0; 571 572 if (is_operation_memory_store(operation)) 443 444 LABEL("Simulation of this iteration ..."); 445 446 while (nb_request_memory_out < nb_request) 573 447 { 574 cycle_head = cycle_min; 575 cycle_min ++; 576 577 cout << " * Write head : " << toString(cycle_head) 578 << endl 579 << endl; 448 cout << "*********************************************" << endl; 449 cout << "Dump STORE_QUEUE_USE : " << endl; 450 cout << " use " << nb_store_slot_use << endl; 451 for (uint32_t i=0; i<_param->_size_store_queue; i++) 452 cout << " [" << i << "] " << store_queue_use [i] << endl; 453 cout << "Dump LOAD_QUEUE_USE : " << endl; 454 for (uint32_t i=0; i<_param->_size_load_queue ; i++) 455 cout << " [" << i << "] " << load_queue_use [i] << endl; 456 cout << "*********************************************" << endl; 457 458 459 // ***** MEMORY_IN ***** 460 461 // memory_in_val depends of three factors : 462 // 1) request's fifo is not empty ? 463 // 2) the slot destination is free ? 464 // 3) The head of request's fifo can be issue : the number of cycle is more than current cycle 465 466 bool can_execute = false; 467 468 if (is_operation_memory_store(fifo_request.top()._operation)) 469 can_execute = (not store_queue_use [fifo_request.top()._store_queue_ptr_write] and (nb_store_slot_use < _param->_size_store_queue-1)) or is_operation_memory_store_head(fifo_request.top()._operation); 470 else 471 can_execute = not load_queue_use [fifo_request.top()._load_queue_ptr_write]; 472 473 in_MEMORY_IN_VAL ->write((not fifo_request.empty()) and 474 can_execute and 475 (sc_simulation_time() >= fifo_request.top()._cycle)); 476 477 if (_param->_have_port_context_id) 478 in_MEMORY_IN_CONTEXT_ID ->write (fifo_request.top()._context_id ); 479 if (_param->_have_port_front_end_id) 480 in_MEMORY_IN_FRONT_END_ID ->write (fifo_request.top()._front_end_id ); 481 if (_param->_have_port_ooo_engine_id) 482 in_MEMORY_IN_OOO_ENGINE_ID ->write (fifo_request.top()._ooo_engine_id ); 483 if (_param->_have_port_packet_id) 484 in_MEMORY_IN_PACKET_ID ->write (fifo_request.top()._packet_id ); 485 in_MEMORY_IN_OPERATION ->write (fifo_request.top()._operation ); 486 in_MEMORY_IN_TYPE ->write (fifo_request.top()._type ); 487 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write); 488 in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write ); 489 in_MEMORY_IN_IMMEDIAT ->write (fifo_request.top()._immediat ); 490 in_MEMORY_IN_DATA_RA ->write (fifo_request.top()._data_ra ); 491 in_MEMORY_IN_DATA_RB ->write (fifo_request.top()._data_rb ); 492 // in_MEMORY_IN_WRITE_RD ->write (fifo_request.top()._write_rd ); 493 in_MEMORY_IN_NUM_REG_RD ->write (fifo_request.top()._num_reg_rd ); 494 495 in_MEMORY_OUT_ACK->write((rand()%100)<percent_transaction_memory_out); 496 497 // ***** DCACHE_REQ ***** 498 in_DCACHE_REQ_ACK->write((rand()%100)<percent_transaction_dcache); 499 500 // ***** DCACHE_RSP ***** 501 bool have_rsp = _cache->have_rsp (); 502 in_DCACHE_RSP_VAL->write(have_rsp); 503 504 if (have_rsp) 505 { 506 in_DCACHE_RSP_CONTEXT_ID->write(_cache->front()._context_id); 507 in_DCACHE_RSP_PACKET_ID ->write(_cache->front()._packet_id ); 508 in_DCACHE_RSP_RDATA ->write(_cache->front()._rdata ); 509 in_DCACHE_RSP_ERROR ->write(_cache->front()._error ); 510 } 511 512 SC_START(0); 513 514 LABEL("MEMORY_IN : "+toString(in_MEMORY_IN_VAL ->read())+" - "+toString(out_MEMORY_IN_ACK ->read())); 515 LABEL(" * fifo_request.empty : "+toString(fifo_request.empty())); 516 LABEL(" * fifo_request.top.cycle : "+toString(fifo_request.top()._cycle)); 517 LABEL(" * fifo_request.top.store_queue_ptr_write : "+toString(static_cast<uint32_t>(fifo_request.top()._store_queue_ptr_write))); 518 LABEL(" * fifo_request.top.load_queue_ptr_write : "+toString(static_cast<uint32_t>(fifo_request.top()._load_queue_ptr_write))); 519 LABEL(" * fifo_request.top.operation : "+toString(static_cast<uint32_t>(fifo_request.top()._operation ))); 520 LABEL(" * can_execute : "+toString(can_execute)); 521 522 if ( in_MEMORY_IN_VAL ->read() and out_MEMORY_IN_ACK ->read()) 523 { 524 LABEL(" * Accepted MEMORY_IN : " + toString(nb_request_memory_in)); 525 cout << fifo_request.top(); 526 527 if (is_operation_memory_store(fifo_request.top()._operation)) 528 { 529 if (not is_operation_memory_store_head(fifo_request.top()._operation)) 530 { 531 store_queue_use [fifo_request.top()._store_queue_ptr_write] = true; 532 nb_store_slot_use ++; 533 } 534 } 535 else 536 load_queue_use [fifo_request.top()._load_queue_ptr_write] = true; 537 538 fifo_request.pop(); 580 539 581 fifo_request.push(MemoryRequest_t(cycle_head, 582 context_id, 583 packet_id, 584 (write_spec_ko==true)?OPERATION_MEMORY_STORE_HEAD_KO:OPERATION_MEMORY_STORE_HEAD_OK, 585 type, 586 store_queue_ptr_write_old, 587 0, 588 0, 589 0, 590 0, 591 0, 592 0, 593 write_spec_ko)); 540 nb_request_memory_in ++; 541 } 542 543 LABEL("MEMORY_OUT : "+toString(out_MEMORY_OUT_VAL->read())+" - "+toString(in_MEMORY_OUT_ACK ->read())); 544 if (out_MEMORY_OUT_VAL->read() and in_MEMORY_OUT_ACK->read()) 545 { 546 Tpacket_t packet_id = out_MEMORY_OUT_PACKET_ID->read(); 547 548 LABEL(" * Accepted MEMORY_OUT : " + toString(packet_id)); 549 550 if (is_operation_memory_store(tab_request[packet_id]._operation)) 551 { 552 store_queue_use [tab_request[packet_id]._store_queue_ptr_write] = false; 553 nb_store_slot_use --; 554 } 555 else 556 load_queue_use [tab_request[packet_id]._load_queue_ptr_write] = false; 557 558 nb_request_memory_out ++; 559 560 // a lot of test 561 TEST(Tcontext_t , out_MEMORY_OUT_CONTEXT_ID ->read(), tab_request[packet_id]._context_id ); 562 TEST(Tcontext_t , out_MEMORY_OUT_FRONT_END_ID ->read(), tab_request[packet_id]._front_end_id ); 563 TEST(Tcontext_t , out_MEMORY_OUT_OOO_ENGINE_ID->read(), tab_request[packet_id]._ooo_engine_id); 564 TEST(Tpacket_t , out_MEMORY_OUT_PACKET_ID ->read(), tab_request[packet_id]._packet_id ); 565 TEST(Tcontrol_t , out_MEMORY_OUT_WRITE_RD ->read(), tab_request[packet_id]._write_rd ); 566 TEST(Tgeneral_address_t, out_MEMORY_OUT_NUM_REG_RD ->read(), tab_request[packet_id]._num_reg_rd ); 567 568 Tgeneral_data_t address = tab_request[packet_id]._data_ra + tab_request[packet_id]._immediat; 569 if (address != (address & (~ mask_memory_access(tab_request[packet_id]._operation)))) 570 TEST(Texception_t , out_MEMORY_OUT_EXCEPTION ->read(), EXCEPTION_MEMORY_ALIGNMENT); 571 else 572 { 573 if (tab_request[packet_id]._write_spec_ko) 574 TEST(Texception_t, out_MEMORY_OUT_EXCEPTION ->read(), EXCEPTION_MEMORY_MISS_SPECULATION); 575 else 576 { 577 TEST(Texception_t, out_MEMORY_OUT_EXCEPTION ->read(), EXCEPTION_MEMORY_NONE); 578 579 if (is_operation_memory_load(tab_request[packet_id]._operation)) 580 { 581 Tgeneral_data_t read_lsq = _memory->read_lsq (((tab_request[packet_id]._ooo_engine_id<<(_param->_size_context_id + _param->_size_front_end_id )) | 582 (tab_request[packet_id]._front_end_id <<(_param->_size_context_id)) | 583 (tab_request[packet_id]._context_id)), 584 (tab_request[packet_id]._immediat + 585 tab_request[packet_id]._data_ra), 586 tab_request[packet_id]._operation); 587 cout << "MEMORY_OUT is a LOAD" << endl 588 << " * operation : " << tab_request[packet_id]._operation << endl 589 << std::hex 590 << " * address : " << (tab_request[packet_id]._immediat + 591 tab_request[packet_id]._data_ra) << endl 592 << " * read_lsq : " << read_lsq << endl 593 << " * memory_out_data : " << out_MEMORY_OUT_DATA_RD->read() << endl 594 << std::dec; 595 596 // TEST(Tgeneral_data_t , out_MEMORY_OUT_DATA_RD->read(), read_lsq); 597 } 598 } 599 } 600 } 601 602 LABEL("DCACHE_REQ : "+toString(out_DCACHE_REQ_VAL->read())+" - "+toString(in_DCACHE_REQ_ACK ->read())); 603 if (out_DCACHE_REQ_VAL->read() and in_DCACHE_REQ_ACK->read()) 604 { 605 Tcontext_t context_id; 606 Tpacket_t packet_id ; 607 if (_param->_have_port_dcache_context_id) 608 context_id = out_DCACHE_REQ_CONTEXT_ID->read(); 609 else 610 context_id = 0; 611 612 packet_id = (out_DCACHE_REQ_PACKET_ID ->read())>>1; 613 614 LABEL(" * Accepted DCACHE_REQ : " + toString(packet_id)); 615 616 // TEST(Tcontext_t ,out_DCACHE_REQ_CONTEXT_ID->read(),((tab_request[packet_id]._ooo_engine_id<<(_param->_size_context_id + _param->_size_front_end_id )) | 617 // (tab_request[packet_id]._front_end_id <<(_param->_size_context_id)) | 618 // (tab_request[packet_id]._context_id))); 619 // TEST(Tdcache_address_t,out_DCACHE_REQ_ADDRESS ->read(),(tab_request[packet_id]._immediat + 620 // tab_request[packet_id]._data_ra) ); 621 // TEST(Tdcache_type_t ,out_DCACHE_REQ_TYPE ->read(), operation_to_dcache_type(operation)); 622 623 // if (is_operation_memory_store(operation)) 624 // TEST(Tdcache_data_t ,out_DCACHE_REQ_WDATA ->read(),tab_request[packet_id]._data_rb); 625 626 Tdcache_data_t rdata = _memory->access (context_id, out_DCACHE_REQ_ADDRESS->read(), out_DCACHE_REQ_TYPE->read(), out_DCACHE_REQ_WDATA->read()); 627 628 // test type : send or not a respons ! 629 LABEL(" * rdata : " + toString(rdata)); 630 631 if ((out_DCACHE_REQ_TYPE->read() == DCACHE_SYNCHRONIZATION) or 632 (out_DCACHE_REQ_TYPE->read() == DCACHE_LOAD)) 633 { 634 LABEL(" * have_dcache_rsp"); 635 636 _cache->push (context_id, 637 out_DCACHE_REQ_PACKET_ID ->read(), 638 rdata , 639 0); 640 } 641 } 642 643 LABEL("DCACHE_RSP : "+toString(in_DCACHE_RSP_VAL->read())+" - "+toString(out_DCACHE_RSP_ACK ->read())); 644 if (in_DCACHE_RSP_VAL->read() and out_DCACHE_RSP_ACK->read()) 645 { 646 _cache->pop(); 647 } 648 649 _cache->end_cycle(); 650 651 SC_START(1); 594 652 } 595 }596 597 LABEL("Simulation of this iteration ...");598 599 while (nb_request_memory_out < nb_request)600 {601 // ***** MEMORY_IN *****602 603 // memory_in_val depends of three factors :604 // 1) request's fifo is not empty ?605 // 2) the slot destination is free ?606 // 3) The head of request's fifo can be issue : the number of cycle is more than current cycle607 608 bool can_execute = false;609 610 if (is_operation_memory_store(fifo_request.top()._operation))611 can_execute = (not store_queue_use [fifo_request.top()._store_queue_ptr_write]) or is_operation_memory_store_head(fifo_request.top()._operation);612 else613 can_execute = not load_queue_use [fifo_request.top()._load_queue_ptr_write];614 615 in_MEMORY_IN_VAL ->write((not fifo_request.empty()) and616 can_execute and617 (sc_simulation_time() >= fifo_request.top()._cycle));618 619 in_MEMORY_IN_CONTEXT_ID ->write (fifo_request.top()._context_id );620 in_MEMORY_IN_PACKET_ID ->write (fifo_request.top()._packet_id );621 in_MEMORY_IN_OPERATION ->write (fifo_request.top()._operation );622 in_MEMORY_IN_TYPE ->write (fifo_request.top()._type );623 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE->write (fifo_request.top()._store_queue_ptr_write);624 in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ->write (fifo_request.top()._load_queue_ptr_write );625 in_MEMORY_IN_IMMEDIAT ->write (fifo_request.top()._immediat );626 in_MEMORY_IN_DATA_RA ->write (fifo_request.top()._data_ra );627 in_MEMORY_IN_DATA_RB ->write (fifo_request.top()._data_rb );628 in_MEMORY_IN_WRITE_RD ->write (fifo_request.top()._write_rd );629 in_MEMORY_IN_NUM_REG_RD ->write (fifo_request.top()._num_reg_rd );630 631 in_MEMORY_OUT_ACK->write((rand()%100)<percent_transaction_memory_out);632 633 // ***** DCACHE_REQ *****634 in_DCACHE_REQ_ACK->write((rand()%100)<percent_transaction_dcache);635 636 SC_START(0);637 638 SC_START(1);639 640 LABEL("MEMORY_IN : "+toString(in_MEMORY_IN_VAL ->read())+" - "+toString(out_MEMORY_IN_ACK ->read()));641 LABEL(" * fifo_request.empty : "+toString(fifo_request.empty()));642 LABEL(" * fifo_request.top.cycle : "+toString(fifo_request.top()._cycle));643 LABEL(" * fifo_request.top.store_queue_ptr_write : "+toString(static_cast<uint32_t>(fifo_request.top()._store_queue_ptr_write)));644 LABEL(" * fifo_request.top.load_queue_ptr_write : "+toString(static_cast<uint32_t>(fifo_request.top()._load_queue_ptr_write)));645 LABEL(" * fifo_request.top.operation : "+toString(static_cast<uint32_t>(fifo_request.top()._operation )));646 LABEL(" * can_execute : "+toString(can_execute));647 648 if ( in_MEMORY_IN_VAL ->read() and out_MEMORY_IN_ACK ->read())649 {650 LABEL(" * Accepted MEMORY_IN : " + toString(nb_request_memory_in));651 cout << fifo_request.top();652 653 if (is_operation_memory_store(fifo_request.top()._operation))654 {655 if (not is_operation_memory_store_head(fifo_request.top()._operation))656 store_queue_use [fifo_request.top()._store_queue_ptr_write] = true;657 }658 else659 load_queue_use [fifo_request.top()._load_queue_ptr_write] = true;660 661 fifo_request.pop();662 663 nb_request_memory_in ++;664 }665 666 LABEL("MEMORY_OUT : "+toString(out_MEMORY_OUT_VAL->read())+" - "+toString(in_MEMORY_OUT_ACK ->read()));667 if (out_MEMORY_OUT_VAL->read() and in_MEMORY_OUT_ACK->read())668 {669 LABEL(" * Accepted MEMORY_OUT : " + toString(static_cast<uint32_t>(out_MEMORY_OUT_PACKET_ID->read())));670 671 if (is_operation_memory_store(tab_request[out_MEMORY_OUT_PACKET_ID->read()]._operation))672 store_queue_use [tab_request[out_MEMORY_OUT_PACKET_ID->read()]._store_queue_ptr_write] = false;673 else674 load_queue_use [tab_request[out_MEMORY_OUT_PACKET_ID->read()]._load_queue_ptr_write] = false;675 676 nb_request_memory_out ++;677 }678 679 LABEL("DCACHE_REQ : "+toString(out_DCACHE_REQ_VAL->read())+" - "+toString(in_DCACHE_REQ_ACK ->read()));680 if (out_DCACHE_REQ_VAL->read() and in_DCACHE_REQ_ACK->read())681 {682 LABEL(" * Accepted DCACHE_REQ : " + toString(static_cast<uint32_t>(out_DCACHE_REQ_PACKET_ID->read())));683 684 // test type : send or not a respons !685 }686 687 653 } 688 654 } 655 catch (morpheo::ErrorMorpheo & error) 656 { 657 _memory->trace(); 658 throw (error); 659 } 660 661 _memory->trace(); 662 689 663 690 664 /******************************************************** … … 699 673 delete in_NRESET; 700 674 701 delete in_MEMORY_IN_VAL ; 702 delete out_MEMORY_IN_ACK ; 703 delete in_MEMORY_IN_CONTEXT_ID ; 704 delete in_MEMORY_IN_PACKET_ID ; 705 delete in_MEMORY_IN_OPERATION ; 706 delete in_MEMORY_IN_TYPE ; 675 delete in_MEMORY_IN_VAL ; 676 delete out_MEMORY_IN_ACK ; 677 delete in_MEMORY_IN_CONTEXT_ID ; 678 delete in_MEMORY_IN_FRONT_END_ID ; 679 delete in_MEMORY_IN_OOO_ENGINE_ID ; 680 delete in_MEMORY_IN_PACKET_ID ; 681 delete in_MEMORY_IN_OPERATION ; 707 682 delete in_MEMORY_IN_STORE_QUEUE_PTR_WRITE; 708 683 delete in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE ; 709 //delete in_MEMORY_IN_HAS_IMMEDIAT;710 delete in_MEMORY_IN_IMMEDIAT 711 delete in_MEMORY_IN_DATA_RA 712 delete in_MEMORY_IN_DATA_RB 713 //delete in_MEMORY_IN_DATA_RC;714 delete in_MEMORY_IN_WRITE_RD;715 delete in_MEMORY_IN_NUM_REG_RD 716 //delete in_MEMORY_IN_WRITE_RE;717 //delete in_MEMORY_IN_NUM_REG_RE;718 684 //delete in_MEMORY_IN_HAS_IMMEDIAT; 685 delete in_MEMORY_IN_IMMEDIAT ; 686 delete in_MEMORY_IN_DATA_RA ; 687 delete in_MEMORY_IN_DATA_RB ; 688 //delete in_MEMORY_IN_DATA_RC ; 689 // delete in_MEMORY_IN_WRITE_RD ; 690 delete in_MEMORY_IN_NUM_REG_RD ; 691 //delete in_MEMORY_IN_WRITE_RE ; 692 //delete in_MEMORY_IN_NUM_REG_RE ; 693 719 694 delete out_MEMORY_OUT_VAL ; 720 695 delete in_MEMORY_OUT_ACK ; 721 696 delete out_MEMORY_OUT_CONTEXT_ID; 697 delete out_MEMORY_OUT_FRONT_END_ID; 698 delete out_MEMORY_OUT_OOO_ENGINE_ID; 722 699 delete out_MEMORY_OUT_PACKET_ID ; 723 delete out_MEMORY_OUT_OPERATION ;724 delete out_MEMORY_OUT_TYPE ;725 700 delete out_MEMORY_OUT_WRITE_RD ; 726 701 delete out_MEMORY_OUT_NUM_REG_RD; 727 702 delete out_MEMORY_OUT_DATA_RD ; 728 //delete out_MEMORY_OUT_WRITE_RE ;729 //delete out_MEMORY_OUT_NUM_REG_RE;730 //delete out_MEMORY_OUT_DATA_RE ;703 //delete out_MEMORY_OUT_WRITE_RE ; 704 //delete out_MEMORY_OUT_NUM_REG_RE; 705 //delete out_MEMORY_OUT_DATA_RE ; 731 706 delete out_MEMORY_OUT_EXCEPTION ; 732 707 733 708 delete out_DCACHE_REQ_VAL ; 734 709 delete in_DCACHE_REQ_ACK ; … … 737 712 delete out_DCACHE_REQ_ADDRESS ; 738 713 delete out_DCACHE_REQ_TYPE ; 739 delete out_DCACHE_REQ_UNCACHED ;740 714 delete out_DCACHE_REQ_WDATA ; 741 715 742 716 delete in_DCACHE_RSP_VAL ; 743 717 delete out_DCACHE_RSP_ACK ; … … 746 720 delete in_DCACHE_RSP_RDATA ; 747 721 delete in_DCACHE_RSP_ERROR ; 748 749 delete [] out_BYPASS_MEMORY_VAL ; 750 delete [] out_BYPASS_MEMORY_CONTEXT_ID; 751 delete [] out_BYPASS_MEMORY_NUM_REG ; 752 delete [] out_BYPASS_MEMORY_DATA ; 753 722 723 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) 724 { 725 delete [] out_BYPASS_MEMORY_VAL ; 726 delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID; 727 delete [] out_BYPASS_MEMORY_NUM_REG ; 728 delete [] out_BYPASS_MEMORY_DATA ; 729 } 754 730 #endif 755 731 756 732 delete _Load_store_unit; 733 delete _memory; 734 delete _cache; 757 735 #ifdef STATISTICS 758 736 delete _parameters_statistics; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h
r62 r71 24 24 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h" 25 25 #ifdef STATISTICS 26 #include "Behavioural/ Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Statistics.h"26 #include "Behavioural/include/Stat.h" 27 27 #endif 28 28 #include "Behavioural/include/Component.h" … … 54 54 55 55 protected : const Parameters * _param; 56 //#ifdef STATISTICS 57 // protected : const morpheo::behavioural::Parameters_Statistics * _param_statistics; 58 //#endif 59 60 #ifdef STATISTICS 61 private : Statistics * _stat; 56 57 #ifdef STATISTICS 58 private : Stat * _stat; 59 60 private : counter_t * _stat_use_store_queue; 61 private : counter_t * _stat_use_load_queue; 62 private : counter_t * _stat_use_speculative_access_queue; 63 64 private : counter_t * _stat_average_use_store_queue; 65 private : counter_t * _stat_average_use_load_queue; 66 private : counter_t * _stat_average_use_speculative_access_queue; 67 68 private : counter_t * _stat_percent_use_store_queue; 69 private : counter_t * _stat_percent_use_load_queue; 70 private : counter_t * _stat_percent_use_speculative_access_queue; 71 72 // private : counter_t * _stat_nb_load_miss_speculation; 73 // private : counter_t * _stat_nb_head_ko; 74 75 // private : counter_t * _stat_nb_inst_load; 76 // private : counter_t * _stat_nb_inst_store; 77 // private : counter_t * _stat_nb_inst_lock; 78 // private : counter_t * _stat_nb_inst_prefetch; 79 // private : counter_t * _stat_nb_inst_invalid; 80 // private : counter_t * _stat_nb_inst_flush; 81 // private : counter_t * _stat_nb_inst_sync; 62 82 #endif 63 83 … … 75 95 public : SC_OUT(Tcontrol_t ) * out_MEMORY_IN_ACK ; 76 96 public : SC_IN (Tcontext_t ) * in_MEMORY_IN_CONTEXT_ID ; 97 public : SC_IN (Tcontext_t ) * in_MEMORY_IN_FRONT_END_ID; 98 public : SC_IN (Tcontext_t ) * in_MEMORY_IN_OOO_ENGINE_ID; 77 99 public : SC_IN (Tpacket_t ) * in_MEMORY_IN_PACKET_ID ; 78 100 public : SC_IN (Toperation_t ) * in_MEMORY_IN_OPERATION ; … … 84 106 public : SC_IN (Tgeneral_data_t ) * in_MEMORY_IN_DATA_RB ; // data (store) 85 107 //public : SC_IN (Tspecial_data_t ) * in_MEMORY_IN_DATA_RC ; 86 108 //public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RD ; // = (operation==load) 87 109 public : SC_IN (Tgeneral_address_t) * in_MEMORY_IN_NUM_REG_RD ; // destination (load) 88 110 //public : SC_IN (Tcontrol_t ) * in_MEMORY_IN_WRITE_RE ; … … 93 115 public : SC_IN (Tcontrol_t ) * in_MEMORY_OUT_ACK ; 94 116 public : SC_OUT(Tcontext_t ) * out_MEMORY_OUT_CONTEXT_ID; 117 public : SC_OUT(Tcontext_t ) * out_MEMORY_OUT_FRONT_END_ID; 118 public : SC_OUT(Tcontext_t ) * out_MEMORY_OUT_OOO_ENGINE_ID; 95 119 public : SC_OUT(Tpacket_t ) * out_MEMORY_OUT_PACKET_ID ; 96 120 public : SC_OUT(Tcontrol_t ) * out_MEMORY_OUT_WRITE_RD ; // = (operation==load) … … 109 133 public : SC_OUT(Tdcache_address_t ) * out_DCACHE_REQ_ADDRESS ; 110 134 public : SC_OUT(Tdcache_type_t ) * out_DCACHE_REQ_TYPE ; 111 public : SC_OUT(Tcontrol_t ) * out_DCACHE_REQ_UNCACHED ;112 135 public : SC_OUT(Tdcache_data_t ) * out_DCACHE_REQ_WDATA ; 113 136 … … 122 145 // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 123 146 public : SC_OUT(Tcontrol_t ) ** out_BYPASS_MEMORY_VAL ; 124 public : SC_OUT(Tcontext_t ) ** out_BYPASS_MEMORY_ CONTEXT_ID;147 public : SC_OUT(Tcontext_t ) ** out_BYPASS_MEMORY_OOO_ENGINE_ID; 125 148 public : SC_OUT(Tgeneral_address_t) ** out_BYPASS_MEMORY_NUM_REG ; 126 149 public : SC_OUT(Tgeneral_data_t ) ** out_BYPASS_MEMORY_DATA ; … … 144 167 145 168 // Registers 146 public : Tlsq_ptr_t internal_MEMORY_STORE_QUEUE_PTR_READ; 147 public : Tlsq_ptr_t internal_MEMORY_LOAD_QUEUE_PTR_READ ; 169 public : Tlsq_ptr_t reg_STORE_QUEUE_PTR_READ; 170 //public : Tlsq_ptr_t reg_LOAD_QUEUE_PTR_READ ; 171 public : Tlsq_ptr_t reg_LOAD_QUEUE_CHECK_PRIORITY ; 148 172 149 173 // signal 174 public : Tlsq_ptr_t internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ ; 175 150 176 private : Tcontrol_t internal_MEMORY_IN_ACK; 151 177 private : Tcontrol_t internal_MEMORY_OUT_VAL; 152 178 private : Tselect_queue_t internal_MEMORY_OUT_SELECT_QUEUE; 153 179 public : Tlsq_ptr_t internal_MEMORY_OUT_PTR; 180 181 private : Tcontrol_t internal_DCACHE_RSP_ACK; 154 182 private : Tcontrol_t internal_DCACHE_REQ_VAL; 155 183 private : Tselect_queue_t internal_DCACHE_REQ_SELECT_QUEUE; … … 190 218 public : void function_speculative_load_commit_genMealy_retire (void); 191 219 #endif 192 #ifdef STATISTICS 193 public : string statistics (uint32_t depth); 220 221 #ifdef STATISTICS 222 public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); 223 public : string statistics_print (uint32_t depth); 194 224 #endif 195 225 … … 200 230 #endif 201 231 202 #if def VHDL_TESTBENCH203 private : void vhdl_testbench_transition(void);232 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 233 private : void end_cycle (void); 204 234 #endif 205 235 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h
r62 r71 12 12 #include "Common/include/Debug.h" 13 13 #include "Behavioural/include/Parameters.h" 14 #include "Common/include/BitManipulation.h" 14 15 #include <math.h> 15 16 … … 33 34 //public : const uint32_t _nb_cache_port ; 34 35 public : const uint32_t _nb_context ; 36 public : const uint32_t _nb_front_end ; 37 public : const uint32_t _nb_ooo_engine ; 35 38 public : const uint32_t _nb_packet ; 36 39 public : const uint32_t _size_general_data ; … … 43 46 public : const uint32_t _size_address_speculative_access_queue; 44 47 public : const uint32_t _size_context_id ; 48 public : const uint32_t _size_front_end_id ; 49 public : const uint32_t _size_ooo_engine_id ; 45 50 public : const uint32_t _size_packet_id ; 46 51 public : const uint32_t _size_general_register ; 47 52 public : const uint32_t _size_operation ; 48 53 public : const uint32_t _size_type ; 54 public : const uint32_t _size_dcache_context_id ; 55 public : const uint32_t _size_dcache_packet_id ; 56 57 public : const bool _have_port_context_id ; 58 public : const bool _have_port_front_end_id ; 59 public : const bool _have_port_ooo_engine_id ; 60 public : const bool _have_port_packet_id ; 61 public : const bool _have_port_dcache_context_id ; 62 63 public : const Tdcache_address_t _mask_address_lsb ; 64 public : const Tdcache_address_t _mask_address_msb ; 49 65 50 66 //-----[ methods ]----------------------------------------------------------- … … 55 71 Tspeculative_load_t speculative_load , 56 72 uint32_t nb_context , 73 uint32_t nb_front_end , 74 uint32_t nb_ooo_engine , 57 75 uint32_t nb_packet , 58 76 uint32_t size_general_data , … … 65 83 public : ~Parameters () ; 66 84 67 public : st ring msg_error (void);85 public : std::string msg_error (void); 68 86 69 public : st ring print (uint32_t depth);70 public : friend ostream& operator<< (ostream& output_stream,71 87 public : std::string print (uint32_t depth); 88 public : friend std::ostream& operator<< (std::ostream& output_stream, 89 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters & x); 72 90 }; 73 91 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Types.h
r62 r71 13 13 #include "Common/include/FromString.h" 14 14 #include "Common/include/ErrorMorpheo.h" 15 #include <ostream> 15 16 16 17 namespace morpheo { … … 23 24 namespace load_store_unit { 24 25 26 #define DCACHE_REQ_IS_LOAD(x) (x<<1) 27 #define DCACHE_REQ_IS_STORE(x) ((x<<1)|1) 28 29 #define DCACHE_RSP_IS_LOAD(x) ((x&1)==0) 30 #define DCACHE_RSP_IS_STORE(x) ((x&1)==1) 31 32 25 33 typedef enum 26 34 { … … 44 52 typedef enum 45 53 { 46 STORE_QUEUE_EMPTY 54 STORE_QUEUE_EMPTY //entry is empty 47 55 ,STORE_QUEUE_NO_VALID_NO_SPECULATIVE //entry is the top of rob, and operation isn't arrive 48 56 ,STORE_QUEUE_VALID_SPECULATIVE //entry is arrive and wait the top of rob … … 55 63 public : Tstore_queue_state_t _state ; 56 64 public : Tcontext_t _context_id ; 65 public : Tcontext_t _front_end_id ; 66 public : Tcontext_t _ooo_engine_id ; 57 67 public : Tpacket_t _packet_id ; 58 public : Tdcache_type_t _dcache_type ; 59 public : Tcontrol_t _uncached ; 68 public : Toperation_t _operation ; 60 69 public : Tlsq_ptr_t _load_queue_ptr_write; 61 public : Tdcache_ data_t_address ;70 public : Tdcache_address_t _address ; 62 71 public : Tgeneral_data_t _wdata ; 63 72 //public : Tcontrol_t _write_rd ; … … 65 74 public : Texception_t _exception ; 66 75 67 friend ostream & operator << (ostream& os, const Tstore_queue_entry_t & x) 68 { 69 return os << " * state : " << x._state << endl 70 << " * packet - context_id : " << toString(static_cast<uint32_t>(x._packet_id )) << " - " << toString(static_cast<uint32_t>(x._context_id)) << endl 71 << " * type - uncached : " << toString(static_cast<uint32_t>(x._dcache_type )) << " - " << toString(static_cast<uint32_t>(x._uncached )) << endl 72 << " * load_ptr - execption : " << toString(static_cast<uint32_t>(x._load_queue_ptr_write)) << " - " << toString(static_cast<uint32_t>(x._exception )) << endl 73 << " * address - wdata : " << toString(static_cast<uint32_t>(x._address )) << " - " << toString(static_cast<uint32_t>(x._wdata )) << endl; 76 friend std::ostream & operator << (std::ostream& os, const Tstore_queue_entry_t & x) 77 { 78 return os << " * state : " << x._state << std::endl 79 << " * packet : " << toString(x._packet_id) << std::endl 80 << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl 81 << " * operation : " << toString(x._operation) << std::endl 82 << " * load_ptr : " << toString(x._load_queue_ptr_write) << std::endl 83 << " * exception : " << toString(x._exception) << std::endl 84 << std::hex 85 << " * address : " << toString(x._address)<< std::endl 86 << " * wdata : " << toString(x._wdata) << std::endl 87 << std::dec; 74 88 } 75 89 }; … … 92 106 public : Tspeculative_access_queue_state_t _state ; 93 107 public : Tcontext_t _context_id ; 108 public : Tcontext_t _front_end_id ; 109 public : Tcontext_t _ooo_engine_id ; 94 110 public : Tpacket_t _packet_id ; 95 public : Taccess_t _access ; 96 public : Tcontrol_t _uncached ; 97 public : Tcontrol_t _sign_extension ; 111 public : Toperation_t _operation ; 98 112 public : Tlsq_ptr_t _load_queue_ptr_write ; 99 113 public : Tlsq_ptr_t _store_queue_ptr_write; 100 114 public : Tdcache_address_t _address ; 101 public : Tgeneral_data_t _rdata ;102 115 public : Tcontrol_t _write_rd ; 103 116 public : Tgeneral_address_t _num_reg_rd ; 104 117 public : Texception_t _exception ; 118 119 friend std::ostream & operator << (std::ostream& os, const Tspeculative_access_queue_entry_t & x) 120 { 121 return os << " * state : " << x._state << std::endl 122 << " * packet : " << toString(x._packet_id) << std::endl 123 << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl 124 << " * operation : " << toString(x._operation) << std::endl 125 << " * load, store ptr_write : " << toString(x._load_queue_ptr_write) << " - " << toString(x._store_queue_ptr_write) << std::endl 126 << " * exception : " << toString(x._exception) << std::endl 127 << std::hex 128 << " * address : " << toString(x._address)<< std::endl 129 << std::dec 130 << " * write_rd, num_reg_rd : " << toString(x._write_rd) << " - " << toString(x._num_reg_rd)<< std::endl; 131 } 105 132 }; 106 133 … … 109 136 // ---------------------------------------------------------- 110 137 138 // HAVE_DCACHE_RSP MUST_CHECK STD::DECOD_BARRIER 139 // OPERATION_MEMORY_LOAD X X - 140 // OPERATION_MEMORY_LOCK - - - 141 // OPERATION_MEMORY_INVALIDATE - - X 142 // OPERATION_MEMORY_PREFETCH - - - 143 // OPERATION_MEMORY_FLUSH - - X 144 // OPERATION_MEMORY_SYNCHRONIZATION X - X 145 146 #define have_dcache_rsp(x) (is_operation_memory_load(x) or (x==OPERATION_MEMORY_SYNCHRONIZATION)) 147 #define must_check(x) (is_operation_memory_load(x)) 148 149 #define MASK_CHECK_BYTE_HIT 0xff // 1111_1111 150 111 151 typedef enum 112 152 { … … 121 161 class Tload_queue_entry_t 122 162 { 123 public : Tload_queue_state_t _state 124 public : Tcontext_t _context_id 125 public : T packet_t _packet_id;126 public : T access_t _access;127 public : T control_t _uncached;128 public : T control_t _sign_extension;163 public : Tload_queue_state_t _state ; 164 public : Tcontext_t _context_id ; 165 public : Tcontext_t _front_end_id ; 166 public : Tcontext_t _ooo_engine_id ; 167 public : Tpacket_t _packet_id ; 168 public : Toperation_t _operation ; 129 169 public : Tlsq_ptr_t _store_queue_ptr_write; 130 public : Tdcache_address_t _address ; 131 public : Tgeneral_data_t _rdata ; 132 public : Tcontrol_t _write_rd ; 133 public : Tgeneral_address_t _num_reg_rd ; 134 public : Texception_t _exception ; 170 public : Tdcache_address_t _address ; 171 public : Tdcache_address_t _check_hit_byte ; 172 public : Tcontrol_t _check_hit ; 173 public : Tdcache_address_t _shift ; 174 public : Tcontrol_t _is_load_signed ; 175 public : Taccess_t _access_size ; 176 public : Tgeneral_data_t _rdata ; 177 public : Tcontrol_t _write_rd ; 178 public : Tgeneral_address_t _num_reg_rd ; 179 public : Texception_t _exception ; 180 181 friend std::ostream & operator << (std::ostream& os, const Tload_queue_entry_t & x) 182 { 183 return os << " * state : " << x._state << std::endl 184 << " * packet : " << toString(x._packet_id) << std::endl 185 << " * context, front_end, ooo_engine_id : " << toString(x._context_id) << " - " << toString(x._front_end_id) << " - " << toString(x._ooo_engine_id) << std::endl 186 << " * operation : " << toString(x._operation) << std::endl 187 << " * store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl 188 << " * exception : " << toString(x._exception) << std::endl 189 << " * check_hit, check_hit_byte : " << toString(x._check_hit) << " - " << toString(x._check_hit_byte) << std::endl 190 << std::hex 191 << " * address : " << toString(x._address)<< std::endl 192 << " * rdata : " << toString(x._rdata) << std::endl 193 << std::dec 194 << " * write_rd, num_reg_rd : " << toString(x._write_rd) << " - " << toString(x._num_reg_rd)<< std::endl; 195 } 196 135 197 }; 136 198 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp
r59 r71 31 31 _name (name) 32 32 ,_param (param) 33 // #ifdef STATISTICS34 // ,_param_statistics (param_statistics)35 // #endif36 33 { 37 34 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); … … 46 43 log_printf(INFO,Load_store_unit,FUNCTION,"Allocation of statistics"); 47 44 48 // Allocation of statistics 49 _stat = new Statistics (static_cast<string>(_name), 50 param_statistics , 51 param); 45 statistics_declaration(param_statistics); 52 46 #endif 53 47 … … 81 75 } 82 76 } 77 78 log_printf(INFO,Load_store_unit,FUNCTION,"Constant affectation"); 79 80 internal_DCACHE_RSP_ACK = 1; 81 PORT_WRITE(out_DCACHE_RSP_ACK, 1); 83 82 84 83 log_printf(INFO,Load_store_unit,FUNCTION,"Method - transition"); … … 147 146 log_printf(INFO,Load_store_unit,FUNCTION,"Generate Statistics file"); 148 147 149 _stat->generate_file(statistics(0));150 151 148 delete _stat; 152 149 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp
r62 r71 64 64 in_MEMORY_IN_VAL = interface->set_signal_valack_in (VAL); 65 65 out_MEMORY_IN_ACK = interface->set_signal_valack_out (ACK); 66 in_MEMORY_IN_CONTEXT_ID = interface->set_signal_in <Tcontext_t > ("context_id" ,_param->_size_context_id ); 67 in_MEMORY_IN_PACKET_ID = interface->set_signal_in <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 66 67 if (_param->_have_port_context_id) 68 in_MEMORY_IN_CONTEXT_ID = interface->set_signal_in <Tcontext_t > ("context_id" ,_param->_size_context_id ); 69 if (_param->_have_port_front_end_id) 70 in_MEMORY_IN_FRONT_END_ID = interface->set_signal_in <Tcontext_t > ("front_end_id" ,_param->_size_front_end_id ); 71 if (_param->_have_port_ooo_engine_id) 72 in_MEMORY_IN_OOO_ENGINE_ID = interface->set_signal_in <Tcontext_t > ("ooo_engine_id",_param->_size_ooo_engine_id ); 73 if (_param->_have_port_packet_id) 74 in_MEMORY_IN_PACKET_ID = interface->set_signal_in <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 68 75 in_MEMORY_IN_OPERATION = interface->set_signal_in <Toperation_t > ("operation" ,_param->_size_operation ); 69 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t > ("store_queue_ptr_write" ,_param->_size_address_store_queue );76 in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t > ("store_queue_ptr_write" ,_param->_size_address_store_queue+1); // +1 cf load_queue usage 70 77 in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t > ("load_queue_ptr_write" ,_param->_size_address_load_queue ); 71 78 // in_MEMORY_IN_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat",1 ); … … 74 81 in_MEMORY_IN_DATA_RB = interface->set_signal_in <Tgeneral_data_t > ("data_rb" ,_param->_size_general_data ); 75 82 // in_MEMORY_IN_DATA_RC = interface->set_signal_in <Tspecial_data_t > ("data_rc" ,_param->_size_special_data ); 76 in_MEMORY_IN_WRITE_RD = interface->set_signal_in <Tcontrol_t > ("write_rd" ,1 );83 // in_MEMORY_IN_WRITE_RD = interface->set_signal_in <Tcontrol_t > ("write_rd" ,1 ); 77 84 in_MEMORY_IN_NUM_REG_RD = interface->set_signal_in <Tgeneral_address_t> ("num_reg_rd" ,1 ); 78 85 // in_MEMORY_IN_WRITE_RE = interface->set_signal_in <Tcontrol_t > ("write_re" ,1 ); … … 90 97 ); 91 98 92 out_MEMORY_OUT_VAL = interface->set_signal_valack_out(VAL); 93 in_MEMORY_OUT_ACK = interface->set_signal_valack_in (ACK); 94 out_MEMORY_OUT_CONTEXT_ID = interface->set_signal_out <Tcontext_t > ("context_id" ,_param->_size_context_id ); 95 out_MEMORY_OUT_PACKET_ID = interface->set_signal_out <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 96 out_MEMORY_OUT_WRITE_RD = interface->set_signal_out <Tcontrol_t > ("write_rd" ,1 ); 97 out_MEMORY_OUT_NUM_REG_RD = interface->set_signal_out <Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register ); 98 out_MEMORY_OUT_DATA_RD = interface->set_signal_out <Tgeneral_data_t > ("data_rd" ,_param->_size_general_data ); 99 // out_MEMORY_OUT_WRITE_RE = interface->set_signal_out <Tcontrol_t > ("write_rd" ,1 ); 100 // out_MEMORY_OUT_NUM_REG_RE = interface->set_signal_out <Tspecial_address_t> ("num_reg_re" ,_param->_size_general_register ); 101 // out_MEMORY_OUT_DATA_RE = interface->set_signal_out <Tspecial_data_t > ("data_re" ,_param->_size_general_data ); 102 out_MEMORY_OUT_EXCEPTION = interface->set_signal_out <Texception_t > ("exception" ,_param->_size_exception ); 99 out_MEMORY_OUT_VAL = interface->set_signal_valack_out(VAL); 100 in_MEMORY_OUT_ACK = interface->set_signal_valack_in (ACK); 101 if (_param->_have_port_context_id) 102 out_MEMORY_OUT_CONTEXT_ID = interface->set_signal_out <Tcontext_t > ("context_id" ,_param->_size_context_id ); 103 if (_param->_have_port_front_end_id) 104 out_MEMORY_OUT_FRONT_END_ID = interface->set_signal_out <Tcontext_t > ("front_end_id" ,_param->_size_front_end_id ); 105 if (_param->_have_port_ooo_engine_id) 106 out_MEMORY_OUT_OOO_ENGINE_ID = interface->set_signal_out <Tcontext_t > ("ooo_engine_id" ,_param->_size_ooo_engine_id ); 107 if (_param->_have_port_packet_id) 108 out_MEMORY_OUT_PACKET_ID = interface->set_signal_out <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 109 out_MEMORY_OUT_WRITE_RD = interface->set_signal_out <Tcontrol_t > ("write_rd" ,1 ); 110 out_MEMORY_OUT_NUM_REG_RD = interface->set_signal_out <Tgeneral_address_t> ("num_reg_rd" ,_param->_size_general_register ); 111 out_MEMORY_OUT_DATA_RD = interface->set_signal_out <Tgeneral_data_t > ("data_rd" ,_param->_size_general_data ); 112 // out_MEMORY_OUT_WRITE_RE = interface->set_signal_out <Tcontrol_t > ("write_rd" ,1 ); 113 // out_MEMORY_OUT_NUM_REG_RE = interface->set_signal_out <Tspecial_address_t> ("num_reg_re" ,_param->_size_general_register ); 114 // out_MEMORY_OUT_DATA_RE = interface->set_signal_out <Tspecial_data_t > ("data_re" ,_param->_size_general_data ); 115 out_MEMORY_OUT_EXCEPTION = interface->set_signal_out <Texception_t > ("exception" ,_param->_size_exception ); 103 116 104 117 } … … 116 129 out_DCACHE_REQ_VAL = interface->set_signal_valack_out(VAL); 117 130 in_DCACHE_REQ_ACK = interface->set_signal_valack_in (ACK); 118 out_DCACHE_REQ_CONTEXT_ID = interface->set_signal_out <Tcontext_t > ("context_id",_param->_size_context_id ); 119 out_DCACHE_REQ_PACKET_ID = interface->set_signal_out <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 131 if (_param->_have_port_dcache_context_id) 132 out_DCACHE_REQ_CONTEXT_ID = interface->set_signal_out <Tcontext_t > ("context_id",_param->_size_dcache_context_id ); 133 out_DCACHE_REQ_PACKET_ID = interface->set_signal_out <Tpacket_t > ("packet_id" ,_param->_size_dcache_packet_id ); 120 134 out_DCACHE_REQ_ADDRESS = interface->set_signal_out <Tdcache_address_t > ("address" ,_param->_size_dcache_address); 121 135 out_DCACHE_REQ_TYPE = interface->set_signal_out <Tdcache_type_t > ("type" ,_param->_size_dcache_type ); 122 out_DCACHE_REQ_UNCACHED = interface->set_signal_out <Tcontrol_t > ("uncached" ,1);123 136 out_DCACHE_REQ_WDATA = interface->set_signal_out <Tdcache_data_t > ("wdata" ,_param->_size_general_data); 124 137 } … … 135 148 in_DCACHE_RSP_VAL = interface->set_signal_valack_in (VAL); 136 149 out_DCACHE_RSP_ACK = interface->set_signal_valack_out(ACK); 137 in_DCACHE_RSP_CONTEXT_ID = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id ); 138 in_DCACHE_RSP_PACKET_ID = interface->set_signal_in <Tpacket_t > ("packet_id" ,_param->_size_packet_id ); 150 if (_param->_have_port_dcache_context_id) 151 in_DCACHE_RSP_CONTEXT_ID = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_dcache_context_id ); 152 in_DCACHE_RSP_PACKET_ID = interface->set_signal_in <Tpacket_t > ("packet_id" ,_param->_size_dcache_packet_id ); 139 153 in_DCACHE_RSP_RDATA = interface->set_signal_in <Tdcache_data_t > ("rdata" ,_param->_size_general_data); 140 154 in_DCACHE_RSP_ERROR = interface->set_signal_in <Tdcache_error_t> ("error" ,_param->_size_dcache_error); … … 144 158 if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS) 145 159 { 146 out_BYPASS_MEMORY_VAL = new SC_OUT(Tcontrol_t ) * [_param->_size_load_queue]; 147 out_BYPASS_MEMORY_CONTEXT_ID = new SC_OUT(Tcontext_t ) * [_param->_size_load_queue]; 148 out_BYPASS_MEMORY_NUM_REG = new SC_OUT(Tgeneral_address_t) * [_param->_size_load_queue]; 149 out_BYPASS_MEMORY_DATA = new SC_OUT(Tgeneral_data_t ) * [_param->_size_load_queue]; 160 out_BYPASS_MEMORY_VAL = new SC_OUT(Tcontrol_t ) * [_param->_size_load_queue]; 161 if (_param->_have_port_ooo_engine_id) 162 out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t ) * [_param->_size_load_queue]; 163 out_BYPASS_MEMORY_NUM_REG = new SC_OUT(Tgeneral_address_t) * [_param->_size_load_queue]; 164 out_BYPASS_MEMORY_DATA = new SC_OUT(Tgeneral_data_t ) * [_param->_size_load_queue]; 150 165 151 166 for (uint32_t i=0; i<_param->_size_load_queue; i++) … … 159 174 ); 160 175 161 out_BYPASS_MEMORY_VAL [i] = interface->set_signal_valack_out(VAL); 162 out_BYPASS_MEMORY_CONTEXT_ID [i] = interface->set_signal_out <Tcontext_t > ("context_id", _param->_size_context_id); 163 out_BYPASS_MEMORY_NUM_REG [i] = interface->set_signal_out <Tgeneral_address_t> ("num_reg" , _param->_size_general_register); 164 out_BYPASS_MEMORY_DATA [i] = interface->set_signal_out <Tgeneral_data_t > ("data" , _param->_size_general_data); 176 out_BYPASS_MEMORY_VAL [i] = interface->set_signal_valack_out(VAL); 177 if (_param->_have_port_ooo_engine_id) 178 out_BYPASS_MEMORY_OOO_ENGINE_ID [i] = interface->set_signal_out <Tcontext_t > ("ooo_engine_id", _param->_size_ooo_engine_id); 179 out_BYPASS_MEMORY_NUM_REG [i] = interface->set_signal_out <Tgeneral_address_t> ("num_reg" , _param->_size_general_register); 180 out_BYPASS_MEMORY_DATA [i] = interface->set_signal_out <Tgeneral_data_t > ("data" , _param->_size_general_data); 165 181 } 166 182 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_deallocation.cpp
r62 r71 35 35 delete in_MEMORY_IN_VAL ; 36 36 delete out_MEMORY_IN_ACK ; 37 if (_param->_have_port_context_id) 37 38 delete in_MEMORY_IN_CONTEXT_ID ; 39 if (_param->_have_port_front_end_id) 40 delete in_MEMORY_IN_FRONT_END_ID ; 41 if (_param->_have_port_ooo_engine_id) 42 delete in_MEMORY_IN_OOO_ENGINE_ID ; 43 if (_param->_have_port_packet_id) 38 44 delete in_MEMORY_IN_PACKET_ID ; 39 45 delete in_MEMORY_IN_OPERATION ; … … 45 51 delete in_MEMORY_IN_DATA_RB ; 46 52 // delete in_MEMORY_IN_DATA_RC ; 47 53 // delete in_MEMORY_IN_WRITE_RD ; 48 54 delete in_MEMORY_IN_NUM_REG_RD ; 49 55 // delete in_MEMORY_IN_WRITE_RE ; … … 52 58 delete out_MEMORY_OUT_VAL ; 53 59 delete in_MEMORY_OUT_ACK ; 60 if (_param->_have_port_context_id) 54 61 delete out_MEMORY_OUT_CONTEXT_ID; 62 if (_param->_have_port_front_end_id) 63 delete out_MEMORY_OUT_FRONT_END_ID; 64 if (_param->_have_port_ooo_engine_id) 65 delete out_MEMORY_OUT_OOO_ENGINE_ID; 66 if (_param->_have_port_packet_id) 55 67 delete out_MEMORY_OUT_PACKET_ID ; 56 68 delete out_MEMORY_OUT_WRITE_RD ; … … 64 76 delete out_DCACHE_REQ_VAL ; 65 77 delete in_DCACHE_REQ_ACK ; 78 if (_param->_have_port_dcache_context_id) 66 79 delete out_DCACHE_REQ_CONTEXT_ID; 67 80 delete out_DCACHE_REQ_PACKET_ID ; 68 81 delete out_DCACHE_REQ_ADDRESS ; 69 82 delete out_DCACHE_REQ_TYPE ; 70 delete out_DCACHE_REQ_UNCACHED ;71 83 delete out_DCACHE_REQ_WDATA ; 72 84 73 85 delete in_DCACHE_RSP_VAL ; 74 86 delete out_DCACHE_RSP_ACK ; 87 if (_param->_have_port_dcache_context_id) 75 88 delete in_DCACHE_RSP_CONTEXT_ID; 76 89 delete in_DCACHE_RSP_PACKET_ID ; … … 81 94 { 82 95 delete [] out_BYPASS_MEMORY_VAL ; 83 delete [] out_BYPASS_MEMORY_CONTEXT_ID; 96 if (_param->_have_port_ooo_engine_id) 97 delete [] out_BYPASS_MEMORY_OOO_ENGINE_ID; 84 98 delete [] out_BYPASS_MEMORY_NUM_REG ; 85 99 delete [] out_BYPASS_MEMORY_DATA ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMealy_insert.cpp
r59 r71 26 26 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); 27 27 28 // ~~~~~[ Output "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 if (is_operation_memory_store(PORT_READ(in_MEMORY_IN_OPERATION)) == true) 30 { 31 internal_MEMORY_IN_ACK = 1; 32 } 33 else 34 { 35 internal_MEMORY_IN_ACK = not _speculative_access_queue_control->full(); 36 } 28 // ~~~~~[ Output "memory_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 30 // store queue is never full (pointer is manage by rename stage) 31 internal_MEMORY_IN_ACK = is_operation_memory_store(PORT_READ(in_MEMORY_IN_OPERATION)) or not _speculative_access_queue_control->full(); 37 32 38 33 PORT_WRITE(out_MEMORY_IN_ACK, internal_MEMORY_IN_ACK); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp
r62 r71 28 28 // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 29 30 Tcontext_t memory_out_context_id = 0; 31 Tpacket_t memory_out_packet_id = 0; 32 Tcontrol_t memory_out_write_rd = 0; 33 Tgeneral_address_t memory_out_num_reg_rd = 0; 34 Tgeneral_data_t memory_out_data_rd = 0; 35 // Tcontrol_t memory_out_write_re = 0; 36 // Tspecial_address_t memory_out_num_reg_re = 0; 37 // Tspecial_data_t memory_out_data_re = 0; 38 Texception_t memory_out_exception = 0; 39 40 internal_MEMORY_OUT_VAL = 0; 30 Tcontext_t memory_out_context_id = 0; 31 Tcontext_t memory_out_front_end_id = 0; 32 Tcontext_t memory_out_ooo_engine_id = 0; 33 Tpacket_t memory_out_packet_id = 0; 34 Tcontrol_t memory_out_write_rd = 0; 35 Tgeneral_address_t memory_out_num_reg_rd = 0; 36 Tgeneral_data_t memory_out_data_rd = 0; 37 // Tcontrol_t memory_out_write_re = 0; 38 // Tspecial_address_t memory_out_num_reg_re = 0; 39 // Tspecial_data_t memory_out_data_re = 0; 40 Texception_t memory_out_exception = 0; 41 42 internal_MEMORY_OUT_VAL = 0; 41 43 42 44 // Test store and load queue 43 // TODO : il faut d'abord tester si un elment de l'access queue n'est pas commitable !!!!!!! 44 45 // Test an store must be commited. 46 if (_store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._state == STORE_QUEUE_COMMIT) 47 { 48 internal_MEMORY_OUT_VAL = 1; 49 internal_MEMORY_OUT_SELECT_QUEUE = SELECT_STORE_QUEUE; 45 46 log_printf(TRACE,Load_store_unit,FUNCTION,"genMoore : Test MEMORY_OUT"); 47 48 log_printf(TRACE,Load_store_unit,FUNCTION," * Load queue"); 49 for (internal_MEMORY_OUT_PTR=0; internal_MEMORY_OUT_PTR<_param->_size_load_queue; internal_MEMORY_OUT_PTR++) 50 // for (uin32_t i=0; (i<_param->_size_load_queue) and not (find_load); i++) 51 { 52 // internal_MEMORY_OUT_PTR = (reg_LOAD_QUEUE_PTR_READ+1)%_param->_size_load_queue; 53 internal_MEMORY_OUT_VAL = ((_load_queue[internal_MEMORY_OUT_PTR]._state == LOAD_QUEUE_COMMIT_CHECK) or 54 (_load_queue[internal_MEMORY_OUT_PTR]._state == LOAD_QUEUE_COMMIT)); 50 55 51 memory_out_context_id= _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._context_id; 52 memory_out_packet_id = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._packet_id ; 53 // memory_out_write_rd 54 // memory_out_num_reg_rd 55 // memory_out_data_rd 56 memory_out_exception = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._exception; 57 } 58 56 if (internal_MEMORY_OUT_VAL) 57 { 58 log_printf(TRACE,Load_store_unit,FUNCTION," * find : %d",internal_MEMORY_OUT_PTR); 59 internal_MEMORY_OUT_SELECT_QUEUE = (_load_queue[internal_MEMORY_OUT_PTR]._state == LOAD_QUEUE_COMMIT_CHECK)?SELECT_LOAD_QUEUE_SPECULATIVE:SELECT_LOAD_QUEUE; 60 61 memory_out_context_id = _load_queue [internal_MEMORY_OUT_PTR]._context_id; 62 memory_out_front_end_id = _load_queue [internal_MEMORY_OUT_PTR]._front_end_id; 63 memory_out_ooo_engine_id = _load_queue [internal_MEMORY_OUT_PTR]._ooo_engine_id; 64 memory_out_packet_id = _load_queue [internal_MEMORY_OUT_PTR]._packet_id ; 65 memory_out_write_rd = _load_queue [internal_MEMORY_OUT_PTR]._write_rd ; 66 memory_out_num_reg_rd = _load_queue [internal_MEMORY_OUT_PTR]._num_reg_rd; 67 68 Tdcache_data_t data_old = _load_queue [internal_MEMORY_OUT_PTR]._rdata; 69 Tdcache_data_t data_new = extend<Tdcache_data_t>(_param->_size_general_data, 70 data_old >> _load_queue [internal_MEMORY_OUT_PTR]._shift, 71 _load_queue [internal_MEMORY_OUT_PTR]._is_load_signed, 72 _load_queue [internal_MEMORY_OUT_PTR]._access_size); 73 log_printf(TRACE,Load_store_unit,FUNCTION," * data : %.8x",data_new); 74 log_printf(TRACE,Load_store_unit,FUNCTION," * rdata : %.8x",_load_queue [internal_MEMORY_OUT_PTR]._rdata); 75 log_printf(TRACE,Load_store_unit,FUNCTION," * shift : %d",_load_queue [internal_MEMORY_OUT_PTR]._shift); 76 log_printf(TRACE,Load_store_unit,FUNCTION," * signed? : %d",_load_queue [internal_MEMORY_OUT_PTR]._is_load_signed); 77 log_printf(TRACE,Load_store_unit,FUNCTION," * access_size : %d",_load_queue [internal_MEMORY_OUT_PTR]._access_size); 78 79 Texception_t exception = _load_queue [internal_MEMORY_OUT_PTR]._exception; 80 bool have_exception = ((exception != EXCEPTION_MEMORY_NONE) and 81 (exception != EXCEPTION_MEMORY_MISS_SPECULATION)); 82 83 // if exception, rdata content the address of load, else content read data. 84 memory_out_data_rd = (have_exception)?data_old:data_new; 85 memory_out_exception = (_load_queue[internal_MEMORY_OUT_PTR]._state == LOAD_QUEUE_COMMIT_CHECK)?EXCEPTION_MEMORY_LOAD_SPECULATIVE:exception; 86 87 break; // we have find a entry !!! stop the search 88 } 89 } 90 91 if (not internal_MEMORY_OUT_VAL) 92 { 93 log_printf(TRACE,Load_store_unit,FUNCTION," * Store queue"); 94 if (_store_queue [reg_STORE_QUEUE_PTR_READ]._state == STORE_QUEUE_COMMIT) 95 { 96 log_printf(TRACE,Load_store_unit,FUNCTION," * find : %d",reg_STORE_QUEUE_PTR_READ); 97 98 internal_MEMORY_OUT_VAL = 1; 99 internal_MEMORY_OUT_SELECT_QUEUE = SELECT_STORE_QUEUE; 100 101 memory_out_context_id = _store_queue [reg_STORE_QUEUE_PTR_READ]._context_id; 102 memory_out_front_end_id = _store_queue [reg_STORE_QUEUE_PTR_READ]._front_end_id; 103 memory_out_ooo_engine_id = _store_queue [reg_STORE_QUEUE_PTR_READ]._ooo_engine_id; 104 memory_out_packet_id = _store_queue [reg_STORE_QUEUE_PTR_READ]._packet_id ; 105 // memory_out_write_rd 106 // memory_out_num_reg_rd 107 memory_out_data_rd = _store_queue [reg_STORE_QUEUE_PTR_READ]._address; // to the exception 108 memory_out_exception = _store_queue [reg_STORE_QUEUE_PTR_READ]._exception; 109 } 110 } 59 111 // write output 60 PORT_WRITE(out_MEMORY_OUT_VAL , internal_MEMORY_OUT_VAL); 61 62 PORT_WRITE(out_MEMORY_OUT_CONTEXT_ID, memory_out_context_id); 63 PORT_WRITE(out_MEMORY_OUT_PACKET_ID , memory_out_packet_id ); 64 PORT_WRITE(out_MEMORY_OUT_WRITE_RD , memory_out_write_rd ); 65 PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD, memory_out_num_reg_rd); 66 PORT_WRITE(out_MEMORY_OUT_DATA_RD , memory_out_data_rd ); 67 // PORT_WRITE(out_MEMORY_OUT_WRITE_RE , memory_out_write_re ); 68 // PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE, memory_out_num_reg_re); 69 // PORT_WRITE(out_MEMORY_OUT_DATA_RE , memory_out_data_re ); 70 PORT_WRITE(out_MEMORY_OUT_EXCEPTION , memory_out_exception ); 112 PORT_WRITE(out_MEMORY_OUT_VAL , internal_MEMORY_OUT_VAL); 113 114 if (_param->_have_port_context_id) 115 PORT_WRITE(out_MEMORY_OUT_CONTEXT_ID , memory_out_context_id ); 116 if (_param->_have_port_front_end_id) 117 PORT_WRITE(out_MEMORY_OUT_FRONT_END_ID , memory_out_front_end_id ); 118 if (_param->_have_port_ooo_engine_id) 119 PORT_WRITE(out_MEMORY_OUT_OOO_ENGINE_ID, memory_out_ooo_engine_id); 120 if (_param->_have_port_packet_id) 121 PORT_WRITE(out_MEMORY_OUT_PACKET_ID , memory_out_packet_id ); 122 PORT_WRITE(out_MEMORY_OUT_WRITE_RD , memory_out_write_rd ); 123 PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD , memory_out_num_reg_rd ); 124 PORT_WRITE(out_MEMORY_OUT_DATA_RD , memory_out_data_rd ); 125 // PORT_WRITE(out_MEMORY_OUT_WRITE_RE , memory_out_write_re ); 126 // PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE , memory_out_num_reg_re ); 127 // PORT_WRITE(out_MEMORY_OUT_DATA_RE , memory_out_data_re ); 128 PORT_WRITE(out_MEMORY_OUT_EXCEPTION , memory_out_exception ); 71 129 72 130 // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ … … 76 134 Tdcache_address_t dcache_req_address ; 77 135 Tdcache_type_t dcache_req_type ; 78 Tcontrol_t dcache_req_uncached ;79 136 Tdcache_data_t dcache_req_wdata ; 80 137 81 internal_DCACHE_REQ_VAL = 0; 138 log_printf(TRACE,Load_store_unit,FUNCTION,"genMoore : Test DCACHE_REQ"); 139 140 internal_DCACHE_REQ_VAL = 0; 141 142 internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ = (*_speculative_access_queue_control)[0]; 82 143 83 144 // Test store and load queue 84 85 // TODO : il faut d'abord tester si un elment de l'access queue n'est pas commitable !!!!!!! 86 87 // Test an store must be commited. 88 if (_store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._state == STORE_QUEUE_VALID_NO_SPECULATIVE) 89 { 145 if (_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._state == SPECULATIVE_ACCESS_QUEUE_WAIT_CACHE) 146 { 147 log_printf(TRACE,Load_store_unit,FUNCTION," * speculative_access_queue[%d]",internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ); 148 90 149 internal_DCACHE_REQ_VAL = 1; 91 internal_DCACHE_REQ_SELECT_QUEUE = SELECT_STORE_QUEUE; 92 93 dcache_req_context_id = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._context_id; 94 dcache_req_packet_id = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._packet_id ; 95 dcache_req_address = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._address ; 96 dcache_req_type = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._dcache_type; 97 dcache_req_uncached = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._uncached ; 98 dcache_req_wdata = _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._wdata ; 150 internal_DCACHE_REQ_SELECT_QUEUE = SELECT_LOAD_QUEUE_SPECULATIVE; 151 152 if (_param->_have_port_dcache_context_id) 153 { 154 Tcontext_t context_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._context_id; 155 Tcontext_t front_end_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._front_end_id; 156 Tcontext_t ooo_engine_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._ooo_engine_id; 157 158 dcache_req_context_id = ((ooo_engine_id<<(_param->_size_context_id + _param->_size_front_end_id )) | 159 (front_end_id <<(_param->_size_context_id)) | 160 (context_id)); 161 } 162 163 dcache_req_packet_id = DCACHE_REQ_IS_LOAD(_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._load_queue_ptr_write); 164 dcache_req_address = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._address & _param->_mask_address_msb; 165 dcache_req_type = operation_to_dcache_type(_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._operation); 166 #ifdef SYSTEMC_VHDL_COMPATIBILITY 167 dcache_req_wdata = 0; 168 #endif 169 } 170 else 171 { 172 // Test an store must be commited. 173 if (_store_queue [reg_STORE_QUEUE_PTR_READ]._state == STORE_QUEUE_VALID_NO_SPECULATIVE) 174 { 175 internal_DCACHE_REQ_VAL = 1; 176 internal_DCACHE_REQ_SELECT_QUEUE = SELECT_STORE_QUEUE; 177 178 if (_param->_have_port_dcache_context_id) 179 { 180 Tcontext_t context_id = _store_queue [reg_STORE_QUEUE_PTR_READ]._context_id; 181 Tcontext_t front_end_id = _store_queue [reg_STORE_QUEUE_PTR_READ]._front_end_id; 182 Tcontext_t ooo_engine_id = _store_queue [reg_STORE_QUEUE_PTR_READ]._ooo_engine_id; 183 184 dcache_req_context_id = ((ooo_engine_id<<(_param->_size_context_id + _param->_size_front_end_id )) | 185 (front_end_id <<(_param->_size_context_id)) | 186 (context_id)); 187 } 188 189 // FIXME : il peut avoir plusieurs store avec le même paquet_id ... pour l'instant pas très grave car pas de retour (enfin seul les bus error sont des retours) 190 dcache_req_packet_id = DCACHE_REQ_IS_STORE(reg_STORE_QUEUE_PTR_READ); 191 dcache_req_address = _store_queue [reg_STORE_QUEUE_PTR_READ]._address ; 192 dcache_req_type = operation_to_dcache_type(_store_queue [reg_STORE_QUEUE_PTR_READ]._operation); 193 dcache_req_wdata = _store_queue [reg_STORE_QUEUE_PTR_READ]._wdata ; 194 } 99 195 } 100 196 101 197 PORT_WRITE(out_DCACHE_REQ_VAL , internal_DCACHE_REQ_VAL); 198 if (_param->_have_port_dcache_context_id) 102 199 PORT_WRITE(out_DCACHE_REQ_CONTEXT_ID, dcache_req_context_id); 103 200 PORT_WRITE(out_DCACHE_REQ_PACKET_ID , dcache_req_packet_id ); 104 201 PORT_WRITE(out_DCACHE_REQ_ADDRESS , dcache_req_address ); 105 202 PORT_WRITE(out_DCACHE_REQ_TYPE , dcache_req_type ); 106 PORT_WRITE(out_DCACHE_REQ_UNCACHED , dcache_req_uncached );107 203 PORT_WRITE(out_DCACHE_REQ_WDATA , dcache_req_wdata ); 108 204 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r62 r71 1 1 #ifdef SYSTEMC 2 //#if defined(STATISTICS) or defined(VHDL_TESTBENCH)3 2 /* 4 3 * $Id$ … … 30 29 // Reset : clear all queue 31 30 _speculative_access_queue_control->clear(); 32 internal_MEMORY_STORE_QUEUE_PTR_READ = 0; 33 internal_MEMORY_LOAD_QUEUE_PTR_READ = 0; 31 32 reg_STORE_QUEUE_PTR_READ = 0; 33 reg_LOAD_QUEUE_CHECK_PRIORITY = 0; 34 34 35 35 for (uint32_t i=0; i< _param->_size_store_queue ; i++) … … 44 44 else 45 45 { 46 //================================================================ 47 // Interface "PORT_CHECK" 48 //================================================================ 49 50 // Plusieurs moyens de faire la verification de dépendance entre les loads et les stores. 51 // 1) un load ne peut vérifier qu'un store par cycle. Dans ce cas port_check <= size_load_queue 52 // 2) un load tente de vérifier le maximum de store par cycle. Dans ce cas ce n'est pas du pointeur d'écriture qu'il lui faut mais un vecteur de bit indiquant quel store à déjà été testé. De plus il faut un bit indiquant qu'il y a un match mais que ce n'est pas forcément le premier. 53 54 // solution 1) 55 log_printf(TRACE,Load_store_unit,FUNCTION,"CHECK"); 56 for (uint32_t i=0, nb_check=0; (nb_check<_param->_nb_port_check) and (i<_param->_size_load_queue); i++) 57 { 58 uint32_t index_load = (i + reg_LOAD_QUEUE_CHECK_PRIORITY)%_param->_size_load_queue; 59 60 if (((_load_queue[index_load]._state == LOAD_QUEUE_WAIT_CHECK) or 61 (_load_queue[index_load]._state == LOAD_QUEUE_COMMIT_CHECK) or 62 (_load_queue[index_load]._state == LOAD_QUEUE_CHECK)) and 63 is_operation_memory_load(_load_queue[index_load]._operation)) 64 { 65 log_printf(TRACE,Load_store_unit,FUNCTION," * Find a load : %d",index_load); 66 67 nb_check++; // use one port 68 69 // find a entry that it need a check 70 71 Tlsq_ptr_t index_store = _load_queue[index_load]._store_queue_ptr_write; 72 bool end_check = false; 73 bool change_state = false; 74 bool next = false; 75 76 // At the first store queue empty, stop check. 77 // Explication : 78 // * rename logic keep a empty case in the store queue (also size_store_queue > 1) 79 // * when a store is out of store queue, also it was in head of re order buffer. Also, they are none previous load. 80 81 log_printf(TRACE,Load_store_unit,FUNCTION," * index_store : %d",index_store); 82 if (index_store == reg_STORE_QUEUE_PTR_READ) 83 { 84 log_printf(TRACE,Load_store_unit,FUNCTION," * index_store == reg_STORE_QUEUE_PTR_READ"); 85 end_check = true; 86 change_state = true; 87 } 88 else 89 { 90 log_printf(TRACE,Load_store_unit,FUNCTION," * index_store != reg_STORE_QUEUE_PTR_READ"); 91 92 index_store = (index_store-1)%(_param->_size_store_queue); // store_queue_ptr_write target the next slot to write, also the slot is not significatif when the load is renaming 93 94 log_printf(TRACE,Load_store_unit,FUNCTION," * index_store : %d",index_store); 95 96 switch (_store_queue[index_store]._state) 97 { 98 case STORE_QUEUE_VALID_NO_SPECULATIVE : 99 case STORE_QUEUE_COMMIT : 100 case STORE_QUEUE_VALID_SPECULATIVE : 101 { 102 103 log_printf(TRACE,Load_store_unit,FUNCTION," * store have a valid entry"); 104 105 // TODO : MMU - nous considérons que les adresses sont physique 106 bool test_thread_id = true; 107 108 // Test thread id. 109 if (_param->_have_port_context_id) 110 test_thread_id &= (_load_queue[index_load]._context_id == _store_queue[index_store]._context_id); 111 if (_param->_have_port_front_end_id) 112 test_thread_id &= (_load_queue[index_load]._front_end_id == _store_queue[index_store]._front_end_id); 113 if (_param->_have_port_ooo_engine_id) 114 test_thread_id &= (_load_queue[index_load]._ooo_engine_id == _store_queue[index_store]._ooo_engine_id); 115 116 if (test_thread_id) 117 { 118 log_printf(TRACE,Load_store_unit,FUNCTION," * load and store is the same thread."); 119 // the load and store are in the same thread. Now, we must test address. 120 Tdcache_address_t load_addr = _load_queue [index_load ]._address; 121 Tdcache_address_t store_addr = _store_queue[index_store]._address; 122 123 log_printf(TRACE,Load_store_unit,FUNCTION," * load_addr : %.8x.",load_addr ); 124 log_printf(TRACE,Load_store_unit,FUNCTION," * store_addr : %.8x.",store_addr); 125 log_printf(TRACE,Load_store_unit,FUNCTION," * load_addr & mask_address_msb : %.8x.",load_addr & _param->_mask_address_msb); 126 log_printf(TRACE,Load_store_unit,FUNCTION," * store_addr & mask_address_msb : %.8x.",store_addr & _param->_mask_address_msb); 127 // Test if the both address target the same word 128 if ((load_addr & _param->_mask_address_msb) == 129 (store_addr & _param->_mask_address_msb)) 130 { 131 log_printf(TRACE,Load_store_unit,FUNCTION," * address_msb is the same."); 132 // all case - [] : store, () : load 133 // (1) store_max >= load_max and store_min <= load_min ...[...(...)...]... Ok - inclusion in store 134 // (2) store_min > load_max ...[...]...(...)... Ok - no conflit 135 // (3) store_max < load_min ...(...)...[...]... Ok - no conflit 136 // (4) store_max < load_max and store_min > load_min ...(...[...]...)... Ko - inclusion in load 137 // (5) store_max >= load_max and store_min > load_min ...[...(...]...)... Ko - conflit 138 // (6) store_max < load_max and store_min <= load_min ...(...[...)...]... Ko - conflit 139 // but : 140 // load in the cache is a word ! 141 // the mask can be make when the load is commited. Also, the rdata content a full word. 142 // the only case is (4) 143 144 Tgeneral_data_t load_data = _load_queue [index_load ]._rdata ; 145 Tgeneral_data_t store_data = _store_queue[index_store]._wdata ; 146 147 log_printf(TRACE,Load_store_unit,FUNCTION," * load_data (init) : %.8x",load_data); 148 log_printf(TRACE,Load_store_unit,FUNCTION," * store_data (init) : %.8x",store_data); 149 uint32_t store_num_byte_min = (store_addr & _param->_mask_address_lsb); 150 uint32_t store_num_byte_max = store_num_byte_min+(1<<memory_access(_store_queue[index_store]._operation)); 151 log_printf(TRACE,Load_store_unit,FUNCTION," * store_num_byte_min : %d",store_num_byte_min); 152 log_printf(TRACE,Load_store_unit,FUNCTION," * store_num_byte_max : %d",store_num_byte_max); 153 log_printf(TRACE,Load_store_unit,FUNCTION," * check_hit : %x",_load_queue[index_load]._check_hit); 154 log_printf(TRACE,Load_store_unit,FUNCTION," * check_hit_byte : %x",_load_queue[index_load]._check_hit_byte); 155 // The bypass is checked byte per byte 156 for (uint32_t byte=store_num_byte_min; byte<store_num_byte_max; byte ++) 157 { 158 uint32_t mask = 1<<byte; 159 uint32_t index = byte<<3; 160 log_printf(TRACE,Load_store_unit,FUNCTION," * byte : %d",byte); 161 log_printf(TRACE,Load_store_unit,FUNCTION," * mask : %d",mask); 162 log_printf(TRACE,Load_store_unit,FUNCTION," * index : %d",index); 163 // Accept the bypass if they had not a previous bypass with an another store 164 if ((_load_queue[index_load]._check_hit_byte&mask)==0) 165 { 166 log_printf(TRACE,Load_store_unit,FUNCTION," * bypass !!!"); 167 log_printf(TRACE,Load_store_unit,FUNCTION," * rdata_old : %.8x", load_data); 168 load_data = insert<Tdcache_data_t>(load_data, store_data, index+8-1, index); 169 _load_queue[index_load]._check_hit_byte |= mask; 170 _load_queue[index_load]._check_hit = 1; 171 change_state = true; 172 173 log_printf(TRACE,Load_store_unit,FUNCTION," * rdata_new : %.8x", load_data); 174 } 175 } 176 177 _load_queue[index_load]._rdata = load_data; 178 179 log_printf(TRACE,Load_store_unit,FUNCTION," * check_hit : %x",_load_queue[index_load]._check_hit); 180 log_printf(TRACE,Load_store_unit,FUNCTION," * check_hit_byte : %x",_load_queue[index_load]._check_hit_byte); 181 182 log_printf(TRACE,Load_store_unit,FUNCTION," * mask_end_check : %x",(-1& _param->_mask_address_lsb)); 183 // The check is finish if all bit is set 184 end_check = (_load_queue[index_load]._check_hit_byte == MASK_CHECK_BYTE_HIT); 185 } 186 } 187 188 next = true; 189 break; 190 } 191 case STORE_QUEUE_EMPTY : 192 case STORE_QUEUE_NO_VALID_NO_SPECULATIVE : 193 { 194 log_printf(TRACE,Load_store_unit,FUNCTION," * store have an invalid entry"); 195 break; 196 } 197 } 198 } 199 200 if (next) 201 { 202 log_printf(TRACE,Load_store_unit,FUNCTION," * next"); 203 // if (_load_queue[index_load]._store_queue_ptr_write == 0) 204 // _load_queue[index_load]._store_queue_ptr_write = _param->_size_store_queue-1; 205 // else 206 // _load_queue[index_load]._store_queue_ptr_write --; 207 _load_queue[index_load]._store_queue_ptr_write = index_store; // because the index store have be decrease 208 209 // FIXME : peut n'est pas obliger de faire cette comparaison. Au prochain cycle on le détectera que les pointeur sont égaux. Ceci évitera d'avoir deux comparateurs avec le registre "reg_STORE_QUEUE_PTR_READ" 210 if (index_store == reg_STORE_QUEUE_PTR_READ) 211 { 212 end_check = true; 213 change_state = true; 214 } 215 } 216 217 if (change_state) 218 { 219 log_printf(TRACE,Load_store_unit,FUNCTION," * change_state"); 220 221 switch (_load_queue[index_load]._state) 222 { 223 case LOAD_QUEUE_WAIT_CHECK : _load_queue[index_load]._state = LOAD_QUEUE_WAIT ; break; 224 case LOAD_QUEUE_COMMIT_CHECK : 225 { 226 if (end_check) 227 _load_queue[index_load]._state = LOAD_QUEUE_COMMIT; 228 else 229 _load_queue[index_load]._state = LOAD_QUEUE_CHECK; 230 break; 231 } 232 case LOAD_QUEUE_CHECK : 233 { 234 if (end_check) 235 _load_queue[index_load]._state = LOAD_QUEUE_COMMIT; 236 // check find a bypass. A speculative load have been committed : report a speculation miss. 237 if (_load_queue[index_load]._check_hit != 0) 238 { 239 _load_queue[index_load]._exception = EXCEPTION_MEMORY_MISS_SPECULATION; 240 _load_queue[index_load]._write_rd = 1; // write the good result 241 } 242 243 break; 244 } 245 default : break; 246 } 247 log_printf(TRACE,Load_store_unit,FUNCTION," * new state : %d",_load_queue[index_load]._state); 248 log_printf(TRACE,Load_store_unit,FUNCTION," * exception : %d",_load_queue[index_load]._exception); 249 } 250 } 251 // else : don't use a port 252 } 253 46 254 //================================================================ 47 255 // Interface "MEMORY_IN" … … 117 325 case STORE_QUEUE_NO_VALID_NO_SPECULATIVE : 118 326 { 119 // if (is_operation_memory_store_head(operation) == false) 120 // { 121 new_state = STORE_QUEUE_VALID_NO_SPECULATIVE; 122 123 // Test if have a new exception (priority : miss_speculation) 124 if ((old_exception == EXCEPTION_MEMORY_NONE) and 125 (exception_alignement == true)) 126 new_exception = EXCEPTION_MEMORY_ALIGNMENT; 127 128 update_info = true; 129 break; 130 // } 327 #ifdef DEBUG_TEST 328 if (is_operation_memory_store_head(operation) == true) 329 throw ErrorMorpheo(_("Transaction in memory_in's interface, actual state of store_queue is \"STORE_QUEUE_NO_VALID_NO_SPECULATIVE\", also a previous store_head have been receiveid. But this operation is a store_head.")); 330 #endif 331 // Test if have a new exception (priority : miss_speculation) 332 if ((exception_alignement == true) and (old_exception == EXCEPTION_MEMORY_NONE)) 333 new_exception = EXCEPTION_MEMORY_ALIGNMENT; 334 335 if (new_exception != EXCEPTION_MEMORY_NONE) 336 new_state = STORE_QUEUE_COMMIT; 337 else 338 new_state = STORE_QUEUE_VALID_NO_SPECULATIVE; 339 340 update_info = true; 341 break; 131 342 } 132 343 case STORE_QUEUE_VALID_SPECULATIVE : 133 344 { 134 // if (is_operation_memory_store_head(operation) == true) 135 // { 136 new_state = STORE_QUEUE_VALID_NO_SPECULATIVE; 137 138 if (operation == OPERATION_MEMORY_STORE_HEAD_KO) 139 new_exception = EXCEPTION_MEMORY_MISS_SPECULATION; 140 141 break; 142 // } 345 #ifdef DEBUG_TEST 346 if (is_operation_memory_store_head(operation) == false) 347 throw ErrorMorpheo(_("Transaction in memory_in's interface, actual state of store_queue is \"STORE_QUEUE_VALID_SPECULATIVE\", also a previous access with register and address have been receiveid. But this operation is a not store_head.")); 348 #endif 349 if (operation == OPERATION_MEMORY_STORE_HEAD_KO) 350 new_exception = EXCEPTION_MEMORY_MISS_SPECULATION; // great prioritary 351 352 if (new_exception != EXCEPTION_MEMORY_NONE) 353 new_state = STORE_QUEUE_COMMIT; 354 else 355 new_state = STORE_QUEUE_VALID_NO_SPECULATIVE; 356 357 break; 143 358 } 144 359 case STORE_QUEUE_VALID_NO_SPECULATIVE : 145 360 case STORE_QUEUE_COMMIT : 146 361 { 147 ErrorMorpheo("<Load_store_unit::function_speculative_load_commit_transition> Invalid state and operation");362 throw ErrorMorpheo("<Load_store_unit::function_speculative_load_commit_transition> Invalid state and operation"); 148 363 } 149 364 } … … 156 371 log_printf(TRACE,Load_store_unit,FUNCTION," * Update information"); 157 372 158 _store_queue [index]._context_id = PORT_READ(in_MEMORY_IN_CONTEXT_ID ); 159 _store_queue [index]._packet_id = PORT_READ(in_MEMORY_IN_PACKET_ID ); 160 _store_queue [index]._dcache_type = operation_to_dcache_type(operation); 161 _store_queue [index]._uncached = 0; // is the MMU that have this info 373 _store_queue [index]._context_id = (not _param->_have_port_context_id )?0:PORT_READ(in_MEMORY_IN_CONTEXT_ID); 374 _store_queue [index]._front_end_id = (not _param->_have_port_front_end_id )?0:PORT_READ(in_MEMORY_IN_FRONT_END_ID); 375 _store_queue [index]._ooo_engine_id = (not _param->_have_port_ooo_engine_id)?0:PORT_READ(in_MEMORY_IN_OOO_ENGINE_ID); 376 _store_queue [index]._packet_id = (not _param->_have_port_packet_id )?0:PORT_READ(in_MEMORY_IN_PACKET_ID ); 377 _store_queue [index]._operation = operation; 162 378 _store_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); 163 379 _store_queue [index]._address = address; 164 _store_queue [index]._wdata = PORT_READ(in_MEMORY_IN_DATA_RB ); 165 // _store_queue [index]._write_rd = PORT_READ(in_MEMORY_IN_WRITE_RD ); 380 381 // reordering data 382 _store_queue [index]._wdata = duplicate<Tgeneral_data_t>(_param->_size_general_data,PORT_READ(in_MEMORY_IN_DATA_RB), memory_size(operation), 0); 166 383 // _store_queue [index]._num_reg_rd = PORT_READ(in_MEMORY_IN_NUM_REG_RD ); 167 384 } … … 169 386 else 170 387 { 171 // // ==================================== 172 // // ===== SPECULATIVE_ACCESS_QUEUE ===== 173 // // ==================================== 174 175 // // In speculative access queue, they are many type's request 176 // log_printf(TRACE,Load_store_unit,FUNCTION,"speculative_access_queue"); 177 // log_printf(TRACE,Load_store_unit,FUNCTION," * PUSH"); 178 179 // // Write in reservation station 180 // uint32_t index = _speculative_access_queue_control->push(); 181 182 // log_printf(TRACE,Load_store_unit,FUNCTION," * index : %d",index); 388 // ==================================== 389 // ===== SPECULATIVE_ACCESS_QUEUE ===== 390 // ==================================== 391 392 // In speculative access queue, they are many type's request 393 log_printf(TRACE,Load_store_unit,FUNCTION,"speculative_access_queue"); 394 log_printf(TRACE,Load_store_unit,FUNCTION," * PUSH"); 395 396 // Write in reservation station 397 uint32_t index = _speculative_access_queue_control->push(); 398 399 log_printf(TRACE,Load_store_unit,FUNCTION," * index : %d", index); 400 401 Texception_t exception; 402 403 if (exception_alignement == true) 404 exception = EXCEPTION_MEMORY_ALIGNMENT; 405 else 406 exception = EXCEPTION_MEMORY_NONE; 407 408 // if exception, don't access at the cache 409 // NOTE : type "other" (lock, invalidate, flush and sync) can't make an alignement exception (access is equivalent at a 8 bits) 410 _speculative_access_queue [index]._state = (exception == EXCEPTION_MEMORY_NONE)?SPECULATIVE_ACCESS_QUEUE_WAIT_CACHE:SPECULATIVE_ACCESS_QUEUE_WAIT_LOAD_QUEUE; 411 _speculative_access_queue [index]._context_id = (not _param->_have_port_context_id )?0:PORT_READ(in_MEMORY_IN_CONTEXT_ID); 412 _speculative_access_queue [index]._front_end_id = (not _param->_have_port_front_end_id )?0:PORT_READ(in_MEMORY_IN_FRONT_END_ID); 413 _speculative_access_queue [index]._ooo_engine_id = (not _param->_have_port_ooo_engine_id)?0:PORT_READ(in_MEMORY_IN_OOO_ENGINE_ID); 414 _speculative_access_queue [index]._packet_id = (not _param->_have_port_packet_id )?0:PORT_READ(in_MEMORY_IN_PACKET_ID); 415 416 _speculative_access_queue [index]._operation = operation; 417 _speculative_access_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE); 418 _speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE); 419 _speculative_access_queue [index]._address = address; 420 // NOTE : is operation is a load, then they are a result and must write in the register file 421 _speculative_access_queue [index]._write_rd = is_operation_memory_load(operation); 422 _speculative_access_queue [index]._num_reg_rd = PORT_READ(in_MEMORY_IN_NUM_REG_RD ); 423 424 _speculative_access_queue [index]._exception = exception; 425 426 log_printf(TRACE,Load_store_unit,FUNCTION," * index : %d",index); 183 427 } 184 428 } … … 191 435 (PORT_READ(in_MEMORY_OUT_ACK) == 1)) 192 436 { 437 log_printf(TRACE,Load_store_unit,FUNCTION,"MEMORY_OUT transaction"); 438 193 439 switch (internal_MEMORY_OUT_SELECT_QUEUE) 194 440 { … … 199 445 // ======================= 200 446 447 log_printf(TRACE,Load_store_unit,FUNCTION," * store_queue [%d]",reg_STORE_QUEUE_PTR_READ); 448 201 449 // Entry flush and increase the read pointer 202 203 _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_EMPTY; 204 205 internal_MEMORY_STORE_QUEUE_PTR_READ = (internal_MEMORY_STORE_QUEUE_PTR_READ+1)%_param->_size_store_queue; 450 _store_queue [reg_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_EMPTY; 451 452 reg_STORE_QUEUE_PTR_READ = (reg_STORE_QUEUE_PTR_READ+1)%_param->_size_store_queue; 206 453 207 454 break; 208 455 } 209 456 case SELECT_LOAD_QUEUE : 457 { 458 // ====================== 459 // ===== LOAD_QUEUE ===== 460 // ====================== 461 462 log_printf(TRACE,Load_store_unit,FUNCTION," * load_queue [%d]",internal_MEMORY_OUT_PTR); 463 464 // Entry flush and increase the read pointer 465 466 _load_queue [internal_MEMORY_OUT_PTR]._state = LOAD_QUEUE_EMPTY; 467 468 // reg_LOAD_QUEUE_PTR_READ = (reg_LOAD_QUEUE_PTR_READ+1)%_param->_size_load_queue; 469 470 break; 471 } 210 472 case SELECT_LOAD_QUEUE_SPECULATIVE : 473 { 474 log_printf(TRACE,Load_store_unit,FUNCTION," * load_queue [%d] (speculative)",internal_MEMORY_OUT_PTR); 475 476 _load_queue [internal_MEMORY_OUT_PTR]._state = LOAD_QUEUE_CHECK; 477 // NOTE : a speculative load write in the register file. 478 // if the speculation is a miss, write_rd is re set at 1. 479 _load_queue [internal_MEMORY_OUT_PTR]._write_rd = 0; 480 break; 481 } 482 211 483 break; 212 484 } … … 216 488 // Interface "DCACHE_REQ" 217 489 //================================================================ 490 bool load_queue_push = (_speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._state == SPECULATIVE_ACCESS_QUEUE_WAIT_LOAD_QUEUE); 491 218 492 if (( internal_DCACHE_REQ_VAL == 1) and 219 493 (PORT_READ(in_DCACHE_REQ_ACK) == 1)) 220 494 { 495 log_printf(TRACE,Load_store_unit,FUNCTION,"DCACHE_REQ"); 496 221 497 switch (internal_DCACHE_REQ_SELECT_QUEUE) 222 498 { … … 229 505 // Entry flush and increase the read pointer 230 506 231 _store_queue [internal_MEMORY_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_COMMIT; 232 507 _store_queue [reg_STORE_QUEUE_PTR_READ]._state = STORE_QUEUE_COMMIT; 508 509 break; 510 } 511 case SELECT_LOAD_QUEUE_SPECULATIVE : 512 { 513 // ========================================= 514 // ===== SELECT_LOAD_QUEUE_SPECULATIVE ===== 515 // ========================================= 516 517 load_queue_push = true; 233 518 break; 234 519 } 235 520 case SELECT_LOAD_QUEUE : 236 case SELECT_LOAD_QUEUE_SPECULATIVE : 521 { 522 throw ErrorMorpheo(_("Invalid selection")); 523 break; 524 } 525 237 526 break; 238 527 } 239 528 } 240 529 530 if (load_queue_push) 531 { 532 Tlsq_ptr_t ptr_write = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._load_queue_ptr_write; 533 Toperation_t operation = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._operation; 534 Texception_t exception = _speculative_access_queue[internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._exception; 535 bool have_exception = (exception != EXCEPTION_MEMORY_NONE); 536 537 538 if (have_exception) 539 _load_queue [ptr_write]._state = LOAD_QUEUE_COMMIT; 540 else 541 { 542 if (have_dcache_rsp(operation)) 543 { 544 // load and synchronisation 545 if (must_check(operation)) 546 { 547 // load 548 _load_queue [ptr_write]._state = LOAD_QUEUE_WAIT_CHECK; 549 } 550 else 551 { 552 // synchronisation 553 _load_queue [ptr_write]._state = LOAD_QUEUE_WAIT; 554 } 555 } 556 else 557 { 558 // lock, prefecth, flush and invalidate 559 _load_queue [ptr_write]._state = LOAD_QUEUE_COMMIT; 560 } 561 } 562 563 Tdcache_address_t address = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._address; 564 Tdcache_address_t address_lsb = (address & _param->_mask_address_lsb); 565 Tdcache_address_t check_hit_byte = gen_mask_not<Tdcache_address_t>(address_lsb+memory_access(operation)+1,address_lsb); 566 _load_queue [ptr_write]._context_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._context_id ; 567 _load_queue [ptr_write]._front_end_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._front_end_id ; 568 _load_queue [ptr_write]._ooo_engine_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._ooo_engine_id ; 569 _load_queue [ptr_write]._packet_id = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._packet_id ; 570 _load_queue [ptr_write]._operation = operation; 571 _load_queue [ptr_write]._store_queue_ptr_write = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_write; 572 _load_queue [ptr_write]._address = address; 573 _load_queue [ptr_write]._check_hit_byte = check_hit_byte; 574 _load_queue [ptr_write]._check_hit = 0; 575 _load_queue [ptr_write]._shift = address<<3; 576 _load_queue [ptr_write]._is_load_signed = is_operation_memory_load_signed(operation); 577 _load_queue [ptr_write]._access_size = memory_size(operation); 578 // NOTE : if have an exception, must write in register, because a depend instruction wait the load data. 579 _load_queue [ptr_write]._write_rd = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._write_rd ; 580 581 _load_queue [ptr_write]._num_reg_rd = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._num_reg_rd ; 582 _load_queue [ptr_write]._exception = exception; 583 _load_queue [ptr_write]._rdata = address; // to the exception 584 585 log_printf(TRACE,Load_store_unit,FUNCTION," * speculative_access_queue"); 586 log_printf(TRACE,Load_store_unit,FUNCTION," * POP[%d]",(*_speculative_access_queue_control)[0]); 587 588 _speculative_access_queue [(*_speculative_access_queue_control)[0]]._state = SPECULATIVE_ACCESS_QUEUE_EMPTY; 589 590 _speculative_access_queue_control->pop(); 591 } 592 593 //================================================================ 594 // Interface "DCACHE_RSP" 595 //================================================================ 596 if ((PORT_READ(in_DCACHE_RSP_VAL)== 1) and 597 ( internal_DCACHE_RSP_ACK == 1)) 598 { 599 log_printf(TRACE,Load_store_unit,FUNCTION,"DCACHE_RSP"); 600 601 // don't use context_id : because there are one queue for all thread 602 //Tcontext_t context_id = PORT_READ(in_DCACHE_RSP_CONTEXT_ID); 603 Tpacket_t packet_id = PORT_READ(in_DCACHE_RSP_PACKET_ID ); 604 Tdcache_data_t rdata = PORT_READ(in_DCACHE_RSP_RDATA ); 605 Tdcache_error_t error = PORT_READ(in_DCACHE_RSP_ERROR ); 606 607 log_printf(TRACE,Load_store_unit,FUNCTION," * original packet_id : %d", packet_id); 608 609 if (DCACHE_RSP_IS_LOAD(packet_id) == 1) 610 { 611 packet_id >>= 1; 612 613 log_printf(TRACE,Load_store_unit,FUNCTION," * packet is a LOAD : %d", packet_id); 614 615 616 #ifdef DEBUG_TEST 617 if (not have_dcache_rsp(_load_queue [packet_id]._operation)) 618 throw ErrorMorpheo(_("Receive of respons, but the corresponding operation don't wait a respons.")); 619 #endif 620 621 622 if (error != 0) 623 { 624 log_printf(TRACE,Load_store_unit,FUNCTION," * have a bus error !!!"); 625 626 _load_queue [packet_id]._exception = EXCEPTION_MEMORY_BUS_ERROR; 627 _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT; 628 } 629 else 630 { 631 log_printf(TRACE,Load_store_unit,FUNCTION," * have no bus error."); 632 log_printf(TRACE,Load_store_unit,FUNCTION," * previous state : %d.",_load_queue [packet_id]._state); 633 634 // FIXME : convention : if bus error, the cache return the fautive address ! 635 // But, the load's address is aligned ! 636 _load_queue [packet_id]._rdata = rdata; 637 638 switch (_load_queue [packet_id]._state) 639 { 640 case LOAD_QUEUE_WAIT_CHECK : _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT_CHECK; break; 641 case LOAD_QUEUE_WAIT : _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT ; break; 642 default : throw ErrorMorpheo(_("Illegal state (dcache_rsp).")); break; 643 } 644 } 645 } 646 else 647 { 648 log_printf(TRACE,Load_store_unit,FUNCTION," * packet is a STORE"); 649 650 // TODO : les stores ne génére pas de réponse sauf quand c'est un bus error !!! 651 throw ERRORMORPHEO(FUNCTION,_("dcache_rsp : no respons to a write. (TODO : manage bus error to the store operation.)")); 652 } 653 654 } 655 656 // this register is to manage the priority of check -> Round robin 657 reg_LOAD_QUEUE_CHECK_PRIORITY = (reg_LOAD_QUEUE_CHECK_PRIORITY+1)%_param->_size_load_queue; 658 659 241 660 #if DEBUG>=DEBUG_TRACE 242 661 // ***** dump store queue 243 cout << "Dump store queue" << endl244 << "ptr_read : " << toString(static_cast<uint32_t>( internal_MEMORY_STORE_QUEUE_PTR_READ)) << endl;662 cout << "Dump STORE_QUEUE :" << endl 663 << "ptr_read : " << toString(static_cast<uint32_t>(reg_STORE_QUEUE_PTR_READ)) << endl; 245 664 246 665 for (uint32_t i=0; i<_param->_size_store_queue; i++) 247 666 { 248 uint32_t j = ( internal_MEMORY_STORE_QUEUE_PTR_READ+i)%_param->_size_store_queue;667 uint32_t j = (reg_STORE_QUEUE_PTR_READ+i)%_param->_size_store_queue; 249 668 cout << "{" << j << "}" << endl 250 669 << _store_queue[j] << endl; 251 670 } 671 672 // ***** dump speculative_access queue 673 cout << "Dump SPECULATIVE_ACCESS_QUEUE :" << endl; 674 675 for (uint32_t i=0; i<_param->_size_speculative_access_queue; i++) 676 { 677 uint32_t j = (*_speculative_access_queue_control)[i]; 678 cout << "{" << j << "}" << endl 679 << _speculative_access_queue[j] << endl; 680 } 681 682 // ***** dump load queue 683 cout << "Dump LOAD_QUEUE :" << endl 684 << "ptr_read_check_priority : " << toString(static_cast<uint32_t>(reg_LOAD_QUEUE_CHECK_PRIORITY)) << endl; 685 686 for (uint32_t i=0; i<_param->_size_load_queue; i++) 687 { 688 uint32_t j = i; 689 cout << "{" << j << "}" << endl 690 << _load_queue[j] << endl; 691 } 692 693 #endif 694 695 #ifdef STATISTICS 696 for (uint32_t i=0; i<_param->_size_store_queue; i++) 697 if (_store_queue[i]._state != STORE_QUEUE_EMPTY) 698 (*_stat_use_store_queue) ++; 699 for (uint32_t i=0; i<_param->_size_speculative_access_queue; i++) 700 if (_speculative_access_queue[i]._state != SPECULATIVE_ACCESS_QUEUE_EMPTY) 701 (*_stat_use_speculative_access_queue) ++; 702 for (uint32_t i=0; i<_param->_size_load_queue; i++) 703 if (_load_queue[i]._state != LOAD_QUEUE_EMPTY) 704 (*_stat_use_load_queue) ++; 252 705 #endif 253 706 } … … 266 719 }; // end namespace morpheo 267 720 #endif 268 //#endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_statistics_print.cpp
r59 r71 20 20 21 21 #undef FUNCTION 22 #define FUNCTION "Load_store_unit::statistics "23 string Load_store_unit::statistics (uint32_t depth)22 #define FUNCTION "Load_store_unit::statistics_print" 23 string Load_store_unit::statistics_print (uint32_t depth) 24 24 { 25 25 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_transition.cpp
r59 r71 28 28 (this->*function_transition) (); 29 29 30 #ifdef STATISTICS 31 _stat->add(); 32 #endif 33 34 #ifdef VHDL_TESTBENCH 35 vhdl_testbench_transition (); 30 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 31 end_cycle (); 36 32 #endif 37 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters.cpp
r59 r71 22 22 Parameters::Parameters (uint32_t size_store_queue , 23 23 uint32_t size_load_queue , 24 uint32_t size_speculative_access_queue, 24 25 uint32_t nb_port_check , 25 uint32_t size_speculative_access_queue,26 26 Tspeculative_load_t speculative_load , 27 27 uint32_t nb_context , 28 uint32_t nb_front_end , 29 uint32_t nb_ooo_engine , 28 30 uint32_t nb_packet , 29 31 uint32_t size_general_data , … … 38 40 _speculative_load (speculative_load ), 39 41 _nb_context (nb_context ), 42 _nb_front_end (nb_front_end ), 43 _nb_ooo_engine (nb_ooo_engine ), 40 44 _nb_packet (nb_packet ), 41 45 _size_general_data (size_general_data ), … … 44 48 _nb_type (nb_type ), 45 49 46 _size_address_store_queue ( static_cast<uint32_t>(ceil(log2(size_store_queue )))),47 _size_address_load_queue ( static_cast<uint32_t>(ceil(log2(size_load_queue )))),48 _size_address_speculative_access_queue ( static_cast<uint32_t>(ceil(log2(size_speculative_access_queue)))),50 _size_address_store_queue (log2(size_store_queue )), 51 _size_address_load_queue (log2(size_load_queue )), 52 _size_address_speculative_access_queue (log2(size_speculative_access_queue)), 49 53 50 _size_context_id (static_cast<uint32_t>(ceil(log2(nb_context )))), 51 _size_packet_id (static_cast<uint32_t>(ceil(log2(nb_packet )))), 52 _size_general_register (static_cast<uint32_t>(ceil(log2(nb_general_register)))), 53 _size_operation (static_cast<uint32_t>(ceil(log2(nb_operation )))), 54 _size_type (static_cast<uint32_t>(ceil(log2(nb_type )))) 54 _size_context_id (log2(nb_context )), 55 _size_front_end_id (log2(nb_front_end )), 56 _size_ooo_engine_id (log2(nb_ooo_engine )), 57 _size_packet_id (log2(nb_packet )), 58 _size_general_register (log2(nb_general_register)), 59 _size_operation (log2(nb_operation )), 60 _size_type (log2(nb_type )), 61 _size_dcache_context_id (_size_context_id + _size_front_end_id + _size_ooo_engine_id), 62 _size_dcache_packet_id ((log2((size_store_queue>size_load_queue)?size_store_queue:size_load_queue))+1), 63 64 _have_port_context_id (_size_context_id >0), 65 _have_port_front_end_id (_size_front_end_id >0), 66 _have_port_ooo_engine_id (_size_ooo_engine_id>0), 67 _have_port_packet_id (_size_packet_id >0), 68 _have_port_dcache_context_id (_size_dcache_context_id>0), 69 70 _mask_address_lsb (gen_mask<Tdcache_address_t>(log2(size_general_data/8))), 71 _mask_address_msb (gen_mask<Tdcache_address_t>(size_general_data) << log2(size_general_data/8)) 55 72 { 56 73 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); … … 68 85 _speculative_load (param._speculative_load ), 69 86 _nb_context (param._nb_context ), 87 _nb_front_end (param._nb_front_end ), 88 _nb_ooo_engine (param._nb_ooo_engine ), 70 89 _nb_packet (param._nb_packet ), 71 90 _size_general_data (param._size_general_data ), … … 78 97 _size_address_speculative_access_queue (param._size_address_speculative_access_queue), 79 98 80 _size_context_id (param._nb_context ), 81 _size_packet_id (param._nb_packet ), 82 _size_general_register (param._nb_general_register ), 83 _size_operation (param._nb_operation ), 84 _size_type (param._nb_type ) 99 _size_context_id (param._size_context_id ), 100 _size_front_end_id (param._size_front_end_id ), 101 _size_ooo_engine_id (param._size_ooo_engine_id ), 102 _size_packet_id (param._size_packet_id ), 103 _size_general_register (param._size_general_register ), 104 _size_operation (param._size_operation ), 105 _size_type (param._size_type ), 106 _size_dcache_context_id (param._size_dcache_context_id ), 107 _size_dcache_packet_id (param._size_dcache_packet_id ), 108 109 _have_port_context_id (param._have_port_context_id ), 110 _have_port_front_end_id (param._have_port_front_end_id ), 111 _have_port_ooo_engine_id (param._have_port_ooo_engine_id), 112 _have_port_packet_id (param._have_port_packet_id ), 113 114 _have_port_dcache_context_id(param._have_port_dcache_context_id), 115 116 _mask_address_lsb (param._mask_address_lsb), 117 _mask_address_msb (param._mask_address_msb) 85 118 { 86 119 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_msg_error.cpp
r59 r71 8 8 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h" 9 9 #include <sstream> 10 using namespace std;11 10 12 11 namespace morpheo { … … 22 21 #undef FUNCTION 23 22 #define FUNCTION "Load_store_unit::msg_error" 24 st ring Parameters::msg_error(void)23 std::string Parameters::msg_error(void) 25 24 { 26 25 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); 27 26 28 st ring msg = "";27 std::string msg = ""; 29 28 30 29 switch (_speculative_load) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Parameters_print.cpp
r59 r71 8 8 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Parameters.h" 9 9 #include "Behavioural/include/XML.h" 10 using namespace std;11 10 12 11 namespace morpheo { … … 22 21 #undef FUNCTION 23 22 #define FUNCTION "Load_store_unit::print" 24 st ring Parameters::print (uint32_t depth)23 std::string Parameters::print (uint32_t depth) 25 24 { 26 25 log_printf(FUNC,Load_store_unit,FUNCTION,"Begin"); … … 29 28 30 29 xml.balise_open("load_store_unit"); 31 xml.singleton_begin("size_store_queue "); xml.attribut("value",toString(_size_store_queue)); xml.singleton_end();32 xml.singleton_begin("size_load_queue "); xml.attribut("value",toString(_size_load_queue)); xml.singleton_end();30 xml.singleton_begin("size_store_queue "); xml.attribut("value",toString(_size_store_queue )); xml.singleton_end(); 31 xml.singleton_begin("size_load_queue "); xml.attribut("value",toString(_size_load_queue )); xml.singleton_end(); 33 32 xml.singleton_begin("size_speculative_access_queue"); xml.attribut("value",toString(_size_speculative_access_queue)); xml.singleton_end(); 34 xml.singleton_begin("nb_port_check "); xml.attribut("value",toString(_nb_port_check )); xml.singleton_end(); 35 xml.singleton_begin("speculative_load "); xml.attribut("value",toString(_speculative_load )); xml.singleton_end(); 36 xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); 37 xml.singleton_begin("nb_packet "); xml.attribut("value",toString(_nb_packet )); xml.singleton_end(); 38 xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data )); xml.singleton_end(); 39 xml.singleton_begin("nb_general_register "); xml.attribut("value",toString(_nb_general_register )); xml.singleton_end(); 40 xml.singleton_begin("nb_operation "); xml.attribut("value",toString(_nb_operation )); xml.singleton_end(); 41 xml.singleton_begin("nb_type "); xml.attribut("value",toString(_nb_type )); xml.singleton_end(); 33 xml.singleton_begin("nb_port_check "); xml.attribut("value",toString(_nb_port_check )); xml.singleton_end(); 34 xml.singleton_begin("speculative_load "); xml.attribut("value",toString(_speculative_load )); xml.singleton_end(); 35 xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); 36 xml.singleton_begin("nb_front_end "); xml.attribut("value",toString(_nb_front_end )); xml.singleton_end(); 37 xml.singleton_begin("nb_ooo_engine "); xml.attribut("value",toString(_nb_ooo_engine )); xml.singleton_end(); 38 xml.singleton_begin("nb_packet "); xml.attribut("value",toString(_nb_packet )); xml.singleton_end(); 39 xml.singleton_begin("size_general_data "); xml.attribut("value",toString(_size_general_data )); xml.singleton_end(); 40 xml.singleton_begin("nb_general_register "); xml.attribut("value",toString(_nb_general_register )); xml.singleton_end(); 41 xml.singleton_begin("nb_operation "); xml.attribut("value",toString(_nb_operation )); xml.singleton_end(); 42 xml.singleton_begin("nb_type "); xml.attribut("value",toString(_nb_type )); xml.singleton_end(); 42 43 xml.balise_close(); 43 44 … … 49 50 #undef FUNCTION 50 51 #define FUNCTION "Load_store_unit::operator<<" 51 ostream& operator<< (ostream& output_stream ,52 std::ostream& operator<< (std::ostream& output_stream , 52 53 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_execute_unit::execute_unit::load_store_unit::Parameters & x) 53 54 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_bypass_memory.cfg
r70 r71 6 6 4 4 *4 # nb_ooo_engine 7 7 64 64 *2 # nb_packet 8 16 16+1 # size_general_data9 16 16+1 # size_special_data10 8 8*2 # nb_general_register11 8 8+1 # nb_special_register8 32 32 +1 # size_general_data 9 2 2 +1 # size_special_data 10 256 256 *2 # nb_general_register 11 32 32 +1 # nb_special_register 12 12 8 8 +1 # nb_operation 13 13 4 4 +1 # nb_type -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_bypass_write.cfg
r70 r71 6 6 4 4 *4 # nb_ooo_engine 7 7 64 64 *2 # nb_packet 8 16 16+1 # size_general_data9 16 16+1 # size_special_data10 8 8*2 # nb_general_register11 8 8+1 # nb_special_register8 32 32 +1 # size_general_data 9 2 2 +1 # size_special_data 10 256 256 *2 # nb_general_register 11 32 32 +1 # nb_special_register 12 12 8 8 +1 # nb_operation 13 13 4 4 +1 # nb_type -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_retire2.cfg
r70 r71 6 6 4 4 *4 # nb_ooo_engine 7 7 64 64 *2 # nb_packet 8 16 16+1 # size_general_data9 16 16+1 # size_special_data10 8 8*2 # nb_general_register11 8 8+1 # nb_special_register8 32 32 +1 # size_general_data 9 2 2 +1 # size_special_data 10 256 256 *2 # nb_general_register 11 32 32 +1 # nb_special_register 12 12 8 8 +1 # nb_operation 13 13 4 4 +1 # nb_type -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_retire4.cfg
r70 r71 6 6 4 4 *4 # nb_ooo_engine 7 7 64 64 *2 # nb_packet 8 16 16+1 # size_general_data9 16 16+1 # size_special_data10 8 8*2 # nb_general_register11 8 8+1 # nb_special_register8 32 32 +1 # size_general_data 9 2 2 +1 # size_special_data 10 256 256 *2 # nb_general_register 11 32 32 +1 # nb_special_register 12 12 8 8 +1 # nb_operation 13 13 4 4 +1 # nb_type -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg
r70 r71 6 6 4 4 *4 # nb_ooo_engine 7 7 64 64 *2 # nb_packet 8 16 16+1 # size_general_data9 16 16+1 # size_special_data10 8 8*2 # nb_general_register11 8 8+1 # nb_special_register8 32 32 +1 # size_general_data 9 2 2 +1 # size_special_data 10 256 256 *2 # nb_general_register 11 32 32 +1 # nb_special_register 12 12 8 8 +1 # nb_operation 13 13 4 4 +1 # nb_type -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/SelfTest/src/test.cpp
r44 r71 32 32 exit (EXIT_FAILURE); 33 33 } 34 #ifdef STATISTICS 35 morpheo::behavioural::Parameters_Statistics * param_stat = new morpheo::behavioural::Parameters_Statistics (5,50); 36 #endif 37 34 38 Counter * _Counter = new Counter (name.c_str(), 35 39 #ifdef STATISTICS 36 morpheo::behavioural::Parameters_Statistics(5,50),40 param_stat, 37 41 #endif 38 42 param); … … 119 123 TEST(Tdata_t,DATA_OUT [i].read(),data_out [i]); 120 124 121 cout << dec << endl;125 cout << std::dec << endl; 122 126 } 123 127 … … 136 140 137 141 delete _Counter; 142 #ifdef STATISTICS 143 delete param_stat; 144 #endif 145 138 146 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Counter.h
r44 r71 20 20 #include "Behavioural/Generic/Counter/include/Types.h" 21 21 #ifdef STATISTICS 22 #include "Behavioural/ Generic/Counter/include/Statistics.h"22 #include "Behavioural/include/Stat.h" 23 23 #endif 24 24 #ifdef VHDL … … 44 44 45 45 protected : const Parameters _param; 46 //#ifdef STATISTICS47 // protected : const morpheo::behavioural::Parameters_Statistics _param_statistics;48 //#endif49 46 50 47 #ifdef STATISTICS 51 private : Stat istics* _stat;48 private : Stat * _stat; 52 49 #endif 53 50 … … 81 78 #endif 82 79 #ifdef STATISTICS 83 morpheo::behavioural::Parameters_Statistics param_statistics,80 morpheo::behavioural::Parameters_Statistics * param_statistics, 84 81 #endif 85 82 Parameters param ); … … 98 95 #endif 99 96 #ifdef STATISTICS 100 public : string statistics (uint32_t depth); 97 public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); 98 public : string statistics_print (uint32_t depth); 101 99 #endif 102 100 … … 108 106 #endif 109 107 110 #if def VHDL_TESTBENCH111 private : void vhdl_testbench_transition(void);108 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 109 private : void end_cycle (void); 112 110 #endif 113 111 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter.cpp
r67 r71 20 20 #endif 21 21 #ifdef STATISTICS 22 morpheo::behavioural::Parameters_Statistics 22 morpheo::behavioural::Parameters_Statistics * param_statistics, 23 23 #endif 24 24 morpheo::behavioural::generic::counter::Parameters param ): 25 25 _name (name) 26 26 ,_param (param) 27 // #ifdef STATISTICS28 // ,_param_statistics (param_statistics)29 // #endif30 27 { 31 28 log_printf(FUNC,Counter,"Counter","Begin"); … … 37 34 #ifdef STATISTICS 38 35 // Allocation of statistics 39 _stat = new Statistics (static_cast<string>(_name), 40 param_statistics , 41 param); 36 statistics_declaration(param_statistics); 42 37 #endif 43 38 … … 82 77 83 78 #ifdef STATISTICS 84 _stat->generate_file(statistics(0));85 86 79 delete _stat; 87 80 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_end_cycle.cpp
r59 r71 1 #if def VHDL_TESTBENCH1 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 2 2 /* 3 3 * $Id$ … … 15 15 16 16 17 void Counter:: vhdl_testbench_transition()17 void Counter::end_cycle () 18 18 { 19 log_printf(FUNC,Counter," vhdl_testbench_transition","Begin");19 log_printf(FUNC,Counter,"end_cycle","Begin"); 20 20 21 // sc_start(0); 21 #ifdef STATISTICS 22 _stat->end_cycle(); 23 #endif 22 24 25 #ifdef VHDL_TESTBENCH 26 // Evaluation before read the ouput signal 27 // sc_start(0); 23 28 _interfaces->testbench(); 29 #endif 24 30 25 log_printf(FUNC,Counter," vhdl_testbench_transition","End");31 log_printf(FUNC,Counter,"end_cycle","End"); 26 32 }; 27 33 28 34 }; // end namespace counter 29 35 }; // end namespace generic 30 31 36 }; // end namespace behavioural 32 37 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_statistics_print.cpp
r59 r71 14 14 namespace counter { 15 15 16 string Counter::statistics (uint32_t depth) 16 #undef FUNCTION 17 #define FUNCTION "Counter::statistics_print" 18 string Counter::statistics_print (uint32_t depth) 17 19 { 18 log_printf(FUNC,Counter, "statistics","Begin");20 log_printf(FUNC,Counter,FUNCTION,"Begin"); 19 21 20 22 string txt = _stat->print(depth); 21 22 log_printf(FUNC,Counter, "statistics","End");23 24 log_printf(FUNC,Counter,FUNCTION,"End"); 23 25 24 26 return txt; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_transition.cpp
r2 r71 20 20 log_printf(FUNC,Counter,"transition","Begin"); 21 21 22 #ifdef STATISTICS 23 _stat->add(); 24 #endif 25 26 #ifdef VHDL_TESTBENCH 27 vhdl_testbench_transition (); 28 #endif 22 end_cycle(); 29 23 30 24 log_printf(FUNC,Counter,"transition","End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/Makefile.deps
r53 r71 13 13 include $(DIR_MORPHEO)/Behavioural/Makefile.deps 14 14 endif 15 ifndef Group16 include $(DIR_MORPHEO)/Behavioural/Generic/Group/Makefile.deps17 endif18 15 19 16 #-----[ Library ]------------------------------------------ 20 17 RegisterFile_Monolithic_LIBRARY = -lRegisterFile_Monolithic \ 21 $(Group_LIBRARY) \22 18 $(Behavioural_LIBRARY) 23 19 24 20 RegisterFile_Monolithic_DIR_LIBRARY = -L$(DIR_MORPHEO)/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/lib \ 25 $(Group_DIR_LIBRARY) \26 21 $(Behavioural_DIR_LIBRARY) 27 22 … … 31 26 @\ 32 27 $(MAKE) Behavioural_library; \ 33 $(MAKE) Group_library; \34 28 $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic --makefile=Makefile; 35 29 … … 37 31 @\ 38 32 $(MAKE) Behavioural_library_clean; \ 39 $(MAKE) Group_library_clean; \40 33 $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic --makefile=Makefile clean; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp
r62 r71 34 34 35 35 #ifdef STATISTICS 36 morpheo::behavioural::Parameters_Statistics * _param_stat = new morpheo::behavioural::Parameters_Statistics (5,100 0);36 morpheo::behavioural::Parameters_Statistics * _param_stat = new morpheo::behavioural::Parameters_Statistics (5,100); 37 37 #endif 38 38 RegisterFile_Monolithic * registerfile = new RegisterFile_Monolithic (name.c_str() -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h
r57 r71 21 21 #include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Types.h" 22 22 #ifdef STATISTICS 23 #include "Behavioural/ Generic/RegisterFile/RegisterFile_Monolithic/include/Statistics.h"23 #include "Behavioural/include/Stat.h" 24 24 #endif 25 25 #include "Behavioural/include/Component.h" … … 51 51 52 52 #ifdef STATISTICS 53 private : Stat istics* _stat;53 private : Stat * _stat; 54 54 55 private : uint32_t _stat_nb_read; 56 private : uint32_t _stat_nb_write; 55 private : counter_t * _stat_nb_read; 56 private : counter_t * _stat_nb_write; 57 private : counter_t * _stat_average_read ; 58 private : counter_t * _stat_average_write; 59 private : counter_t * _stat_percent_use_read ; 60 private : counter_t * _stat_percent_use_write; 57 61 #endif 58 62 … … 123 127 124 128 #ifdef STATISTICS 125 public : string statistics (uint32_t depth); 129 public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); 130 public : string statistics_print (uint32_t depth); 126 131 #endif 132 127 133 #if VHDL 128 134 private : void vhdl (void); … … 131 137 #endif 132 138 133 #ifdef VHDL_TESTBENCH 134 private : void vhdl_testbench_transition (void); 135 #endif 139 private : void end_cycle (void); 136 140 137 141 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic.cpp
r66 r71 37 37 38 38 #ifdef STATISTICS 39 _stat = new Statistics (static_cast<string>(_name), 40 param_statistics , 41 param); 39 statistics_declaration(param_statistics); 42 40 #endif 43 41 … … 71 69 } 72 70 73 # 71 # ifdef SYSTEMCASS_SPECIFIC 74 72 // List dependency information 75 73 for (uint32_t i=0; i<_param->_nb_port_read; i++) … … 86 84 (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_ADDRESS [i])); 87 85 } 88 # 86 # endif 89 87 90 88 for (uint32_t i=0; i<_param->_nb_port_read ; i++) … … 105 103 if (_usage & USE_STATISTICS) 106 104 { 107 _stat->generate_file(statistics(0));108 105 delete _stat; 109 106 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_end_cycle.cpp
r59 r71 1 #ifdef VHDL_TESTBENCH2 1 /* 3 2 * $Id$ … … 15 14 namespace registerfile_monolithic { 16 15 17 void RegisterFile_Monolithic:: vhdl_testbench_transition(void)16 void RegisterFile_Monolithic::end_cycle (void) 18 17 { 18 log_printf(FUNC,RegisterFile,"end_cycle","Begin"); 19 20 #ifdef STATISTICS 21 _stat->end_cycle(); 22 #endif 23 24 #ifdef VHDL_TESTBENCH 19 25 // Evaluation before read the ouput signal 20 26 21 27 // sc_start(0); 22 28 _interfaces->testbench(); 29 #endif 30 31 log_printf(FUNC,RegisterFile,"end_cycle","End"); 23 32 }; 24 33 … … 28 37 }; // end namespace behavioural 29 38 }; // end namespace morpheo 30 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_genMealy_read.cpp
r62 r71 19 19 log_printf(FUNC,RegisterFile,"genMealy_read","Begin"); 20 20 21 #ifdef STATISTICS22 _stat_nb_read = 0;23 #endif24 25 21 for (uint32_t i=0; i<_param->_nb_port_read; i++) 26 22 { … … 38 34 39 35 #ifdef STATISTICS 40 _stat_nb_read++;36 (*_stat_nb_read) ++; 41 37 #endif 42 38 // Write in registerFile … … 68 64 69 65 log_printf(TRACE,RegisterFile,"genMealy_read","[%d] -> %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 70 71 #ifdef STATISTICS72 _stat_nb_read ++;73 #endif74 // Write in registerFile75 76 66 } 77 67 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_statistics_print.cpp
r59 r71 15 15 namespace registerfile_monolithic { 16 16 17 string RegisterFile_Monolithic::statistics (uint32_t depth)17 string RegisterFile_Monolithic::statistics_print (uint32_t depth) 18 18 { 19 19 return _stat->print(depth); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp
r62 r71 17 17 { 18 18 log_printf(FUNC,RegisterFile,"transition","Begin"); 19 #ifdef STATISTICS20 _stat_nb_write = 0;21 #endif22 19 23 20 for (uint32_t i=0; i<_param->_nb_port_write; i++) … … 27 24 { 28 25 #ifdef STATISTICS 29 _stat_nb_write++;26 (*_stat_nb_write) ++; 30 27 #endif 31 28 … … 47 44 { 48 45 // Have a read_write? 49 if ( (PORT_READ(in_READ_WRITE_VAL[i]) == true) and 50 (PORT_READ(in_READ_WRITE_RW [i]) == RW_WRITE)) 51 { 46 if (PORT_READ(in_READ_WRITE_VAL[i]) == true) 47 { 48 if (PORT_READ(in_READ_WRITE_RW [i]) == RW_WRITE) 49 { 52 50 #ifdef STATISTICS 53 _stat_nb_write++;51 (*_stat_nb_write) ++; 54 52 #endif 55 56 Taddress_t address; 57 if (_param->_have_port_address) 58 address = PORT_READ(in_READ_WRITE_ADDRESS[i]); 53 54 Taddress_t address; 55 if (_param->_have_port_address) 56 address = PORT_READ(in_READ_WRITE_ADDRESS[i]); 57 else 58 address = 0; 59 Tdata_t data = PORT_READ(in_READ_WRITE_WDATA [i]); 60 61 log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 62 63 // Write in registerFile 64 REGISTER_WRITE(reg_DATA[address],data); 65 } 66 #ifdef STATISTICS 59 67 else 60 address = 0; 61 Tdata_t data = PORT_READ(in_READ_WRITE_WDATA [i]); 62 63 log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 64 65 // Write in registerFile 66 REGISTER_WRITE(reg_DATA[address],data); 67 } 68 { 69 (*_stat_nb_read) ++; 70 } 71 #endif 72 } 68 73 } 69 74 70 75 #ifdef STATISTICS 71 _stat->add(_stat_nb_read,_stat_nb_write); 76 for (uint32_t i=0; i<_param->_nb_port_read; i++) 77 if ( PORT_READ(in_READ_VAL [i]) == 1) 78 (*_stat_nb_read) ++; 72 79 #endif 73 80 74 #ifdef VHDL_TESTBENCH 75 vhdl_testbench_transition (); 76 #endif 81 end_cycle(); 82 77 83 log_printf(FUNC,RegisterFile,"transition","End"); 78 84 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Component
r48 r71 9 9 #-----[ Rules ]-------------------------------------------- 10 10 .PRECIOUS : $(DIR_LIB)/%.a 11 .NOPARALLEL : clean help11 #.NOTPARALLEL : clean help 12 12 13 13 all_component : test_env $(DIR_OBJ) $(DIR_LIB) $(OBJECTS) $(HEADERS) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Selftest
r68 r71 27 27 #-----[ Rules ]-------------------------------------------- 28 28 .PRECIOUS : $(DIR_BIN)/%.x $(DIR_LOG)/%.exec.log 29 .NOPARALLEL : clean clean_all help29 #.NOTPARALLEL : clean clean_all help 30 30 31 31 all_selftest : test_env $(DIR_OBJ) $(DIR_BIN) $(DIR_LOG) … … 181 181 @\ 182 182 $(MAKE) common_help ; \ 183 $(MAKE) synthesis_help;\ 183 $(MAKE) synthesis_help;\ 184 184 $(MAKE) selftest_help; 185 185 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.deps
r53 r71 10 10 Behavioural = yes 11 11 12 #ifndef Behavioural 13 #include $(DIR_MORPHEO)/Behavioural/Makefile.deps14 #endif12 ifndef Common 13 include $(DIR_MORPHEO)/Common/Makefile.deps 14 endif 15 15 16 16 #-----[ Library ]------------------------------------------ 17 17 Behavioural_LIBRARY = -lBehavioural 18 18 19 # $(Common_LIBRARY)20 21 19 Behavioural_DIR_LIBRARY = -L$(DIR_MORPHEO)/Behavioural/lib 22 20 23 # $(Common_DIR_LIBRARY) 21 Behavioural_DEPENDENCIES = Common_library 22 23 Behavioural_CLEAN = Common_library_clean 24 24 25 25 26 #-----[ Rules ]-------------------------------------------- 26 27 27 Behavioural_library : 28 #.NOTPARALLEL : Behavioural_library Behavioural_library_clean 29 30 Behavioural_library : $(Behavioural_DEPENDENCIES) 28 31 @\ 29 32 $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural --makefile=Makefile ; 30 31 # @$(MAKE) Common_library32 33 33 Behavioural_library_clean : 34 Behavioural_library_clean : $(Behavioural_CLEAN) 34 35 @\ 35 36 $(MAKE) --directory=$(DIR_MORPHEO)/Behavioural --makefile=Makefile clean; 36 37 # @$(MAKE) Common_library_clean -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags
r67 r71 19 19 -DVHDL_TESTBENCH \ 20 20 -DVHDL_TESTBENCH_ASSERT \ 21 -DSTATISTICS \ 21 22 -DDEBUG=DEBUG_TRACE 22 23 # 23 # -DSTATISTICS \24 # 24 25 # -DCONFIGURATION \ 25 26 # -DPOSITION \ … … 34 35 # POSITION - To generate a position's files (it's input of viewer) 35 36 # CONFIGURATION - To generate a configuration's file (it's input of viewer and generator) 37 # NO_TRANSLATE - No translate message -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/Makefile
r23 r71 2 2 # $Id$ 3 3 # 4 # [ 4 # [ Description ] 5 5 # 6 6 # Makefile 7 7 # 8 8 9 #-----[ 9 #-----[ Directory ]---------------------------------------- 10 10 DIR_COMPONENT = ./ 11 11 include $(DIR_COMPONENT)/Makefile.defs 12 12 13 #-----[ 13 #-----[ Library ]------------------------------------------ 14 14 LIBRARY = $(DIR_LIB)/lib@COMPONENT.a 15 15 16 16 17 #-----[ 17 #-----[ include ]------------------------------------------ 18 18 19 19 all : -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/Makefile.defs
r23 r71 2 2 # $Id$ 3 3 # 4 # [ 4 # [ Description ] 5 5 # 6 6 # Makefile 7 7 # 8 8 9 #-----[ 9 #-----[ Directory ]---------------------------------------- 10 10 DIR_COMPONENT_MORPHEO = @DIR_MORPHEO 11 11 DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/Makefile.deps
r62 r71 2 2 # $Id$ 3 3 # 4 # [ 4 # [ Description ] 5 5 # 6 6 # Makefile … … 14 14 endif 15 15 16 #-----[ 16 #-----[ Library ]------------------------------------------ 17 17 @COMPONENT_LIBRARY = -l@COMPONENT \ 18 18 $(Behavioural_LIBRARY) … … 25 25 @COMPONENT_CLEAN = Behavioural_library_clean 26 26 27 #-----[ 27 #-----[ Rules ]-------------------------------------------- 28 28 29 29 .NOTPARALLEL : @COMPONENT_library @COMPONENT_library_clean -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/Makefile
r23 r71 2 2 # $Id$ 3 3 # 4 # [ 4 # [ Description ] 5 5 # 6 6 # Makefile 7 7 # 8 8 9 #-----[ 9 #-----[ Directory ]---------------------------------------- 10 10 DIR_COMPONENT = ../ 11 11 include $(DIR_COMPONENT)/Makefile.defs … … 15 15 DIR_LIBRARY = $(@COMPONENT_DIR_LIBRARY) 16 16 17 #-----[ 17 #-----[ include ]------------------------------------------ 18 18 19 19 all : … … 24 24 library_clean : @COMPONENT_library_clean 25 25 26 include ../Makefile.deps26 include $(DIR_COMPONENT)/Makefile.deps 27 27 include $(DIR_MORPHEO)/Behavioural/Makefile.flags 28 28 include $(DIR_MORPHEO)/Behavioural/Makefile.Common -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/include/test.h
r50 r71 15 15 #include <sys/time.h> 16 16 17 #include "Common/include/Time.h" 17 18 #include "Behavioural/@DIRECTORY/include/@COMPONENT.h" 18 19 … … 25 26 void test (string name, 26 27 morpheo::behavioural::@NAMESPACE_USE::Parameters * param); 27 28 class Time29 {30 private : timeval time_begin;31 // private : timeval time_end;32 33 public : Time ()34 {35 gettimeofday(&time_begin ,NULL);36 };37 38 public : ~Time ()39 {40 cout << *this;41 };42 43 public : friend ostream& operator<< (ostream& output_stream,44 const Time & x)45 {46 timeval time_end;47 48 gettimeofday(&time_end ,NULL);49 50 uint32_t nb_cycles = static_cast<uint32_t>(sc_simulation_time());51 52 double average = static_cast<double>(nb_cycles) / static_cast<double>(time_end.tv_sec-x.time_begin.tv_sec);53 54 output_stream << nb_cycles << "\t(" << average << " cycles / seconds )" << endl;55 56 return output_stream;57 }58 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/src/main.cpp
r62 r71 12 12 void usage (int argc, char * argv[]) 13 13 { 14 cerr << "<Usage> " << argv[0] << " name_instance list_params" << endl 15 << "list_params is :" << endl 16 // << " - size_data (unsigned int)" << endl 17 // << " - nb_port (unsigned int)" << endl; 18 << "" << endl; 19 20 for (int i=0; i<argc; i++) 21 cerr << argv[i] << " "; 22 cerr << endl; 14 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 15 err (_("list_params is :\n")); 23 16 24 17 exit (1); … … 47 40 ); 48 41 49 cout << param->print(1);42 msg(_("%s"),param->print(1).c_str()): 50 43 51 44 test (name,param); … … 53 46 catch (morpheo::ErrorMorpheo & error) 54 47 { 55 cout << "<" << name << "> : " << error.what ();48 msg (_("<%s> : %s.\n"),name, error.what ()); 56 49 exit (EXIT_FAILURE); 57 50 } 58 51 catch (...) 59 52 { 60 cerr << "<" << name << "> : This test must generate a error" << endl; 53 54 err (_("<%s> : This test must generate a error.\n"),name); 61 55 exit (EXIT_FAILURE); 62 56 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/src/test.cpp
r67 r71 13 13 #define CYCLE_MAX (128*NB_ITERATION) 14 14 15 #define LABEL(str) 16 {\17 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} " << str << endl;\15 #define LABEL(str) \ 16 { \ 17 msg (_("{%d} %s\n"),static_cast<uint32_t>(sc_simulation_time()),str); \ 18 18 } while(0) 19 19 20 static uint32_t cycle = 0; 21 22 #define SC_START(cycle_offset) \ 23 do \ 24 { \ 25 /*cout << "SC_START (begin)" << endl;*/ \ 26 \ 27 uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \ 28 if (cycle_current != cycle) \ 29 { \ 30 cycle = cycle_current; \ 31 cout << "##########[ cycle "<< cycle << " ]" << endl; \ 32 } \ 33 \ 34 if (cycle_current > CYCLE_MAX) \ 35 { \ 36 TEST_KO("Maximal cycles Reached"); \ 37 } \ 38 sc_start(cycle_offset); \ 39 /*cout << "SC_START (end )" << endl;*/ \ 40 } while(0) 20 #define SC_START(cycle_offset) \ 21 do \ 22 { \ 23 /*cout << "SC_START (begin)" << endl;*/ \ 24 \ 25 uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \ 26 if (cycle_offset != 0) \ 27 { \ 28 cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \ 29 } \ 30 \ 31 if (cycle_current > CYCLE_MAX) \ 32 { \ 33 TEST_KO("Maximal cycles Reached"); \ 34 } \ 35 \ 36 sc_start(cycle_offset); \ 37 \ 38 /*cout << "SC_START (end )" << endl;*/ \ 39 } while(0) 41 40 42 41 void test (string name, 43 42 morpheo::behavioural::@NAMESPACE_USE::Parameters * _param) 44 43 { 45 cout << "<" << name << "> : Simulation SystemC" << endl;44 msg(_("<%s> : Simulation SystemC.\n"),name.c_str()); 46 45 47 46 #ifdef STATISTICS … … 68 67 ********************************************************/ 69 68 70 cout << "<" << name << "> Instanciation of _@COMPONENT" << endl;71 69 msg(_("<%s> : Instanciation of _@COMPONENT.\n"),name.c_str()); 70 72 71 (*(_@COMPONENT->in_CLOCK)) (*(in_CLOCK)); 73 72 (*(_@COMPONENT->in_NRESET)) (*(in_NRESET)); 74 73 75 74 76 cout << "<" << name << "> Start Simulation ............" << endl; 75 msg(_("<%s> : Start Simulation ............\n"),name.c_str()); 76 77 77 Time * _time = new Time(); 78 78 … … 111 111 TEST_OK ("End of Simulation"); 112 112 delete _time; 113 cout << "<" << name << "> ............ Stop Simulation" << endl; 113 114 msg(_("<%s> : ............ Stop Simulation\n"),name.c_str()); 114 115 115 116 delete in_CLOCK; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/include/New_Component.h
r69 r71 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ … … 20 20 #include "Behavioural/@DIRECTORY/include/Parameters.h" 21 21 #ifdef STATISTICS 22 #include "Behavioural/ @DIRECTORY/include/Statistics.h"22 #include "Behavioural/include/Stat.h" 23 23 #endif 24 24 #include "Behavioural/include/Component.h" … … 27 27 #endif 28 28 #include "Behavioural/include/Usage.h" 29 30 using namespace std;31 29 32 30 namespace morpheo { … … 40 38 #endif 41 39 { 42 // -----[ 40 // -----[ fields ]---------------------------------------------------- 43 41 // Parameters 44 protected : const st ring_name;42 protected : const std::string _name; 45 43 protected : const Parameters * _param; 46 44 private : const Tusage_t _usage; 47 45 48 //#ifdef STATISTICS49 // protected : const morpheo::behavioural::Parameters_Statistics * _param_statistics;50 //#endif51 52 46 #ifdef STATISTICS 53 private : Stat istics* _stat;47 private : Stat * _stat; 54 48 #endif 55 49 … … 58 52 59 53 #ifdef SYSTEMC 60 // ~~~~~[ 54 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 61 55 // Interface 62 56 public : SC_CLOCK * in_CLOCK ; 63 57 public : SC_IN (Tcontrol_t) * in_NRESET ; 64 58 65 // ~~~~~[ 59 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 66 60 67 // ~~~~~[ 61 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 68 62 69 // ~~~~~[ 63 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 70 64 #endif 71 65 72 // -----[ methods ]---------------------------------------------------66 // -----[ Methods ]--------------------------------------------------- 73 67 74 68 #ifdef SYSTEMC … … 80 74 sc_module_name name, 81 75 #else 82 st ringname,76 std::string name, 83 77 #endif 84 78 #ifdef STATISTICS … … 99 93 #endif 100 94 #ifdef STATISTICS 101 public : string statistics (uint32_t depth); 95 public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics); 96 public : std::string statistics_print (uint32_t depth); 102 97 #endif 103 98 … … 108 103 #endif 109 104 105 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 110 106 private : void end_cycle (void); 107 #endif 111 108 }; 112 109 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component.cpp
r68 r71 30 30 ,_param (param) 31 31 ,_usage (usage) 32 // #ifdef STATISTICS33 // ,_param_statistics (param_statistics)34 // #endif35 32 { 36 33 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); … … 43 40 { 44 41 log_printf(INFO,@COMPONENT,FUNCTION,"Allocation of statistics"); 45 46 // Allocation of statistics 47 _stat = new Statistics (static_cast<string>(_name), 48 param_statistics , 49 param); 42 43 statistics_declaration(param_statistics); 50 44 } 51 45 #endif … … 90 84 log_printf(INFO,@COMPONENT,FUNCTION,"Generate Statistics file"); 91 85 92 _stat->generate_file(statistics(0));93 86 delete _stat; 94 87 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_end_cycle.cpp
r69 r71 1 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 1 2 /* 2 3 * $Id$ 3 4 * 4 * [ 5 * [ Description ] 5 6 * 6 7 */ … … 19 20 20 21 #ifdef STATISTICS 21 _stat-> add();22 _stat->end_cycle(); 22 23 #endif 23 24 … … 34 35 }; // end namespace behavioural 35 36 }; // end namespace morpheo 37 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_statistics_print.cpp
r59 r71 3 3 * $Id$ 4 4 * 5 * [ 5 * [ Description ] 6 6 * 7 7 */ … … 14 14 15 15 #undef FUNCTION 16 #define FUNCTION "@COMPONENT::statistics "17 st ring @COMPONENT::statistics(uint32_t depth)16 #define FUNCTION "@COMPONENT::statistics_print" 17 std::string @COMPONENT::statistics_print (uint32_t depth) 18 18 { 19 19 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); 20 20 21 st ring txt = _stat->print(depth);21 std::string txt = _stat->print(depth); 22 22 23 23 log_printf(FUNC,@COMPONENT,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_transition.cpp
r69 r71 20 20 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); 21 21 22 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 22 23 end_cycle (); 24 #endif 23 25 24 26 log_printf(FUNC,@COMPONENT,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/Parameters_msg_error.cpp
r57 r71 9 9 #include "Behavioural/@DIRECTORY/include/Parameters.h" 10 10 #include <sstream> 11 using namespace std;12 11 13 12 namespace morpheo { … … 17 16 #undef FUNCTION 18 17 #define FUNCTION "@COMPONENT::msg_error" 19 st ring Parameters::msg_error(void)18 std::string Parameters::msg_error(void) 20 19 { 21 20 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); 22 21 23 st ring msg = "";22 std::string msg = ""; 24 23 25 24 return msg; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/Parameters_print.cpp
r53 r71 8 8 #include "Behavioural/@DIRECTORY/include/Parameters.h" 9 9 #include "Behavioural/include/XML.h" 10 using namespace std;11 10 12 11 namespace morpheo { … … 16 15 #undef FUNCTION 17 16 #define FUNCTION "@COMPONENT::print" 18 st ring Parameters::print (uint32_t depth)17 std::string Parameters::print (uint32_t depth) 19 18 { 20 19 log_printf(FUNC,@COMPONENT,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Component.h
r62 r71 21 21 #include "Common/include/Debug.h" 22 22 #include "Behavioural/include/Usage.h" 23 24 using namespace std;25 23 26 24 namespace morpheo { … … 53 51 public : ~Component (); 54 52 55 public : Entity * set_entity (st ring name56 ,st ring type53 public : Entity * set_entity (std::string name 54 ,std::string type 57 55 #ifdef POSITION 58 56 ,schema_t schema 59 57 #endif 60 58 ); 61 private : st ring get_entity (void);59 private : std::string get_entity (void); 62 60 63 61 public : void set_component (Component * component … … 71 69 ); 72 70 73 private : st ring get_component (void);71 private : std::string get_component (void); 74 72 75 private : Entity * find_entity (st ring name);76 //private : Interface * find_interface (st ring name ,73 private : Entity * find_entity (std::string name); 74 //private : Interface * find_interface (std::string name , 77 75 // Entity * entity); 78 76 … … 85 83 Signal * signal_productor); 86 84 87 public : void port_map (st ring component_src ,88 st ring port_src ,89 st ring component_dest,90 st ring port_dest );91 public : void port_map (st ring component_src ,92 st ring port_src );85 public : void port_map (std::string component_src , 86 std::string port_src , 87 std::string component_dest, 88 std::string port_dest ); 89 public : void port_map (std::string component_src , 90 std::string port_src ); 93 91 94 92 public : bool test_map (void); 95 93 96 94 #ifdef POSITION 97 public : void interface_map (st ring component_src ,98 st ring port_dest,99 st ring component_dest,100 st ring port_dest );95 public : void interface_map (std::string component_src , 96 std::string port_dest, 97 std::string component_dest, 98 std::string port_dest ); 101 99 102 100 public : XML toXML (void); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Configuration_Parameters.h
r44 r71 15 15 #include "Common/include/ErrorMorpheo.h" 16 16 #include "Common/include/ToString.h" 17 using namespace std;18 17 19 18 namespace morpheo { … … 24 23 // -----[ fields ]---------------------------------------------------- 25 24 // Constant 26 public : const st ring _name ;25 public : const std::string _name ; 27 26 public : const uint32_t _value ; 28 27 public : const uint32_t _min ; 29 28 public : const uint32_t _max ; 30 public : const st ring _step ;29 public : const std::string _step ; 31 30 public : const uint32_t _default; 32 31 public : const uint32_t _level ; 33 public : const st ring _comment;32 public : const std::string _comment; 34 33 35 34 // -----[ methods ]--------------------------------------------------- 36 public : Configuration_Parameters (st ring name ,35 public : Configuration_Parameters (std::string name , 37 36 uint32_t value , 38 37 uint32_t min , 39 38 uint32_t max , 40 st ring step ,39 std::string step , 41 40 uint32_t value_default, 42 41 uint32_t level , 43 st ring comment);42 std::string comment); 44 43 public : ~Configuration_Parameters (); 45 44 46 45 // methods to print and test parameters_configuration 47 public : st ring print (uint32_t depth);46 public : std::string print (uint32_t depth); 48 47 public : friend ostream& operator<< (ostream& output_stream, 49 48 morpheo::behavioural::Configuration_Parameters & x); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h
r62 r71 11 11 12 12 //-------------------------------------------------------[ Memory ]----- 13 #define OPERATION_MEMORY_LOAD 0x0 // 000_0000 13 14 #define OPERATION_MEMORY_LOAD_8_Z 0x0 // 000_0000 14 15 #define OPERATION_MEMORY_LOAD_16_Z 0x20 // 010_0000 … … 55 56 (x == OPERATION_MEMORY_STORE_HEAD_KO)) 56 57 58 #define is_operation_memory_load_signed(x) \ 59 ((x == OPERATION_MEMORY_LOAD_8_S ) or \ 60 (x == OPERATION_MEMORY_LOAD_16_S) or \ 61 (x == OPERATION_MEMORY_LOAD_32_S) or \ 62 (x == OPERATION_MEMORY_LOAD_64_S) ) 63 57 64 #define MEMORY_ACCESS_8 0x0 58 65 #define MEMORY_ACCESS_16 0x1 … … 60 67 #define MEMORY_ACCESS_64 0x3 61 68 69 #define MEMORY_SIZE_8 8 70 #define MEMORY_SIZE_16 16 71 #define MEMORY_SIZE_32 32 72 #define MEMORY_SIZE_64 64 73 62 74 #define MASK_MEMORY_ACCESS_8 0x0 63 75 #define MASK_MEMORY_ACCESS_16 0x1 64 76 #define MASK_MEMORY_ACCESS_32 0x3 65 77 #define MASK_MEMORY_ACCESS_64 0x7 78 79 #define memory_size(x) \ 80 (((x==OPERATION_MEMORY_LOAD_16_Z)or \ 81 (x==OPERATION_MEMORY_LOAD_16_S)or \ 82 (x==OPERATION_MEMORY_STORE_16 ))?MEMORY_SIZE_16: \ 83 (((x==OPERATION_MEMORY_LOAD_32_Z)or \ 84 (x==OPERATION_MEMORY_LOAD_32_S)or \ 85 (x==OPERATION_MEMORY_STORE_32 ))?MEMORY_SIZE_32: \ 86 (((x==OPERATION_MEMORY_LOAD_64_Z)or \ 87 (x==OPERATION_MEMORY_LOAD_64_S)or \ 88 (x==OPERATION_MEMORY_STORE_64 ))?MEMORY_SIZE_64:MEMORY_SIZE_8))) 66 89 67 90 #define memory_access(x) \ … … 86 109 (x==OPERATION_MEMORY_LOAD_64_S)or \ 87 110 (x==OPERATION_MEMORY_STORE_64 ))?MASK_MEMORY_ACCESS_64:MASK_MEMORY_ACCESS_8))) 88 89 111 90 112 //====================================================[ Exception ]===== … … 131 153 #define EXCEPTION_MEMORY_BUS_ERROR 0x4 // Access at a invalid physical address 132 154 #define EXCEPTION_MEMORY_MISS_SPECULATION 0x5 // Load miss speculation 155 #define EXCEPTION_MEMORY_LOAD_SPECULATIVE 0x6 // The load is speculative : write in register file, but don't commit 133 156 134 157 //==================================================[ dcache_type ]===== 135 # define DCACHE_LOAD 0x0 // 0000 136 # define DCACHE_LOCK 0x1 // 0001 137 # define DCACHE_INVALIDATE 0x2 // 0010 138 # define DCACHE_PREFETCH 0x3 // 0011 139 //#define DCACHE_ 0x4 // 0100 140 //#define DCACHE_ 0x5 // 0101 141 # define DCACHE_FLUSH 0x6 // 0110 142 # define DCACHE_SYNCHRONIZATION 0x7 // 0111 143 144 # define DCACHE_STORE_8 0x8 // 1000 145 # define DCACHE_STORE_16 0x9 // 1001 146 # define DCACHE_STORE_32 0xa // 1010 147 # define DCACHE_STORE_64 0xb // 1011 148 //#define DCACHE_ 0xc // 1100 149 //#define DCACHE_ 0xd // 1101 150 //#define DCACHE_ 0xe // 1110 151 //#define DCACHE_ 0xf // 1111 158 # define DCACHE_LOAD 0x0 // 0000 159 # define DCACHE_LOCK 0x1 // 0001 160 # define DCACHE_INVALIDATE 0x2 // 0010 161 # define DCACHE_PREFETCH 0x3 // 0011 162 //#define DCACHE_ 0x4 // 0100 163 //#define DCACHE_ 0x5 // 0101 164 # define DCACHE_FLUSH 0x6 // 0110 165 # define DCACHE_SYNCHRONIZATION 0x7 // 0111 166 # define DCACHE_STORE_8 0x8 // 1000 167 # define DCACHE_STORE_16 0x9 // 1001 168 # define DCACHE_STORE_32 0xa // 1010 169 # define DCACHE_STORE_64 0xb // 1011 170 //#define DCACHE_ 0xc // 1100 171 //#define DCACHE_ 0xd // 1101 172 //#define DCACHE_ 0xe // 1110 173 //#define DCACHE_ 0xf // 1111 152 174 153 175 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
r69 r71 21 21 #define DEBUG_Multi_Execute_unit false 22 22 #define DEBUG_Execute_unit false 23 #define DEBUG_Load_store_unit false23 #define DEBUG_Load_store_unit true 24 24 #define DEBUG_Multi_Read_unit false 25 25 #define DEBUG_Read_unit false 26 26 #define DEBUG_Read_queue false 27 #define DEBUG_Reservation_station true27 #define DEBUG_Reservation_station false 28 28 #define DEBUG_Register_unit false 29 29 #define DEBUG_Register_unit_Glue false -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Entity.h
r62 r71 20 20 #include "Behavioural/include/Usage.h" 21 21 22 using namespace std;23 24 22 namespace morpheo { 25 23 namespace behavioural { … … 28 26 { 29 27 // -----[ fields ]---------------------------------------------------- 30 private : const st ring _name ;31 private : const st ring _type ;28 private : const std::string _name ; 29 private : const std::string _type ; 32 30 #ifdef POSITION 33 31 private : const schema_t _schema ; … … 38 36 39 37 #ifdef POSITION 40 private : st ring _comment ;38 private : std::string _comment ; 41 39 42 40 private : bool _is_map ; … … 48 46 49 47 // -----[ methods ]--------------------------------------------------- 50 public : Entity ( st ring name51 ,st ring type48 public : Entity ( std::string name 49 ,std::string type 52 50 #ifdef POSITION 53 51 ,schema_t schema … … 58 56 public : ~Entity (); 59 57 60 public : st ring get_name (void);61 public : st ring get_type (void);58 public : std::string get_name (void); 59 public : std::string get_type (void); 62 60 63 61 #ifdef POSITION 64 public : void set_comment (st ring comment);65 private : st ring get_comment (void );62 public : void set_comment (std::string comment); 63 private : std::string get_comment (void ); 66 64 #endif 67 65 public : Interfaces * set_interfaces (void); 68 private : st ring get_interfaces (void);66 private : std::string get_interfaces (void); 69 67 public : Interfaces * get_interfaces_list(void); 70 68 71 public : Interface * find_interface (st ring name);72 public : Signal * find_signal (st ring name);69 public : Interface * find_interface (std::string name); 70 public : Signal * find_signal (std::string name); 73 71 public : bool find_signal (Signal * signal); 74 72 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environnement.h
r68 r71 18 18 # define SYSTEMC_VHDL_COMPATIBILITY 19 19 #endif 20 21 #if (defined(DEBUG)) 22 # define DEBUG_TEST 23 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h
r62 r71 28 28 #include "Behavioural/include/Usage.h" 29 29 30 using namespace std;31 32 30 namespace morpheo { 33 31 namespace behavioural { … … 36 34 { 37 35 // -----[ fields ]---------------------------------------------------- 38 protected : const st ring _name ;36 protected : const std::string _name ; 39 37 #ifdef POSITION 40 38 protected : const direction_t _direction ; … … 44 42 45 43 #ifdef POSITION 46 protected : st ring _comment ;44 protected : std::string _comment ; 47 45 #endif 48 46 … … 60 58 61 59 // -----[ methods ]--------------------------------------------------- 62 public : Interface (st ring name60 public : Interface (std::string name 63 61 #ifdef POSITION 64 62 ,direction_t direction … … 71 69 public : ~Interface (); 72 70 73 public : st ring get_name ();74 75 #ifdef POSITION 76 public : void set_comment (st ring comment);77 protected : st ring get_comment (void );78 #endif 79 80 protected : st ring signal_name (string name_interface,81 st ring name_signal ,71 public : std::string get_name (); 72 73 #ifdef POSITION 74 public : void set_comment (std::string comment); 75 protected : std::string get_comment (void ); 76 #endif 77 78 protected : std::string signal_name (std::string name_interface, 79 std::string name_signal , 82 80 direction_t direction ); 83 81 84 public : Signal * find_signal (st ring name);82 public : Signal * find_signal (std::string name); 85 83 public : bool find_signal (Signal * signal); 86 84 87 protected : st ring get_signal (void);88 public : Signal * set_signal (st ring name ,85 protected : std::string get_signal (void); 86 public : Signal * set_signal (std::string name , 89 87 direction_t direction, 90 88 uint32_t size , … … 93 91 94 92 #ifdef SYSTEMC 95 public : sc_in_clk * set_signal_clk (st ring name ,93 public : sc_in_clk * set_signal_clk (std::string name , 96 94 uint32_t size , 97 95 presence_port_t presence_port=CLOCK_VHDL_YES) … … 122 120 123 121 public : template <typename T> 124 sc_in <T> * set_signal_in (st ring name ,122 sc_in <T> * set_signal_in (std::string name , 125 123 uint32_t size , 126 124 presence_port_t presence_port=PORT_VHDL_YES_TESTBENCH_YES) … … 151 149 152 150 public : template <typename T> 153 sc_out <T> * set_signal_out (st ring name ,151 sc_out <T> * set_signal_out (std::string name , 154 152 uint32_t size , 155 153 presence_port_t presence_port=PORT_VHDL_YES_TESTBENCH_YES) … … 180 178 181 179 public : template <typename T> 182 sc_signal <T> * set_signal_internal (st ring name,180 sc_signal <T> * set_signal_internal (std::string name, 183 181 uint32_t size) 184 182 { … … 209 207 # ifdef VHDL_TESTBENCH 210 208 public : void set_signal (Vhdl * & vhdl); 211 public : void get_signal (list<st ring> * & list_signal);209 public : void get_signal (list<std::string> * & list_signal); 212 210 # endif 213 211 #endif … … 220 218 public : void testbench_cycle (void); 221 219 public : void testbench_body (Vhdl * & vhdl , 222 st ring counter_name ,223 st ring reset_name );224 public : st ring testbench_test (Vhdl * & vhdl ,225 st ring counter_name,226 st ring reset_name);227 public : st ring testbench_test_ok (Vhdl * & vhdl );228 protected : st ring testbench_test_name (Vhdl * & vhdl);229 protected : st ring testbench_test_ok_name(Vhdl * & vhdl);230 protected : st ring testbench_test_transaction_name(Vhdl * & vhdl);220 std::string counter_name , 221 std::string reset_name ); 222 public : std::string testbench_test (Vhdl * & vhdl , 223 std::string counter_name, 224 std::string reset_name); 225 public : std::string testbench_test_ok (Vhdl * & vhdl ); 226 protected : std::string testbench_test_name (Vhdl * & vhdl); 227 protected : std::string testbench_test_ok_name(Vhdl * & vhdl); 228 protected : std::string testbench_test_transaction_name(Vhdl * & vhdl); 231 229 #endif 232 230 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h
r62 r71 20 20 #include "Behavioural/include/Usage.h" 21 21 22 using namespace std;23 22 24 23 namespace morpheo { … … 28 27 { 29 28 // -----[ fields ]---------------------------------------------------- 30 private : const st ring _name;29 private : const std::string _name; 31 30 private : const Tusage_t _usage; 32 31 private : list<Interface_fifo*> * _list_interface; 33 32 34 33 // -----[ methods ]--------------------------------------------------- 35 public : Interfaces (st ring name,34 public : Interfaces (std::string name, 36 35 Tusage_t usage=USE_ALL); 37 36 public : Interfaces (const Interfaces & interfaces); 38 37 public : ~Interfaces (); 39 38 40 public : Interface_fifo * set_interface (st ring name39 public : Interface_fifo * set_interface (std::string name 41 40 #ifdef POSITION 42 41 ,direction_t direction … … 45 44 ); 46 45 #ifdef POSITION 47 public : Interface_fifo * set_interface (st ring name ,46 public : Interface_fifo * set_interface (std::string name , 48 47 direction_t direction , 49 48 localisation_t localisation, 50 st ring comment );49 std::string comment ); 51 50 #endif 52 private : st ring get_interface (void);51 private : std::string get_interface (void); 53 52 public :list<Interface_fifo*>* get_interface_list (void); 54 53 … … 56 55 public : void set_port (Vhdl * & vhdl ); 57 56 # ifdef VHDL_TESTBENCH 58 private : void get_signal (list<st ring> * & list_signal );57 private : void get_signal (list<std::string> * & list_signal ); 59 58 private : void set_signal (Vhdl * & vhdl ); 60 59 # endif … … 67 66 private : void testbench_generate_file (void); 68 67 public : void testbench (void); 69 private : st ring testbench_body (Vhdl * & vhdl ,70 st ring counter_name ,71 st ring reset_name );68 private : std::string testbench_body (Vhdl * & vhdl , 69 std::string counter_name , 70 std::string reset_name ); 72 71 #endif 73 72 74 public : Interface_fifo * find_interface (st ring name);75 public : Signal * find_signal (st ring name);73 public : Interface_fifo * find_interface (std::string name); 74 public : Signal * find_signal (std::string name); 76 75 public : bool find_signal (Signal * signal); 77 76 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h
r62 r71 18 18 #include "Common/include/Debug.h" 19 19 20 using namespace std;21 22 20 namespace morpheo { 23 21 namespace behavioural { … … 37 35 38 36 // methods to print and test parameters 39 public : virtual st ring print (uint32_t depth) = 0;40 public : virtual st ring msg_error (void) = 0;37 public : virtual std::string print (uint32_t depth) = 0; 38 public : virtual std::string msg_error (void) = 0; 41 39 42 40 // methods to generate configuration file -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters_Statistics.h
r50 r71 12 12 #include "Common/include/Debug.h" 13 13 #include <stdint.h> 14 using namespace std;15 14 16 15 namespace morpheo { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h
r65 r71 26 26 #include "Common/include/ToString.h" 27 27 #include "Common/include/Debug.h" 28 29 using namespace std;30 28 31 29 namespace morpheo { … … 53 51 54 52 // -----[ fields ]---------------------------------------------------- 55 private : const st ring _name ;53 private : const std::string _name ; 56 54 private : const direction_t _direction ; 57 55 private : const presence_port_t _presence_port ; … … 68 66 69 67 #ifdef VHDL_TESTBENCH 70 private : list<st ring> * _list_value ;68 private : list<std::string> * _list_value ; 71 69 #endif 72 70 73 71 // -----[ methods ]--------------------------------------------------- 74 public : Signal (st ring name ,72 public : Signal (std::string name , 75 73 direction_t direction , 76 74 uint32_t size , … … 79 77 public : ~Signal (); 80 78 81 public : st ring get_name (void);79 public : std::string get_name (void); 82 80 public : uint32_t get_size (void); 83 81 public : void set_size (uint32_t size); … … 184 182 185 183 public : void set_signal (Vhdl * & vhdl); 186 public : void get_name_vhdl (list<st ring> * & list_signal);184 public : void get_name_vhdl (list<std::string> * & list_signal); 187 185 188 186 public : void testbench (void); 189 187 public : void testbench_body (Vhdl * & vhdl , 190 st ring counter_name ,191 st ring reset_name );188 std::string counter_name , 189 std::string reset_name ); 192 190 public : void testbench_test_ok(Vhdl * & vhdl ); 193 191 # endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Statistics.h
r53 r71 18 18 #include "Common/include/Percent.h" 19 19 20 using namespace std;21 22 20 namespace morpheo { 23 21 namespace behavioural { … … 26 24 { 27 25 // -----[ fields ]---------------------------------------------------- 28 protected : const st ring _name;26 protected : const std::string _name; 29 27 protected : const Parameters_Statistics * _parameters_statistics; 30 28 … … 33 31 34 32 // -----[ methods ]--------------------------------------------------- 35 public : Statistics (st ring name ,33 public : Statistics (std::string name , 36 34 Parameters_Statistics * parameters_statistics); 37 35 public : virtual ~Statistics (); … … 40 38 protected : uint32_t compute_cycle_end (uint32_t num_statistics, uint32_t nb_cycle); 41 39 42 public : virtual st ring print_body (uint32_t depth) = 0;43 public : virtual st ring print (uint32_t depth) = 0;44 public : void generate_file (st ring stat );40 public : virtual std::string print_body (uint32_t depth) = 0; 41 public : virtual std::string print (uint32_t depth) = 0; 42 public : void generate_file (std::string stat ); 45 43 public : void generate_file (void); 46 44 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h
r69 r71 20 20 #include "Common/include/ErrorMorpheo.h" 21 21 22 using namespace std; 22 namespace morpheo { 23 namespace behavioural { 23 24 24 namespace morpheo { 25 namespace behavioural { 25 std::string std_logic (uint32_t size); 26 std::string std_logic_conv (uint32_t size, std::string value); 27 std::string std_logic_conv (uint32_t size, uint32_t value); 28 std::string std_logic_range (uint32_t size, uint32_t max , uint32_t min ); 29 std::string std_logic_range (uint32_t max , uint32_t min ); 30 std::string std_logic_range (uint32_t size); 31 std::string std_logic_others (uint32_t size, uint32_t cst ); 26 32 27 string std_logic (uint32_t size); 28 string std_logic_conv (uint32_t size, string value); 29 string std_logic_conv (uint32_t size, uint32_t value); 30 string std_logic_range (uint32_t size, uint32_t max , uint32_t min ); 31 string std_logic_range (uint32_t max , uint32_t min ); 32 string std_logic_range (uint32_t size); 33 string std_logic_others (uint32_t size, uint32_t cst ); 33 class Vhdl 34 { 35 // -----[ fields ]---------------------------------------------------- 36 private : const std::string _name ; 34 37 35 class Vhdl 36 { 37 // -----[ fields ]---------------------------------------------------- 38 private : const string _name ; 38 private : std::list<std::string> _list_library_work ; 39 private : std::list<std::string> _list_signal ; 40 private : std::list<std::string> _list_type ; 41 private : std::list<std::string> _list_alias ; 42 private : std::list<std::string> _list_port ; 43 private : std::list<std::string> _list_body ; 39 44 40 private : list<string> _list_library_work ; 41 private : list<string> _list_signal ; 42 private : list<string> _list_type ; 43 private : list<string> _list_alias ; 44 private : list<string> _list_port ; 45 private : list<string> _list_body ; 46 47 // -----[ methods ]--------------------------------------------------- 48 public : Vhdl (string name); 49 public : ~Vhdl (); 50 51 public : void generate_file (void); 52 public : void generate_file (bool generate_package, 53 bool generate_model ); 45 // -----[ methods ]--------------------------------------------------- 46 public : Vhdl (std::string name); 47 public : ~Vhdl (); 54 48 55 private : void generate_file_package (void); 56 private : void generate_file_model (void); 57 58 private : string get_package (uint32_t depth , 59 string filename , 60 string package_name , 61 string entity_name ); 62 private : string get_model (uint32_t depth , 63 string filename , 64 string entity_name , 65 string architecture_name ); 66 private : string get_header (uint32_t depth , 67 string filename ); 68 private : string get_entity (uint32_t depth , 69 string name ); 70 private : string get_architecture (uint32_t depth , 71 string name , 72 string entity_name ); 73 private : string get_component (uint32_t depth , 74 string name ); 49 public : void generate_file (void); 50 public : void generate_file (bool generate_package, 51 bool generate_model ); 75 52 76 private : string get_port (uint32_t depth ); 77 public : void set_port (string name , 78 direction_t direction , 79 string type ); 80 public : void set_port (string name , 81 direction_t direction , 82 uint32_t size ); 83 private : string get_signal (uint32_t depth ); 84 public : void set_signal (string name , 85 string type ); 86 public : void set_signal (string name , 87 uint32_t signal ); 88 public : void set_signal (string name , 89 string type , 90 string init ); 91 public : void set_signal (string name , 92 uint32_t size , 93 string init ); 94 public : void set_signal (string name , 95 uint32_t size , 96 uint32_t init ); 97 public : void set_constant (string name , 98 string type , 99 string init ); 100 public : void set_constant (string name , 101 uint32_t size , 102 string init ); 103 public : void set_constant (string name , 104 uint32_t size , 105 uint32_t init ); 53 private : void generate_file_package (void); 54 private : void generate_file_model (void); 106 55 107 private : string get_type (uint32_t depth ); 108 public : void set_type (string name , 109 string type ); 110 private : string get_alias (uint32_t depth ); 111 public : void set_alias (string name1 , 112 string type1 , 113 string name2 , 114 string range2 ); 115 public : void set_alias (string name1 , 116 uint32_t size1 , 117 string name2 , 118 string range2 ); 56 private : std::string get_package (uint32_t depth , 57 std::string filename , 58 std::string package_name , 59 std::string entity_name ); 60 private : std::string get_model (uint32_t depth , 61 std::string filename , 62 std::string entity_name , 63 std::string architecture_name ); 64 private : std::string get_header (uint32_t depth , 65 std::string filename ); 66 private : std::string get_entity (uint32_t depth , 67 std::string name ); 68 private : std::string get_architecture (uint32_t depth , 69 std::string name , 70 std::string entity_name ); 71 private : std::string get_component (uint32_t depth , 72 std::string name ); 119 73 120 public : string get_list (list<string> liste , 121 uint32_t depth , 122 string separator , 123 bool last_separator ); 124 public : void set_list (list<string> & liste , 125 string text ); 74 private : std::string get_port (uint32_t depth ); 75 public : void set_port (std::string name , 76 direction_t direction , 77 std::string type ); 78 public : void set_port (std::string name , 79 direction_t direction , 80 uint32_t size ); 81 private : std::string get_signal (uint32_t depth ); 82 public : void set_signal (std::string name , 83 std::string type ); 84 public : void set_signal (std::string name , 85 uint32_t signal ); 86 public : void set_signal (std::string name , 87 std::string type , 88 std::string init ); 89 public : void set_signal (std::string name , 90 uint32_t size , 91 std::string init ); 92 public : void set_signal (std::string name , 93 uint32_t size , 94 uint32_t init ); 95 public : void set_constant (std::string name , 96 std::string type , 97 std::string init ); 98 public : void set_constant (std::string name , 99 uint32_t size , 100 std::string init ); 101 public : void set_constant (std::string name , 102 uint32_t size , 103 uint32_t init ); 126 104 127 private : string get_body (uint32_t depth ); 128 public : void set_body (string text ); 105 private : std::string get_type (uint32_t depth ); 106 public : void set_type (std::string name , 107 std::string type ); 108 private : std::string get_alias (uint32_t depth ); 109 public : void set_alias (std::string name1 , 110 std::string type1 , 111 std::string name2 , 112 std::string range2 ); 113 public : void set_alias (std::string name1 , 114 uint32_t size1 , 115 std::string name2 , 116 std::string range2 ); 129 117 130 public : void set_body_component (string name_instance , 131 string name_component , 132 list<string> list_port_map ); 133 public : void set_body_component_port_map (list<string> & list_port_map , 134 string name_port , 135 uint32_t size_port , 136 string name_signal , 137 uint32_t size_signal ); 118 public : std::string get_list (std::list<std::string> liste , 119 uint32_t depth , 120 std::string separator , 121 bool last_separator ); 122 public : void set_list (std::list<std::string> & liste , 123 std::string text ); 138 124 139 private : string get_library_ieee (uint32_t depth ); 140 private : string get_library_work (uint32_t depth ); 141 public : void set_library_work (string package_name ); 125 private : std::string get_body (uint32_t depth ); 126 public : void set_body (std::string text ); 142 127 143 private : string direction_toString (direction_t direction); 144 }; 128 public : void set_body_component (std::string name_instance , 129 std::string name_component , 130 std::list<std::string> list_port_map ); 131 public : void set_body_component_port_map (std::list<std::string> & list_port_map , 132 std::string name_port , 133 uint32_t size_port , 134 std::string name_signal , 135 uint32_t size_signal ); 145 136 146 }; // end namespace behavioural 137 private : std::string get_library_ieee (uint32_t depth ); 138 private : std::string get_library_work (uint32_t depth ); 139 public : void set_library_work (std::string package_name ); 140 141 private : std::string direction_toString (direction_t direction); 142 }; 143 144 }; // end namespace behavioural 147 145 }; // end namespace morpheo 148 146 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/XML.h
r44 r71 16 16 #include "Common/include/Debug.h" 17 17 18 using namespace std;19 20 18 namespace morpheo { 21 19 namespace behavioural { … … 25 23 { 26 24 // -----[ fields ]---------------------------------------------------- 27 private : const st ring _name ;28 private : st ring _filename_extension;29 private : st ring _body ;30 private : list<string> _list_balise_name ;25 private : const std::string _name ; 26 private : std::string _filename_extension; 27 private : std::string _body ; 28 private : std::list<std::string> _list_balise_name ; 31 29 32 30 // -----[ methods ]--------------------------------------------------- 33 public : XML (st ring name);31 public : XML (std::string name); 34 32 public : ~XML (void); 35 33 36 public : bool balise_open (st ring name); // no attribut37 public : bool balise_open_begin (st ring name);34 public : bool balise_open (std::string name); // no attribut 35 public : bool balise_open_begin (std::string name); 38 36 public : bool balise_open_end (void); 39 37 public : bool balise_close (void); 40 public : bool singleton (st ring name); // no attribut41 public : bool singleton_begin (st ring name);38 public : bool singleton (std::string name); // no attribut 39 public : bool singleton_begin (std::string name); 42 40 public : bool singleton_end (void); 43 public : bool attribut (st ring name,string value);41 public : bool attribut (std::string name, std::string value); 44 42 public : bool insert_XML (XML xml ); 45 43 46 public : void filename_extension (st ring extension);44 public : void filename_extension (std::string extension); 47 45 public : void generate_file (void); 48 public : void generate_file (st ring encoding);49 public : st ring get_body (void);50 public : st ring get_body (uint32_t depth);46 public : void generate_file (std::string encoding); 47 public : std::string get_body (void); 48 public : std::string get_body (uint32_t depth); 51 49 52 public : bool comment (st ring text);53 public : bool text (st ring text);50 public : bool comment (std::string text); 51 public : bool text (std::string text); 54 52 55 private : st ring indent (uint32_t depth );56 private : st ring indent (void);53 private : std::string indent (uint32_t depth ); 54 private : std::string indent (void); 57 55 private : uint32_t depth (void); 58 56 59 private : void header (st ring encoding);57 private : void header (std::string encoding); 60 58 }; 61 59 }; // end namespace behavioural -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Parameters_test.cpp
r43 r71 17 17 { 18 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 19 st ring msg = msg_error();19 std::string msg = msg_error(); 20 20 21 21 if (msg.length() != 0) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Statistics.cpp
r53 r71 15 15 #undef FUNCTION 16 16 #define FUNCTION "Statistics::Statistics" 17 Statistics::Statistics (st ring name ,17 Statistics::Statistics (std::string name , 18 18 Parameters_Statistics * parameters_statistics): 19 19 _name (name ), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Statistics_generate_file.cpp
r43 r71 12 12 #include <sstream> 13 13 #include <fstream> 14 using namespace std;15 14 16 15 namespace morpheo { … … 19 18 #undef FUNCTION 20 19 #define FUNCTION "Statistics::generate_file" 21 void Statistics::generate_file(st ring stat)20 void Statistics::generate_file(std::string stat) 22 21 { 23 22 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 24 23 25 ostringstream filename;24 std::stringstream filename; 26 25 filename << _name << ".stat"; 27 26 28 cout << "Generate file \""<< filename.str() << "\"" <<endl;27 std::cout << "Generate file \""<< filename.str() << "\"" << std::endl; 29 28 30 ofstream file;31 file.open(filename.str().c_str(), ios::out |ios::trunc);29 std::ofstream file; 30 file.open(filename.str().c_str(),std::ios::out | std::ios::trunc); 32 31 33 32 time_t current_time; … … 35 34 36 35 // print header 37 file << "<!-- " << endl38 << "\tfile : " << filename.str() << endl36 file << "<!-- " << std::endl 37 << "\tfile : " << filename.str() << std::endl 39 38 << "\tdate : " << ctime (¤t_time ) 40 << "\tcomment : it's a autogenerated file : don't modify" << endl41 << "-->" << endl42 << endl;39 << "\tcomment : it's a autogenerated file : don't modify" << std::endl 40 << "-->" << std::endl 41 << std::endl; 43 42 44 43 file << stat; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl.cpp
r43 r71 15 15 #undef FUNCTION 16 16 #define FUNCTION "Vhdl::Vhdl" 17 Vhdl::Vhdl (st ringname):17 Vhdl::Vhdl (std::string name): 18 18 _name (name) 19 19 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_direction_toString.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::direction_toString" 20 st ring Vhdl::direction_toString (direction_t direction)19 std::string Vhdl::direction_toString (direction_t direction) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 22 24 st ring _return;23 std::string _return; 25 24 switch (direction) 26 25 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_generate_file_model.cpp
r15 r71 11 11 #include <sstream> 12 12 #include <fstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 20 19 log_printf(FUNC,Behavioural,"generate_file_model","Begin"); 21 20 22 st ring filename = _name + ".vhdl";21 std::string filename = _name + ".vhdl"; 23 22 24 23 log_printf(TRACE,Behavioural,"generate_file_model","print %s",filename.c_str()); 25 cout << "Generate file \""<< filename << "\"" <<endl;24 std::cout << "Generate file \""<< filename << "\"" << std::endl; 26 25 27 26 log_printf(TRACE,Behavioural,"generate_file_model","declaration"); 28 ofstream file;27 std::ofstream file; 29 28 30 29 log_printf(TRACE,Behavioural,"generate_file_model","open file"); 31 file.open(filename.c_str(), ios::out |ios::trunc);30 file.open(filename.c_str(),std::ios::out | std::ios::trunc); 32 31 33 32 log_printf(TRACE,Behavioural,"generate_file_model","get model"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_generate_file_package.cpp
r2 r71 11 11 #include <sstream> 12 12 #include <fstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 20 19 log_printf(FUNC,Behavioural,"generate_file_package","Begin"); 21 20 22 st ring name = _name + "_Pack";23 st ring filename = name + ".vhdl";21 std::string name = _name + "_Pack"; 22 std::string filename = name + ".vhdl"; 24 23 25 cout << "Generate file \""<< filename << "\"" <<endl;24 std::cout << "Generate file \""<< filename << "\"" << std::endl; 26 25 27 ofstream file;28 file.open(filename.c_str(), ios::out |ios::trunc);26 std::ofstream file; 27 file.open(filename.c_str(),std::ios::out | std::ios::trunc); 29 28 30 29 file << get_package (0,filename, name, _name); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_alias.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_alias" 20 st ring Vhdl::get_alias (uint32_t depth)19 std::string Vhdl::get_alias (uint32_t depth) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 st ring _return = get_list(_list_alias, depth, ";", true);22 std::string _return = get_list(_list_alias, depth, ";", true); 24 23 log_printf(FUNC,Behavioural,FUNCTION,"End"); 25 24 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_architecture.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_architecture" 20 st ring Vhdl::get_architecture (uint32_t depth ,21 st ring name ,22 st ring entity_name)19 std::string Vhdl::get_architecture (uint32_t depth , 20 std::string name , 21 std::string entity_name) 23 22 { 24 23 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 25 24 26 st ring tab =string(depth,'\t');27 ostringstream text;25 std::string tab = std::string(depth,'\t'); 26 std::ostringstream text; 28 27 29 text << tab << "architecture " << name << " of " << entity_name << " is" << endl30 << tab << get_type (depth+1) << endl31 << tab << get_signal (depth+1) << endl32 << tab << get_alias (depth+1) << endl33 << tab << "begin" << endl34 << tab << get_body (depth+1) << endl35 << tab << "end " << name << ";" << endl;28 text << tab << "architecture " << name << " of " << entity_name << " is" << std::endl 29 << tab << get_type (depth+1) << std::endl 30 << tab << get_signal (depth+1) << std::endl 31 << tab << get_alias (depth+1) << std::endl 32 << tab << "begin" << std::endl 33 << tab << get_body (depth+1) << std::endl 34 << tab << "end " << name << ";" << std::endl; 36 35 37 36 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_body.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_body" 20 st ring Vhdl::get_body (uint32_t depth)19 std::string Vhdl::get_body (uint32_t depth) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 st ring _return = get_list(_list_body,depth,"",true);22 std::string _return = get_list(_list_body,depth,"",true); 24 23 log_printf(FUNC,Behavioural,FUNCTION,"End"); 25 24 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_component.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_component" 20 st ring Vhdl::get_component(uint32_t depth,21 st ring name)19 std::string Vhdl::get_component(uint32_t depth, 20 std::string name) 22 21 { 23 22 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 24 23 25 st ring tab =string(depth,'\t');26 ostringstream text;24 std::string tab = std::string(depth,'\t'); 25 std::ostringstream text; 27 26 28 text << endl29 << tab << "component " << name << endl;27 text << std::endl 28 << tab << "component " << name << std::endl; 30 29 if (_list_port.empty() == false) 31 text << tab << "\tport (" << endl32 << tab << get_port(depth+1) << endl33 << tab << "\t );" << endl;34 text << tab << "end component;" << endl;35 30 text << tab << "\tport (" << std::endl 31 << tab << get_port(depth+1) << std::endl 32 << tab << "\t );" << std::endl; 33 text << tab << "end component;" << std::endl; 34 36 35 log_printf(FUNC,Behavioural,FUNCTION,"End"); 37 36 return text.str(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_entity.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_entity" 20 st ring Vhdl::get_entity(uint32_t depth,21 string name)19 std::string Vhdl::get_entity(uint32_t depth, 20 std::string name) 22 21 { 23 22 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 24 23 25 st ring tab =string(depth,'\t');26 ostringstream text;24 std::string tab = std::string(depth,'\t'); 25 std::ostringstream text; 27 26 28 text << endl29 << tab << "entity " << name << " is" << endl;30 27 text << std::endl 28 << tab << "entity " << name << " is" << std::endl; 29 31 30 if (_list_port.empty() == false) 32 text << tab << "\tport (" << endl33 << tab << get_port(depth+1) << endl34 << tab << "\t );" << endl;31 text << tab << "\tport (" << std::endl 32 << tab << get_port(depth+1) << std::endl 33 << tab << "\t );" << std::endl; 35 34 36 text << tab << "end " << name << ";" << endl;35 text << tab << "end " << name << ";" << std::endl; 37 36 38 37 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_header.cpp
r43 r71 11 11 #include <time.h> 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_header" 20 st ring Vhdl::get_header(uint32_t depth,21 st ring filename)19 std::string Vhdl::get_header(uint32_t depth, 20 std::string filename) 22 21 { 23 22 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 24 23 25 st ring tab =string(depth,'\t');26 ostringstream text;24 std::string tab = std::string(depth,'\t'); 25 std::ostringstream text; 27 26 28 27 time_t current_time; 29 28 time (¤t_time); 30 29 31 text << tab << "-------------------------------------------------------------------------------" << endl32 << tab << "-- file : " << filename << endl30 text << tab << "-------------------------------------------------------------------------------" << std::endl 31 << tab << "-- file : " << filename << std::endl 33 32 << tab << "-- date : " << ctime (¤t_time ) 34 << tab << "-- comment : it's a autogenerated file : don't modify" << endl35 << tab << "-------------------------------------------------------------------------------" << endl;33 << tab << "-- comment : it's a autogenerated file : don't modify" << std::endl 34 << tab << "-------------------------------------------------------------------------------" << std::endl; 36 35 37 36 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_library_ieee.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_library_ieee" 20 st ring Vhdl::get_library_ieee (uint32_t depth)19 std::string Vhdl::get_library_ieee (uint32_t depth) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 22 24 st ring tab =string(depth,'\t');25 ostringstream text;23 std::string tab = std::string(depth,'\t'); 24 std::ostringstream text; 26 25 27 text << tab << endl28 << tab << "library ieee;" << endl29 << tab << "use ieee.numeric_bit.all;" << endl30 << tab << "use ieee.numeric_std.all;" << endl31 << tab << "use ieee.std_logic_1164.all;" << endl32 << tab << "use ieee.std_logic_arith.all;" << endl33 << tab << "use ieee.std_logic_misc.all;" << endl34 << tab << "--use ieee.std_logic_signed.all;" <<endl35 << tab << "use ieee.std_logic_unsigned.all;" << endl36 << tab << "--use ieee.std_logic_textio.all;" <<endl;26 text << tab << std::endl 27 << tab << "library ieee;" << std::endl 28 << tab << "use ieee.numeric_bit.all;" << std::endl 29 << tab << "use ieee.numeric_std.all;" << std::endl 30 << tab << "use ieee.std_logic_1164.all;" << std::endl 31 << tab << "use ieee.std_logic_arith.all;" << std::endl 32 << tab << "use ieee.std_logic_misc.all;" << std::endl 33 << tab << "--use ieee.std_logic_signed.all;" << std::endl 34 << tab << "use ieee.std_logic_unsigned.all;" << std::endl 35 << tab << "--use ieee.std_logic_textio.all;" << std::endl; 37 36 38 37 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_library_work.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_library_work" 20 st ring Vhdl::get_library_work (uint32_t depth)19 std::string Vhdl::get_library_work (uint32_t depth) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 22 24 list<string>::iterator i = _list_library_work.begin();25 st ring tab =string(depth,'\t');26 ostringstream text;23 std::list<std::string>::iterator i = _list_library_work.begin(); 24 std::string tab = std::string(depth,'\t'); 25 std::ostringstream text; 27 26 28 27 if (i != _list_library_work.end()) 29 text << tab << endl30 << tab << "library work;" << endl28 text << tab << std::endl 29 << tab << "library work;" << std::endl 31 30 << get_list(_list_library_work,depth,";",true); 32 31 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_list.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_list" 20 st ring Vhdl::get_list (list<string> liste ,21 uint32_t depth ,22 string separator ,23 bool last_separator )19 std::string Vhdl::get_list (std::list<std::string> liste , 20 uint32_t depth , 21 std::string separator , 22 bool last_separator ) 24 23 { 25 24 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 26 25 27 list<string>::iterator i = liste.begin();28 bool empty = liste.empty();26 std::list<std::string>::iterator i = liste.begin(); 27 bool empty = liste.empty(); 29 28 30 st ring tab =string(depth,'\t');31 ostringstream text;29 std::string tab = std::string(depth,'\t'); 30 std::ostringstream text; 32 31 33 32 if (not empty) … … 42 41 while (i != liste.end()) 43 42 { 44 text << separator << endl;43 text << separator << std::endl; 45 44 text << tab << *i; 46 45 ++i; … … 48 47 49 48 if (last_separator) 50 text << separator << endl;49 text << separator << std::endl; 51 50 } 52 51 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_model.cpp
r2 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { 16 15 namespace behavioural { 17 16 18 st ring Vhdl::get_model(uint32_t depth ,19 st ring filename ,20 st ring entity_name ,21 st ring architecture_name)17 std::string Vhdl::get_model(uint32_t depth , 18 std::string filename , 19 std::string entity_name , 20 std::string architecture_name) 22 21 { 23 22 log_printf(FUNC,Behavioural,"get_model","Begin"); 24 23 25 st ring tab =string(depth,'\t');26 ostringstream text;24 std::string tab = std::string(depth,'\t'); 25 std::ostringstream text; 27 26 28 text << tab << get_header (depth,filename) << endl29 << tab << get_library_ieee (depth) << endl30 << tab << get_library_work (depth) << endl31 << tab << get_entity (depth,entity_name) << endl32 << tab << get_architecture (depth,architecture_name,entity_name) << endl;27 text << tab << get_header (depth,filename) << std::endl 28 << tab << get_library_ieee (depth) << std::endl 29 << tab << get_library_work (depth) << std::endl 30 << tab << get_entity (depth,entity_name) << std::endl 31 << tab << get_architecture (depth,architecture_name,entity_name) << std::endl; 33 32 34 33 log_printf(FUNC,Behavioural,"get_model","End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_package.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_package" 20 st ring Vhdl::get_package(uint32_t depth ,21 st ring filename ,22 st ring package_name,23 st ring entity_name )19 std::string Vhdl::get_package(uint32_t depth , 20 std::string filename , 21 std::string package_name, 22 std::string entity_name ) 24 23 { 25 24 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 26 25 27 st ring tab =string(depth,'\t');28 ostringstream text;26 std::string tab = std::string(depth,'\t'); 27 std::ostringstream text; 29 28 30 text << tab << get_header (depth,filename) << endl31 << tab << get_library_ieee (depth) << endl32 << tab << "package " << package_name << " is" << endl33 << tab << get_component (depth+1,entity_name) << endl34 << tab << "end " << package_name << ";" << endl;29 text << tab << get_header (depth,filename) << std::endl 30 << tab << get_library_ieee (depth) << std::endl 31 << tab << "package " << package_name << " is" << std::endl 32 << tab << get_component (depth+1,entity_name) << std::endl 33 << tab << "end " << package_name << ";" << std::endl; 35 34 36 35 log_printf(FUNC,Behavioural,FUNCTION,"End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_port.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_port" 20 st ring Vhdl::get_port (uint32_t depth)19 std::string Vhdl::get_port (uint32_t depth) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 st ring _return = get_list (_list_port, depth, ";", false);22 std::string _return = get_list (_list_port, depth, ";", false); 24 23 log_printf(FUNC,Behavioural,FUNCTION,"End"); 25 24 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_signal.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_signal" 20 st ring Vhdl::get_signal (uint32_t depth)19 std::string Vhdl::get_signal (uint32_t depth) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 st ring _return = get_list (_list_signal, depth, ";", true);22 std::string _return = get_list (_list_signal, depth, ";", true); 24 23 log_printf(FUNC,Behavioural,FUNCTION,"End"); 25 24 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_get_type.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::get_type" 20 st ring Vhdl::get_type (uint32_t depth)19 std::string Vhdl::get_type (uint32_t depth) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 23 st ring _return = get_list (_list_type, depth, ";", true);22 std::string _return = get_list (_list_type, depth, ";", true); 24 23 log_printf(FUNC,Behavioural,FUNCTION,"End"); 25 24 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_alias.cpp
r69 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_alias" 20 void Vhdl::set_alias (st ring name1 ,21 st ring type1 ,22 st ring name2 ,23 st ring range2)19 void Vhdl::set_alias (std::string name1 , 20 std::string type1 , 21 std::string name2 , 22 std::string range2) 24 23 { 25 24 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 28 27 }; 29 28 30 void Vhdl::set_alias (st ring name1 ,29 void Vhdl::set_alias (std::string name1 , 31 30 uint32_t size1 , 32 st ring name2 ,33 st ring range2)31 std::string name2 , 32 std::string range2) 34 33 { 35 34 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_body.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_body" 20 void Vhdl::set_body (st ring text )19 void Vhdl::set_body (std::string text ) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_body_component.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_body_component" 20 void Vhdl::set_body_component (st ring name_instance ,21 st ring name_component ,22 list<string> list_port_map )19 void Vhdl::set_body_component (std::string name_instance , 20 std::string name_component , 21 std::list<std::string> list_port_map ) 23 22 { 24 23 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_body_component_port_map.cpp
r65 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_body_component_port_map" 20 void Vhdl::set_body_component_port_map ( list<string> & list_port_map ,21 st ring name_port ,19 void Vhdl::set_body_component_port_map (std::list<std::string> & list_port_map , 20 std::string name_port , 22 21 uint32_t size_port , 23 st ring name_signal ,22 std::string name_signal , 24 23 uint32_t size_signal ) 25 24 { … … 29 28 throw (ErrorMorpheo ("<Vhdl::set_body_component_port_map> size of port '"+name_port+"' ("+toString(size_port)+") is greater than size of signal '"+name_signal+"' ("+toString(size_signal)+").")); 30 29 31 st ring str_size = "";30 std::string str_size = ""; 32 31 33 32 // test if size is different (possible if multi write -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_constant.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_constant" 20 void Vhdl::set_constant (st ring name ,21 st ring type ,22 st ring init)19 void Vhdl::set_constant (std::string name , 20 std::string type , 21 std::string init) 23 22 { 24 23 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 27 26 }; 28 27 29 void Vhdl::set_constant (st ring name ,28 void Vhdl::set_constant (std::string name , 30 29 uint32_t size , 31 st ring init)30 std::string init) 32 31 { 33 32 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 36 35 }; 37 36 38 void Vhdl::set_constant (st ring name ,37 void Vhdl::set_constant (std::string name , 39 38 uint32_t size , 40 39 uint32_t init) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_library_work.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_library_work" 20 void Vhdl::set_library_work (st ring package_name)19 void Vhdl::set_library_work (std::string package_name) 21 20 { 22 21 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_list.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_list" 20 void Vhdl::set_list ( list<string> & liste,21 st ring text )19 void Vhdl::set_list (std::list<std::string> & liste, 20 std::string text ) 22 21 { 23 22 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_port.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_port" 20 void Vhdl::set_port (st ring name ,19 void Vhdl::set_port (std::string name , 21 20 direction_t direction, 22 st ring type )21 std::string type ) 23 22 { 24 23 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 27 26 }; 28 27 29 void Vhdl::set_port (st ring name ,28 void Vhdl::set_port (std::string name , 30 29 direction_t direction, 31 30 uint32_t size ) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_signal.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 19 18 #define FUNCTION "Vhdl::set_signal" 20 19 21 void Vhdl::set_signal (st ring name ,22 st ring type )20 void Vhdl::set_signal (std::string name , 21 std::string type ) 23 22 { 24 23 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 27 26 }; 28 27 29 void Vhdl::set_signal (st ring name ,28 void Vhdl::set_signal (std::string name , 30 29 uint32_t size ) 31 30 { … … 35 34 } 36 35 37 void Vhdl::set_signal (st ring name ,38 st ring type ,39 st ring init)36 void Vhdl::set_signal (std::string name , 37 std::string type , 38 std::string init) 40 39 { 41 40 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 44 43 }; 45 44 46 void Vhdl::set_signal (st ring name ,45 void Vhdl::set_signal (std::string name , 47 46 uint32_t size , 48 st ring init )47 std::string init ) 49 48 { 50 49 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 52 51 log_printf(FUNC,Behavioural,FUNCTION,"End"); 53 52 }; 54 void Vhdl::set_signal (st ring name ,53 void Vhdl::set_signal (std::string name , 55 54 uint32_t size , 56 55 uint32_t init ) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_type.cpp
r43 r71 11 11 12 12 #include <sstream> 13 using namespace std;14 13 15 14 namespace morpheo { … … 18 17 #undef FUNCTION 19 18 #define FUNCTION "Vhdl::set_type" 20 void Vhdl::set_type (st ring name ,21 st ring type )19 void Vhdl::set_type (std::string name , 20 std::string type ) 22 21 { 23 22 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_std_logic.cpp
r67 r71 16 16 #undef FUNCTION 17 17 #define FUNCTION "Vhdl::std_logic" 18 st ring std_logic (uint32_t size)18 std::string std_logic (uint32_t size) 19 19 { 20 20 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 21 21 22 st ring type;22 std::string type; 23 23 24 24 if (size == 1) … … 34 34 #undef FUNCTION 35 35 #define FUNCTION "Vhdl::std_logic_conv" 36 st ring std_logic_conv (uint32_t size,string value)36 std::string std_logic_conv (uint32_t size, std::string value) 37 37 { 38 38 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 39 39 40 st ring conv;40 std::string conv; 41 41 42 42 if (size == 1) … … 50 50 }; 51 51 52 st ring std_logic_conv (uint32_t size, uint32_t value)52 std::string std_logic_conv (uint32_t size, uint32_t value) 53 53 { 54 54 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 55 cout << toString(value) << endl; 56 string _return = std_logic_conv(size,toString(value)); 55 std::string _return = std_logic_conv(size,toString(value)); 57 56 log_printf(FUNC,Behavioural,FUNCTION,"End"); 58 57 … … 62 61 #undef FUNCTION 63 62 #define FUNCTION "Vhdl::std_logic_range" 64 st ring std_logic_range (uint32_t size, uint32_t max, uint32_t min)63 std::string std_logic_range (uint32_t size, uint32_t max, uint32_t min) 65 64 { 66 65 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 67 st ring type;66 std::string type; 68 67 69 68 if (size < 2) … … 80 79 }; 81 80 82 st ring std_logic_range (uint32_t max, uint32_t min)81 std::string std_logic_range (uint32_t max, uint32_t min) 83 82 { 84 83 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 85 st ring type;84 std::string type; 86 85 87 86 if (max == 0) … … 98 97 }; 99 98 100 st ring std_logic_range (uint32_t size)99 std::string std_logic_range (uint32_t size) 101 100 { 102 101 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 103 st ring _return = std_logic_range(size-1,0);102 std::string _return = std_logic_range(size-1,0); 104 103 log_printf(FUNC,Behavioural,FUNCTION,"End"); 105 104 … … 109 108 #undef FUNCTION 110 109 #define FUNCTION "Vhdl::std_logic_others" 111 st ring std_logic_others (uint32_t size, uint32_t cst )110 std::string std_logic_others (uint32_t size, uint32_t cst ) 112 111 { 113 112 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 114 113 115 st ring _return;114 std::string _return; 116 115 117 116 if (size < 2) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::XML" 15 XML::XML (st ring name) :15 XML::XML (std::string name) : 16 16 _name (name) 17 17 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_attribut.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::attribut" 15 bool XML::attribut (st ring name,string value)15 bool XML::attribut (std::string name, std::string value) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_balise_close.cpp
r43 r71 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 18 st ring name=*(_list_balise_name.begin());18 std::string name=*(_list_balise_name.begin()); 19 19 20 20 _list_balise_name.pop_front(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_balise_open.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::balise_open" 15 bool XML::balise_open (st ring name)15 bool XML::balise_open (std::string name) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_balise_open_begin.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::balise_open_begin" 15 bool XML::balise_open_begin (st ring name)15 bool XML::balise_open_begin (std::string name) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_comment.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::comment" 15 bool XML::comment (st ring texte)15 bool XML::comment (std::string texte) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_filename_extension.cpp
r43 r71 8 8 #include "Behavioural/include/XML.h" 9 9 #include <fstream> 10 using namespace std;11 10 12 11 namespace morpheo { … … 15 14 #undef FUNCTION 16 15 #define FUNCTION "XML::filename_extension" 17 void XML::filename_extension (st ring extension)16 void XML::filename_extension (std::string extension) 18 17 { 19 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_generate_file.cpp
r43 r71 8 8 #include "Behavioural/include/XML.h" 9 9 #include <fstream> 10 using namespace std;11 10 12 11 namespace morpheo { … … 15 14 #undef FUNCTION 16 15 #define FUNCTION "XML::generate_file" 17 void XML::generate_file (st ring encoding)16 void XML::generate_file (std::string encoding) 18 17 { 19 18 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 21 20 header (encoding); 22 21 23 string name = _name; 24 string filename = name + "." + _filename_extension; 22 std::string filename = _name + "." + _filename_extension; 25 23 26 cout << "Generate file \""<< filename << "\"" <<endl;24 std::cout << "Generate file \""<< filename << "\"" << std::endl; 27 25 28 ofstream file;29 file.open(filename.c_str(), ios::out |ios::trunc);26 std::ofstream file; 27 file.open(filename.c_str(),std::ios::out | std::ios::trunc); 30 28 31 29 file << get_body(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_get_body.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::get_body" 15 st ring XML::get_body (void)15 std::string XML::get_body (void) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); … … 20 20 }; 21 21 22 st ring XML::get_body (uint32_t depth)22 std::string XML::get_body (uint32_t depth) 23 23 { 24 24 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 25 25 26 st ring body = _body;27 st ring tabulation = indent(depth);26 std::string body = _body; 27 std::string tabulation = indent(depth); 28 28 29 body.insert(0,tabulation);29 // body.insert(0,tabulation); 30 30 for (size_t pos=body.find('\n',0); pos<body.length()-1; pos=body.find('\n',++pos)) 31 31 body.insert(++pos,tabulation); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_header.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::header" 15 void XML::header (st ring encoding)15 void XML::header (std::string encoding) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 18 _body = "<?xml version=\"1.0\" encoding=\""+encoding+"\" ?>\n" + _body; 18 19 time_t current_time; 20 time (¤t_time); 21 22 std::string str_time = ctime (¤t_time ); 23 24 std::string str; 25 26 str = "<?xml version=\"1.0\" encoding=\""+encoding+"\" ?>\n"; 27 str += "\n"; 28 str += "<!--\n"; 29 str += "\tFile : " + _name+"."+_filename_extension + "\n"; 30 str += "\tDate : " + str_time +"\n"; 31 str += "\tComment : it's a autogenerated file : don't modify\n"; 32 str += "-->\n"; 33 str += "\n"; 34 35 _body = str + _body; 36 19 37 log_printf(FUNC,Behavioural,FUNCTION,"End"); 20 38 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_indent.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::indent" 15 st ring XML::indent (uint32_t depth)15 std::string XML::indent (uint32_t depth) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 18 st ring _return =string(depth,'\t');18 std::string _return = std::string(depth,'\t'); 19 19 log_printf(FUNC,Behavioural,FUNCTION,"End"); 20 20 … … 22 22 }; 23 23 24 st ring XML::indent (void)24 std::string XML::indent (void) 25 25 { 26 26 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); 27 st ring _return = indent(depth());27 std::string _return = indent(depth()); 28 28 log_printf(FUNC,Behavioural,FUNCTION,"End"); 29 29 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_singleton.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::singleton" 15 bool XML::singleton (st ring name)15 bool XML::singleton (std::string name) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_singleton_begin.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::singleton_begin" 15 bool XML::singleton_begin (st ring name)15 bool XML::singleton_begin (std::string name) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/src/XML_text.cpp
r43 r71 13 13 #undef FUNCTION 14 14 #define FUNCTION "XML::text" 15 bool XML::text (st ring text)15 bool XML::text (std::string text) 16 16 { 17 17 log_printf(FUNC,Behavioural,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Common/Makefile
r43 r71 2 2 # $Id$ 3 3 # 4 # [ 4 # [ Description ] 5 5 # 6 6 # Makefile 7 7 # 8 8 9 #-----[ 9 #-----[ Directory ]---------------------------------------- 10 10 DIR_COMPONENT = ./ 11 11 include $(DIR_COMPONENT)/Makefile.defs 12 12 13 #-----[ 13 #-----[ Library ]------------------------------------------ 14 14 LIBRARY = $(DIR_LIB)/libCommon.a 15 15 16 #-----[ 16 #-----[ include ]------------------------------------------ 17 17 18 18 all : $(LIBRARY_NEED) -
trunk/IPs/systemC/processor/Morpheo/Common/Makefile.defs
r43 r71 2 2 # $Id$ 3 3 # 4 # [ 4 # [ Description ] 5 5 # 6 6 7 #-----[ 7 #-----[ Directory ]---------------------------------------- 8 8 DIR_COMPONENT_MORPHEO = .. 9 9 DIR_MORPHEO = $(DIR_COMPONENT)/$(DIR_COMPONENT_MORPHEO) -
trunk/IPs/systemC/processor/Morpheo/Common/Makefile.deps
r43 r71 2 2 # $Id$ 3 3 # 4 # [ 4 # [ Description ] 5 5 # 6 6 # Makefile … … 10 10 Common = yes 11 11 12 #-----[ 12 #-----[ Library ]------------------------------------------ 13 13 Common_LIBRARY = -lCommon 14 14 15 15 Common_DIR_LIBRARY = -L$(DIR_MORPHEO)/Common/lib 16 16 17 #-----[ Rules ]-------------------------------------------- 17 Common_DEPENDENCIES = 18 18 19 Common_library : 20 @$(MAKE) --directory=$(DIR_MORPHEO)/Common --makefile=Makefile 19 Common_CLEAN = 20 21 22 #-----[ Rules ]-------------------------------------------- 23 24 #.NOTPARALLEL : Common_library Common_library_clean 25 26 Common_library : $(Common_DEPENDENCIES) 27 @\ 28 $(MAKE) --directory=$(DIR_MORPHEO)/Common --makefile=Makefile 21 29 22 Common_library_clean : 23 @$(MAKE) --directory=$(DIR_MORPHEO)/Common --makefile=Makefile clean 30 Common_library_clean : $(Common_CLEAN) 31 @\ 32 $(MAKE) --directory=$(DIR_MORPHEO)/Common --makefile=Makefile clean -
trunk/IPs/systemC/processor/Morpheo/Common/include/BitManipulation.h
r63 r71 11 11 #include <stdint.h> 12 12 #include <iostream> 13 using namespace std;14 13 15 14 namespace morpheo { 16 15 16 //............................................................................ 17 17 // gen_mask .................................................................. 18 //............................................................................ 18 19 19 20 template <typename T> … … 29 30 }; 30 31 32 template <typename T> 33 T gen_mask (uint32_t index_max, uint32_t index_min) 34 { 35 return (gen_mask<T>(index_max-index_min+1)<<index_min); 36 }; 37 38 template <typename T> 39 T gen_mask_not (uint32_t index_max, uint32_t index_min) 40 { 41 return ~(gen_mask<T>(index_max-index_min+1)<<index_min); 42 }; 43 44 //............................................................................ 31 45 // mask, mask_not ............................................................ 32 template <typename T> 33 T mask (uint32_t data, uint32_t index_max, uint32_t index_min) 34 { 35 return (gen_mask<T>(index_max-index_min+1)<<index_min) & data; 36 } 37 38 template <typename T> 39 T mask_not (uint32_t data, uint32_t index_max, uint32_t index_min) 40 { 41 return (~(gen_mask<T>(index_max-index_min+1)<<index_min)) & data; 42 } 43 46 //............................................................................ 47 template <typename T> 48 T mask (T data, uint32_t index_max, uint32_t index_min) 49 { 50 return gen_mask <T>(index_max,index_min) & data; 51 } 52 53 template <typename T> 54 T mask_not (T data, uint32_t index_max, uint32_t index_min) 55 { 56 return gen_mask_not<T>(index_max,index_min) & data; 57 } 58 59 //............................................................................ 44 60 // shift_left_logic, shift_right_logic ....................................... 45 template <typename T> 46 T shift_logic_left (uint32_t size, uint32_t data, uint32_t value) 61 //............................................................................ 62 template <typename T> 63 T shift_logic_left (uint32_t size, T data, T value) 47 64 { 48 65 T mask = gen_mask<T> (size); … … 52 69 53 70 template <typename T> 54 T shift_logic_right (uint32_t size, uint32_t data, uint32_tvalue)71 T shift_logic_right (uint32_t size, T data, T value) 55 72 { 56 73 T mask = gen_mask<T> (size); … … 59 76 } 60 77 78 //............................................................................ 61 79 // shift_logic ............................................................... 62 template <typename T> 63 T shift_logic (uint32_t size, uint32_t data, uint32_t value, bool is_direction_left) 80 //............................................................................ 81 template <typename T> 82 T shift_logic (uint32_t size, T data, T value, bool is_direction_left) 64 83 { 65 84 if (is_direction_left == true) … … 69 88 } 70 89 90 //............................................................................ 71 91 // shift_left_arithmetic, shift_right_arithmetic ............................. 72 template <typename T> 73 T shift_arithmetic_left (uint32_t size, uint32_t data, uint32_t value) 92 //............................................................................ 93 template <typename T> 94 T shift_arithmetic_left (uint32_t size, T data, T value) 74 95 { 75 96 bool carry = (data&1) != 0; … … 89 110 90 111 template <typename T> 91 T shift_arithmetic_right (uint32_t size, uint32_t data, uint32_tvalue)112 T shift_arithmetic_right (uint32_t size, T data, T value) 92 113 { 93 114 bool carry = (data&(1<<(size-1))) != 0; … … 105 126 } 106 127 128 //............................................................................ 107 129 // shift_arithmetic .......................................................... 108 template <typename T> 109 T shift_arithmetic (uint32_t size, uint32_t data, uint32_t value, bool is_direction_left) 130 //............................................................................ 131 template <typename T> 132 T shift_arithmetic (uint32_t size, T data, T value, bool is_direction_left) 110 133 { 111 134 if (is_direction_left == true) … … 115 138 } 116 139 140 //............................................................................ 117 141 // shift ..................................................................... 118 template <typename T> 119 T shift (uint32_t size, uint32_t data, uint32_t value, bool is_direction_left, bool is_shift_arithmetic) 142 //............................................................................ 143 template <typename T> 144 T shift (uint32_t size, T data, T value, bool is_direction_left, bool is_shift_arithmetic) 120 145 { 121 146 if (is_shift_arithmetic == true) … … 125 150 } 126 151 152 //............................................................................ 127 153 // rotate_left, rotate_right ................................................. 128 129 template <typename T> 130 T rotate_left (uint32_t size, uint32_t data, uint32_tvalue)154 //............................................................................ 155 template <typename T> 156 T rotate_left (uint32_t size, T data, T value) 131 157 { 132 158 T mask = gen_mask<T> (size); … … 137 163 138 164 template <typename T> 139 T rotate_right (uint32_t size, uint32_t data, uint32_tvalue)165 T rotate_right (uint32_t size, T data, T value) 140 166 { 141 167 T mask = gen_mask<T> (size); … … 145 171 } 146 172 173 //............................................................................ 147 174 // rotate .................................................................... 148 template <typename T> 149 T rotate (uint32_t size, uint32_t data, uint32_t value, bool is_direction_left) 175 //............................................................................ 176 template <typename T> 177 T rotate (uint32_t size, T data, T value, bool is_direction_left) 150 178 { 151 179 if (is_direction_left == true) … … 155 183 } 156 184 185 //............................................................................ 157 186 // range ..................................................................... 158 template <typename T> 159 T range (uint32_t data, uint32_t index_max, uint32_t index_min) 187 //............................................................................ 188 template <typename T> 189 T range (T data, uint32_t index_max, uint32_t index_min) 160 190 { 161 191 return gen_mask<T>(index_max-index_min+1) & (data << index_min); … … 163 193 164 194 template <typename T> 165 T range ( uint32_tdata, uint32_t nb_bits)195 T range (T data, uint32_t nb_bits) 166 196 { 167 197 return gen_mask<T>(nb_bits) & data; 168 198 } 199 200 //............................................................................ 201 // insert .................................................................... 202 //............................................................................ 203 template <typename T> 204 T insert (T data_old, T data_new, uint32_t index_max, uint32_t index_min) 205 { 206 return (mask<T>(data_new,index_max,index_min) | mask_not<T>(data_old,index_max,index_min)); 207 } 208 209 //............................................................................ 210 // extend .................................................................... 211 //............................................................................ 212 template <typename T> 213 T extend (uint32_t size, T data, bool extend_with_sign, uint32_t nb_bits_keep) 214 { 215 if (size < nb_bits_keep) 216 return data; 217 218 if (extend_with_sign and ((data>>(nb_bits_keep-1))&1)) 219 return data | (mask<T>(gen_mask<T>(size),size-1, nb_bits_keep)); 220 else 221 return data & (mask<T>(gen_mask<T>(size),nb_bits_keep-1, 0)); 222 } 223 224 //............................................................................ 225 // duplicate.................................................................. 226 //............................................................................ 227 228 template <typename T> 229 T duplicate (uint32_t size, T data_src, uint32_t nb_bits, uint32_t index_min) 230 { 231 T data_duplicate = mask<T>((data_src)>>index_min, nb_bits-1, 0); 232 T data_dest = 0; 233 234 for (uint32_t i=0; i < size; i+=nb_bits) 235 data_dest |= (data_duplicate<<i); 236 237 return data_dest; 238 } 239 240 template <typename T> 241 T duplicate (uint32_t size, T data_src, uint32_t nb_bits) 242 { 243 return duplicate<T> (size,data_src,nb_bits,0); 244 } 245 246 169 247 }; // end namespace morpheo 170 248 -
trunk/IPs/systemC/processor/Morpheo/Common/include/ChangeCase.h
r63 r71 12 12 #include <stdint.h> 13 13 14 using namespace std;15 16 14 namespace morpheo { 17 15 18 inline void UpperCase(st ring& S)16 inline void UpperCase(std::string& S) 19 17 { 20 18 uint32_t n = S.size(); … … 27 25 } 28 26 29 inline void LowerCase(st ring& S)27 inline void LowerCase(std::string& S) 30 28 { 31 29 uint32_t n = S.size(); -
trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h
r63 r71 2 2 #define DEBUG_H 3 3 4 #include "Common/include/Message.h" 4 5 #include "Behavioural/include/Debug_component.h" 5 6 #include <stdio.h> … … 8 9 #include <sstream> 9 10 #include <string> 10 using namespace std;11 11 12 12 // Debug's Level : … … 29 29 //Debug 30 30 # define log_printf(level, component, func, str... ) \ 31 do\32 {\33 if ( (DEBUG == DEBUG_ALL ) or\34 (DEBUG_ ## level == DEBUG_NONE) or\35 (( DEBUG_ ## level <= DEBUG) and\36 ( DEBUG_ ## component == true )) )\37 {\38 if (DEBUG >= DEBUG_ALL )\39 {\40 switch (DEBUG_ ## level)\41 {\42 case DEBUG_NONE : fprintf(stdout,"(none ) "); break;\43 case DEBUG_INFO : fprintf(stdout,"(information) "); break;\44 case DEBUG_TRACE : fprintf(stdout,"(trace ) "); break;\45 case DEBUG_FUNC : fprintf(stdout,"(function ) "); break;\46 case DEBUG_ALL : fprintf(stdout,"(all ) "); break;\47 default : fprintf(stdout,"(undefine ) "); break;\48 }\49 }\50 fprintf(stdout,"<%s> ",func);\51 if (DEBUG >= DEBUG_FUNC)\52 {\53 fprintf(stdout,"In file %s, ",__FILE__);\54 fprintf(stdout,"at line %d, ",__LINE__);\55 }\56 fprintf(stdout,": ");\57 fprintf(stdout,str);\58 fprintf(stdout,"\n");\59 fflush (stdout);\60 }\61 } while(0)31 do \ 32 { \ 33 if ((DEBUG == DEBUG_ALL ) or \ 34 (DEBUG_ ## level == DEBUG_NONE) or \ 35 (( DEBUG_ ## level <= DEBUG) and \ 36 ( DEBUG_ ## component == true )) ) \ 37 { \ 38 if (DEBUG >= DEBUG_ALL ) \ 39 { \ 40 switch (DEBUG_ ## level) \ 41 { \ 42 case DEBUG_NONE : msg(_("(none ) ")); break; \ 43 case DEBUG_INFO : msg(_("(information) ")); break; \ 44 case DEBUG_TRACE : msg(_("(trace ) ")); break; \ 45 case DEBUG_FUNC : msg(_("(function ) ")); break; \ 46 case DEBUG_ALL : msg(_("(all ) ")); break; \ 47 default : msg(_("(undefine ) ")); break; \ 48 } \ 49 } \ 50 msg(_("<%s> "),func); \ 51 if (DEBUG >= DEBUG_FUNC) \ 52 { \ 53 msg(_("In file %s, "),__FILE__); \ 54 msg(_("at line %d, "),__LINE__); \ 55 } \ 56 msg(_(": ")); \ 57 msg(str); \ 58 msg(_("\n")); \ 59 fflush (stdout); \ 60 } \ 61 } while(0) 62 62 63 63 #else -
trunk/IPs/systemC/processor/Morpheo/Common/include/ErrorMorpheo.h
r43 r71 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ 10 10 11 #include "ToString.h" 11 12 #include <iostream> 12 13 #include <exception> 13 14 14 using namespace std;15 16 15 namespace morpheo { 17 16 18 class ErrorMorpheo : public exception 17 #define ERRORMORPHEO(funcname,msg) ErrorMorpheo(funcname,msg,__LINE__,__FILE__) 18 19 class ErrorMorpheo : public std::exception 19 20 { 20 21 // -----[ fields ]---------------------------------------------------- 21 private : st ring _msg;22 private : std::string _msg; 22 23 23 24 // -----[ methods ]--------------------------------------------------- 24 public : ErrorMorpheo () throw() { _msg = "Exception detected ...";} 25 public : ErrorMorpheo (string msg) throw() { _msg = msg;} 25 public : ErrorMorpheo () throw() {_msg="Exception detected ...";} 26 public : ErrorMorpheo (std::string msg) throw() {_msg=msg;} 27 public : ErrorMorpheo (std::string funcname, 28 std::string msg , 29 int line , 30 std::string file ) throw() 31 { 32 _msg = "<"+funcname+"> at line " + toString(line) + ", in file " + file + " : "+msg; 33 } 26 34 public : ~ErrorMorpheo (void) throw() {} 27 35 public : const char* what () const throw() { return ( _msg.c_str() );} … … 29 37 }; 30 38 31 class TestMorpheo : public exception39 class TestMorpheo : public std::exception 32 40 { 33 41 // -----[ fields ]---------------------------------------------------- 34 private : st ring _msg;42 private : std::string _msg; 35 43 36 44 // -----[ methods ]--------------------------------------------------- 37 public : TestMorpheo () throw() { _msg ="Test error ...";}38 public : TestMorpheo (st ring msg) throw() { _msg =msg;}39 public : ~TestMorpheo (void) throw() {}40 public : const char* what () const throw() { return ( _msg.c_str() );}45 public : TestMorpheo () throw() {_msg="Test error ...";} 46 public : TestMorpheo (std::string msg) throw() {_msg=msg;} 47 public : ~TestMorpheo (void) throw() {} 48 public : const char* what () const throw() { return ( _msg.c_str() );} 41 49 }; 42 50 -
trunk/IPs/systemC/processor/Morpheo/Common/include/Log2.h
r67 r71 11 11 #include <stdint.h> 12 12 #include <math.h> 13 using namespace std;14 13 15 14 namespace morpheo { -
trunk/IPs/systemC/processor/Morpheo/Common/include/Message.h
r2 r71 1 #ifndef MESSAGE_H 2 #define MESSAGE_H 1 3 /* 2 4 * $Id$ 3 5 * 4 * [ 6 * [ Description ] 5 7 * 6 8 * Routine of Test 7 9 */ 8 10 9 namespace morpheo { 11 #include <stdio.h> 12 #include <string.h> 13 #include <libintl.h> 10 14 11 #define cerr_msg cerr << "<" << __FILE__ << "> line " << __LINE__ << " : " 12 15 namespace morpheo { 16 17 #ifdef NO_TRANSLATION 18 # define _(String) (String) 19 #else 20 # define _(String) gettext (String) 21 #endif 22 23 #define msg(arg...) fprintf(stdout,arg); 24 #define err(arg...) fprintf(stderr,arg); 25 13 26 }; // end namespace morpheo 27 #endif -
trunk/IPs/systemC/processor/Morpheo/Common/include/Test.h
r53 r71 5 5 #include <sstream> 6 6 #include <stdint.h> 7 #include "Common/include/Message.h" 7 8 #include "Common/include/ErrorMorpheo.h" 8 using namespace std; 9 #include "Common/include/ToString.h" 9 10 10 11 //-----[ Routine de test ]--------------------------------------- … … 12 13 static uint32_t num_test; 13 14 14 void test_ko_error (void)15 inline void test_ko_error (void) 15 16 { 16 string msg = "Test ko : error in test \""+ toString(num_test)+"\"";17 throw ( ErrorMorpheo (msg));17 string msg = "Test ko : error in test \""+morpheo::toString(num_test)+"\""; 18 throw (morpheo::ErrorMorpheo (msg)); 18 19 } 19 20 20 21 template <class T> 21 void test_ko (char * file, uint32_t line, T exp1, T exp2)22 inline void test_ko (char * file, uint32_t line, T exp1, T exp2) 22 23 { 23 24 cerr << "[" << num_test << "] : Test KO" … … 27 28 << " - Line : " << line << endl 28 29 << " * Expression is different" << endl 29 << " - exp1 : "+ toString(exp1) << endl30 << " - exp2 : "+ toString(exp2) << endl;30 << " - exp1 : "+morpheo::toString(exp1) << endl 31 << " - exp2 : "+morpheo::toString(exp2) << endl; 31 32 32 33 test_ko_error (); 33 34 }; 34 35 35 void test_ko (char * file, uint32_t line)36 inline void test_ko (char * file, uint32_t line) 36 37 { 37 38 cerr << "[" << num_test << "] : Test KO" … … 44 45 }; 45 46 46 void test_ok ()47 inline void test_ok () 47 48 { 48 cout << "[" << num_test << "] : Test OK" << endl;49 msg (_("[%d] : Test OK\n"), num_test); 49 50 50 51 num_test ++; 51 52 }; 52 53 53 void test_ok (char * file, uint32_t line)54 inline void test_ok (char * file, uint32_t line) 54 55 { 55 cout << "[" << num_test << "] : Test OK" 56 << "\tline " << line << endl 57 // << " * Localisation" << endl 58 // << " - File : " << file << endl 59 // << " - Line : " << line << endl 60 ; 56 msg (_("[%d] : Test OK\n"), num_test); 57 msg (_("\tline %d\n"), line); 61 58 62 59 num_test ++; … … 64 61 65 62 template <class T> 66 void test_ok (char * file, uint32_t line, T exp)63 inline void test_ok (char * file, uint32_t line, T exp) 67 64 { 68 cout << "[" << num_test << "] : Test OK" 69 << "\tline " << line 70 << "\tvalue : " << toString(exp) << endl 71 // << " * Localisation" << endl 72 // << " - File : " << file << endl 73 // << " - Line : " << line << endl 74 // << " * Expression" << endl 75 // << " - exp : "+toString(exp) << endl 76 ; 65 msg (_("[%d] : Test OK\n"), num_test); 66 msg (_("\tline %d\n"), line); 67 msg (_("\tvalue %s\n"), (morpheo::toString(exp)).c_str()); 77 68 78 69 num_test ++; … … 80 71 81 72 template <class T> 82 void test(char * file, uint32_t line, T exp1, T exp2)73 inline void test(char * file, uint32_t line, T exp1, T exp2) 83 74 { 84 75 if (exp1 != exp2) -
trunk/IPs/systemC/processor/Morpheo/Common/include/ToString.h
r66 r71 17 17 #include <limits> 18 18 19 using std::setprecision ;20 using std::ostringstream ;21 using std::boolalpha ;22 23 19 namespace morpheo { 24 20 25 21 template<typename T> inline std::string toString (const T& x) 26 22 { 27 ostringstream out("");23 std::ostringstream out(""); 28 24 out << x; 29 25 return out.str(); … … 32 28 template<> inline std::string toString<bool> (const bool& x) 33 29 { 34 ostringstream out("");30 std::ostringstream out(""); 35 31 //out << boolalpha << x; 36 32 out << x; … … 41 37 { 42 38 const int sigdigits = std::numeric_limits<float>::digits10; 43 ostringstream out("");44 out << s etprecision(sigdigits) << x;39 std::ostringstream out(""); 40 out << std::setprecision(sigdigits) << x; 45 41 return out.str(); 46 42 } … … 49 45 { 50 46 const int sigdigits = std::numeric_limits<double>::digits10; 51 ostringstream out("");52 out << s etprecision(sigdigits) << x;47 std::ostringstream out(""); 48 out << std::setprecision(sigdigits) << x; 53 49 return out.str(); 54 50 } … … 57 53 { 58 54 const int sigdigits = std::numeric_limits<long double>::digits10; 59 ostringstream out("");60 out << s etprecision(sigdigits) << x;55 std::ostringstream out(""); 56 out << std::setprecision(sigdigits) << x; 61 57 return out.str(); 62 58 } … … 64 60 // template<> inline std::string toString< int8_t> (const int8_t& x) 65 61 // { 66 // ostringstream out("");62 // std::ostringstream out(""); 67 63 // out << x; 68 64 // return out.str(); … … 71 67 // template<> inline std::string toString<uint8_t> (const uint8_t& x) 72 68 // { 73 // ostringstream out("");69 // std::ostringstream out(""); 74 70 // out << x; 75 71 // return out.str(); … … 78 74 // template<> inline std::string toString< int16_t> (const int16_t& x) 79 75 // { 80 // ostringstream out("");76 // std::ostringstream out(""); 81 77 // out << x; 82 78 // return out.str(); … … 85 81 // template<> inline std::string toString<uint16_t> (const uint16_t& x) 86 82 // { 87 // ostringstream out("");83 // std::ostringstream out(""); 88 84 // out << x; 89 85 // return out.str(); … … 92 88 // template<> inline std::string toString< int32_t> (const int32_t& x) 93 89 // { 94 // ostringstream out("");90 // std::ostringstream out(""); 95 91 // out << x; 96 92 // return out.str(); … … 99 95 // template<> inline std::string toString<uint32_t> (const uint32_t& x) 100 96 // { 101 // ostringstream out("");97 // std::ostringstream out(""); 102 98 // out << x; 103 99 // return out.str();
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