Changeset 15 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor

Timestamp:

Apr 5, 2007, 4:17:30 PM (17 years ago)

Author:

rosiere

Message:

Interface normalisé
Début du banc de registres multi niveaux

Location:

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor

Files:

• Branch_History_Table/Makefile.deps (modified) (4 diffs)
• Branch_History_Table/SelfTest/mkf.info (modified) (1 diff)
• Branch_History_Table/SelfTest/src/test.cpp (modified) (3 diffs)
• Branch_History_Table/include/Branch_History_Table.h (modified) (3 diffs)
• Branch_History_Table/include/Parameters.h (modified) (2 diffs)
• Branch_History_Table/include/Statistics.h (modified) (1 diff)
• Branch_History_Table/src/Branch_History_Table.cpp (modified) (1 diff)
• Branch_History_Table/src/Branch_History_Table_allocation.cpp (modified) (4 diffs)
• Branch_History_Table/src/Branch_History_Table_deallocation.cpp (modified) (1 diff)
• Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp (modified) (3 diffs)
• Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp (modified) (1 diff)
• Branch_History_Table/src/Branch_History_Table_vhdl_testbench_port.cpp (modified) (1 diff)
• Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp (modified) (2 diffs)
• Branch_History_Table/src/Parameters.cpp (modified) (2 diffs)
• Pattern_History_Table/Makefile.deps (modified) (4 diffs)
• Pattern_History_Table/SelfTest/mkf.info (modified) (1 diff)
• Pattern_History_Table/SelfTest/src/test.cpp (modified) (3 diffs)
• Pattern_History_Table/include/Parameters.h (modified) (2 diffs)
• Pattern_History_Table/include/Pattern_History_Table.h (modified) (3 diffs)
• Pattern_History_Table/include/Statistics.h (modified) (1 diff)
• Pattern_History_Table/src/Parameters.cpp (modified) (2 diffs)
• Pattern_History_Table/src/Pattern_History_Table.cpp (modified) (1 diff)
• Pattern_History_Table/src/Pattern_History_Table_allocation.cpp (modified) (3 diffs)
• Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp (modified) (1 diff)
• Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp (modified) (3 diffs)
• Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp (modified) (1 diff)
• Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_port.cpp (modified) (1 diff)
• Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp (modified) (2 diffs)
• SelfTest/mkf.info (modified) (1 diff)
• SelfTest/src/test.cpp (modified) (3 diffs)
• Two_Level_Branch_Predictor_Glue/SelfTest/mkf.info (modified) (1 diff)
• include/Two_Level_Branch_Predictor.h (modified) (1 diff)
• src/Two_Level_Branch_Predictor_allocation.cpp (modified) (3 diffs)
• src/Two_Level_Branch_Predictor_deallocation.cpp (modified) (1 diff)
• src/Two_Level_Branch_Predictor_vhdl_body.cpp (modified) (2 diffs)
• src/Two_Level_Branch_Predictor_vhdl_port.cpp (modified) (1 diff)
• src/Two_Level_Branch_Predictor_vhdl_testbench_port.cpp (modified) (1 diff)
• src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp (modified) (1 diff)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/Makefile.deps

@@ -14 +14 @@
 include                         $(DIR_MORPHEO)/Behavioural/Generic/Shifter/Makefile.deps
 endif
-ifndef RegisterFile
-include                         $(DIR_MORPHEO)/Behavioural/Generic/RegisterFile/Makefile.deps
+ifndef RegisterFile_Monolithic
+include                         $(DIR_MORPHEO)/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/Makefile.deps
 endif
 
@@ -22 +22 @@
 #-----[ Library ]------------------------------------------
 Branch_History_Table_LIBRARY            =       -lBranch_History_Table  \
-                                                $(RegisterFile_LIBRARY) \
+                                                $(RegisterFile_Monolithic_LIBRARY)      \
                                                 $(Shifter_LIBRARY)      \
                                                 $(Behavioural_LIBRARY)  
 
 Branch_History_Table_DIR_LIBRARY        =       -L$(DIR_MORPHEO)/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/lib        \
-                                                $(RegisterFile_DIR_LIBRARY)     \
+                                                $(RegisterFile_Monolithic_DIR_LIBRARY)  \
                                                 $(Shifter_DIR_LIBRARY)          \
                                                 $(Behavioural_DIR_LIBRARY)
@@ -36 +36 @@
                                         @$(MAKE) Behavioural_library
                                         @$(MAKE) Shifter_library
-                                        @$(MAKE) RegisterFile_library
+                                        @$(MAKE) RegisterFile_Monolithic_library
                                         @$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table --makefile=Makefile 
 
@@ -42 +42 @@
                                         @$(MAKE) Behavioural_library_clean
                                         @$(MAKE) Shifter_library_clean
-                                        @$(MAKE) RegisterFile_library_clean
+                                        @$(MAKE) RegisterFile_Monolithic_library_clean
                                         @$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table --makefile=Makefile clean

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/mkf.info

@@ -1 @@
-
-# Branch_History_Table_0
-target_dep      all     Branch_History_Table_0.ngc
-target_dep      Branch_History_Table_0.ngc      Branch_History_Table_0.prj
-target_dep      Branch_History_Table_0.prj      Branch_History_Table_0_Pack.vhdl Branch_History_Table_0_RegisterFile_Pack.vhdl Branch_History_Table_0_RegisterFile.vhdl Branch_History_Table_0_Shifter_Pack.vhdl Branch_History_Table_0_Shifter.vhdl Branch_History_Table_0.vhdl
-
-# Branch_History_Table_10
-target_dep      all     Branch_History_Table_10.ngc
-target_dep      Branch_History_Table_10.ngc     Branch_History_Table_10.prj
-target_dep      Branch_History_Table_10.prj     Branch_History_Table_10_Pack.vhdl Branch_History_Table_10_RegisterFile_Pack.vhdl Branch_History_Table_10_RegisterFile.vhdl Branch_History_Table_10_Shifter_Pack.vhdl Branch_History_Table_10_Shifter.vhdl Branch_History_Table_10.vhdl
-
-# Branch_History_Table_11
-target_dep      all     Branch_History_Table_11.ngc
-target_dep      Branch_History_Table_11.ngc     Branch_History_Table_11.prj
-target_dep      Branch_History_Table_11.prj     Branch_History_Table_11_Pack.vhdl Branch_History_Table_11_RegisterFile_Pack.vhdl Branch_History_Table_11_RegisterFile.vhdl Branch_History_Table_11_Shifter_Pack.vhdl Branch_History_Table_11_Shifter.vhdl Branch_History_Table_11.vhdl
-
-# Branch_History_Table_12
-target_dep      all     Branch_History_Table_12.ngc
-target_dep      Branch_History_Table_12.ngc     Branch_History_Table_12.prj
-target_dep      Branch_History_Table_12.prj     Branch_History_Table_12_Pack.vhdl Branch_History_Table_12_RegisterFile_Pack.vhdl Branch_History_Table_12_RegisterFile.vhdl Branch_History_Table_12_Shifter_Pack.vhdl Branch_History_Table_12_Shifter.vhdl Branch_History_Table_12.vhdl
-
-# Branch_History_Table_13
-target_dep      all     Branch_History_Table_13.ngc
-target_dep      Branch_History_Table_13.ngc     Branch_History_Table_13.prj
-target_dep      Branch_History_Table_13.prj     Branch_History_Table_13_Pack.vhdl Branch_History_Table_13_RegisterFile_Pack.vhdl Branch_History_Table_13_RegisterFile.vhdl Branch_History_Table_13_Shifter_Pack.vhdl Branch_History_Table_13_Shifter.vhdl Branch_History_Table_13.vhdl
-
-# Branch_History_Table_14
-target_dep      all     Branch_History_Table_14.ngc
-target_dep      Branch_History_Table_14.ngc     Branch_History_Table_14.prj
-target_dep      Branch_History_Table_14.prj     Branch_History_Table_14_Pack.vhdl Branch_History_Table_14_RegisterFile_Pack.vhdl Branch_History_Table_14_RegisterFile.vhdl Branch_History_Table_14_Shifter_Pack.vhdl Branch_History_Table_14_Shifter.vhdl Branch_History_Table_14.vhdl
-
-# Branch_History_Table_15
-target_dep      all     Branch_History_Table_15.ngc
-target_dep      Branch_History_Table_15.ngc     Branch_History_Table_15.prj
-target_dep      Branch_History_Table_15.prj     Branch_History_Table_15_Pack.vhdl Branch_History_Table_15_RegisterFile_Pack.vhdl Branch_History_Table_15_RegisterFile.vhdl Branch_History_Table_15_Shifter_Pack.vhdl Branch_History_Table_15_Shifter.vhdl Branch_History_Table_15.vhdl
-
-# Branch_History_Table_16
-target_dep      all     Branch_History_Table_16.ngc
-target_dep      Branch_History_Table_16.ngc     Branch_History_Table_16.prj
-target_dep      Branch_History_Table_16.prj     Branch_History_Table_16_Pack.vhdl Branch_History_Table_16_RegisterFile_Pack.vhdl Branch_History_Table_16_RegisterFile.vhdl Branch_History_Table_16_Shifter_Pack.vhdl Branch_History_Table_16_Shifter.vhdl Branch_History_Table_16.vhdl
-
-# Branch_History_Table_17
-target_dep      all     Branch_History_Table_17.ngc
-target_dep      Branch_History_Table_17.ngc     Branch_History_Table_17.prj
-target_dep      Branch_History_Table_17.prj     Branch_History_Table_17_Pack.vhdl Branch_History_Table_17_RegisterFile_Pack.vhdl Branch_History_Table_17_RegisterFile.vhdl Branch_History_Table_17_Shifter_Pack.vhdl Branch_History_Table_17_Shifter.vhdl Branch_History_Table_17.vhdl
-
-# Branch_History_Table_18
-target_dep      all     Branch_History_Table_18.ngc
-target_dep      Branch_History_Table_18.ngc     Branch_History_Table_18.prj
-target_dep      Branch_History_Table_18.prj     Branch_History_Table_18_Pack.vhdl Branch_History_Table_18_RegisterFile_Pack.vhdl Branch_History_Table_18_RegisterFile.vhdl Branch_History_Table_18_Shifter_Pack.vhdl Branch_History_Table_18_Shifter.vhdl Branch_History_Table_18.vhdl
-
-# Branch_History_Table_19
-target_dep      all     Branch_History_Table_19.ngc
-target_dep      Branch_History_Table_19.ngc     Branch_History_Table_19.prj
-target_dep      Branch_History_Table_19.prj     Branch_History_Table_19_Pack.vhdl Branch_History_Table_19_RegisterFile_Pack.vhdl Branch_History_Table_19_RegisterFile.vhdl Branch_History_Table_19_Shifter_Pack.vhdl Branch_History_Table_19_Shifter.vhdl Branch_History_Table_19.vhdl
-
-# Branch_History_Table_1
-target_dep      all     Branch_History_Table_1.ngc
-target_dep      Branch_History_Table_1.ngc      Branch_History_Table_1.prj
-target_dep      Branch_History_Table_1.prj      Branch_History_Table_10_Pack.vhdl Branch_History_Table_10_RegisterFile_Pack.vhdl Branch_History_Table_10_RegisterFile.vhdl Branch_History_Table_10_Shifter_Pack.vhdl Branch_History_Table_10_Shifter.vhdl Branch_History_Table_10.vhdl Branch_History_Table_11_Pack.vhdl Branch_History_Table_11_RegisterFile_Pack.vhdl Branch_History_Table_11_RegisterFile.vhdl Branch_History_Table_11_Shifter_Pack.vhdl Branch_History_Table_11_Shifter.vhdl Branch_History_Table_11.vhdl Branch_History_Table_12_Pack.vhdl Branch_History_Table_12_RegisterFile_Pack.vhdl Branch_History_Table_12_RegisterFile.vhdl Branch_History_Table_12_Shifter_Pack.vhdl Branch_History_Table_12_Shifter.vhdl Branch_History_Table_12.vhdl Branch_History_Table_13_Pack.vhdl Branch_History_Table_13_RegisterFile_Pack.vhdl Branch_History_Table_13_RegisterFile.vhdl Branch_History_Table_13_Shifter_Pack.vhdl Branch_History_Table_13_Shifter.vhdl Branch_History_Table_13.vhdl Branch_History_Table_14_Pack.vhdl Branch_History_Table_14_RegisterFile_Pack.vhdl Branch_History_Table_14_RegisterFile.vhdl Branch_History_Table_14_Shifter_Pack.vhdl Branch_History_Table_14_Shifter.vhdl Branch_History_Table_14.vhdl Branch_History_Table_15_Pack.vhdl Branch_History_Table_15_RegisterFile_Pack.vhdl Branch_History_Table_15_RegisterFile.vhdl Branch_History_Table_15_Shifter_Pack.vhdl Branch_History_Table_15_Shifter.vhdl Branch_History_Table_15.vhdl Branch_History_Table_16_Pack.vhdl Branch_History_Table_16_RegisterFile_Pack.vhdl Branch_History_Table_16_RegisterFile.vhdl Branch_History_Table_16_Shifter_Pack.vhdl Branch_History_Table_16_Shifter.vhdl Branch_History_Table_16.vhdl Branch_History_Table_17_Pack.vhdl Branch_History_Table_17_RegisterFile_Pack.vhdl Branch_History_Table_17_RegisterFile.vhdl Branch_History_Table_17_Shifter_Pack.vhdl Branch_History_Table_17_Shifter.vhdl Branch_History_Table_17.vhdl Branch_History_Table_18_Pack.vhdl Branch_History_Table_18_RegisterFile_Pack.vhdl Branch_History_Table_18_RegisterFile.vhdl Branch_History_Table_18_Shifter_Pack.vhdl Branch_History_Table_18_Shifter.vhdl Branch_History_Table_18.vhdl Branch_History_Table_19_Pack.vhdl Branch_History_Table_19_RegisterFile_Pack.vhdl Branch_History_Table_19_RegisterFile.vhdl Branch_History_Table_19_Shifter_Pack.vhdl Branch_History_Table_19_Shifter.vhdl Branch_History_Table_19.vhdl Branch_History_Table_1_Pack.vhdl Branch_History_Table_1_RegisterFile_Pack.vhdl Branch_History_Table_1_RegisterFile.vhdl Branch_History_Table_1_Shifter_Pack.vhdl Branch_History_Table_1_Shifter.vhdl Branch_History_Table_1.vhdl
-
-# Branch_History_Table_20
-target_dep      all     Branch_History_Table_20.ngc
-target_dep      Branch_History_Table_20.ngc     Branch_History_Table_20.prj
-target_dep      Branch_History_Table_20.prj     Branch_History_Table_20_Pack.vhdl Branch_History_Table_20_RegisterFile_Pack.vhdl Branch_History_Table_20_RegisterFile.vhdl Branch_History_Table_20_Shifter_Pack.vhdl Branch_History_Table_20_Shifter.vhdl Branch_History_Table_20.vhdl
-
-# Branch_History_Table_21
-target_dep      all     Branch_History_Table_21.ngc
-target_dep      Branch_History_Table_21.ngc     Branch_History_Table_21.prj
-target_dep      Branch_History_Table_21.prj     Branch_History_Table_21_Pack.vhdl Branch_History_Table_21_RegisterFile_Pack.vhdl Branch_History_Table_21_RegisterFile.vhdl Branch_History_Table_21_Shifter_Pack.vhdl Branch_History_Table_21_Shifter.vhdl Branch_History_Table_21.vhdl
-
-# Branch_History_Table_22
-target_dep      all     Branch_History_Table_22.ngc
-target_dep      Branch_History_Table_22.ngc     Branch_History_Table_22.prj
-target_dep      Branch_History_Table_22.prj     Branch_History_Table_22_Pack.vhdl Branch_History_Table_22_RegisterFile_Pack.vhdl Branch_History_Table_22_RegisterFile.vhdl Branch_History_Table_22_Shifter_Pack.vhdl Branch_History_Table_22_Shifter.vhdl Branch_History_Table_22.vhdl
-
-# Branch_History_Table_23
-target_dep      all     Branch_History_Table_23.ngc
-target_dep      Branch_History_Table_23.ngc     Branch_History_Table_23.prj
-target_dep      Branch_History_Table_23.prj     Branch_History_Table_23_Pack.vhdl Branch_History_Table_23_RegisterFile_Pack.vhdl Branch_History_Table_23_RegisterFile.vhdl Branch_History_Table_23_Shifter_Pack.vhdl Branch_History_Table_23_Shifter.vhdl Branch_History_Table_23.vhdl
-
-# Branch_History_Table_24
-target_dep      all     Branch_History_Table_24.ngc
-target_dep      Branch_History_Table_24.ngc     Branch_History_Table_24.prj
-target_dep      Branch_History_Table_24.prj     Branch_History_Table_24_Pack.vhdl Branch_History_Table_24_RegisterFile_Pack.vhdl Branch_History_Table_24_RegisterFile.vhdl Branch_History_Table_24_Shifter_Pack.vhdl Branch_History_Table_24_Shifter.vhdl Branch_History_Table_24.vhdl
-
-# Branch_History_Table_25
-target_dep      all     Branch_History_Table_25.ngc
-target_dep      Branch_History_Table_25.ngc     Branch_History_Table_25.prj
-target_dep      Branch_History_Table_25.prj     Branch_History_Table_25_Pack.vhdl Branch_History_Table_25_RegisterFile_Pack.vhdl Branch_History_Table_25_RegisterFile.vhdl Branch_History_Table_25_Shifter_Pack.vhdl Branch_History_Table_25_Shifter.vhdl Branch_History_Table_25.vhdl
-
-# Branch_History_Table_26
-target_dep      all     Branch_History_Table_26.ngc
-target_dep      Branch_History_Table_26.ngc     Branch_History_Table_26.prj
-target_dep      Branch_History_Table_26.prj     Branch_History_Table_26_Pack.vhdl Branch_History_Table_26_RegisterFile_Pack.vhdl Branch_History_Table_26_RegisterFile.vhdl Branch_History_Table_26_Shifter_Pack.vhdl Branch_History_Table_26_Shifter.vhdl Branch_History_Table_26.vhdl
-
-# Branch_History_Table_27
-target_dep      all     Branch_History_Table_27.ngc
-target_dep      Branch_History_Table_27.ngc     Branch_History_Table_27.prj
-target_dep      Branch_History_Table_27.prj     Branch_History_Table_27_Pack.vhdl Branch_History_Table_27_RegisterFile_Pack.vhdl Branch_History_Table_27_RegisterFile.vhdl Branch_History_Table_27_Shifter_Pack.vhdl Branch_History_Table_27_Shifter.vhdl Branch_History_Table_27.vhdl
-
-# Branch_History_Table_28
-target_dep      all     Branch_History_Table_28.ngc
-target_dep      Branch_History_Table_28.ngc     Branch_History_Table_28.prj
-target_dep      Branch_History_Table_28.prj     Branch_History_Table_28_Pack.vhdl Branch_History_Table_28_RegisterFile_Pack.vhdl Branch_History_Table_28_RegisterFile.vhdl Branch_History_Table_28_Shifter_Pack.vhdl Branch_History_Table_28_Shifter.vhdl Branch_History_Table_28.vhdl
-
-# Branch_History_Table_29
-target_dep      all     Branch_History_Table_29.ngc
-target_dep      Branch_History_Table_29.ngc     Branch_History_Table_29.prj
-target_dep      Branch_History_Table_29.prj     Branch_History_Table_29_Pack.vhdl Branch_History_Table_29_RegisterFile_Pack.vhdl Branch_History_Table_29_RegisterFile.vhdl Branch_History_Table_29_Shifter_Pack.vhdl Branch_History_Table_29_Shifter.vhdl Branch_History_Table_29.vhdl
-
-# Branch_History_Table_2
-target_dep      all     Branch_History_Table_2.ngc
-target_dep      Branch_History_Table_2.ngc      Branch_History_Table_2.prj
-target_dep      Branch_History_Table_2.prj      Branch_History_Table_20_Pack.vhdl Branch_History_Table_20_RegisterFile_Pack.vhdl Branch_History_Table_20_RegisterFile.vhdl Branch_History_Table_20_Shifter_Pack.vhdl Branch_History_Table_20_Shifter.vhdl Branch_History_Table_20.vhdl Branch_History_Table_21_Pack.vhdl Branch_History_Table_21_RegisterFile_Pack.vhdl Branch_History_Table_21_RegisterFile.vhdl Branch_History_Table_21_Shifter_Pack.vhdl Branch_History_Table_21_Shifter.vhdl Branch_History_Table_21.vhdl Branch_History_Table_22_Pack.vhdl Branch_History_Table_22_RegisterFile_Pack.vhdl Branch_History_Table_22_RegisterFile.vhdl Branch_History_Table_22_Shifter_Pack.vhdl Branch_History_Table_22_Shifter.vhdl Branch_History_Table_22.vhdl Branch_History_Table_23_Pack.vhdl Branch_History_Table_23_RegisterFile_Pack.vhdl Branch_History_Table_23_RegisterFile.vhdl Branch_History_Table_23_Shifter_Pack.vhdl Branch_History_Table_23_Shifter.vhdl Branch_History_Table_23.vhdl Branch_History_Table_24_Pack.vhdl Branch_History_Table_24_RegisterFile_Pack.vhdl Branch_History_Table_24_RegisterFile.vhdl Branch_History_Table_24_Shifter_Pack.vhdl Branch_History_Table_24_Shifter.vhdl Branch_History_Table_24.vhdl Branch_History_Table_25_Pack.vhdl Branch_History_Table_25_RegisterFile_Pack.vhdl Branch_History_Table_25_RegisterFile.vhdl Branch_History_Table_25_Shifter_Pack.vhdl Branch_History_Table_25_Shifter.vhdl Branch_History_Table_25.vhdl Branch_History_Table_26_Pack.vhdl Branch_History_Table_26_RegisterFile_Pack.vhdl Branch_History_Table_26_RegisterFile.vhdl Branch_History_Table_26_Shifter_Pack.vhdl Branch_History_Table_26_Shifter.vhdl Branch_History_Table_26.vhdl Branch_History_Table_27_Pack.vhdl Branch_History_Table_27_RegisterFile_Pack.vhdl Branch_History_Table_27_RegisterFile.vhdl Branch_History_Table_27_Shifter_Pack.vhdl Branch_History_Table_27_Shifter.vhdl Branch_History_Table_27.vhdl Branch_History_Table_28_Pack.vhdl Branch_History_Table_28_RegisterFile_Pack.vhdl Branch_History_Table_28_RegisterFile.vhdl Branch_History_Table_28_Shifter_Pack.vhdl Branch_History_Table_28_Shifter.vhdl Branch_History_Table_28.vhdl Branch_History_Table_29_Pack.vhdl Branch_History_Table_29_RegisterFile_Pack.vhdl Branch_History_Table_29_RegisterFile.vhdl Branch_History_Table_29_Shifter_Pack.vhdl Branch_History_Table_29_Shifter.vhdl Branch_History_Table_29.vhdl Branch_History_Table_2_Pack.vhdl Branch_History_Table_2_RegisterFile_Pack.vhdl Branch_History_Table_2_RegisterFile.vhdl Branch_History_Table_2_Shifter_Pack.vhdl Branch_History_Table_2_Shifter.vhdl Branch_History_Table_2.vhdl
-
-# Branch_History_Table_30
-target_dep      all     Branch_History_Table_30.ngc
-target_dep      Branch_History_Table_30.ngc     Branch_History_Table_30.prj
-target_dep      Branch_History_Table_30.prj     Branch_History_Table_30_Pack.vhdl Branch_History_Table_30_RegisterFile_Pack.vhdl Branch_History_Table_30_RegisterFile.vhdl Branch_History_Table_30_Shifter_Pack.vhdl Branch_History_Table_30_Shifter.vhdl Branch_History_Table_30.vhdl
-
-# Branch_History_Table_31
-target_dep      all     Branch_History_Table_31.ngc
-target_dep      Branch_History_Table_31.ngc     Branch_History_Table_31.prj
-target_dep      Branch_History_Table_31.prj     Branch_History_Table_31_Pack.vhdl Branch_History_Table_31_RegisterFile_Pack.vhdl Branch_History_Table_31_RegisterFile.vhdl Branch_History_Table_31_Shifter_Pack.vhdl Branch_History_Table_31_Shifter.vhdl Branch_History_Table_31.vhdl
-
-# Branch_History_Table_32
-target_dep      all     Branch_History_Table_32.ngc
-target_dep      Branch_History_Table_32.ngc     Branch_History_Table_32.prj
-target_dep      Branch_History_Table_32.prj     Branch_History_Table_32_Pack.vhdl Branch_History_Table_32_RegisterFile_Pack.vhdl Branch_History_Table_32_RegisterFile.vhdl Branch_History_Table_32_Shifter_Pack.vhdl Branch_History_Table_32_Shifter.vhdl Branch_History_Table_32.vhdl
-
-# Branch_History_Table_33
-target_dep      all     Branch_History_Table_33.ngc
-target_dep      Branch_History_Table_33.ngc     Branch_History_Table_33.prj
-target_dep      Branch_History_Table_33.prj     Branch_History_Table_33_Pack.vhdl Branch_History_Table_33_RegisterFile_Pack.vhdl Branch_History_Table_33_RegisterFile.vhdl Branch_History_Table_33_Shifter_Pack.vhdl Branch_History_Table_33_Shifter.vhdl Branch_History_Table_33.vhdl
-
-# Branch_History_Table_34
-target_dep      all     Branch_History_Table_34.ngc
-target_dep      Branch_History_Table_34.ngc     Branch_History_Table_34.prj
-target_dep      Branch_History_Table_34.prj     Branch_History_Table_34_Pack.vhdl Branch_History_Table_34_RegisterFile_Pack.vhdl Branch_History_Table_34_RegisterFile.vhdl Branch_History_Table_34_Shifter_Pack.vhdl Branch_History_Table_34_Shifter.vhdl Branch_History_Table_34.vhdl
-
-# Branch_History_Table_35
-target_dep      all     Branch_History_Table_35.ngc
-target_dep      Branch_History_Table_35.ngc     Branch_History_Table_35.prj
-target_dep      Branch_History_Table_35.prj     Branch_History_Table_35_Pack.vhdl Branch_History_Table_35_RegisterFile_Pack.vhdl Branch_History_Table_35_RegisterFile.vhdl Branch_History_Table_35_Shifter_Pack.vhdl Branch_History_Table_35_Shifter.vhdl Branch_History_Table_35.vhdl
-
-# Branch_History_Table_3
-target_dep      all     Branch_History_Table_3.ngc
-target_dep      Branch_History_Table_3.ngc      Branch_History_Table_3.prj
-target_dep      Branch_History_Table_3.prj      Branch_History_Table_30_Pack.vhdl Branch_History_Table_30_RegisterFile_Pack.vhdl Branch_History_Table_30_RegisterFile.vhdl Branch_History_Table_30_Shifter_Pack.vhdl Branch_History_Table_30_Shifter.vhdl Branch_History_Table_30.vhdl Branch_History_Table_31_Pack.vhdl Branch_History_Table_31_RegisterFile_Pack.vhdl Branch_History_Table_31_RegisterFile.vhdl Branch_History_Table_31_Shifter_Pack.vhdl Branch_History_Table_31_Shifter.vhdl Branch_History_Table_31.vhdl Branch_History_Table_32_Pack.vhdl Branch_History_Table_32_RegisterFile_Pack.vhdl Branch_History_Table_32_RegisterFile.vhdl Branch_History_Table_32_Shifter_Pack.vhdl Branch_History_Table_32_Shifter.vhdl Branch_History_Table_32.vhdl Branch_History_Table_33_Pack.vhdl Branch_History_Table_33_RegisterFile_Pack.vhdl Branch_History_Table_33_RegisterFile.vhdl Branch_History_Table_33_Shifter_Pack.vhdl Branch_History_Table_33_Shifter.vhdl Branch_History_Table_33.vhdl Branch_History_Table_34_Pack.vhdl Branch_History_Table_34_RegisterFile_Pack.vhdl Branch_History_Table_34_RegisterFile.vhdl Branch_History_Table_34_Shifter_Pack.vhdl Branch_History_Table_34_Shifter.vhdl Branch_History_Table_34.vhdl Branch_History_Table_35_Pack.vhdl Branch_History_Table_35_RegisterFile_Pack.vhdl Branch_History_Table_35_RegisterFile.vhdl Branch_History_Table_35_Shifter_Pack.vhdl Branch_History_Table_35_Shifter.vhdl Branch_History_Table_35.vhdl Branch_History_Table_3_Pack.vhdl Branch_History_Table_3_RegisterFile_Pack.vhdl Branch_History_Table_3_RegisterFile.vhdl Branch_History_Table_3_Shifter_Pack.vhdl Branch_History_Table_3_Shifter.vhdl Branch_History_Table_3.vhdl
-
-# Branch_History_Table_4
-target_dep      all     Branch_History_Table_4.ngc
-target_dep      Branch_History_Table_4.ngc      Branch_History_Table_4.prj
-target_dep      Branch_History_Table_4.prj      Branch_History_Table_4_Pack.vhdl Branch_History_Table_4_RegisterFile_Pack.vhdl Branch_History_Table_4_RegisterFile.vhdl Branch_History_Table_4_Shifter_Pack.vhdl Branch_History_Table_4_Shifter.vhdl Branch_History_Table_4.vhdl
-
-# Branch_History_Table_5
-target_dep      all     Branch_History_Table_5.ngc
-target_dep      Branch_History_Table_5.ngc      Branch_History_Table_5.prj
-target_dep      Branch_History_Table_5.prj      Branch_History_Table_5_Pack.vhdl Branch_History_Table_5_RegisterFile_Pack.vhdl Branch_History_Table_5_RegisterFile.vhdl Branch_History_Table_5_Shifter_Pack.vhdl Branch_History_Table_5_Shifter.vhdl Branch_History_Table_5.vhdl
-
-# Branch_History_Table_6
-target_dep      all     Branch_History_Table_6.ngc
-target_dep      Branch_History_Table_6.ngc      Branch_History_Table_6.prj
-target_dep      Branch_History_Table_6.prj      Branch_History_Table_6_Pack.vhdl Branch_History_Table_6_RegisterFile_Pack.vhdl Branch_History_Table_6_RegisterFile.vhdl Branch_History_Table_6_Shifter_Pack.vhdl Branch_History_Table_6_Shifter.vhdl Branch_History_Table_6.vhdl
-
-# Branch_History_Table_7
-target_dep      all     Branch_History_Table_7.ngc
-target_dep      Branch_History_Table_7.ngc      Branch_History_Table_7.prj
-target_dep      Branch_History_Table_7.prj      Branch_History_Table_7_Pack.vhdl Branch_History_Table_7_RegisterFile_Pack.vhdl Branch_History_Table_7_RegisterFile.vhdl Branch_History_Table_7_Shifter_Pack.vhdl Branch_History_Table_7_Shifter.vhdl Branch_History_Table_7.vhdl
-
-# Branch_History_Table_8
-target_dep      all     Branch_History_Table_8.ngc
-target_dep      Branch_History_Table_8.ngc      Branch_History_Table_8.prj
-target_dep      Branch_History_Table_8.prj      Branch_History_Table_8_Pack.vhdl Branch_History_Table_8_RegisterFile_Pack.vhdl Branch_History_Table_8_RegisterFile.vhdl Branch_History_Table_8_Shifter_Pack.vhdl Branch_History_Table_8_Shifter.vhdl Branch_History_Table_8.vhdl
-
-# Branch_History_Table_9
-target_dep      all     Branch_History_Table_9.ngc
-target_dep      Branch_History_Table_9.ngc      Branch_History_Table_9.prj
-target_dep      Branch_History_Table_9.prj      Branch_History_Table_9_Pack.vhdl Branch_History_Table_9_RegisterFile_Pack.vhdl Branch_History_Table_9_RegisterFile.vhdl Branch_History_Table_9_Shifter_Pack.vhdl Branch_History_Table_9_Shifter.vhdl Branch_History_Table_9.vhdl
-

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp

@@ -46 +46 @@
    *********************************************************************/
   sc_clock                                 CLOCK ("clock", 1.0, 0.5);
+  sc_signal<Tcontrol_t>                    NRESET;
   sc_signal<Tcontrol_t>                    PREDICT_VAL               [param._nb_prediction];
   sc_signal<Tcontrol_t>                    PREDICT_ACK               [param._nb_prediction];
@@ -64 +65 @@
   
   (*(_Branch_History_Table->in_CLOCK))        (CLOCK);
+  (*(_Branch_History_Table->in_NRESET))       (NRESET);
 
   for (uint32_t i=0; i<param._nb_prediction; i++)
@@ -97 +99 @@
   cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Initialisation" << endl;
 
+  NRESET.write(1);
   for (uint32_t i=0; i<param._nb_prediction; i++)
     PREDICT_VAL         [i].write(0);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Branch_History_Table.h

@@ -18 +18 @@
 // Internal structure
 #include "Behavioural/Generic/Shifter/include/Shifter.h"
-#include "Behavioural/Generic/RegisterFile/include/RegisterFile.h"
-
+#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h"
 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Parameters.h"
 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Types.h"
@@ -68 +67 @@
     // Interface
   public    : SC_CLOCK                      *  in_CLOCK                  ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET                 ;
  
   public    : SC_IN (Tcontrol_t)           **  in_PREDICT_VAL            ;
@@ -88 +88 @@
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
   public    : morpheo::behavioural::generic::shifter::Shifter           * component_Shifter     ;
-  public    : morpheo::behavioural::generic::registerfile::RegisterFile * component_RegisterFile;
+  public    : morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic * component_RegisterFile;
 
     // -----[ methods ]---------------------------------------------------

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Parameters.h

@@ -13 +13 @@
 // Internal structure
 #include "Behavioural/Generic/Shifter/include/Parameters.h"
-#include "Behavioural/Generic/RegisterFile/include/Parameters.h"
+#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h"
 #include <math.h>
 
@@ -34 +34 @@
 
   public :       morpheo::behavioural::generic::shifter::Parameters      * _param_shifter;
-  public :       morpheo::behavioural::generic::registerfile::Parameters * _param_registerfile;
+  public :       morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters * _param_registerfile;
 
     //-----[ methods ]-----------------------------------------------------------

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Statistics.h

@@ -14 +14 @@
 #include "Behavioural/include/Parameters_Statistics.h"
 #include "Behavioural/Generic/Shifter/include/Statistics.h"
-#include "Behavioural/Generic/RegisterFile/include/Statistics.h"
+#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Statistics.h"
 //#include "Behavioural/Generic/Group/include/Statistics.h"
 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/include/Parameters.h"

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table.cpp

@@ -56 +56 @@
     allocation ();
 
-    // Constant
-    for (uint32_t i=0; i<_param._nb_prediction     ; i++)
-      PORT_WRITE(out_PREDICT_ACK         [i],1);
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      PORT_WRITE(out_BRANCH_COMPLETE_ACK [i],1);
+//     // Constant
+//     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
+//       PORT_WRITE(out_PREDICT_ACK         [i],1);
+//     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
+//       PORT_WRITE(out_BRANCH_COMPLETE_ACK [i],1);
 
 #if (defined(STATISTICS) || defined (VHDL_TESTBENCH))

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_allocation.cpp

@@ -23 +23 @@
 
      in_CLOCK           = new SC_CLOCK           ("in_CLOCK");
+     in_NRESET          = new SC_IN (Tcontrol_t) ("in_NRESET");
 
      in_PREDICT_VAL     = new SC_IN (Tcontrol_t) * [_param._nb_prediction];
@@ -102 +103 @@
     name_component = _name+"_RegisterFile";
     
-    component_RegisterFile = new morpheo::behavioural::generic::registerfile::RegisterFile (name_component.c_str(),
+    component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic(name_component.c_str(),
 #ifdef STATISTICS
                                                                                             _param_statistics            ,
@@ -109 +110 @@
      
     // Instantiation
-    (*(component_RegisterFile->in_CLOCK))        (*(in_CLOCK));
+    (*(component_RegisterFile->in_CLOCK ))       (*(in_CLOCK ));
+    (*(component_RegisterFile->in_NRESET))       (*(in_NRESET));
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-        (*(component_RegisterFile-> in_READ_ENABLE   [i])) (*( in_PREDICT_VAL      [i]));
+        (*(component_RegisterFile-> in_READ_VAL      [i])) (*( in_PREDICT_VAL      [i]));
+        (*(component_RegisterFile->out_READ_ACK      [i])) (*(out_PREDICT_ACK      [i]));
         (*(component_RegisterFile-> in_READ_ADDRESS  [i])) (*( in_PREDICT_ADDRESS  [i]));
         (*(component_RegisterFile->out_READ_DATA     [i])) (*(out_PREDICT_HISTORY  [i]));    
@@ -120 +123 @@
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-        (*(component_RegisterFile-> in_WRITE_ENABLE  [i])) (*(    in_BRANCH_COMPLETE_VAL      [i]));
+        (*(component_RegisterFile-> in_WRITE_VAL     [i])) (*(    in_BRANCH_COMPLETE_VAL      [i]));
+        (*(component_RegisterFile->out_WRITE_ACK     [i])) (*(   out_BRANCH_COMPLETE_ACK      [i]));
         (*(component_RegisterFile-> in_WRITE_ADDRESS [i])) (*(    in_BRANCH_COMPLETE_ADDRESS  [i]));
         (*(component_RegisterFile-> in_WRITE_DATA    [i])) (*(signal_BRANCH_COMPLETE_HISTORY  [i]));    

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_deallocation.cpp

@@ -20 +20 @@
   {
     delete in_CLOCK;
+    delete in_NRESET;
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp

@@ -20 +20 @@
   void Branch_History_Table::vhdl_body (Vhdl & vhdl)
   {
-    vhdl.set_body ("-- Output : always at '1'");
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
-    for (uint32_t i=0; i<_param._nb_prediction     ; i++)
-      vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
-    vhdl.set_body ("");
+//     vhdl.set_body ("-- Output : always at '1'");
+//     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
+//       vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
+//     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
+//       vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
+//     vhdl.set_body ("");
 
     list<string> list_port_map;
@@ -40 +40 @@
     list_port_map.clear();
     vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
+
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-        vhdl.set_body_component_port_map (list_port_map," in_READ_ENABLE_"+toString(i)+"  "," in_PREDICT_VAL_"+toString(i));
+        vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+"     "," in_PREDICT_VAL_"+toString(i));
+        vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+"     ","out_PREDICT_ACK_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+"    ","out_PREDICT_HISTORY_"+toString(i));    
@@ -49 +52 @@
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-        vhdl.set_body_component_port_map (list_port_map," in_WRITE_ENABLE_"+toString(i)+" ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
+        vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+"    ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
+        vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+"    ","   out_BRANCH_COMPLETE_ACK_"+toString(i)+"");
         vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+"","    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+"   ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_port.cpp

@@ -21 +21 @@
   {
     vhdl.set_port (" in_CLOCK" , IN, 1);
+    vhdl.set_port (" in_NRESET", IN, 1);
     
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_port.cpp

@@ -19 +19 @@
   void Branch_History_Table::vhdl_testbench_port (void)
   {
+    _vhdl_testbench->set_port (" in_NRESET", IN, 1);
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_testbench_transition.cpp

@@ -25 +25 @@
 #endif    
 
+    _vhdl_testbench->add_input  (PORT_READ( in_NRESET));
+
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
         _vhdl_testbench->add_input  (PORT_READ( in_PREDICT_VAL     [i]));
-        _vhdl_testbench->add_output (PORT_READ(out_PREDICT_ACK     [i]));
+        _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_ACK  [i]));
         _vhdl_testbench->add_input  (PORT_READ( in_PREDICT_ADDRESS [i]));
         _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i]));
@@ -37 +39 @@
        {
          _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_VAL     [i]));
-         _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_ACK     [i]));
+         _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_WRITE_ACK [i]));
          _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_ADDRESS [i]));
          _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_HISTORY [i]));

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Parameters.cpp

@@ -32 +32 @@
                                                                              morpheo::behavioural::generic::shifter::internal_left_shift,
                                                                              morpheo::behavioural::generic::shifter::external_completion),
-    _param_registerfile = new morpheo::behavioural::generic::registerfile::Parameters (nb_prediction      ,
-                                                                                       nb_branch_complete ,
-                                                                                       nb_shifter         ,
-                                                                                       size_shifter       );
+    _param_registerfile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters (nb_prediction      ,
+                                                                                                                nb_branch_complete ,
+                                                                                                                nb_shifter         ,
+                                                                                                                size_shifter       );
     
     test();
@@ -54 +54 @@
                                                                              true),
 
-    _param_registerfile = new morpheo::behavioural::generic::registerfile::Parameters (param._nb_prediction      ,
-                                                                                       param._nb_branch_complete ,
-                                                                                       param._nb_shifter         ,
-                                                                                       param._size_shifter       );
+    _param_registerfile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters (param._nb_prediction      ,
+                                                                                                                param._nb_branch_complete ,
+                                                                                                                param._nb_shifter         ,
+                                                                                                                param._size_shifter       );
       
 

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/Makefile.deps

@@ -14 +14 @@
 include                         $(DIR_MORPHEO)/Behavioural/Generic/Counter/Makefile.deps
 endif
-ifndef RegisterFile
-include                         $(DIR_MORPHEO)/Behavioural/Generic/RegisterFile/Makefile.deps
+ifndef RegisterFile_Monolithic
+include                         $(DIR_MORPHEO)/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/Makefile.deps
 endif
 
@@ -22 +22 @@
 #-----[ Library ]------------------------------------------
 Pattern_History_Table_LIBRARY           =       -lPattern_History_Table \
-                                                $(RegisterFile_LIBRARY) \
+                                                $(RegisterFile_Monolithic_LIBRARY)      \
                                                 $(Counter_LIBRARY)      \
                                                 $(Behavioural_LIBRARY)
 
 Pattern_History_Table_DIR_LIBRARY       =       -L$(DIR_MORPHEO)/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/lib       \
-                                                $(RegisterFile_DIR_LIBRARY)     \
+                                                $(RegisterFile_Monolithic_DIR_LIBRARY)  \
                                                 $(Counter_DIR_LIBRARY)          \
                                                 $(Behavioural_DIR_LIBRARY)
@@ -36 +36 @@
                                         @$(MAKE) Behavioural_library
                                         @$(MAKE) Counter_library
-                                        @$(MAKE) RegisterFile_library
+                                        @$(MAKE) RegisterFile_Monolithic_library
                                         @$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table --makefile=Makefile 
         
@@ -42 +42 @@
                                         @$(MAKE) Behavioural_library_clean
                                         @$(MAKE) Counter_library_clean
-                                        @$(MAKE) RegisterFile_library_clean
+                                        @$(MAKE) RegisterFile_Monolithic_library_clean
                                         @$(MAKE) --directory=$(DIR_MORPHEO)/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table --makefile=Makefile clean

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/mkf.info

@@ -1 @@
-
-# Pattern_History_Table_0
-target_dep      all     Pattern_History_Table_0.ngc
-target_dep      Pattern_History_Table_0.ngc     Pattern_History_Table_0.prj
-target_dep      Pattern_History_Table_0.prj     Pattern_History_Table_0_Counter_Pack.vhdl Pattern_History_Table_0_Counter.vhdl Pattern_History_Table_0_Pack.vhdl Pattern_History_Table_0_RegisterFile_Pack.vhdl Pattern_History_Table_0_RegisterFile.vhdl Pattern_History_Table_0.vhdl
-
-# Pattern_History_Table_10
-target_dep      all     Pattern_History_Table_10.ngc
-target_dep      Pattern_History_Table_10.ngc    Pattern_History_Table_10.prj
-target_dep      Pattern_History_Table_10.prj    Pattern_History_Table_10_Counter_Pack.vhdl Pattern_History_Table_10_Counter.vhdl Pattern_History_Table_10_Pack.vhdl Pattern_History_Table_10_RegisterFile_Pack.vhdl Pattern_History_Table_10_RegisterFile.vhdl Pattern_History_Table_10.vhdl
-
-# Pattern_History_Table_11
-target_dep      all     Pattern_History_Table_11.ngc
-target_dep      Pattern_History_Table_11.ngc    Pattern_History_Table_11.prj
-target_dep      Pattern_History_Table_11.prj    Pattern_History_Table_11_Counter_Pack.vhdl Pattern_History_Table_11_Counter.vhdl Pattern_History_Table_11_Pack.vhdl Pattern_History_Table_11_RegisterFile_Pack.vhdl Pattern_History_Table_11_RegisterFile.vhdl Pattern_History_Table_11.vhdl
-
-# Pattern_History_Table_12
-target_dep      all     Pattern_History_Table_12.ngc
-target_dep      Pattern_History_Table_12.ngc    Pattern_History_Table_12.prj
-target_dep      Pattern_History_Table_12.prj    Pattern_History_Table_12_Counter_Pack.vhdl Pattern_History_Table_12_Counter.vhdl Pattern_History_Table_12_Pack.vhdl Pattern_History_Table_12_RegisterFile_Pack.vhdl Pattern_History_Table_12_RegisterFile.vhdl Pattern_History_Table_12.vhdl
-
-# Pattern_History_Table_13
-target_dep      all     Pattern_History_Table_13.ngc
-target_dep      Pattern_History_Table_13.ngc    Pattern_History_Table_13.prj
-target_dep      Pattern_History_Table_13.prj    Pattern_History_Table_13_Counter_Pack.vhdl Pattern_History_Table_13_Counter.vhdl Pattern_History_Table_13_Pack.vhdl Pattern_History_Table_13_RegisterFile_Pack.vhdl Pattern_History_Table_13_RegisterFile.vhdl Pattern_History_Table_13.vhdl
-
-# Pattern_History_Table_14
-target_dep      all     Pattern_History_Table_14.ngc
-target_dep      Pattern_History_Table_14.ngc    Pattern_History_Table_14.prj
-target_dep      Pattern_History_Table_14.prj    Pattern_History_Table_14_Counter_Pack.vhdl Pattern_History_Table_14_Counter.vhdl Pattern_History_Table_14_Pack.vhdl Pattern_History_Table_14_RegisterFile_Pack.vhdl Pattern_History_Table_14_RegisterFile.vhdl Pattern_History_Table_14.vhdl
-
-# Pattern_History_Table_15
-target_dep      all     Pattern_History_Table_15.ngc
-target_dep      Pattern_History_Table_15.ngc    Pattern_History_Table_15.prj
-target_dep      Pattern_History_Table_15.prj    Pattern_History_Table_15_Counter_Pack.vhdl Pattern_History_Table_15_Counter.vhdl Pattern_History_Table_15_Pack.vhdl Pattern_History_Table_15_RegisterFile_Pack.vhdl Pattern_History_Table_15_RegisterFile.vhdl Pattern_History_Table_15.vhdl
-
-# Pattern_History_Table_16
-target_dep      all     Pattern_History_Table_16.ngc
-target_dep      Pattern_History_Table_16.ngc    Pattern_History_Table_16.prj
-target_dep      Pattern_History_Table_16.prj    Pattern_History_Table_16_Counter_Pack.vhdl Pattern_History_Table_16_Counter.vhdl Pattern_History_Table_16_Pack.vhdl Pattern_History_Table_16_RegisterFile_Pack.vhdl Pattern_History_Table_16_RegisterFile.vhdl Pattern_History_Table_16.vhdl
-
-# Pattern_History_Table_17
-target_dep      all     Pattern_History_Table_17.ngc
-target_dep      Pattern_History_Table_17.ngc    Pattern_History_Table_17.prj
-target_dep      Pattern_History_Table_17.prj    Pattern_History_Table_17_Counter_Pack.vhdl Pattern_History_Table_17_Counter.vhdl Pattern_History_Table_17_Pack.vhdl Pattern_History_Table_17_RegisterFile_Pack.vhdl Pattern_History_Table_17_RegisterFile.vhdl Pattern_History_Table_17.vhdl
-
-# Pattern_History_Table_18
-target_dep      all     Pattern_History_Table_18.ngc
-target_dep      Pattern_History_Table_18.ngc    Pattern_History_Table_18.prj
-target_dep      Pattern_History_Table_18.prj    Pattern_History_Table_18_Counter_Pack.vhdl Pattern_History_Table_18_Counter.vhdl Pattern_History_Table_18_Pack.vhdl Pattern_History_Table_18_RegisterFile_Pack.vhdl Pattern_History_Table_18_RegisterFile.vhdl Pattern_History_Table_18.vhdl
-
-# Pattern_History_Table_19
-target_dep      all     Pattern_History_Table_19.ngc
-target_dep      Pattern_History_Table_19.ngc    Pattern_History_Table_19.prj
-target_dep      Pattern_History_Table_19.prj    Pattern_History_Table_19_Counter_Pack.vhdl Pattern_History_Table_19_Counter.vhdl Pattern_History_Table_19_Pack.vhdl Pattern_History_Table_19_RegisterFile_Pack.vhdl Pattern_History_Table_19_RegisterFile.vhdl Pattern_History_Table_19.vhdl
-
-# Pattern_History_Table_1
-target_dep      all     Pattern_History_Table_1.ngc
-target_dep      Pattern_History_Table_1.ngc     Pattern_History_Table_1.prj
-target_dep      Pattern_History_Table_1.prj     Pattern_History_Table_10_Counter_Pack.vhdl Pattern_History_Table_10_Counter.vhdl Pattern_History_Table_10_Pack.vhdl Pattern_History_Table_10_RegisterFile_Pack.vhdl Pattern_History_Table_10_RegisterFile.vhdl Pattern_History_Table_10.vhdl Pattern_History_Table_11_Counter_Pack.vhdl Pattern_History_Table_11_Counter.vhdl Pattern_History_Table_11_Pack.vhdl Pattern_History_Table_11_RegisterFile_Pack.vhdl Pattern_History_Table_11_RegisterFile.vhdl Pattern_History_Table_11.vhdl Pattern_History_Table_12_Counter_Pack.vhdl Pattern_History_Table_12_Counter.vhdl Pattern_History_Table_12_Pack.vhdl Pattern_History_Table_12_RegisterFile_Pack.vhdl Pattern_History_Table_12_RegisterFile.vhdl Pattern_History_Table_12.vhdl Pattern_History_Table_13_Counter_Pack.vhdl Pattern_History_Table_13_Counter.vhdl Pattern_History_Table_13_Pack.vhdl Pattern_History_Table_13_RegisterFile_Pack.vhdl Pattern_History_Table_13_RegisterFile.vhdl Pattern_History_Table_13.vhdl Pattern_History_Table_14_Counter_Pack.vhdl Pattern_History_Table_14_Counter.vhdl Pattern_History_Table_14_Pack.vhdl Pattern_History_Table_14_RegisterFile_Pack.vhdl Pattern_History_Table_14_RegisterFile.vhdl Pattern_History_Table_14.vhdl Pattern_History_Table_15_Counter_Pack.vhdl Pattern_History_Table_15_Counter.vhdl Pattern_History_Table_15_Pack.vhdl Pattern_History_Table_15_RegisterFile_Pack.vhdl Pattern_History_Table_15_RegisterFile.vhdl Pattern_History_Table_15.vhdl Pattern_History_Table_16_Counter_Pack.vhdl Pattern_History_Table_16_Counter.vhdl Pattern_History_Table_16_Pack.vhdl Pattern_History_Table_16_RegisterFile_Pack.vhdl Pattern_History_Table_16_RegisterFile.vhdl Pattern_History_Table_16.vhdl Pattern_History_Table_17_Counter_Pack.vhdl Pattern_History_Table_17_Counter.vhdl Pattern_History_Table_17_Pack.vhdl Pattern_History_Table_17_RegisterFile_Pack.vhdl Pattern_History_Table_17_RegisterFile.vhdl Pattern_History_Table_17.vhdl Pattern_History_Table_18_Counter_Pack.vhdl Pattern_History_Table_18_Counter.vhdl Pattern_History_Table_18_Pack.vhdl Pattern_History_Table_18_RegisterFile_Pack.vhdl Pattern_History_Table_18_RegisterFile.vhdl Pattern_History_Table_18.vhdl Pattern_History_Table_19_Counter_Pack.vhdl Pattern_History_Table_19_Counter.vhdl Pattern_History_Table_19_Pack.vhdl Pattern_History_Table_19_RegisterFile_Pack.vhdl Pattern_History_Table_19_RegisterFile.vhdl Pattern_History_Table_19.vhdl Pattern_History_Table_1_Counter_Pack.vhdl Pattern_History_Table_1_Counter.vhdl Pattern_History_Table_1_Pack.vhdl Pattern_History_Table_1_RegisterFile_Pack.vhdl Pattern_History_Table_1_RegisterFile.vhdl Pattern_History_Table_1.vhdl
-
-# Pattern_History_Table_20
-target_dep      all     Pattern_History_Table_20.ngc
-target_dep      Pattern_History_Table_20.ngc    Pattern_History_Table_20.prj
-target_dep      Pattern_History_Table_20.prj    Pattern_History_Table_20_Counter_Pack.vhdl Pattern_History_Table_20_Counter.vhdl Pattern_History_Table_20_Pack.vhdl Pattern_History_Table_20_RegisterFile_Pack.vhdl Pattern_History_Table_20_RegisterFile.vhdl Pattern_History_Table_20.vhdl
-
-# Pattern_History_Table_21
-target_dep      all     Pattern_History_Table_21.ngc
-target_dep      Pattern_History_Table_21.ngc    Pattern_History_Table_21.prj
-target_dep      Pattern_History_Table_21.prj    Pattern_History_Table_21_Counter_Pack.vhdl Pattern_History_Table_21_Counter.vhdl Pattern_History_Table_21_Pack.vhdl Pattern_History_Table_21_RegisterFile_Pack.vhdl Pattern_History_Table_21_RegisterFile.vhdl Pattern_History_Table_21.vhdl
-
-# Pattern_History_Table_22
-target_dep      all     Pattern_History_Table_22.ngc
-target_dep      Pattern_History_Table_22.ngc    Pattern_History_Table_22.prj
-target_dep      Pattern_History_Table_22.prj    Pattern_History_Table_22_Counter_Pack.vhdl Pattern_History_Table_22_Counter.vhdl Pattern_History_Table_22_Pack.vhdl Pattern_History_Table_22_RegisterFile_Pack.vhdl Pattern_History_Table_22_RegisterFile.vhdl Pattern_History_Table_22.vhdl
-
-# Pattern_History_Table_23
-target_dep      all     Pattern_History_Table_23.ngc
-target_dep      Pattern_History_Table_23.ngc    Pattern_History_Table_23.prj
-target_dep      Pattern_History_Table_23.prj    Pattern_History_Table_23_Counter_Pack.vhdl Pattern_History_Table_23_Counter.vhdl Pattern_History_Table_23_Pack.vhdl Pattern_History_Table_23_RegisterFile_Pack.vhdl Pattern_History_Table_23_RegisterFile.vhdl Pattern_History_Table_23.vhdl
-
-# Pattern_History_Table_24
-target_dep      all     Pattern_History_Table_24.ngc
-target_dep      Pattern_History_Table_24.ngc    Pattern_History_Table_24.prj
-target_dep      Pattern_History_Table_24.prj    Pattern_History_Table_24_Counter_Pack.vhdl Pattern_History_Table_24_Counter.vhdl Pattern_History_Table_24_Pack.vhdl Pattern_History_Table_24_RegisterFile_Pack.vhdl Pattern_History_Table_24_RegisterFile.vhdl Pattern_History_Table_24.vhdl
-
-# Pattern_History_Table_25
-target_dep      all     Pattern_History_Table_25.ngc
-target_dep      Pattern_History_Table_25.ngc    Pattern_History_Table_25.prj
-target_dep      Pattern_History_Table_25.prj    Pattern_History_Table_25_Counter_Pack.vhdl Pattern_History_Table_25_Counter.vhdl Pattern_History_Table_25_Pack.vhdl Pattern_History_Table_25_RegisterFile_Pack.vhdl Pattern_History_Table_25_RegisterFile.vhdl Pattern_History_Table_25.vhdl
-
-# Pattern_History_Table_26
-target_dep      all     Pattern_History_Table_26.ngc
-target_dep      Pattern_History_Table_26.ngc    Pattern_History_Table_26.prj
-target_dep      Pattern_History_Table_26.prj    Pattern_History_Table_26_Counter_Pack.vhdl Pattern_History_Table_26_Counter.vhdl Pattern_History_Table_26_Pack.vhdl Pattern_History_Table_26_RegisterFile_Pack.vhdl Pattern_History_Table_26_RegisterFile.vhdl Pattern_History_Table_26.vhdl
-
-# Pattern_History_Table_27
-target_dep      all     Pattern_History_Table_27.ngc
-target_dep      Pattern_History_Table_27.ngc    Pattern_History_Table_27.prj
-target_dep      Pattern_History_Table_27.prj    Pattern_History_Table_27_Counter_Pack.vhdl Pattern_History_Table_27_Counter.vhdl Pattern_History_Table_27_Pack.vhdl Pattern_History_Table_27_RegisterFile_Pack.vhdl Pattern_History_Table_27_RegisterFile.vhdl Pattern_History_Table_27.vhdl
-
-# Pattern_History_Table_28
-target_dep      all     Pattern_History_Table_28.ngc
-target_dep      Pattern_History_Table_28.ngc    Pattern_History_Table_28.prj
-target_dep      Pattern_History_Table_28.prj    Pattern_History_Table_28_Counter_Pack.vhdl Pattern_History_Table_28_Counter.vhdl Pattern_History_Table_28_Pack.vhdl Pattern_History_Table_28_RegisterFile_Pack.vhdl Pattern_History_Table_28_RegisterFile.vhdl Pattern_History_Table_28.vhdl
-
-# Pattern_History_Table_29
-target_dep      all     Pattern_History_Table_29.ngc
-target_dep      Pattern_History_Table_29.ngc    Pattern_History_Table_29.prj
-target_dep      Pattern_History_Table_29.prj    Pattern_History_Table_29_Counter_Pack.vhdl Pattern_History_Table_29_Counter.vhdl Pattern_History_Table_29_Pack.vhdl Pattern_History_Table_29_RegisterFile_Pack.vhdl Pattern_History_Table_29_RegisterFile.vhdl Pattern_History_Table_29.vhdl
-
-# Pattern_History_Table_2
-target_dep      all     Pattern_History_Table_2.ngc
-target_dep      Pattern_History_Table_2.ngc     Pattern_History_Table_2.prj
-target_dep      Pattern_History_Table_2.prj     Pattern_History_Table_20_Counter_Pack.vhdl Pattern_History_Table_20_Counter.vhdl Pattern_History_Table_20_Pack.vhdl Pattern_History_Table_20_RegisterFile_Pack.vhdl Pattern_History_Table_20_RegisterFile.vhdl Pattern_History_Table_20.vhdl Pattern_History_Table_21_Counter_Pack.vhdl Pattern_History_Table_21_Counter.vhdl Pattern_History_Table_21_Pack.vhdl Pattern_History_Table_21_RegisterFile_Pack.vhdl Pattern_History_Table_21_RegisterFile.vhdl Pattern_History_Table_21.vhdl Pattern_History_Table_22_Counter_Pack.vhdl Pattern_History_Table_22_Counter.vhdl Pattern_History_Table_22_Pack.vhdl Pattern_History_Table_22_RegisterFile_Pack.vhdl Pattern_History_Table_22_RegisterFile.vhdl Pattern_History_Table_22.vhdl Pattern_History_Table_23_Counter_Pack.vhdl Pattern_History_Table_23_Counter.vhdl Pattern_History_Table_23_Pack.vhdl Pattern_History_Table_23_RegisterFile_Pack.vhdl Pattern_History_Table_23_RegisterFile.vhdl Pattern_History_Table_23.vhdl Pattern_History_Table_24_Counter_Pack.vhdl Pattern_History_Table_24_Counter.vhdl Pattern_History_Table_24_Pack.vhdl Pattern_History_Table_24_RegisterFile_Pack.vhdl Pattern_History_Table_24_RegisterFile.vhdl Pattern_History_Table_24.vhdl Pattern_History_Table_25_Counter_Pack.vhdl Pattern_History_Table_25_Counter.vhdl Pattern_History_Table_25_Pack.vhdl Pattern_History_Table_25_RegisterFile_Pack.vhdl Pattern_History_Table_25_RegisterFile.vhdl Pattern_History_Table_25.vhdl Pattern_History_Table_26_Counter_Pack.vhdl Pattern_History_Table_26_Counter.vhdl Pattern_History_Table_26_Pack.vhdl Pattern_History_Table_26_RegisterFile_Pack.vhdl Pattern_History_Table_26_RegisterFile.vhdl Pattern_History_Table_26.vhdl Pattern_History_Table_27_Counter_Pack.vhdl Pattern_History_Table_27_Counter.vhdl Pattern_History_Table_27_Pack.vhdl Pattern_History_Table_27_RegisterFile_Pack.vhdl Pattern_History_Table_27_RegisterFile.vhdl Pattern_History_Table_27.vhdl Pattern_History_Table_28_Counter_Pack.vhdl Pattern_History_Table_28_Counter.vhdl Pattern_History_Table_28_Pack.vhdl Pattern_History_Table_28_RegisterFile_Pack.vhdl Pattern_History_Table_28_RegisterFile.vhdl Pattern_History_Table_28.vhdl Pattern_History_Table_29_Counter_Pack.vhdl Pattern_History_Table_29_Counter.vhdl Pattern_History_Table_29_Pack.vhdl Pattern_History_Table_29_RegisterFile_Pack.vhdl Pattern_History_Table_29_RegisterFile.vhdl Pattern_History_Table_29.vhdl Pattern_History_Table_2_Counter_Pack.vhdl Pattern_History_Table_2_Counter.vhdl Pattern_History_Table_2_Pack.vhdl Pattern_History_Table_2_RegisterFile_Pack.vhdl Pattern_History_Table_2_RegisterFile.vhdl Pattern_History_Table_2.vhdl
-
-# Pattern_History_Table_30
-target_dep      all     Pattern_History_Table_30.ngc
-target_dep      Pattern_History_Table_30.ngc    Pattern_History_Table_30.prj
-target_dep      Pattern_History_Table_30.prj    Pattern_History_Table_30_Counter_Pack.vhdl Pattern_History_Table_30_Counter.vhdl Pattern_History_Table_30_Pack.vhdl Pattern_History_Table_30_RegisterFile_Pack.vhdl Pattern_History_Table_30_RegisterFile.vhdl Pattern_History_Table_30.vhdl
-
-# Pattern_History_Table_31
-target_dep      all     Pattern_History_Table_31.ngc
-target_dep      Pattern_History_Table_31.ngc    Pattern_History_Table_31.prj
-target_dep      Pattern_History_Table_31.prj    Pattern_History_Table_31_Counter_Pack.vhdl Pattern_History_Table_31_Counter.vhdl Pattern_History_Table_31_Pack.vhdl Pattern_History_Table_31_RegisterFile_Pack.vhdl Pattern_History_Table_31_RegisterFile.vhdl Pattern_History_Table_31.vhdl
-
-# Pattern_History_Table_32
-target_dep      all     Pattern_History_Table_32.ngc
-target_dep      Pattern_History_Table_32.ngc    Pattern_History_Table_32.prj
-target_dep      Pattern_History_Table_32.prj    Pattern_History_Table_32_Counter_Pack.vhdl Pattern_History_Table_32_Counter.vhdl Pattern_History_Table_32_Pack.vhdl Pattern_History_Table_32_RegisterFile_Pack.vhdl Pattern_History_Table_32_RegisterFile.vhdl Pattern_History_Table_32.vhdl
-
-# Pattern_History_Table_33
-target_dep      all     Pattern_History_Table_33.ngc
-target_dep      Pattern_History_Table_33.ngc    Pattern_History_Table_33.prj
-target_dep      Pattern_History_Table_33.prj    Pattern_History_Table_33_Counter_Pack.vhdl Pattern_History_Table_33_Counter.vhdl Pattern_History_Table_33_Pack.vhdl Pattern_History_Table_33_RegisterFile_Pack.vhdl Pattern_History_Table_33_RegisterFile.vhdl Pattern_History_Table_33.vhdl
-
-# Pattern_History_Table_34
-target_dep      all     Pattern_History_Table_34.ngc
-target_dep      Pattern_History_Table_34.ngc    Pattern_History_Table_34.prj
-target_dep      Pattern_History_Table_34.prj    Pattern_History_Table_34_Counter_Pack.vhdl Pattern_History_Table_34_Counter.vhdl Pattern_History_Table_34_Pack.vhdl Pattern_History_Table_34_RegisterFile_Pack.vhdl Pattern_History_Table_34_RegisterFile.vhdl Pattern_History_Table_34.vhdl
-
-# Pattern_History_Table_35
-target_dep      all     Pattern_History_Table_35.ngc
-target_dep      Pattern_History_Table_35.ngc    Pattern_History_Table_35.prj
-target_dep      Pattern_History_Table_35.prj    Pattern_History_Table_35_Counter_Pack.vhdl Pattern_History_Table_35_Counter.vhdl Pattern_History_Table_35_Pack.vhdl Pattern_History_Table_35_RegisterFile_Pack.vhdl Pattern_History_Table_35_RegisterFile.vhdl Pattern_History_Table_35.vhdl
-
-# Pattern_History_Table_3
-target_dep      all     Pattern_History_Table_3.ngc
-target_dep      Pattern_History_Table_3.ngc     Pattern_History_Table_3.prj
-target_dep      Pattern_History_Table_3.prj     Pattern_History_Table_30_Counter_Pack.vhdl Pattern_History_Table_30_Counter.vhdl Pattern_History_Table_30_Pack.vhdl Pattern_History_Table_30_RegisterFile_Pack.vhdl Pattern_History_Table_30_RegisterFile.vhdl Pattern_History_Table_30.vhdl Pattern_History_Table_31_Counter_Pack.vhdl Pattern_History_Table_31_Counter.vhdl Pattern_History_Table_31_Pack.vhdl Pattern_History_Table_31_RegisterFile_Pack.vhdl Pattern_History_Table_31_RegisterFile.vhdl Pattern_History_Table_31.vhdl Pattern_History_Table_32_Counter_Pack.vhdl Pattern_History_Table_32_Counter.vhdl Pattern_History_Table_32_Pack.vhdl Pattern_History_Table_32_RegisterFile_Pack.vhdl Pattern_History_Table_32_RegisterFile.vhdl Pattern_History_Table_32.vhdl Pattern_History_Table_33_Counter_Pack.vhdl Pattern_History_Table_33_Counter.vhdl Pattern_History_Table_33_Pack.vhdl Pattern_History_Table_33_RegisterFile_Pack.vhdl Pattern_History_Table_33_RegisterFile.vhdl Pattern_History_Table_33.vhdl Pattern_History_Table_34_Counter_Pack.vhdl Pattern_History_Table_34_Counter.vhdl Pattern_History_Table_34_Pack.vhdl Pattern_History_Table_34_RegisterFile_Pack.vhdl Pattern_History_Table_34_RegisterFile.vhdl Pattern_History_Table_34.vhdl Pattern_History_Table_35_Counter_Pack.vhdl Pattern_History_Table_35_Counter.vhdl Pattern_History_Table_35_Pack.vhdl Pattern_History_Table_35_RegisterFile_Pack.vhdl Pattern_History_Table_35_RegisterFile.vhdl Pattern_History_Table_35.vhdl Pattern_History_Table_3_Counter_Pack.vhdl Pattern_History_Table_3_Counter.vhdl Pattern_History_Table_3_Pack.vhdl Pattern_History_Table_3_RegisterFile_Pack.vhdl Pattern_History_Table_3_RegisterFile.vhdl Pattern_History_Table_3.vhdl
-
-# Pattern_History_Table_4
-target_dep      all     Pattern_History_Table_4.ngc
-target_dep      Pattern_History_Table_4.ngc     Pattern_History_Table_4.prj
-target_dep      Pattern_History_Table_4.prj     Pattern_History_Table_4_Counter_Pack.vhdl Pattern_History_Table_4_Counter.vhdl Pattern_History_Table_4_Pack.vhdl Pattern_History_Table_4_RegisterFile_Pack.vhdl Pattern_History_Table_4_RegisterFile.vhdl Pattern_History_Table_4.vhdl
-
-# Pattern_History_Table_5
-target_dep      all     Pattern_History_Table_5.ngc
-target_dep      Pattern_History_Table_5.ngc     Pattern_History_Table_5.prj
-target_dep      Pattern_History_Table_5.prj     Pattern_History_Table_5_Counter_Pack.vhdl Pattern_History_Table_5_Counter.vhdl Pattern_History_Table_5_Pack.vhdl Pattern_History_Table_5_RegisterFile_Pack.vhdl Pattern_History_Table_5_RegisterFile.vhdl Pattern_History_Table_5.vhdl
-
-# Pattern_History_Table_6
-target_dep      all     Pattern_History_Table_6.ngc
-target_dep      Pattern_History_Table_6.ngc     Pattern_History_Table_6.prj
-target_dep      Pattern_History_Table_6.prj     Pattern_History_Table_6_Counter_Pack.vhdl Pattern_History_Table_6_Counter.vhdl Pattern_History_Table_6_Pack.vhdl Pattern_History_Table_6_RegisterFile_Pack.vhdl Pattern_History_Table_6_RegisterFile.vhdl Pattern_History_Table_6.vhdl
-
-# Pattern_History_Table_7
-target_dep      all     Pattern_History_Table_7.ngc
-target_dep      Pattern_History_Table_7.ngc     Pattern_History_Table_7.prj
-target_dep      Pattern_History_Table_7.prj     Pattern_History_Table_7_Counter_Pack.vhdl Pattern_History_Table_7_Counter.vhdl Pattern_History_Table_7_Pack.vhdl Pattern_History_Table_7_RegisterFile_Pack.vhdl Pattern_History_Table_7_RegisterFile.vhdl Pattern_History_Table_7.vhdl
-
-# Pattern_History_Table_8
-target_dep      all     Pattern_History_Table_8.ngc
-target_dep      Pattern_History_Table_8.ngc     Pattern_History_Table_8.prj
-target_dep      Pattern_History_Table_8.prj     Pattern_History_Table_8_Counter_Pack.vhdl Pattern_History_Table_8_Counter.vhdl Pattern_History_Table_8_Pack.vhdl Pattern_History_Table_8_RegisterFile_Pack.vhdl Pattern_History_Table_8_RegisterFile.vhdl Pattern_History_Table_8.vhdl
-
-# Pattern_History_Table_9
-target_dep      all     Pattern_History_Table_9.ngc
-target_dep      Pattern_History_Table_9.ngc     Pattern_History_Table_9.prj
-target_dep      Pattern_History_Table_9.prj     Pattern_History_Table_9_Counter_Pack.vhdl Pattern_History_Table_9_Counter.vhdl Pattern_History_Table_9_Pack.vhdl Pattern_History_Table_9_RegisterFile_Pack.vhdl Pattern_History_Table_9_RegisterFile.vhdl Pattern_History_Table_9.vhdl
-

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest/src/test.cpp

@@ -43 +43 @@
    *********************************************************************/
   sc_clock                                 CLOCK ("clock", 1.0, 0.5);
+  sc_signal<Tcontrol_t>                    NRESET;
+
   sc_signal<Tcontrol_t>                    PREDICT_VAL               [param._nb_prediction];
   sc_signal<Tcontrol_t>                    PREDICT_ACK               [param._nb_prediction];
@@ -61 +63 @@
   
   (*(_Pattern_History_Table->in_CLOCK))        (CLOCK);
+  (*(_Pattern_History_Table->in_NRESET))       (NRESET);
 
   for (uint32_t i=0; i<param._nb_prediction; i++)
@@ -92 +95 @@
   _Pattern_History_Table->vhdl_testbench_label("Initialisation");
   cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Initialisation" << endl;
-
+  
+  NRESET.write(1);
 
   for (uint32_t i=0; i<param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Parameters.h

@@ -13 +13 @@
 // Internal structure
 #include "Behavioural/Generic/Counter/include/Parameters.h"
-#include "Behavioural/Generic/RegisterFile/include/Parameters.h"
+#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h"
 #include <math.h>
 
@@ -34 +34 @@
 
   public :       morpheo::behavioural::generic::counter::Parameters      * _param_counter;
-  public :       morpheo::behavioural::generic::registerfile::Parameters * _param_registerfile;
+  public :       morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters * _param_registerfile;
 
     //-----[ methods ]-----------------------------------------------------------

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Pattern_History_Table.h

@@ -19 +19 @@
 // Internal structure
 #include "Behavioural/Generic/Counter/include/Counter.h"
-#include "Behavioural/Generic/RegisterFile/include/RegisterFile.h"
+#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h"
 
 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Parameters.h"
@@ -70 +70 @@
     // Interface
   public    : SC_CLOCK                      *  in_CLOCK        ;
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET       ;
 
   public    : SC_IN (Tcontrol_t)           **  in_PREDICT_VAL            ;
@@ -90 +91 @@
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~    
   public    : morpheo::behavioural::generic::counter::Counter           * component_Counter     ;
-  public    : morpheo::behavioural::generic::registerfile::RegisterFile * component_RegisterFile;
+  public    : morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic * component_RegisterFile;
 
     // -----[ methods ]---------------------------------------------------

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Statistics.h

@@ -14 +14 @@
 #include "Behavioural/include/Parameters_Statistics.h"
 #include "Behavioural/Generic/Counter/include/Statistics.h"
-#include "Behavioural/Generic/RegisterFile/include/Statistics.h"
+#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Statistics.h"
 //#include "Behavioural/Generic/Group/include/Statistics.h"
 #include "Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/include/Parameters.h"

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Parameters.cpp

@@ -30 +30 @@
     _param_counter      = new morpheo::behavioural::generic::counter::Parameters (size_counter       ,
                                                                                   nb_branch_complete );
-    _param_registerfile = new morpheo::behavioural::generic::registerfile::Parameters (nb_prediction      ,
-                                                                                       nb_branch_complete ,
-                                                                                       nb_counter         ,
-                                                                                       size_counter       );
+    _param_registerfile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters (nb_prediction      ,
+                                                                                                                nb_branch_complete ,
+                                                                                                                nb_counter         ,
+                                                                                                                size_counter       );
     
 
@@ -51 +51 @@
                                                                              param._nb_branch_complete );
 
-    _param_registerfile = new morpheo::behavioural::generic::registerfile::Parameters (param._nb_prediction      ,
-                                                                                       param._nb_branch_complete ,
-                                                                                       param._nb_counter         ,
-                                                                                       param._size_counter       );
-
+    _param_registerfile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters (param._nb_prediction      ,
+                                                                                                                param._nb_branch_complete ,
+                                                                                                                param._nb_counter         ,
+                                                                                                                param._size_counter       );
+    
     test();
     log_printf(FUNC,Pattern_History_Table,"Parameters","End");

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table.cpp

@@ -58 +58 @@
     allocation ();
 
-    // Constant
-    for (uint32_t i=0; i<_param._nb_prediction     ; i++)
-      PORT_WRITE(out_PREDICT_ACK         [i],1);
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      PORT_WRITE(out_BRANCH_COMPLETE_ACK [i],1);
+//     // Constant
+//     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
+//       PORT_WRITE(out_PREDICT_ACK         [i],1);
+//     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
+//       PORT_WRITE(out_BRANCH_COMPLETE_ACK [i],1);
 
 #if (defined(STATISTICS) || defined (VHDL_TESTBENCH))

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_allocation.cpp

@@ -25 +25 @@
 
     in_CLOCK  = new SC_CLOCK           ("in_CLOCK");
+    in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET");
 
      in_PREDICT_VAL     = new SC_IN (Tcontrol_t) * [_param._nb_prediction];
@@ -104 +105 @@
     name_component = _name+"_RegisterFile";
     
-    component_RegisterFile = new morpheo::behavioural::generic::registerfile::RegisterFile (name_component.c_str(),
+    component_RegisterFile = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::RegisterFile_Monolithic (name_component.c_str(),
 #ifdef STATISTICS
-                                                                                            _param_statistics            ,
+                                                                                                                                _param_statistics            ,
 #endif
-                                                                                            *(_param._param_registerfile));
-     
+                                                                                                                                *(_param._param_registerfile));
+    
     // Instantiation
     (*(component_RegisterFile->in_CLOCK))        (*(in_CLOCK));
-    
+    (*(component_RegisterFile->in_NRESET))       (*(in_NRESET));
+
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-        (*(component_RegisterFile-> in_READ_ENABLE   [i])) (*( in_PREDICT_VAL      [i]));
+        (*(component_RegisterFile-> in_READ_VAL      [i])) (*( in_PREDICT_VAL      [i]));
+        (*(component_RegisterFile->out_READ_ACK      [i])) (*(out_PREDICT_ACK      [i]));
         (*(component_RegisterFile-> in_READ_ADDRESS  [i])) (*( in_PREDICT_ADDRESS  [i]));
         (*(component_RegisterFile->out_READ_DATA     [i])) (*(out_PREDICT_HISTORY  [i]));    
@@ -122 +125 @@
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-        (*(component_RegisterFile-> in_WRITE_ENABLE  [i])) (*(    in_BRANCH_COMPLETE_VAL      [i]));
+        (*(component_RegisterFile-> in_WRITE_VAL     [i])) (*(    in_BRANCH_COMPLETE_VAL      [i]));
+        (*(component_RegisterFile->out_WRITE_ACK     [i])) (*(   out_BRANCH_COMPLETE_ACK      [i]));
         (*(component_RegisterFile-> in_WRITE_ADDRESS [i])) (*(    in_BRANCH_COMPLETE_ADDRESS  [i]));
         (*(component_RegisterFile-> in_WRITE_DATA    [i])) (*(signal_BRANCH_COMPLETE_HISTORY  [i]));    

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_deallocation.cpp

@@ -23 +23 @@
 
     delete in_CLOCK;
+    delete in_NRESET;
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_body.cpp

@@ -22 +22 @@
     log_printf(FUNC,Pattern_History_Table,"vhdl_body","Begin");
 
-    vhdl.set_body ("-- Output : always at '1'");
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
-    for (uint32_t i=0; i<_param._nb_prediction     ; i++)
-      vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
-    vhdl.set_body ("");
+//     vhdl.set_body ("-- Output : always at '1'");
+//     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
+//       vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
+//     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
+//       vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
+//     vhdl.set_body ("");
 
     list<string> list_port_map;
@@ -41 +41 @@
 
     list_port_map.clear();
-    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+    vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
+    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
+
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-        vhdl.set_body_component_port_map (list_port_map," in_READ_ENABLE_"+toString(i)+"  "," in_PREDICT_VAL_"+toString(i));
+        vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+"     "," in_PREDICT_VAL_"+toString(i));
+        vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+"     ","out_PREDICT_ACK_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+"    ","out_PREDICT_HISTORY_"+toString(i));    
@@ -51 +54 @@
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-        vhdl.set_body_component_port_map (list_port_map," in_WRITE_ENABLE_"+toString(i)+" ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
+        vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+"    ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
+        vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+"    ","   out_BRANCH_COMPLETE_ACK_"+toString(i)+"");
         vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+"","    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+"   ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_port.cpp

@@ -23 +23 @@
 
     vhdl.set_port (" in_CLOCK" , IN, 1);
+    vhdl.set_port (" in_NRESET", IN, 1);
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_port.cpp

@@ -21 +21 @@
   {
     log_printf(FUNC,Pattern_History_Table,"vhdl_testbench_port","Begin");
+
+    _vhdl_testbench->set_port (" in_NRESET", IN, 1);
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/src/Pattern_History_Table_vhdl_testbench_transition.cpp

@@ -30 +30 @@
     // (because we have no control on the ordonnancer's policy)
 
+    _vhdl_testbench->add_input  (PORT_READ( in_NRESET));
+
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
         _vhdl_testbench->add_input  (PORT_READ( in_PREDICT_VAL     [i]));
-        _vhdl_testbench->add_output (PORT_READ(out_PREDICT_ACK     [i]));
+        _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_ACK  [i]));
         _vhdl_testbench->add_input  (PORT_READ( in_PREDICT_ADDRESS [i]));
         _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_READ_DATA [i]));
@@ -42 +44 @@
        {
          _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_VAL      [i]));
-         _vhdl_testbench->add_output (PORT_READ(out_BRANCH_COMPLETE_ACK      [i]));
+         _vhdl_testbench->add_output (PORT_READ(component_RegisterFile->out_WRITE_ACK [i]));
          _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_ADDRESS  [i]));
          _vhdl_testbench->add_input  (PORT_READ( in_BRANCH_COMPLETE_HISTORY  [i]));

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/mkf.info

@@ -1 @@
-
-# Two_Level_Branch_Predictor_0
-target_dep      all     Two_Level_Branch_Predictor_0.ngc
-target_dep      Two_Level_Branch_Predictor_0.ngc        Two_Level_Branch_Predictor_0.prj
-target_dep      Two_Level_Branch_Predictor_0.prj        Two_Level_Branch_Predictor_0_Branch_History_Table_Pack.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_RegisterFile_Pack.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_RegisterFile.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_Shifter_Pack.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table_Shifter.vhdl Two_Level_Branch_Predictor_0_Branch_History_Table.vhdl Two_Level_Branch_Predictor_0_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_Counter_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_Counter.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_RegisterFile_Pack.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table_RegisterFile.vhdl Two_Level_Branch_Predictor_0_Pattern_History_Table.vhdl Two_Level_Branch_Predictor_0_Two_Level_Branch_Predictor_Glue_Pack.vhdl Two_Level_Branch_Predictor_0_Two_Level_Branch_Predictor_Glue.vhdl Two_Level_Branch_Predictor_0.vhdl
-

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/SelfTest/src/test.cpp

@@ -29 +29 @@
    *********************************************************************/
   sc_clock                              *  CLOCK;
+  sc_signal<Tcontrol_t>                 *  NRESET;
 
   sc_signal<Tcontrol_t>                 *  PREDICT_VAL                 [param._nb_prediction];
@@ -47 +48 @@
   string rename;
 
-  CLOCK = new sc_clock ("clock", 1.0, 0.5);
+  CLOCK  = new sc_clock              ("clock", 1.0, 0.5);
+  NRESET = new sc_signal<Tcontrol_t> ("NRESET");
 
   for (uint32_t i=0; i<param._nb_prediction; i++)
@@ -85 +87 @@
   cout << "<" << name << "> Instanciation of _Two_Level_Branch_Predictor" << endl;
   
-  (*(_Two_Level_Branch_Predictor->in_CLOCK))        (*(CLOCK));
+  (*(_Two_Level_Branch_Predictor->in_CLOCK ))        (*(CLOCK ));
+  (*(_Two_Level_Branch_Predictor->in_NRESET))        (*(NRESET));
   
   for (uint32_t i=0; i<param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue/SelfTest/mkf.info

@@ -1 @@
-
-# Two_Level_Branch_Predictor_Glue_0
-target_dep      all     Two_Level_Branch_Predictor_Glue_0.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_0.ngc   Two_Level_Branch_Predictor_Glue_0.prj
-target_dep      Two_Level_Branch_Predictor_Glue_0.prj   Two_Level_Branch_Predictor_Glue_0_Pack.vhdl Two_Level_Branch_Predictor_Glue_0.vhdl
-
-# Two_Level_Branch_Predictor_Glue_10
-target_dep      all     Two_Level_Branch_Predictor_Glue_10.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_10.ngc  Two_Level_Branch_Predictor_Glue_10.prj
-target_dep      Two_Level_Branch_Predictor_Glue_10.prj  Two_Level_Branch_Predictor_Glue_10_Pack.vhdl Two_Level_Branch_Predictor_Glue_10.vhdl
-
-# Two_Level_Branch_Predictor_Glue_11
-target_dep      all     Two_Level_Branch_Predictor_Glue_11.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_11.ngc  Two_Level_Branch_Predictor_Glue_11.prj
-target_dep      Two_Level_Branch_Predictor_Glue_11.prj  Two_Level_Branch_Predictor_Glue_11_Pack.vhdl Two_Level_Branch_Predictor_Glue_11.vhdl
-
-# Two_Level_Branch_Predictor_Glue_12
-target_dep      all     Two_Level_Branch_Predictor_Glue_12.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_12.ngc  Two_Level_Branch_Predictor_Glue_12.prj
-target_dep      Two_Level_Branch_Predictor_Glue_12.prj  Two_Level_Branch_Predictor_Glue_12_Pack.vhdl Two_Level_Branch_Predictor_Glue_12.vhdl
-
-# Two_Level_Branch_Predictor_Glue_13
-target_dep      all     Two_Level_Branch_Predictor_Glue_13.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_13.ngc  Two_Level_Branch_Predictor_Glue_13.prj
-target_dep      Two_Level_Branch_Predictor_Glue_13.prj  Two_Level_Branch_Predictor_Glue_13_Pack.vhdl Two_Level_Branch_Predictor_Glue_13.vhdl
-
-# Two_Level_Branch_Predictor_Glue_14
-target_dep      all     Two_Level_Branch_Predictor_Glue_14.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_14.ngc  Two_Level_Branch_Predictor_Glue_14.prj
-target_dep      Two_Level_Branch_Predictor_Glue_14.prj  Two_Level_Branch_Predictor_Glue_14_Pack.vhdl Two_Level_Branch_Predictor_Glue_14.vhdl
-
-# Two_Level_Branch_Predictor_Glue_15
-target_dep      all     Two_Level_Branch_Predictor_Glue_15.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_15.ngc  Two_Level_Branch_Predictor_Glue_15.prj
-target_dep      Two_Level_Branch_Predictor_Glue_15.prj  Two_Level_Branch_Predictor_Glue_15_Pack.vhdl Two_Level_Branch_Predictor_Glue_15.vhdl
-
-# Two_Level_Branch_Predictor_Glue_16
-target_dep      all     Two_Level_Branch_Predictor_Glue_16.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_16.ngc  Two_Level_Branch_Predictor_Glue_16.prj
-target_dep      Two_Level_Branch_Predictor_Glue_16.prj  Two_Level_Branch_Predictor_Glue_16_Pack.vhdl Two_Level_Branch_Predictor_Glue_16.vhdl
-
-# Two_Level_Branch_Predictor_Glue_17
-target_dep      all     Two_Level_Branch_Predictor_Glue_17.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_17.ngc  Two_Level_Branch_Predictor_Glue_17.prj
-target_dep      Two_Level_Branch_Predictor_Glue_17.prj  Two_Level_Branch_Predictor_Glue_17_Pack.vhdl Two_Level_Branch_Predictor_Glue_17.vhdl
-
-# Two_Level_Branch_Predictor_Glue_18
-target_dep      all     Two_Level_Branch_Predictor_Glue_18.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_18.ngc  Two_Level_Branch_Predictor_Glue_18.prj
-target_dep      Two_Level_Branch_Predictor_Glue_18.prj  Two_Level_Branch_Predictor_Glue_18_Pack.vhdl Two_Level_Branch_Predictor_Glue_18.vhdl
-
-# Two_Level_Branch_Predictor_Glue_19
-target_dep      all     Two_Level_Branch_Predictor_Glue_19.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_19.ngc  Two_Level_Branch_Predictor_Glue_19.prj
-target_dep      Two_Level_Branch_Predictor_Glue_19.prj  Two_Level_Branch_Predictor_Glue_19_Pack.vhdl Two_Level_Branch_Predictor_Glue_19.vhdl
-
-# Two_Level_Branch_Predictor_Glue_1
-target_dep      all     Two_Level_Branch_Predictor_Glue_1.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_1.ngc   Two_Level_Branch_Predictor_Glue_1.prj
-target_dep      Two_Level_Branch_Predictor_Glue_1.prj   Two_Level_Branch_Predictor_Glue_10_Pack.vhdl Two_Level_Branch_Predictor_Glue_10.vhdl Two_Level_Branch_Predictor_Glue_11_Pack.vhdl Two_Level_Branch_Predictor_Glue_11.vhdl Two_Level_Branch_Predictor_Glue_12_Pack.vhdl Two_Level_Branch_Predictor_Glue_12.vhdl Two_Level_Branch_Predictor_Glue_13_Pack.vhdl Two_Level_Branch_Predictor_Glue_13.vhdl Two_Level_Branch_Predictor_Glue_14_Pack.vhdl Two_Level_Branch_Predictor_Glue_14.vhdl Two_Level_Branch_Predictor_Glue_15_Pack.vhdl Two_Level_Branch_Predictor_Glue_15.vhdl Two_Level_Branch_Predictor_Glue_16_Pack.vhdl Two_Level_Branch_Predictor_Glue_16.vhdl Two_Level_Branch_Predictor_Glue_17_Pack.vhdl Two_Level_Branch_Predictor_Glue_17.vhdl Two_Level_Branch_Predictor_Glue_18_Pack.vhdl Two_Level_Branch_Predictor_Glue_18.vhdl Two_Level_Branch_Predictor_Glue_19_Pack.vhdl Two_Level_Branch_Predictor_Glue_19.vhdl Two_Level_Branch_Predictor_Glue_1_Pack.vhdl Two_Level_Branch_Predictor_Glue_1.vhdl
-
-# Two_Level_Branch_Predictor_Glue_20
-target_dep      all     Two_Level_Branch_Predictor_Glue_20.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_20.ngc  Two_Level_Branch_Predictor_Glue_20.prj
-target_dep      Two_Level_Branch_Predictor_Glue_20.prj  Two_Level_Branch_Predictor_Glue_20_Pack.vhdl Two_Level_Branch_Predictor_Glue_20.vhdl
-
-# Two_Level_Branch_Predictor_Glue_21
-target_dep      all     Two_Level_Branch_Predictor_Glue_21.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_21.ngc  Two_Level_Branch_Predictor_Glue_21.prj
-target_dep      Two_Level_Branch_Predictor_Glue_21.prj  Two_Level_Branch_Predictor_Glue_21_Pack.vhdl Two_Level_Branch_Predictor_Glue_21.vhdl
-
-# Two_Level_Branch_Predictor_Glue_22
-target_dep      all     Two_Level_Branch_Predictor_Glue_22.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_22.ngc  Two_Level_Branch_Predictor_Glue_22.prj
-target_dep      Two_Level_Branch_Predictor_Glue_22.prj  Two_Level_Branch_Predictor_Glue_22_Pack.vhdl Two_Level_Branch_Predictor_Glue_22.vhdl
-
-# Two_Level_Branch_Predictor_Glue_23
-target_dep      all     Two_Level_Branch_Predictor_Glue_23.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_23.ngc  Two_Level_Branch_Predictor_Glue_23.prj
-target_dep      Two_Level_Branch_Predictor_Glue_23.prj  Two_Level_Branch_Predictor_Glue_23_Pack.vhdl Two_Level_Branch_Predictor_Glue_23.vhdl
-
-# Two_Level_Branch_Predictor_Glue_2
-target_dep      all     Two_Level_Branch_Predictor_Glue_2.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_2.ngc   Two_Level_Branch_Predictor_Glue_2.prj
-target_dep      Two_Level_Branch_Predictor_Glue_2.prj   Two_Level_Branch_Predictor_Glue_20_Pack.vhdl Two_Level_Branch_Predictor_Glue_20.vhdl Two_Level_Branch_Predictor_Glue_21_Pack.vhdl Two_Level_Branch_Predictor_Glue_21.vhdl Two_Level_Branch_Predictor_Glue_22_Pack.vhdl Two_Level_Branch_Predictor_Glue_22.vhdl Two_Level_Branch_Predictor_Glue_23_Pack.vhdl Two_Level_Branch_Predictor_Glue_23.vhdl Two_Level_Branch_Predictor_Glue_2_Pack.vhdl Two_Level_Branch_Predictor_Glue_2.vhdl
-
-# Two_Level_Branch_Predictor_Glue_3
-target_dep      all     Two_Level_Branch_Predictor_Glue_3.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_3.ngc   Two_Level_Branch_Predictor_Glue_3.prj
-target_dep      Two_Level_Branch_Predictor_Glue_3.prj   Two_Level_Branch_Predictor_Glue_3_Pack.vhdl Two_Level_Branch_Predictor_Glue_3.vhdl
-
-# Two_Level_Branch_Predictor_Glue_4
-target_dep      all     Two_Level_Branch_Predictor_Glue_4.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_4.ngc   Two_Level_Branch_Predictor_Glue_4.prj
-target_dep      Two_Level_Branch_Predictor_Glue_4.prj   Two_Level_Branch_Predictor_Glue_4_Pack.vhdl Two_Level_Branch_Predictor_Glue_4.vhdl
-
-# Two_Level_Branch_Predictor_Glue_5
-target_dep      all     Two_Level_Branch_Predictor_Glue_5.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_5.ngc   Two_Level_Branch_Predictor_Glue_5.prj
-target_dep      Two_Level_Branch_Predictor_Glue_5.prj   Two_Level_Branch_Predictor_Glue_5_Pack.vhdl Two_Level_Branch_Predictor_Glue_5.vhdl
-
-# Two_Level_Branch_Predictor_Glue_6
-target_dep      all     Two_Level_Branch_Predictor_Glue_6.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_6.ngc   Two_Level_Branch_Predictor_Glue_6.prj
-target_dep      Two_Level_Branch_Predictor_Glue_6.prj   Two_Level_Branch_Predictor_Glue_6_Pack.vhdl Two_Level_Branch_Predictor_Glue_6.vhdl
-
-# Two_Level_Branch_Predictor_Glue_7
-target_dep      all     Two_Level_Branch_Predictor_Glue_7.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_7.ngc   Two_Level_Branch_Predictor_Glue_7.prj
-target_dep      Two_Level_Branch_Predictor_Glue_7.prj   Two_Level_Branch_Predictor_Glue_7_Pack.vhdl Two_Level_Branch_Predictor_Glue_7.vhdl
-
-# Two_Level_Branch_Predictor_Glue_8
-target_dep      all     Two_Level_Branch_Predictor_Glue_8.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_8.ngc   Two_Level_Branch_Predictor_Glue_8.prj
-target_dep      Two_Level_Branch_Predictor_Glue_8.prj   Two_Level_Branch_Predictor_Glue_8_Pack.vhdl Two_Level_Branch_Predictor_Glue_8.vhdl
-
-# Two_Level_Branch_Predictor_Glue_9
-target_dep      all     Two_Level_Branch_Predictor_Glue_9.ngc
-target_dep      Two_Level_Branch_Predictor_Glue_9.ngc   Two_Level_Branch_Predictor_Glue_9.prj
-target_dep      Two_Level_Branch_Predictor_Glue_9.prj   Two_Level_Branch_Predictor_Glue_9_Pack.vhdl Two_Level_Branch_Predictor_Glue_9.vhdl
-

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/include/Two_Level_Branch_Predictor.h

@@ -70 +70 @@
     // Interface
   public    : SC_CLOCK                      *  in_CLOCK                      ;
-
+  public    : SC_IN (Tcontrol_t)            *  in_NRESET                     ;
     // Interface Predict
   public    : SC_IN (Tcontrol_t)           **  in_PREDICT_VAL                ;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_allocation.cpp

@@ -23 +23 @@
 
      in_CLOCK  = new SC_CLOCK           ("in_CLOCK");
+     in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET");
 
      in_PREDICT_VAL                 = new SC_IN (Tcontrol_t)     * [_param._nb_prediction     ];
@@ -161 +162 @@
         
         // Instantiation
-        (*(component_Branch_History_Table->in_CLOCK))        (*(in_CLOCK));
+        (*(component_Branch_History_Table->in_CLOCK ))        (*(in_CLOCK ));
+        (*(component_Branch_History_Table->in_NRESET))        (*(in_NRESET));
 
         for (uint32_t i=0; i<_param._nb_prediction; i++)
@@ -196 +198 @@
         // Instantiation
         (*(component_Pattern_History_Table->in_CLOCK))        (*(in_CLOCK));
+        (*(component_Pattern_History_Table->in_NRESET))       (*(in_NRESET));
         
         for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_deallocation.cpp

@@ -21 +21 @@
 
     delete in_CLOCK;
+    delete in_NRESET;
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_body.cpp

@@ -27 +27 @@
         list_port_map.clear();
 
-        vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+        vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
+        vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
 
         for (uint32_t i=0; i<_param._nb_prediction; i++)
@@ -53 +54 @@
         list_port_map.clear();
 
-        vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+        vhdl.set_body_component_port_map (list_port_map,"in_CLOCK ","in_CLOCK ");
+        vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
 
         for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_port.cpp

@@ -20 +20 @@
     log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_port","Begin");
 
-    vhdl.set_port (" in_CLOCK" , IN, 1);
+    vhdl.set_port (" in_CLOCK ", IN, 1);
+    vhdl.set_port (" in_NRESET", IN, 1);
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_port.cpp

@@ -20 +20 @@
   {
     log_printf(FUNC,Two_Level_Branch_Predictor,"vhdl_testbench_port","Begin");
+
+    _vhdl_testbench->set_port (" in_NRESET", IN, 1);
 
     for (uint32_t i=0; i<_param._nb_prediction; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/src/Two_Level_Branch_Predictor_vhdl_testbench_transition.cpp

@@ -25 +25 @@
 #endif    
 
+    _vhdl_testbench->add_input (PORT_READ( in_NRESET));
+    
     // In order with file Two_Level_Branch_Predictor_vhdl_testbench_port.cpp
     // Warning : if a output depend of a subcomponent, take directly the port of subcomponent