Changeset 356
- Timestamp:
- Feb 6, 2011, 2:29:09 PM (14 years ago)
- Location:
- anr
- Files:
-
- 23 edited
Legend:
- Unmodified
- Added
- Removed
-
anr/annexe-autre-participation.tex
r322 r356 6 6 7 7 \newenvironment{autreprojettabular}{% 8 \noindent\begin{tabular}{|c|p{1.6cm}|c|p{ 3.75cm}|p{3.5cm}|p{1.6cm}|p{2.0cm}|}\hline8 \noindent\begin{tabular}{|c|p{1.6cm}|c|p{5.0cm}|p{5.0cm}|p{4.6cm}|p{2.0cm}|}\hline 9 9 Part. & Name & 10 10 \raisebox{-2.8ex}{{\begin{minipage}[c]{0.8cm}\centering PM\\by\\year\\\end{minipage}}} … … 18 18 \def\autreprojettabularentry#1#2#3#4#5#6#7{#1 & #2 & #3 & #4 & #5 & #6 & #7 \\\hline} 19 19 20 %\begin{landscape} 21 %\begin{figure} 22 \begin{small} 23 % 20 24 \begin{autreprojettabular} 21 22 25 \autreprojettabularentry 23 { 5}{Greiner}{4}26 {2}{Greiner}{4} 24 27 {Tsar, CATRENE, 695 k\euro} 25 28 {Tera Scale ARchitecture} … … 33 36 {04/01/2008 05/31/2011} 34 37 \autreprojettabularentry 35 { 3}{P\'etrot}{7}38 {5}{P\'etrot}{\mustbecompleted{7 TIMA}} 36 39 {3DIM3, CATRENE, 741 k\euro} 37 40 {3D TSV Integration for MultiMedia and Mobile Applications} 38 41 {\makebox{Dominique} Marron (STMicroelectronics)} 39 {7}{Nguyen}{8}40 42 {01/02/2009 31/01/2012} 41 43 \autreprojettabularentry 42 { 3}{P\'etrot}{4}44 {5}{P\'etrot}{\mustbecompleted{4 TIMA}} 43 45 {SoftSoC, MEDEA+, 500 k\euro} 44 46 {Software for SoC} … … 46 48 {1/03/2008 28/02/2011} 47 49 \autreprojettabularentry 48 { 3}{P\'etrot}{6}50 {5}{P\'etrot}{\mustbecompleted{6 = 17}} 49 51 {ComCas, CATRENE, 600 k\euro} 50 52 {Communication-centric heterogeneous Multi-Core Architectures} … … 52 54 {01/03/2009 28/02/2012} 53 55 \autreprojettabularentry 54 { 3}{Muller}{4}56 {5}{Muller}{4} 55 57 {iGlance, CATRENE, 550 k\euro} 56 58 {Interactive Genius Look At Numerous Contemporary Events} 57 59 {\makebox{Michel} Imbert (STMicroelectronics)} 58 60 {01/07/2008 30/06/2011} 61 \autreprojettabularentry 62 {8}{Lemonier}{3} 63 {FORFOR, ANR Arpege, 305 k\euro} 64 {\mustbecompleted{TITRE (TRT)}} 65 {\makebox{Muller} (LEAT)} 66 {01/01/2008 31/12/2010} 67 \autreprojettabularentry 68 {8}{Lemonier}{4} 69 {FREIA, ANR Arpege, 280 k\euro} 70 {\mustbecompleted{TITRE (TRT)}} 71 {\makebox{Blondeau} (Amines)} 72 {01/01/2008 31/12/2010} 73 \autreprojettabularentry 74 {8}{Lemonier}{3} 75 {CHAPI, System@tic, 251 k\euro} 76 {\mustbecompleted{TITRE (TRT)}} 77 {\makebox{Lecluse} (Kalray)} 78 {01/12/2009 31/12/2012} 79 \autreprojettabularentry 80 {8}{Brelet}{\mustbecompleted{6 TRT}} 81 {PM, System@tic, \mustbecompleted{0 TRT} k\euro} 82 {\mustbecompleted{TITRE (TRT)}} 83 {\makebox{Vincent LEFFTZ} (Astrium)} 84 {01/01/2010 31/12/2012} 85 \autreprojettabularentry 86 {8}{Brelet}{\mustbecompleted{6 = 12}} 87 {PM, RTSIMEX ANR, \mustbecompleted{0 TRT} k\euro} 88 {\mustbecompleted{TITRE (TRT)}} 89 {\makebox{Fr\'ed\'eric Thomas} (OBEO)} 90 {01/01/2010 31/12/2012} 59 91 \end{autreprojettabular} 92 % 93 \end{small} 94 %\end{figure} 95 %\end{landscape} -
anr/annexe-cv.tex
r352 r356 119 119 {Associate Professor} 120 120 {PhD (2007)} 121 {{10} }121 {{10}{}} 122 122 \item[Course of Lectures]\mbox{} 123 123 Computer Architecture, assembly language programming, FPGA … … 203 203 \end{cvenv} 204 204 % 205 \begin{cvenv} 206 {{Lemonier}{Fabrice}{43}} 207 {Research program manager} 208 {PhD (1996), Master in parallel computing (1992), EFREI Engineer (1991)} 209 {{3}{}} 210 \item[Projects]\mbox{} 211 \begin{itemize} 212 \item Coordinator of Teraops project (p\^ole de comp\'etitivit\'e System\verb+@+tic) to develop a heterogeneous manycore 213 \item Works on FOSFOR and PREIA ANR project on reconfigurable computing, and on CHAPI (p\^ole de comp\'etitivit\'e System\verb+@+tic) 214 \end{itemize} 215 \end{cvenv} 216 % 217 \begin{cvenv} 218 {{Brelet}{Paul}{28}} 219 {software developer} 220 {EFREI Engineer (2007)} 221 {{4}{}} 222 \item[Projects]\mbox{} 223 \begin{itemize} 224 \item Worked on toolset in MORPHEUS (ICT FP6) 225 \item Works on toolset in SOCKET (p\^ole de comp\'etitivit\'e System\verb+@+tic), toolset in RTSimex (ANR) 226 \end{itemize} 227 \end{cvenv} 205 228 -
anr/annexe-reponse.tex
r332 r356 1 1 %\def\t{\\\hspace*{.5em}} 2 \def\mysubsection{\subsubsection} 3 \def\mysubsubsection#1{\subsubsection*{\underline{#1}}} 2 4 \def\t{\\{$\bullet$}~} 3 5 \def\sectionPpageP#1{section~\ref{#1} (page~\pageref{#1})\xspace} … … 11 13 proposition. 12 14 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 13 \ subsection{Réponses séquentielles}14 % 15 \ subsubsection{Pertinence de la proposition au regard de l'appel à projet}15 \mysubsection{Réponses séquentielles} 16 % 17 \mysubsubsection{Pertinence de la proposition au regard de l'appel à projet} 16 18 Pas de faiblesse signalée. 17 \ subsubsection{Qualité scientifique et technique de la proposition}19 \mysubsubsection{Qualité scientifique et technique de la proposition} 18 20 \begin{description} 19 21 \item[Point 1 (\textit{non prise en compte des outils existants})]\mbox{} … … 114 116 \end{description} 115 117 % 116 \ subsubsection{Qualité de la construction de la proposition}118 \mysubsubsection{Qualité de la construction de la proposition} 117 119 \begin{description} 118 120 \item[Manque un industriel pour assurer la pérennité]\mbox{}\\ … … 127 129 \end{description} 128 130 % 129 \ subsubsection{Impact global du projet}131 \mysubsubsection{Impact global du projet} 130 132 \begin{description} 131 133 \item[Volonté de tout refaire]\mbox{}\\ … … 158 160 \end{description} 159 161 % 160 \ subsubsection{Qualité du consortium}162 \mysubsubsection{Qualité du consortium} 161 163 \begin{description} 162 164 \item[Xilinx n'a pas une part assez active]\mbox{}\\ … … 171 173 \end{description} 172 174 % 173 \ subsubsection{Moyens humains et financiers}175 \mysubsubsection{Moyens humains et financiers} 174 176 \begin{description} 175 177 \item[Incongruités de quelques demandes financiÚres]\mbox{}\\ … … 185 187 \end{description} 186 188 % 187 \ subsubsection{Avis Général}189 \mysubsubsection{Avis Général} 188 190 \begin{description} 189 191 \item[Déséquilibre entre l'ampleur du développement et les moyens]\mbox{}\\ … … 208 210 % 209 211 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 210 \ subsection{SynthÚse}211 % 212 \ subsubsection{Projet trop ambitieux}212 \mysubsection{SynthÚse} 213 % 214 \mysubsubsection{Projet trop ambitieux} 213 215 \label{trop:ambitieux} 214 216 Par rapport au projet 2010, nous avons réduit la surface du projet de 20\% en nous … … 245 247 \end{itemize} 246 248 % 247 \ subsubsection{Projet \& SoCLib}249 \mysubsubsection{Projet \& SoCLib} 248 250 \label{coach+soclib} 249 251 {$\bullet$}\note{SL1} … … 278 280 neutre. 279 281 % 280 \ subsubsection{Pérennité/dissémination du projet}282 \mysubsubsection{Pérennité/dissémination du projet} 281 283 \label{perennite+dissemination} 282 284 Lâarrivée de la société Magillem Design Services dans le consortium permettra de … … 303 305 considérés comme les cibles privilégiés du projet. 304 306 % 305 \ subsubsection{Projet trop académique}307 \mysubsubsection{Projet trop académique} 306 308 \label{trop:academique} 307 309 Le projet a été jugé trop académique. Ceci est un peu corrigé par l'arrivée de -
anr/anr.sty
r335 r356 35 35 \immediate\openout\supporter=tmp/anr-supporter.tex 36 36 \def\letterOfInterest#1#2{{% 37 \let\subs ection\relax%37 \let\subsubsection\relax% 38 38 \let\label\relax% 39 39 \let\begin\relax% … … 46 46 \let\shadowbox\relax% 47 47 \immediate\write\supporter{% 48 \subs ection{#1} \label{supp:\the\supportercnt}}%48 \subsubsection{#1} \label{supp:\the\supportercnt}}% 49 49 \immediate\write\supporter{% 50 50 %\begin{center}\includegraphics[width=0.9\linewidth]{#2}\end{center}}% … … 137 137 \def\@MDS{\ifx\MDS\disable{}\else\ifx\MDS\enable{\@partner}\else{\@leader}\fi\fi}% 138 138 \begin{tabular}{|c|c|c|c|c|c|c|c|}\hline 139 \S inria & \Slip & \Stima & \Subs & \Supmc & \Smds& \Sbull & \Sthales \\\hline140 \@ INRIA & \@LIP & \@TIMA & \@UBS & \@UPMC & \@MDS& \@BULL & \@THALES \\\hline139 \Smds & \Supmc & \Subs & \Slip & \Stima & \Sinria & \Sbull & \Sthales \\\hline 140 \@MDS & \@UPMC & \@UBS & \@LIP & \@TIMA & \@INRIA & \@BULL & \@THALES \\\hline 141 141 \end{tabular}\par 142 142 } -
anr/anr.tex
r353 r356 42 42 \pagestyle{fancy} 43 43 \lhead{\begin{minipage}{1.5cm}\includegraphics[width=\linewidth]{logo-anr}\vspace*{1mm}\end{minipage}} 44 \chead{\begin{minipage}{8cm}\small\center Programme Ing\'enierie num\'erique \& s\'ecurit\'e\\Edition 2010\vspace*{1mm}\end{minipage}} 45 \rhead{\begin{minipage}{5cm}\small\raggedleft Project COACH\\Scientific document\vspace*{1mm}\end{minipage}} 44 \chead{\begin{minipage}{8cm}\small\center Programme Ing\'enierie num\'erique 45 \& s\'ecurit\'e\\Edition 2011\vspace*{1mm}\end{minipage}} 46 \rhead{\begin{minipage}{5cm}\small\raggedleft Project COACH\\Document 47 scientifique\vspace*{1mm}\end{minipage}} 46 48 \lfoot{\begin{minipage}{7cm}\small ANR-GUI-AAP-04 â Doc Scientifique 2011\end{minipage}} 47 49 \cfoot{\begin{minipage}{5cm}\end{minipage}} … … 53 55 \def\backbone{backbone infrastructure\xspace} 54 56 \def\Backbone{Backbone infrastructure\xspace} 55 \def\hommemois{men*months\xspace} 57 \def\hommemoislong{men$\ast$months\xspace} 58 \def\hommemois{m.m\xspace} 56 59 \def\xilinxcpu{ARM\xspace} 57 60 \def\xilinxbus{AMBA\xspace} … … 74 77 \def\inria{INRIA\xspace} \def\Sinria{\Sformat{INRIA}\xspace} 75 78 %\def\irisa{INRIA/\-CAIRN\xspace} \def\Sirisa{\Sformat{INRI}\xspace} 76 \def\lip{ENS Lyon/LIP/Compsys\xspace} \def\Slip{\Sformat{LIP}\xspace} 79 \def\liplong{ENS Lyon/LIP/Compsys\xspace} 80 \def\lip{ENS Lyon\xspace} \def\Slip{\Sformat{LIP}\xspace} 77 81 \def\tima{TIMA\xspace} \def\Stima{\Sformat{TIMA}\xspace} 78 82 \def\ubs{LAB-STICC\xspace} \def\Subs{\Sformat{UBS}\xspace} … … 155 159 \end{tabular} 156 160 % 157 \setcounter{tocdepth}{ 1}161 \setcounter{tocdepth}{2} 158 162 \tableofcontents 159 163 … … 220 224 \begin{description} 221 225 \item[partner] 222 \Sinria for \inria, \Slip for \lip , \Stima for \tima, \Subs for \ubs,223 \Supmc for \upmc, \S xilinx for \xilinx, \Sbull for \bull, \Sthales for \thales,226 \Sinria for \inria, \Slip for \liplong, \Stima for \tima, \Subs for \ubs, 227 \Supmc for \upmc, \Sbull for \bull, \Sthales for \thales, 224 228 and \Smds for \mds. 225 229 \item[kind of the deliverable] … … 269 273 270 274 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 271 \appendix275 %\appendix 272 276 \newpage 273 \section{Bibliography} 277 \section{Annexes} 278 % % % % % % % % % % % % % % % % % % % % % % % % 279 \subsection{Bibliography} 274 280 %\subsection{References} 275 281 \anrdoc{Inclure la liste des références bibliographiques utilisées dans la … … 279 285 \bibliography{anr} 280 286 281 \newpage\section{CV, resume}\input{annexe-cv.tex} 282 283 \newpage\section{Staff involvement in other contracts}\input{annexe-autre-participation.tex} 284 285 \newpage\section{Man power by partners and by deliverables} 286 \subsection{Partner 1: \mds} \label{table-livrables-mds} \input{table_mds_full.tex} 287 \subsection{Partner 2: \upmc} \label{table-livrables-upmc} \input{table_upmc_full.tex} 288 \subsection{Partner 3: \ubs} \label{table-livrables-usb} \input{table_ubs_full.tex} 289 \subsection{Partner 4: \lip} \label{table-livrables-lip} \input{table_inria_compsys_full.tex} 290 \subsection{Partner 5: \tima} \label{table-livrables-tima} \input{table_tima_full.tex} 291 \subsection{Partner 6: \inria} \label{table-livrables-inria} \input{table_inria_cairn_full.tex} 292 \subsection{Partner 7: \bull} \label{table-livrables-bull} \input{table_bull_full.tex} 293 \subsection{Partner 8: \thales}\label{table-livrables-thales}\input{table_thales_full.tex} 294 295 \newpage\section{Effort tables} 287 % % % % % % % % % % % % % % % % % % % % % % % % 288 \newpage\subsection{CV, resume}\input{annexe-cv.tex} 289 \begin{landscape} 290 \newpage\subsection{Staff involvement in other contracts}\input{annexe-autre-participation.tex} 291 \end{landscape} 292 \newpage\subsection{Man power by partners and by deliverables} 293 \label{effort:by:partner:livrable} 294 \subsubsection{Partner 1: \mds} \label{table-livrables-mds} \input{table_mds_full.tex} 295 \subsubsection{Partner 2: \upmc} \label{table-livrables-upmc} \input{table_upmc_full.tex} 296 \subsubsection{Partner 3: \ubs} \label{table-livrables-ubs} \input{table_ubs_full.tex} 297 \subsubsection{Partner 4: \liplong} \label{table-livrables-inria_compsys} \input{table_inria_compsys_full.tex} 298 \subsubsection{Partner 5: \tima} \label{table-livrables-tima} \input{table_tima_full.tex} 299 \subsubsection{Partner 6: \inria} \label{table-livrables-inria_cairn} \input{table_inria_cairn_full.tex} 300 \subsubsection{Partner 7: \bull} \label{table-livrables-bull} \input{table_bull_full.tex} 301 \subsubsection{Partner 8: \thales} \label{table-livrables-thales} \input{table_thales_full.tex} 302 \newpage\subsection{Effort tables} 303 \label{effort:by:livrable} 296 304 %\begin{small} 297 305 \noindent\input{tmp/effort-par-livrable-1.tex} … … 301 309 %\end{small} 302 310 303 \newpage\section{Prise en compte de l'évaluation 2010} 304 \input{annexe-reponse.tex} 305 306 \newpage\section{Letters of interest} 311 \newpage\subsection{Letters of interest} 307 312 \label{lettre-soutien} 308 313 \input{tmp/anr-supporter.tex} 309 314 315 \newpage\subsection{Prise en compte de l'évaluation 2010} 316 \input{annexe-reponse.tex} 317 310 318 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 311 319 \end{document} -
anr/gantt.l
r335 r356 53 53 struct partner_def { char *key, *name, *fnfull, *fnshort; } partner_table[] = { 54 54 { "UNKNOW" ,"relax" ,0 ,0 }, 55 { "inria" ,"inria" ,"table_inria_cairn_full.tex" ,"table_inria_cairn_short.tex" }, 55 { "mds" ,"mds" ,"table_mds_full.tex" ,"table_mds_short.tex" }, 56 { "upmc" ,"upmc" ,"table_upmc_full.tex" ,"table_upmc_short.tex" }, 57 { "ubs" ,"ubs" ,"table_ubs_full.tex" ,"table_ubs_short.tex" }, 56 58 { "lip" ,"lip" ,"table_inria_compsys_full.tex","table_inria_compsys_short.tex" }, 57 59 { "tima" ,"tima" ,"table_tima_full.tex" ,"table_tima_short.tex" }, 58 { "ubs" ,"ubs" ,"table_ubs_full.tex" ,"table_ubs_short.tex" }, 59 { "upmc" ,"upmc" ,"table_upmc_full.tex" ,"table_upmc_short.tex" }, 60 { "inria" ,"inria" ,"table_inria_cairn_full.tex" ,"table_inria_cairn_short.tex" }, 60 61 { "bull" ,"bull" ,"table_bull_full.tex" ,"table_bull_short.tex" }, 61 62 { "thales" ,"thales" ,"table_thales_full.tex" ,"table_thales_short.tex" }, 62 { "mds" ,"mds" ,"table_mds_full.tex" ,"table_mds_short.tex" },63 63 { 0 ,0 ,0 ,0 }, 64 64 }; -
anr/section-2.tex
r338 r356 1 1 Embedded systems (SoC and MPSoC) have become an inevitable evolution in the microelectronic industry. 2 Due to the exploding fabrication costs, the ASIC technology (Application Specific Integrated Circuits)3 is not an option for SMEs (Small and Medium Enterprises).2 The ASIC technology (Application Specific Integrated Circuits) 3 is not an option for markets with small series of products due to ROI. 4 4 Fortunately, the new FPGA (Field Programmable Gate Array) components, 5 such as the Virtex 5family from \xilinx, or the Stratix4 family from \altera can implement a complete5 such as the Virtex6 family from \xilinx, or the Stratix4 family from \altera can implement a complete 6 6 multi-processor architecture on a single device. 7 7 But the design of embedded system is a long and complex task that requires expertise in software, 8 software/hardware p artionning, operating system, hardware design, VHDL/Verilog modeling.8 software/hardware portioning, operating system, hardware design, VHDL/Verilog modeling. 9 9 Only very few SMEs have these multiple expertises and are present on the embedded system market. 10 The corresponding development cost is high and it is not compliant with 11 specification or standard evolution (problem of flexibility). 10 12 Furthermore, even small design shops in big companies are facing the same issue. 11 13 \begin{center}\begin{minipage}{.8\linewidth}\textit{ … … 74 76 unadapted to the current GPU based solutions. 75 77 \parlf 76 C oachgenerates SoCs which are part of larger systems. Thus it is important to take77 78 COACH generates SoCs which are part of larger systems. Thus it is important to take 79 into account the existing industrial design flow. For this reason COACH will use the 78 80 IP-XACT IEEE 1685 standard for packaging these generated SoCs. 79 81 \begin{center}\begin{minipage}{.8\linewidth}\textit{ -
anr/section-consortium-desc.tex
r355 r356 11 11 The consortium is made of 8 partners: 5 academic and 3 industrial, which is well balanced 12 12 for reaching the objectives (technical innovation and industrial evaluation for further exploitation). 13 Each academic partner is expert in a specific area and each industrial brings a different approach to the use of the tools: 14 \begin{itemize} 15 \item LIP6: MPSoC design and HLS 16 \item TIMA: Architecture, virtual prototyping, HLS 17 \item LAB-STICC: HLS, compilation 18 \item INRIA: ASIP design 19 \item LIP: compilation, polyhedral model, HPC 20 \item Magillem: IP-XACT and industrial flow integration 21 \item BULL: HPC 22 \item THALES: \mustbecompleted{XXX (MAGILEM TRT)} 23 \end{itemize} 24 25 Thales will represent the FPGA users, BULL the HPC users, and Magillem the SoC integrators. 26 27 28 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 29 \subsubsection{\inria} 30 31 INRIA, the French national institute for research in computer science 32 and control, operating under the dual authority of the Ministry of 33 Research and the Ministry of Industry, is dedicated to fundamental and 34 applied research in information and communication science and 35 technology (ICST). The Institute also plays a major role in technology 36 transfer by fostering training through research, diffusion of 37 scientific and technical information, development, as well as 38 providing expert advice and participating in international programs. 39 \parlf 40 By playing a leading role in the scientific community in the field and 41 being in close contact with industry, INRIA is a major participant in 42 the development of ICST in France. Throughout its eight research 43 centres in Rocquencourt, Rennes, Sophia Antipolis, Grenoble, Nancy, 44 Bordeaux, Lille and Saclay, INRIA has a workforce of 3 800, 2 800 of 45 whom are scientists from INRIA and INRIA's partner organizations such 46 as CNRS (the French National Center for Scientific Research), 47 universities and leading engineering schools. They work in 168 joint 48 research project-teams. Many INRIA researchers are also professors and 49 approximately 1 000 doctoral students work on theses as part of INRIA 50 research project-teams. 51 %\parlf 52 %INRIA develops many partnerships with industry and fosters technology 53 %transfer and company foundation in the field of ICST - some ninety 54 %companies have been founded with the support of INRIA-Transfert, a 55 %subsidiary of INRIA, specialized in guiding, evaluating, qualifying, 56 %and financing innovative high-tech IT start-up companies. INRIA is 57 %involved in standardization committees such as the IETF, ISO and the 58 %W3C of which INRIA was the European host from 1995 to 2002. 59 %\parlf 60 %INRIA maintains important international relations and exchanges. In 61 %Europe, INRIA is a member of ERCIM which brings together research 62 %institutes from 19 European countries. INRIA is a partner in about 120 63 %FP6 actions and 40 FP7 actions, mainly in the ICST field. INRIA also 64 %collaborates with numerous scientific and academic institutions abroad 65 %(joint laboratories such as LIAMA, associated research teams, training 66 %and internship programs). 67 68 The CAIRN group of INRIA Rennes -- Bretagne Atlantique study reconfigurable 69 system-on-chip, i.e. hardware systems whose configuration may change before or even during 70 execution. To this end, CAIRN has 13 permanent researchers and a variable number of PhD 71 students, post-docs and engineers. 72 CAIRN intends to approach reconfigurable architectures from three 73 angles: the invention of new reconfigurable platforms, the development 74 of associated transformation, compilation and synthesis tools, and the 75 exploration of the interaction between algorithms and architectures. 76 CAIRN is a joint team with CNRS, University of Rennes 1 and ENS Cachan. 77 78 \subsubsection{\lip} 79 The Compsys group of Ecole Normale Sup\'erieure de Lyon is a project-team 80 of INRIA Rh\^one-Alpes and a part of Laboratoire de l'Informatique du 81 Parall\'elisme (LIP), UMR 5668 of CNRS. It has four permanent researchers 82 and a variable number of PhD students and post-docs. Its field of 83 expertise is compilation for embedded system, optimizing compilers 84 and automatic parallelization. Its members were among the initiators 85 of the polyhedral model for automatic parallelization and program 86 optimization generally. It has authored or contributed to 87 several well known libraries for linear programming, polyhedra manipulation 88 and optimization in general. It has strong industrial cooperations, notably 89 with ST Microelectronics and \thales. 90 91 92 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 93 \subsubsection{\tima} 94 The TIMA laboratory ("Techniques of Informatics and Microelectronics 95 for integrated systems Architecture") is a public research laboratory 96 sponsored by Centre National de la Recherche Scientifique (CNRS, UMR5159), 97 Grenoble Institute of Technology (Grenoble-INP) and Universit\'{e} Joseph Fourier 98 (UJF). 99 The research topics cover the specification, design, verification, test, 100 CAD tools and design methods for integrated systems, from analog and 101 digital components on one end of the spectrum, to multiprocessor 102 Systems-on-Chip together with their basic operating system on the other end. 103 \parlf 104 Currently, the lab employs 124 persons among which 60 PhD candidates, and runs 105 32 ongoing French/European funded projects. 106 Since its creation in 1984, TIMA funded 7 startups, patented 36 inventions 107 and had 243 PhD thesis defended. 108 \parlf 109 The System Level Synthesis Group (25 people including PhDs) is 110 involved in several FP6, FP7, CATRENE and ANR projects. 111 Its field of expertise is in CAD and architecture for Multiprocessor 112 SoC and Hardware/Software interface. 113 114 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 115 \subsubsection{\ubs} 116 117 The Lab-STICC (Laboratoire des Sciences et Techniques de l'Information, 118 de la Communication, et de la Connaissance), is a French CNRS laboratory 119 (UMR 3192) that groups 4 research centers in the west and south 120 Brittany: the Universit\'e de Bretagne-Sud (UBS), the Universit\'e de 121 Bretagne Occidentale (UBO), and Telecom Bretagne (ENSTB). 122 The Lab-STICC is composed of three departments: Microwave and equipments (MOM), 123 Digital communications, Architectures and circuits (CACS) and Knowledge, 124 information and decision (CID). The Lab-STICC represents a staff of 279 125 peoples, including 115 researchers and 113 PhD students. 126 The scientific production during the last 4 years represents 20 127 books, 200 journal publications, 500 conference publications, 22 128 patents, 69 PhDs diploma. 129 \parlf 130 The UBS/Lab-STICC laboratory is involved in several national research 131 projects (e.g. RNTL : SystemC'Mantic, EPICURE - RNRT : MILPAT, ALIPTA, 132 A3S - ANR : MoPCoM, SoCLib, Famous, RaaR, AFANA, Open-PEOPLE, ICTER ...), 133 CMCU project (COSIP) and regional projects (e.g. ITR projects PALMYRE 134 ...). It is also involved in European Project (e.g. ITEA/SPICES, 135 IST/AETHER ...). These projects are conducted through tight cooperation 136 with national and international companies and organizations (e.g. France 137 Telecom CNET, MATRA, CEA, ASTRIUM, \thales Com., \thales Avionics, AIRBUS, 138 BarCo, STMicroelectronics, Alcatel-Lucent ...). Results of those or former 139 projects are for example the high-level synthesis tool GAUT, the UHLS 140 syntax and semantics-oriented editor, the DSP power estimation tool 141 Soft-explorer or the co-design framework Design Trotter. 142 \parlf 143 The CACS department of the Lab-STICC (also referred as UBS/Lab-STICC), 144 located in Lorient, is involved in COACH. 145 The UBS/Lab-STICC is working on the design of complex electronic systems 146 and circuits, especially but not exclusively focussing on real-time 147 embedded systems, power and energy consumption optimization, high-level 148 synthesis and IP design, digital communications, hardware/software 149 co-design and ESL methodologies. The application targeted by the 150 UBS/Lab-STICC are mainly from telecommunication and multimedia domains 151 which enclose signal, image, video, vision, and communication processing. 152 153 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 154 \subsubsection{\upmc} 155 156 University Pierre et Marie Curie (UPMC) is the largest university in France (7400 157 employees,38000 students). 158 The Laboratoire d'Informatique de Paris 6 (LIP6) is the computer science laboratory of 159 UPMC, hosting more than 400 researchers, under the umbrella of the CNRS (Centre National 160 de la Recherche Scientifique). 161 The \og System on Chip \fg Department of LIP6 consists of 80 people, including 40 PHD 162 students. 163 The research focuses on CAD tools and methods for VLSI and System on Chip design. 164 \\ 165 The annual budget is about 3 M{\texteuro}, and 1.5 M{\texteuro} are from research contracts. 166 The SoC department has been involved in several european projects :IDPS, EVEREST, OMI-HIC, 167 OMI-MACRAME, OMI-ARCHES, EUROPRO, COSY, Medea SMT, Medea MESA, Medea+ BDREAMS, Medea+ 168 TSAR. 169 \parlf 170 The public domain VLSI CAD system ALLIANCE, developped at UPMC is installed in more than 171 200 universities worldwide. 172 The LIP6 is in charge of the technical coordination of the SoCLib national project, and is 173 hosting the SoCLib WEB server. 174 The SoCLib DSX component was designed and developped in our laboratory. 175 It allows design space exploration and will the base of the $CSG$ COACH tools. 176 Moreover, the LIP6 developped during the last 10 years the UGH tool for high level 177 synthesis of control-dominated coprocessors. 178 This tool will be modified to be integrated in the COACH design flow. 179 \parlf 180 Even if the preferred dissemination policy for the COACH design flow will be the free 181 software policy, the SoC department is ready to support start-ups : 182 Six startup companies have been created by former 183 researchers from the SoC department of LIP6 between 1997 and 2002. 13 Each academic partner is expert in a few area and each industrial brings a 14 different approach to the use of the tools. 15 \parlf 16 The expertise domains of academic partners are 17 MPSoC design \& virtual prototyping (\upmc, \tima), 18 micro-architecture design (\upmc, \tima, \ubs), 19 HLS (\upmc, \tima, \ubs), 20 embedded OS (\tima), 21 compilation (\ubs, \lip), 22 polyhedral model (\lip), 23 HPC (\lip, \upmc) and 24 ASIP design (\inria). 25 These domains cover all the COACH aspects. 26 \parlf 27 The approach to the use of the tools of industrials are: 28 IP-XACT and industrial flow integration (\mds), 29 HPC (\bull) and 30 \mustbecompleted{XXX "par MAGILEM ou TRT"} (\thales). 31 \thales will represent the FPGA users, \bull the HPC users, and \mds the SoC integrators. 184 32 185 33 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% … … 205 53 206 54 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 55 \subsubsection{\upmc} 56 57 University Pierre et Marie Curie (UPMC) is the largest university in France (7400 58 employees, 38000 students). 59 The Laboratoire d'Informatique de Paris 6 (LIP6) is the computer science laboratory of 60 UPMC, hosting more than 400 researchers, under the umbrella of the CNRS (Centre National 61 de la Recherche Scientifique). 62 The \og System on Chip \fg Department of LIP6 consists of 40 permanent 63 researchers and 40 PHD students. 64 The research focuses on CAD tools and methods for VLSI and System on Chip design. 65 \parlf 66 The SoC department has been involved in several projects: IDPS, EVEREST, 67 OMI-HIC/MACRAME/\-ARCHES, EUROPRO, COSY, Medea SMT/MESA/+, BDREAMS, SoCLib, TSAR. 68 It developed and maintains the public domain VLSI CAD system ALLIANCE that is installed in more than 69 200 universities worldwide. It is also in charge of the SoCLib technical 70 coordination and WEB server. 71 \parlf 72 Even if the preferred dissemination policy for the COACH design flow will be the free 73 software policy, the SoC department is ready to support start-ups : 74 Six startup companies have been created by former 75 researchers from the SoC department of LIP6 between 1997 and 2002. 76 %The annual budget is about 3 M{\texteuro}, and 1.5 M{\texteuro} are from research contracts. 77 %The SoCLib DSX component was designed and developped in our laboratory. 78 %It allows design space exploration and will the base of the $CSG$ COACH tools. 79 %Moreover, the LIP6 developed during the last 10 years the UGH tool for high level 80 %synthesis of control-dominated coprocessors. 81 %This tool will be modified to be integrated in the COACH design flow. 82 83 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 84 \subsubsection{\ubs} 85 86 The Lab-STICC (Laboratoire des Sciences et Techniques de l'Information, 87 de la Communication, et de la Connaissance), is a French CNRS laboratory 88 (UMR 3192) that groups 4 research centers in the west and south 89 Brittany. 90 %: the Universit\'e de Bretagne-Sud (UBS), the Universit\'e de 91 %Bretagne Occidentale (UBO), and Telecom Bretagne (ENSTB). 92 %The Lab-STICC is composed of three departments: Microwave and equipments (MOM), 93 %Digital communications, Architectures and circuits (CACS) and Knowledge, 94 %information and decision (CID). 95 It represents a staff of 279 peoples, including 115 researchers and 113 PhD 96 students. 97 The scientific production during the last 4 years represents 20 98 books, 200 journal publications, 500 conference publications, 22 99 patents and 69 PHDs diploma. 100 \parlf 101 %The UBS/Lab-STICC laboratory is involved in several national research 102 %projects (e.g. RNTL : SystemC'Mantic, EPICURE - RNRT : MILPAT, ALIPTA, 103 %A3S - ANR : MoPCoM, SoCLib, Famous, RaaR, AFANA, Open-PEOPLE, ICTER ...), 104 %CMCU project (COSIP) and regional projects (e.g. ITR projects PALMYRE 105 %...). It is also involved in European Project (e.g. ITEA/SPICES, 106 %IST/AETHER ...). 107 The UBS/Lab-STICC laboratory is involved in several projects (SystemC'Mantic, 108 EPICURE, MILPAT, ALIPTA, A3S, MoPCoM, SoCLib, Famous, RaaR, AFANA, Open-PEOPLE, 109 ICTER, COSIP, PALMYRE, ITEA/SPICES, IST/AETHER. 110 %These projects are conducted through tight cooperation 111 %with national and international companies and organizations (e.g. France 112 %Telecom CNET, MATRA, CEA, ASTRIUM, \thales Com., \thales Avionics, AIRBUS, 113 %BarCo, STMicroelectronics, Alcatel-Lucent ...). 114 %Results of those or former 115 %projects are for example the high-level synthesis tool GAUT, the UHLS 116 %syntax and semantics-oriented editor, the DSP power estimation tool 117 %Soft-explorer or the co-design framework Design Trotter. 118 \parlf 119 The CACS department of the Lab-STICC (also referred as UBS/Lab-STICC), 120 located in Lorient, is involved in COACH. 121 The UBS/Lab-STICC is working on the design of complex electronic systems 122 and circuits, especially but not exclusively focussing on real-time 123 embedded systems, power and energy consumption optimization, high-level 124 synthesis and IP design, digital communications, hardware/software 125 co-design and ESL methodologies. The application targeted by the 126 UBS/Lab-STICC are mainly from telecommunication and multimedia domains 127 which enclose signal, image, video, vision, and communication processing. 128 129 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 130 \subsubsection{\liplong} 131 The Compsys group of Ecole Normale Sup\'erieure de Lyon is a project-team 132 of INRIA Rh\^one-Alpes and a part of Laboratoire de l'Informatique du 133 Parall\'elisme (LIP), UMR 5668 of CNRS. It has four permanent researchers 134 and a variable number of PhD students and post-docs. Its field of 135 expertise is compilation for embedded system, optimizing compilers 136 and automatic parallelization. Its members were among the initiators 137 of the polyhedral model for automatic parallelization and program 138 optimization generally. It has authored or contributed to 139 several well known libraries for linear programming, polyhedra manipulation 140 and optimization in general. It has strong industrial cooperations, notably 141 with ST Microelectronics and \thales. 142 143 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 144 \subsubsection{\tima} 145 The TIMA laboratory ("Techniques of Informatics and Microelectronics 146 for integrated systems Architecture") is a public research laboratory 147 sponsored by Centre National de la Recherche Scientifique (CNRS, UMR5159), 148 Grenoble Institute of Technology (Grenoble-INP) and Universit\'{e} Joseph Fourier 149 (UJF). 150 The research topics cover the specification, design, verification, test, 151 CAD tools and design methods for integrated systems, from analog and 152 digital components on one end of the spectrum, to multiprocessor 153 Systems-on-Chip together with their basic operating system on the other end. 154 \parlf 155 Currently, the lab employs 124 persons among which 60 PhD candidates, and runs 156 32 ongoing French/European funded projects. 157 Since its creation in 1984, TIMA funded 7 startups, patented 36 inventions 158 and had 243 PhD thesis defended. 159 \parlf 160 The System Level Synthesis Group (25 people including PhDs) is 161 involved in several FP6, FP7, CATRENE and ANR projects. 162 Its field of expertise is in CAD and architecture for Multiprocessor 163 SoC and Hardware/Software interface. 164 165 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 166 \subsubsection{\inria} 167 168 INRIA, the French national institute for research in computer science 169 and control, operating under the dual authority of the Ministry of 170 Research and the Ministry of Industry, is dedicated to fundamental and 171 applied research in information and communication science and 172 technology (ICST). 173 It has workforce of 3800 persons that work in 168 joint research project-teams. 174 \parlf 175 The Institute plays a major role in technology 176 transfer by fostering training through research, diffusion of 177 scientific and technical information, development, as well as 178 providing expert advice and participating in international programs. 179 Being in close contact with industry, INRIA is a major participant in 180 the development of ICST in France. 181 \parlf 182 The CAIRN group of INRIA Rennes -- Bretagne Atlantique study reconfigurable 183 system-on-chip, i.e. hardware systems whose configuration may change before or even during 184 execution. 185 To this end, CAIRN has 13 permanent researchers and a variable number of PhD 186 students, post-docs and engineers. 187 CAIRN intends to approach reconfigurable architectures from three 188 angles: the invention of new reconfigurable platforms, the development 189 of associated transformation, compilation and synthesis tools, and the 190 exploration of the interaction between algorithms and architectures. 191 CAIRN is a joint team with CNRS, University of Rennes 1 and ENS Cachan. 192 %By playing a leading role in the scientific community in the field and 193 %Throughout its eight research centres in Rocquencourt, Rennes, Sophia Antipolis, 194 %Grenoble, Nancy, Bordeaux, Lille and Saclay, INRIA has a workforce of 3800, 2800 195 %of whom are scientists from INRIA and INRIA's partner organizations such as CNRS 196 %(the French National Center for Scientific Research), universities and leading 197 %engineering schools. 198 %They work in 168 joint research project-teams. 199 %Many INRIA researchers are also professors and approximately 1 000 doctoral 200 %students work on theses as part of INRIA research project-teams. 201 %\parlf 202 %INRIA develops many partnerships with industry and fosters technology 203 %transfer and company foundation in the field of ICST - some ninety 204 %companies have been founded with the support of INRIA-Transfert, a 205 %subsidiary of INRIA, specialized in guiding, evaluating, qualifying, 206 %and financing innovative high-tech IT start-up companies. INRIA is 207 %involved in standardization committees such as the IETF, ISO and the 208 %W3C of which INRIA was the European host from 1995 to 2002. 209 %\parlf 210 %INRIA maintains important international relations and exchanges. In 211 %Europe, INRIA is a member of ERCIM which brings together research 212 %institutes from 19 European countries. INRIA is a partner in about 120 213 %FP6 actions and 40 FP7 actions, mainly in the ICST field. INRIA also 214 %collaborates with numerous scientific and academic institutions abroad 215 %(joint laboratories such as LIAMA, associated research teams, training 216 %and internship programs). 217 218 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 207 219 \subsubsection{\bull} 208 220 … … 228 240 229 241 \thales is a world leader for mission critical information systems, with activities in 3 230 core businesses: aerospace (with all major aircraft manufacturers as customers), defence, 231 and security (including ground transportation solutions). It employs 68000 people 232 worldwide, and is present in 50 countries. \thales Research \& Technology operates at the 233 corporate level as the technical community network architect, in charge of developing 234 upstream and \thales-wide R \& T activities, with vision and visibility. In support of 235 \thales applications, TRT's mission is also to anticipate and speed up technology transfer 236 from research to development in Divisions by developing collaborations in R\&T. \thales is 237 international, but Europe-centered. Research \& Development activities are disseminated, 238 and corporate Research and Technology is concentrated in Centres in France, the United 239 Kingdom and the Netherlands. A key mission of our R\&T centres is to have a bi-directional 240 transfer, or "impedance matching" function between the scientific research network and the 241 corresponding businesses. The TRT's Information Science and Technology Group is able to 242 develop innovative solutions along the information chain exploiting sensors data, through 243 expertise in: computational architectures in embedded systems, typically suitable for 244 autonomous system environments, mathematics and technologies for decision involving 245 information fusion and cognitive processing, and cooperative technologies including man 246 system interaction. 247 \parlf 248 The Embedded System Laboratory (ESL) of TRT involved in the COACH project is part of the 249 Information Science and Technology Group. Like other labs of TRT, ESL is in charge of 250 making the link between the needs from \thales business units and the emerging 251 technologies, in particular through assessment and de-risking studies. It has a long 252 experience on parallel architectures design, in particular on SIMD architectures used for 242 core businesses (aerospace, defence, security). 243 It employs 68000 people worldwide, and is present in 50 countries. 244 TRT (\thales Research \& Technology) operates at the corporate level as the technical 245 community network architect, in charge of developing upstream and \thales-wide 246 R\&T activities, with vision and visibility. 247 In support of \thales applications, TRT's mission is also to anticipate and 248 speed up technology transfer from research to development in Divisions by 249 developing collaborations in R\&T. 250 %\thales is international, but Europe-centered. 251 %Research \& Development activities are disseminated, and corporate Research and 252 %Technology is concentrated in Centres in France, the United Kingdom and the 253 %Netherlands. 254 %A key mission of our R\&T centres is to have a bi-directional transfer, or 255 %"impedance matching" function between the scientific research network and the 256 %corresponding businesses. 257 %The TRT's Information Science and Technology Group is able to develop innovative 258 %solutions along the information chain exploiting sensors data, through expertise 259 %in: computational architectures in embedded systems, typically suitable for 260 %autonomous system environments, mathematics and technologies for decision 261 %involving information fusion and cognitive processing, and cooperative 262 %technologies including man system interaction. 263 The Embedded System Laboratory (ESL) involved in the COACH project is part of 264 TRT, it is based in Centres (France). 265 \parlf 266 Like other labs of TRT, ESL is in charge of making the link between the needs 267 from \thales business units and the emerging technologies, in particular through 268 assessment and de-risking studies. 269 It has a long experience on parallel architectures design, in particular on SIMD architectures used for 253 270 image processing and signal processing applications and on reconfigurable architectures. 254 271 ESL is also strongly involved in studies on programming tools for these types of 255 architectures and has developed the SpearDE tool used in this project. The laboratory had 256 coordinated the FP6 IST MORPHEUS project on reconfigurable technology, being highly 257 involved in the associated programming toolset. The team is also involved in the FP6 IST 258 FET AETHER project on self-adaptability technologies and coordinates national projects on 259 MPSoC architecture and tools like the Ter\verb+@+ops project (P\^{o}le de 260 Comp\'{e}titivit\'{e} System\verb+@+tic) dedicated to the design of a MPSoC for intensive 261 computing embedded systems. 262 272 architectures and has developed the SpearDE tool used in this project. 273 \parlf 274 The laboratory has coordinated the FP6 IST MORPHEUS project on reconfigurable 275 technology.% being highly involved in the associated programming toolset. 276 The team has also been involved in the FP6 IST FET AETHER project on 277 self-adaptability technologies and coordinated national projects on MPSoC 278 architecture and tools like the Ter\verb+@+ops project (P\^{o}le de 279 Comp\'{e}titivit\'{e} System\verb+@+tic). %dedicated to the design of a MPSoC for intensive computing embedded systems. 280 % 281 %\thales is a world leader for mission critical information systems, with activities in 3 282 %core businesses: aerospace (with all major aircraft manufacturers as customers), defence, 283 %and security (including ground transportation solutions). It employs 68000 people 284 %worldwide, and is present in 50 countries. \thales Research \& Technology operates at the 285 %corporate level as the technical community network architect, in charge of developing 286 %upstream and \thales-wide R \& T activities, with vision and visibility. In support of 287 %\thales applications, TRT's mission is also to anticipate and speed up technology transfer 288 %from research to development in Divisions by developing collaborations in R\&T. \thales is 289 %international, but Europe-centered. Research \& Development activities are disseminated, 290 %and corporate Research and Technology is concentrated in Centres in France, the United 291 %Kingdom and the Netherlands. A key mission of our R\&T centres is to have a bi-directional 292 %transfer, or "impedance matching" function between the scientific research network and the 293 %corresponding businesses. The TRT's Information Science and Technology Group is able to 294 %develop innovative solutions along the information chain exploiting sensors data, through 295 %expertise in: computational architectures in embedded systems, typically suitable for 296 %autonomous system environments, mathematics and technologies for decision involving 297 %information fusion and cognitive processing, and cooperative technologies including man 298 %system interaction. 299 %\parlf 300 %The Embedded System Laboratory (ESL) of TRT involved in the COACH project is part of the 301 %Information Science and Technology Group. Like other labs of TRT, ESL is in charge of 302 %making the link between the needs from \thales business units and the emerging 303 %technologies, in particular through assessment and de-risking studies. It has a long 304 %experience on parallel architectures design, in particular on SIMD architectures used for 305 %image processing and signal processing applications and on reconfigurable architectures. 306 %ESL is also strongly involved in studies on programming tools for these types of 307 %architectures and has developed the SpearDE tool used in this project. The laboratory had 308 %coordinated the FP6 IST MORPHEUS project on reconfigurable technology, being highly 309 %involved in the associated programming toolset. The team has also been involved in the FP6 IST 310 %FET AETHER project on self-adaptability technologies and coordinated national projects on 311 %MPSoC architecture and tools like the Ter\verb+@+ops project (P\^{o}le de 312 %Comp\'{e}titivit\'{e} System\verb+@+tic) dedicated to the design of a MPSoC for intensive 313 %computing embedded systems. 314 -
anr/section-consortium-leader.tex
r348 r356 7 7 Emmanuel is contributing member in the IP-XACT working group of ACCELERA. 8 8 In 2002-2005, Emmanuel was project manager of the project SystemC'mantic in 9 the former call RNTL. The main o nbective was to set up a design and verification environment9 the former call RNTL. The main objective was to set up a design and verification environment 10 10 based on the new language SystemC and introducing new techniques of system level design. 11 11 The partners of this project were Thales, CEA-LIST, TIMA, LESTER. … … 14 14 environment based on SystemC. Emmanuel is a graduate of Conservatoire 15 15 National des Arts et M\'etiers in the field of digital electronics for communications. 16 Emmanuel contributed to the publication of 10 white papers in the ESL design flot management area. 17 Emmanuel is one of the co-founders of Magillem. 16 Emmanuel contributed to the publication of 10 white papers in the ESL design 17 flow management area. 18 Emmanuel is one of the co-founders of \mds. 18 19 -
anr/section-consortium-people.tex
r353 r356 25 25 \def\doAbre#1#2{{\mbox{#2$^{#1}$}}\xspace} 26 26 27 \def\TL#1{\textcolor{blue}{#1 (L)}} 28 The table in Figure~\ref{involved:people} lists the people involved in the 29 project. 30 The first column indicates the role of the person in the project 31 (C:global leader, L:local leader, M:contributor) 32 and a task number with a 'L' flag (e.g.: \TL{3}) in the last column indicates that the person 33 is its leader. 34 \begin{figure}[t!] 27 35 \newenvironment{peopletabular}{% 28 36 \let\PMnote\relax \def\PM{\doAbre{\ast}{PM}\gdef\PMnote{\doNote{\ast}{total of PM for the 3 years of the project.}}} 29 \let\COnote\relax \def\CO{\ doAbre{a}{coor.}\gdef\COnote{\doNote{a}{coordinator.}}}30 \let\REnote\relax \def\RE{\ doAbre{b}{resp.}\gdef\REnote{\doNote{b}{responsible.}}}31 \let\MEnote\relax \def\ME{ \doAbre{c}{cont.}\gdef\MEnote{\doNote{c}{contributor.}}}32 37 \let\COnote\relax \def\CO{\textcolor{red}{C}}%{\doAbre{a}{coor.}\gdef\COnote{\doNote{a}{coordinator.}}} 38 \let\REnote\relax \def\RE{\textcolor{blue}{L}}%{\doAbre{b}{resp.}\gdef\REnote{\doNote{b}{responsible.}}} 39 \let\MEnote\relax \def\ME{M}%{\doAbre{c}{cont.}\gdef\MEnote{\doNote{c}{contributor.}}} 40 % 33 41 \let\SPMnote\relax \def\SPM{\doAbre{A}{S. P. M.}\gdef\SPMnote{\doNote{A}{Strategic Project Manager.}}} 34 42 \let\VPENGnote\relax \def\VPENG{\doAbre{B}{VP of eng.}\gdef\VPENGnote{\doNote{B}{VP of Engineering.}}} … … 39 47 \let\DMnote\relax \def\DM{\doAbre{G}{D. M.}\gdef\DMnote{\doNote{G}{Department mananger.}}} 40 48 %\let\RDENGnote\relax \def\RDENG{\doAbre{H}{R\&D eng.}\gdef\RDENGnote{\doNote{H}{R\&D Engineer.}}} 41 49 % 42 50 \let\COMPnote\relax \def\COMP{\doAbre{1}{COMP}\gdef\COMPnote{\doNote{1}{Compilation.}}} 43 51 \let\SWnote\relax \def\SW{\doAbre{2}{SW}\gdef\SWnote{\doNote{2}{SW development.}}} … … 47 55 \let\MMnote\relax \def\MM{\doAbre{6}{M.M.}\gdef\MMnote{\doNote{6}{Memory management \& FIFO construction \& irregular extensions.}}} 48 56 \let\AUPAnote\relax \def\AUPA{\doAbre{7}{A.P.}\gdef\AUPAnote{\doNote{7}{Process scheduling \& automatic parallelization.}}} 49 \noindent\hspace{-0.5cm}\begin{minipage}{\linewidth}\small\begin{tabular}{| p{0.7cm}|p{1.4cm}|p{1.7cm}|p{2.3cm}|p{3.9cm}|p{.5cm}|p{5cm}|}\hline50 kind& Name & F. name & Position & Fields & \PM & Contribution to the project \\57 \noindent\hspace{-0.5cm}\begin{minipage}{\linewidth}\small\begin{tabular}{|c|p{1.4cm}|p{1.7cm}|p{2.3cm}|p{4.4cm}|p{.5cm}|p{4.5cm}|}\hline 58 & Name & F. name & Position & Fields & \PM & Contribution to the project \\ 51 59 }{\end{tabular}\vspace{0.50ex}\\ 52 60 \PMnote\COnote\REnote\MEnote 53 \SPMnote\VPENGnote\RENGnote\INREnote\EPnote\APnote\DMnote 54 \COMPnote\SWnote\SYSnote\VPnote\ARCHnote\MMnote\AUPAnote 61 \SPMnote\VPENGnote\RENGnote\INREnote\EPnote\APnote\DMnote - 62 \\ 63 \COMPnote\SWnote\SYSnote\VPnote\ARCHnote\MMnote\AUPAnote - 55 64 --\\\end{minipage}} 56 65 %{\hspace*{1cm}\scriptsize $^{\ast}$ total of PM for the 3 years of the project.}} … … 61 70 62 71 \peopletabularentry{\mds} 63 \CO & Vaumorin & Emannuel & \SPM & ESL & 20& Task: 1 (\RE), \mustbecompleted{X, Y}, 8 (\RE)\\\hline72 \CO & Vaumorin & Emannuel & \SPM & ESL & 20& Task: \TL{1}, \mustbecompleted{X, Y}, \TL{8}\\\hline 64 73 \ME & Spasevski & Cyril & CTO & EDA & 6 & Task: \mustbecompleted{X, Y} \\\hline 65 74 \ME & Guntz & St\'ephane & \VPENG & EDA & 6 & Task: \mustbecompleted{X, Y} \\\hline 66 75 \ME & Lucas & Ronan & R\&D Engineer & Codesign & 9 & Task: \mustbecompleted{X, Y} \\\hline 67 \ME & Olivier & Garry & R\&D Engineer & SW dev. & 9 & Task: \mustbecompleted{X, Y} \\\hline 76 \ME & Olivier & Garry & R\&D Engineer & \SW & 9 & Task: \mustbecompleted{X, Y} \\\hline 77 %\end{peopletabular}\begin{peopletabular} 78 \peopletabularentry{\upmc} 79 \RE & Greiner & Alain & professor & SOC \ARCH \VP & 12 & Task: 1, \TL{2}, 3, 6 \\\hline 80 \ME & Aug\'{e} & Ivan & \AP & HLS \SW SOC HPC & 16 & Task: 1, 3, \TL{3}, 5, 6, 8 \\\hline 81 %\end{peopletabular}\begin{peopletabular} 82 \peopletabularentry{\ubs} 83 \RE & Coussy & Philippe & \mbox{\AP} & SOC HLS \ARCH \VP & 12 & Task: 1, 2, \TL{5}, \mustbecompleted{X, Y}, 8 \\\hline 84 \ME & Heller & Dominique & \mbox{\RENG} & \COMP HLS \ARCH & 8 & Task: \mustbecompleted{X, Y} \\\hline 85 \ME & Chavet & Cyrille & \mbox{\AP} & SOC HLS \ARCH & 4 & Task: \mustbecompleted{X, Y} \\\hline 86 %\end{peopletabular}\begin{peopletabular} 87 \peopletabularentry{\liplong} 88 \RE & Alias & Christophe & \mbox{\INRE} & \COMP HPC \MM & 15 & Task: 1, 2, \TL{4}, 8 \mustbecompleted{X, Y} \\\hline 89 \ME & Feautrier & Paul & \mbox{\EP} & \COMP \AUPA & 13 & Task: \mustbecompleted{X, Y} \\\hline 90 %\end{peopletabular}\begin{peopletabular} 91 \peopletabularentry{\tima} 92 \RE & P\'etrot & Fr\'ed\'eric& professor & SOC HLS OS \VP \ARCH & 12 & Task: 1, 2, 3, 5, 6 \\\hline 93 \ME & Muller & Olivier & \mbox{\AP} & SOC \VP HLS & 16 & Task: \mustbecompleted{X, Y} \\\hline 94 \ME & Prost-Boucle& Adrien & PhD candidate & SOC HLS & 24 & Task: \mustbecompleted{X, Y} \\\hline 68 95 %\end{peopletabular}\begin{peopletabular} 69 96 \peopletabularentry{\inria} … … 71 98 \ME & Derrien & Steven & \mbox{\AP} & HLS \COMP \ARCH & 6 & Task: \mustbecompleted{X, Y} \\\hline 72 99 %\end{peopletabular}\begin{peopletabular} 73 \peopletabularentry{\lip} 74 \RE & Alias & Christophe & \mbox{\INRE} & \COMP HPC \MM & 15 & Task: 1, 2, 4 (\RE), 8 \mustbecompleted{X, Y} \\\hline 75 \ME & Feautrier & Paul & \mbox{\EP} & \COMP \AUPA & 13 & Task: \mustbecompleted{X, Y} \\\hline 100 \peopletabularentry{\bull} 101 \RE & Nguyen & Huy-Nam & \DM & HPC \SYS \VP CAD & 9 & Task: 1, 2, \TL{6}, 7, 8 \\\hline 76 102 %\end{peopletabular}\begin{peopletabular} 77 \peopletabularentry{\tima}78 \RE & P\'etrot & Fr\'ed\'eric& professor & SOC HLS HPC OS \VP \ARCH & 12 & Task: 1, 2, 3, 5, 6 \\\hline79 \ME & Muller & Olivier & \mbox{\AP} & SOC \VP HLS & 16 & Task: \mustbecompleted{X, Y} \\\hline80 \ME & Prost-Boucle& Adrien & PhD candidate & SOC HLS & 24 & Task: \mustbecompleted{X, Y} \\\hline81 %\end{peopletabular}\begin{peopletabular}82 \peopletabularentry{\ubs}83 \RE & Coussy & Philippe & \mbox{\AP} & SOC HLS \ARCH \VP & 12 & Task: 1, 2, 5 (\RE), \mustbecompleted{X, Y}, 8 \\\hline84 \ME & Heller & Dominique & \mbox{\RENG} & \COMP HLS \ARCH & 8 & Task: \mustbecompleted{X, Y} \\\hline85 \ME & Chavet & Cyrille & \mbox{\AP} & SOC HLS \ARCH & 4 & Task: \mustbecompleted{X, Y} \\\hline86 %\end{peopletabular}\begin{peopletabular}87 \peopletabularentry{\upmc}88 \RE & Greiner & Alain & professor & SOC \ARCH \VP & 12 & Task: 1, 2 (\RE), 3, 6 \\\hline89 \ME & Aug\'{e} & Ivan & \AP & HLS \SW SOC HPC & 16 & Task: 1, 3, 3 (\RE), 5, 6, 8 \\\hline90 %\end{peopletabular}\begin{peopletabular}91 \peopletabularentry{\bull}92 \RE & Nguyen & Huy-Nam & \DM & HPC \SYS \VP CAD & 9 & Task: 1, 2, 6 (\RE), 7, 8 \\\hline93 \end{peopletabular}\begin{peopletabular}94 103 \peopletabularentry{\thales} 95 \RE & Lemonier & Fabrice & ... & ... & ... & Task: \mustbecompleted{X, Y} 7 (\RE) \\\hline 104 \RE & Lemonier & Fabrice & \DM & SOC & 18 & Task: \mustbecompleted{X, Y} \TL{7} \\\hline 105 \ME & Brelet & Paul & \mbox{SW\,development} 106 & \SW & 18 & Task: 7,8 \\\hline 96 107 \end{peopletabular} 108 \caption{\label{involved:people} People that participate to the project.} 109 \end{figure} -
anr/section-dissemination.tex
r324 r356 23 23 The COACH project will bring new scientific results in various fields, such as high level synthesis, 24 24 hardware/software codesign, virtual prototyping, hardware oriented compilation techniques, 25 automatic paralleli sation, etc. These results will be published in relevant International25 automatic parallelization, etc. These results will be published in relevant International 26 26 Conferences, namely DATE, DAC, or ICCAD. 27 27 \\ 28 28 More generally, the COACH infrastructure and the design flow supported by the COACH 29 29 tools and libraries will be promoted by proposing tutorials on FPGA oriented system level synthesis 30 in various wor shops and conferences (DATE, DAC, CODES+ISSS...).31 30 in various workshops and conferences (DATE, DAC, CODES+ISSS...). 31 \parlf 32 32 Several COACH partners being members of the HiPEAC European Network of Excellence 33 33 (High Performance and Embedded Architecture and Compilation), courses will be proposed for the 34 34 HiPEAC summer school on Advanced Computer Architecture and Compilation for Embedded Systems. 35 36 Following the general policy of the SoCLib platform, the COACH project will be an 37 open infrastructure, and the COACH tools and libraries will be available in the framework 38 of the SoCLib WEB server. This server will be maintened by the UPMC/LIP6 laboratory. 39 35 \parlf 36 The COACH project will be an open infrastructure, and the COACH tools and libraries will be available via 37 a WEB server. This server will be maintained by the UPMC/LIP6 laboratory. 38 \\ 40 39 On the standardization side, some effort will be made for analysing how the work around IP-XACT 41 could be donated for the evolution of the IEEE 1685 standard. Magillemis board member of40 could be donated for the evolution of the IEEE 1685 standard. \mds is board member of 42 41 Accellera, TRT, TIMA and LIP6 are members, so we'll try to have some influence and at least 43 42 communicate on the fact that our solutions will be compatible with the standard. … … 56 55 All software tools supporting the COACH design flow will be available as free software. 57 56 All academic partners contributing to the COACH project agreed to distribute the ESL software 58 tools under the same GPL license as the SoCLib tools.57 tools under the same GPL license. 59 58 \item 60 59 The SystemC simulation models for the hardware components … … 75 74 synthesis tools developed in the COACH project. 76 75 \item 77 \mds will propose a commercial version of COACH, integrated into Magillem tool suite and compatible with a standard IP-XACT flow. 78 This version will integrate some generic features, already available for production (some of them from standard Magillem pack, some other developped in COACH). Other COACH features will have to be tailored for the specifics of the customer framework and will generate service business. 76 \mds will propose a commercial version of COACH, integrated into \mds tool suite and compatible with a standard IP-XACT flow. 77 This version will integrate some generic features, already available for 78 production (some of them from standard \mds pack, some other developed in 79 COACH). Other COACH features will have to be tailored for the specifics of the 80 customer framework and will generate service business. 79 81 \end{itemize} 80 82 … … 88 90 The interest for \mds in this project is multiple. 89 91 \begin{itemize} 90 \item We will collaborate in experiments for the integration of High Level Synthesis engines into IP-XACT based flow. 91 This point will be very valuable because more and more system integrators are using or considering to use 92 HLS in their flow (e.g. Astrium, Airbus, etc.) 93 \item \mds has already a leading position in the usage of IP-XACT standard for managing innovative SoC design 94 methodologies. This project will allow to keep the advance in regards with competition by anticipating 95 the next generation platforms hosting mutli cores and programmable logic for coprocessors. 96 \item HPC is a topic that was not covered yet by \mds with its customers. Thanks to this project, \mds will 97 collaborate with BULL on this point and this will open us doors for new customers market. 98 \item This project has been set up for maximizing the industrial exploitation of results. The role of \mds will 99 be to ensure this objective and after the project, we expect a growing contribution for rising the turnover (2015: 2 new customers = 100keuros, 100 2016: 4 new customers = 250keuros, 2017: 5 new customers = 400Keuros). These numbers are not high but we tried to keep them realistic. 101 The return on investment is nevertheless important and we can also expect side effects of this project on sales with existing 102 customers and prospects interrested in the global magillem solution. 92 \item 93 We will collaborate in experiments for the integration of High Level Synthesis 94 engines into IP-XACT based flow. This point will be very valuable because more 95 and more system integrators are using or considering to use HLS in their flow 96 (e.g. Astrium, Airbus, etc.). 97 \item 98 \mds has already a leading position in the usage of IP-XACT standard for 99 managing innovative SoC design methodologies. This project will allow to keep 100 the advance in regards with competition by anticipating the next generation 101 platforms hosting multi-cores and programmable logic for coprocessors. 102 \item 103 HPC is a topic that was not covered yet by \mds with its customers. Thanks to 104 this project, \mds will collaborate with BULL on this point and this will open 105 us doors for new customers market. 106 \item 107 This project has been set up for maximizing the industrial exploitation of results. 108 The role of \mds will be to ensure this objective and after the project, we 109 expect a growing contribution for rising the turnover 110 (2015: 2 new customers = 100 k\euro, 111 2016: 4 new customers = 250 k\euro, 112 2017: 5 new customers = 400 k\euro). 113 These numbers are not high but we tried to keep them realistic. 114 The return on investment is nevertheless important and we can also expect side 115 effects of this project on sales with existing customers and prospects 116 interested in the global \mds solution. 103 117 \end{itemize} 104 118 … … 108 122 HPC solutions. The main expectation from COACH is to derive a new component (fine-grain 109 123 FPGA parallelism) to add to existing Bull HPC solutions. 110 111 %\subsubsection*{Partner: \textit{\xilinx}}112 %Computing power potential of our FPGA architectures113 %growing very quickly on one side, and complexity of designs implemented114 %using our FPGAs dramatically increasing on the other side, it is very115 %interesting for us to get high level design methodologies progressing116 %quickly and targetting our FPGAs in the most possible efficient way.117 %\parlf118 %\xilinx goal is to get COACH to generate bitstream optimized as much as possible for119 %\xilinx FPGAs in order to both, validate the methodology on our FPGA families, and ease120 %future work of our customers.121 124 122 125 \subsubsection*{Partner: \textit{\thales}} -
anr/section-etat-de-art.tex
r339 r356 25 25 By adapting architecture to the software, % (the opposite is done in the others families) 26 26 FPGAs architectures enable better performance 27 (typically between x10 and x100 accelerations)27 (typically an acceleration factor between 10 and 100) 28 28 while using smaller size and less energy (and heat). 29 29 However, using FPGAs presents significant challenges~\cite{hpc06a}. … … 128 128 \item The parallelism is extracted from the initial specification. 129 129 To get more parallelism or to reduce the amount of required memory in the SoC, the user 130 must re-write the algorithmic specification while there are techniques such as poly edric130 must re-write the algorithmic specification while there are techniques such as polyhedral 131 131 transformations to increase the intrinsic parallelism, 132 132 \item While they support limited loop transformations like loop unrolling and loop … … 213 213 Since hardware is inherently parallel, finding parallelism in sequential 214 214 programs in an important prerequisite for HLS. The large FPGA chips of 215 today can accom odate much more parallelism than is available in basic blocks.215 today can accommodate much more parallelism than is available in basic blocks. 216 216 The polyhedral model is the ideal tool for finding more parallelism in 217 217 loops. … … 219 219 As a side effect, it has been observed that the polyhedral model is a useful 220 220 tool for many other optimization, like memory reduction and locality 221 improvement. It should be noted221 improvement. It should be noted 222 222 that the polyhedral model \emph{stricto sensu} applies only to 223 223 very regular programs. Its extension to more general programs is … … 251 251 further releases. 252 252 \parlf 253 In IP-XACT the flow automation and data cons tistency is ensured by generators, which253 In IP-XACT the flow automation and data consistency is ensured by generators, which 254 254 are program modules that process IP-XACT XML data into something useful 255 255 for the design. They are key portable mechanism for encapsulating specialist design 256 256 knowledge and enable designers to deploy specialist knowledge in their design. It is 257 257 always possible to create generators in order to link several design or analysis tools 258 around a centric representation of meta data in IP-XACT. This kind of XML schema for259 meta data management is a good solution for the federation of heterogeneous design domains258 around a centric representation of meta-data in IP-XACT. This kind of XML schema for 259 meta-data management is a good solution for the federation of heterogeneous design domains 260 260 (models, tools, languages, methodologies, etc.). 261 261 262 %\subsubsection{High Performance Computing}263 %Accelerating high-performance computing (HPC) applications with field-programmable264 %gate arrays (FPGAs) can potentially improve performance.265 %However, using FPGAs presents significant challenges~\cite{hpc06a}.266 %First, the operating frequency of an FPGA is low compared to a high-end microprocessor.267 %Second, based on Amdahl law, HPC/FPGA application performance is unusually sensitive268 %to the implementation quality~\cite{hpc06b}.269 %Finally, High-performance computing programmers are a highly sophisticated but scarce270 %resource. Such programmers are expected to readily use new technology but lack the time271 %to learn a completely new skill such as logic design~\cite{hpc07a} .272 %\\273 %HPC/FPGA hardware is only now emerging and in early commercial stages,274 %but these techniques have not yet caught up.275 %Thus, much effort is required to develop design tools that translate high level276 %language programs to FPGA configurations.277 -
anr/section-issues.tex
r339 r356 19 19 Industrial & 1,102 & 1,228 & 1,406 \\ 20 20 High end & 177 & 188 & 207 \\\hline 21 Military/Aer eo& 566 & 636 & 717 \\21 Military/Aeronautic & 566 & 636 & 717 \\ 22 22 High end & 56 & 65 & 82 \\\hline\hline 23 23 Total FPGA/PLD & 4,659 & 5,015 & 5,583 \\ … … 28 28 % 29 29 Microelectronic components allow integration of complex functions into products, increases 30 commercial attractiv ity of these products and improves their competitivity.30 commercial attractiveness of these products and improves their competitiveness. 31 31 \cite{rapport-ministere} estimates a 7\% growth of the micro-electronic market until 2015 at least. 32 32 Multimedia and communication sectors have taken advantage from microelectronics facilities 33 thanks to the develop pment of design methodologies and tools for embedded systems.34 Unfortunately, the Non Recurring Engineering (NRE) costs invol ded in the design33 thanks to the development of design methodologies and tools for embedded systems. 34 Unfortunately, the Non Recurring Engineering (NRE) costs involved in the design 35 35 and manufacturing of ASICs is very high. 36 36 An IC foundry costs several billions of euros and the fabrication of a specific circuit 37 37 costs several millions. For example a conservative estimate for a 65nm ASIC project is 10 38 million \$. Consequently, it is more and more unaffordable to design and fabricate ASICs for low and medium38 millions \$. Consequently, it is more and more unaffordable to design and fabricate ASICs for low and medium 39 39 volume markets and the new trend for building the new generation products will be multi processors SoCs and 40 programmable logic for co-process sing.40 programmable logic for co-processing. 41 41 \\ 42 42 According to a market survey (J-M. Chery, CTO ST Microelectronics at European NanoelectronicsForum 2010), 43 the global growth is 30 bill on\$ between 2009-2013 for the multimedia and communication sectors; this is43 the global growth is 30 billion\$ between 2009-2013 for the multimedia and communication sectors; this is 44 44 6 times more than all other domains like security, home automation or health. 45 The predominance of the multimedia and communication sectors are due to their being predomin ently a mass market.45 The predominance of the multimedia and communication sectors are due to their being predominantly a mass market. 46 46 % 47 47 \subsubsection*{FPGAs and Embedded Systems} … … 54 54 choice for low-to-medium volume applications. 55 55 Since their introduction in the mid eighties, FPGAs evolved from a simple, 56 low-capacity gate array to devices (\altera STRATIX III, \xilinx Virtex V) that56 low-capacity gate array to devices (\altera STRATIX III, \xilinx Virtex6) that 57 57 provide a mix of coarse-grained data path units, memory blocks, microprocessor cores, 58 58 on chip A/D conversion, and gate counts by millions. This high logic capacity allows to implement … … 73 73 architectures and algorithms. These companies show up in different "traditional" applications and market 74 74 segments like computing clusters (ad-hoc), servers and storage, networking and Telecom, ASIC 75 emulation and prototyping, military/aer eoetc. The HPC market size is estimated today by FPGA providers75 emulation and prototyping, military/aeronautic etc. The HPC market size is estimated today by FPGA providers 76 76 at 214\,M\$. 77 77 This market is dominated by Multi-core CPUs and GPUs based solutions and the expansion … … 92 92 \begin{center}\begin{minipage}{.9\linewidth}\textit{ 93 93 The aim of the COACH project is to integrate all these design steps into a single design framework 94 and to allow \textbf{pure software} develop pers to design embedded systems.94 and to allow \textbf{pure software} developers to design embedded systems. 95 95 }\end{minipage}\end{center} 96 96 % … … 98 98 on Field Programmable Gate Array circuits (FPGA). 99 99 Its aim is to propose solutions to the societal/economical challenges by 100 providing SMEs novel design capabilities enabling them to increase their 101 design productivity with design exploration and synthesis methods that are placed on top 102 of the state-of-the-art methods. 103 We believe that the combination of a design environment dedicated to software developpers 100 providing industrials using FPGAs and in particular SMEs novel design 101 capabilities enabling them to increase their design productivity with design 102 exploration and synthesis methods that are placed on top of the state-of-the-art 103 methods. 104 We believe that the combination of a design environment dedicated to software developers 104 105 and FPGA targets, 105 106 will allow small and even very small companies to propose embedded system and accelerating solutions -
anr/section-position.tex
r339 r356 23 23 %on Field Programmable Gate Array circuits (FPGA). 24 24 %%% 25 \subsubsection*{Position ning in regards with the economical and social context}25 \subsubsection*{Positioning in regards with the economical and social context} 26 26 COACH will contribute to build an open design and run-time 27 27 environment, including communication middleware and tools to support 28 developers in the production of embedded software, through all phases of the software life cycle,28 developers in the production of embedded software, through all phases of the software life cycle, 29 29 from requirements analysis down to deployment and maintenance. 30 30 More specifically, COACH focuses on: 31 31 \begin{itemize} 32 \item High level methods and concepts (esp. requirements and architectural level) for system32 \item High level methods and concepts (esp. Requirements and architectural level) for system 33 33 design, development and integration, addressing complexity aspects and modularity. 34 34 \item Open and modular design environments, enabling flexibility and extensibility by 35 35 means of new or sector-specific tools and ensuring consistency and traceability along the 36 development life cycle.36 development life cycle. 37 37 \item Light/agile methodologies and adaptive workflow providing a dynamic and adaptive 38 38 environment, suitable for co-operative and distributed development. 39 \item Integration of the solutions and engines being develop ped into a state of the art SoC and system39 \item Integration of the solutions and engines being developed into a state of the art SoC and system 40 40 design flow, using the IP-XACT IEEE 1685 standard 41 41 \end{itemize} … … 52 52 %%% 53 53 \parlf\noindent 54 \subsubsection*{Position ning and continuity with other projects}54 \subsubsection*{Positioning and continuity with other projects} 55 55 The COACH project will benefit from a number of previous recent projects: 56 56 \begin{description} … … 83 83 % The TSAR MEDEA+ project (2008-2010) targets the design of a 84 84 scalable, coherent shared memory, multi-cores processor architecture, and uses the SoCLib 85 pla form for virtual prototyping. COACH will benefit from the synthesizable VHDL86 models develop ped in the framework of TSAR (MIPS32 processor core, and RING interconnect).85 platform for virtual prototyping. COACH will benefit from the synthesizable VHDL 86 models developed in the framework of TSAR (MIPS32 processor core, and RING interconnect). 87 87 \item[BioWic] 88 88 On the HPC application side, we also hope to benefit from the experience in … … 137 137 among the initiators of the polyhedral model, a theory which serve to 138 138 unify many parallelism detection and exploitation techniques for regular 139 programs. It is expected that the techniques develop ped by \lip for139 programs. It is expected that the techniques developed by \lip for 140 140 parallelism detection, scheduling \cite{Feau:92aa,Feau:92bb}, 141 141 process construction \cite{Feau:96} and memory management \cite{bee} … … 153 153 This project answer to the global statement of the call "INGENIERIE NUMERIQUE ET SECURITE (INS)" by proposing 154 154 methods and tools for the design of application to be run on platforms of the next generation. 155 I nprovements can be expected for productivity,156 time-to-market (automation and code generation) and safety (management of high level sepcifications down to implementation).155 Improvements can be expected for productivity, 156 time-to-market (automation and code generation) and reliability (management of high level specifications down to implementation). 157 157 In this call, the COACH project totally fulfills the objectives of the axis 2 "METHODES, 158 158 OUTILS ET TECHNOLOGIES POUR LES SYSTEMES EMBARQUES". … … 187 187 quality and reducing the design time and the cost of synthesised cryptographic devices. 188 188 % 189 \subsubsection*{European and international position ning}189 \subsubsection*{European and international positioning} 190 190 % 191 191 Finally, it is worth to note that this project covers priorities defined by the commission 192 experts in the field of Information Technol gies Society (IST) for Embedded192 experts in the field of Information Technologies Society (IST) for Embedded 193 193 Systems: \textit{ $<<$Concepts, methods and tools for designing systems dealing with systems complexity 194 194 and allowing to apply efficiently applications and various products on embedded platforms, -
anr/section-project-description.tex
r353 r356 16 16 %\mbox{}\vspace*{1ex}\\ 17 17 \includegraphics[width=1.0\linewidth]{architecture-hls} 18 \caption{\label{archi-hls} Software architecture of hardware accellerator synthesis}18 \caption{\label{archi-hls} Software architecture of HAS (hardware Accelerator Synthesis)} 19 19 %\end{figure}\begin{figure}\leavevmode\center 20 20 %\mbox{}\vspace*{1ex}\\ 21 21 \includegraphics[width=.65\linewidth]{architecture-hpc} 22 \caption{\label{archi-hpc} Performance analysis of a HPC partition ning}22 \caption{\label{archi-hpc} Performance analysis of a HPC partitioning} 23 23 \end{figure} 24 24 % … … 59 59 accept the same C++ description and on the other hand make possible 60 60 their chaining. The front-end tools read a \xcoach description and generate 61 a new \xcoach description that ex ibits more parallelism or implement61 a new \xcoach description that exhibits more parallelism or implement 62 62 specific instructions for ASIP. The back-end tools read an \xcoach 63 63 description and generate an \xcoachplus description. This is an \xcoach … … 70 70 In addition to digital system design, HPC requires a supplementary 71 71 partitioning step presented in figure~\ref{archi-hpc}. The designer 72 splits the initial application (tag 1) in two parts: one still on the PC and the72 splits the initial application (tag 1) into two parts: one still on the PC and the 73 73 other running in a FPGA plugged on the PCI/X PC bus. The two parts exchange data 74 74 through communication primitives (tag 2) implemented in a library. … … 83 83 This task relates to the monitoring of the COACH project. 84 84 \item[Task-2: \textit{\Backbone}] This task tackles the fundamental points of the 85 project such as the defin tion of the COACH inputs and outputs,85 project such as the definition of the COACH inputs and outputs, 86 86 the internal formats (i.e. \xcoach and \xcoachplus) and their associated tools, 87 87 the architectural templates and the design flow. … … 96 96 High-Level Synthesis of data dominated description and HLS of control 97 97 dominated description. 98 This task contains also the development of a frequency adapt ator98 This task contains also the development of a frequency adapter 99 99 that will allow the coprocessors to meet processor and bus 100 100 frequency constraints. 101 101 \item[Task-6: \textit{PC/FPGA communication middleware}] 102 102 This task pools the features dedicated to HPC. These are mainly the 103 validation of the partitioning (see figure~\ref{archi-hpc}), the sy tem drivers for103 validation of the partitioning (see figure~\ref{archi-hpc}), the system drivers for 104 104 both PC and FPGA-SoC sides, the hardware communication components and 105 105 the support for dynamic partial reconfiguration. 106 106 \item[Task-7: \textit{Industrial demonstrators}] 107 107 This task groups the demonstrators of the COACH project. 108 Most of them are industrial applications that will be develop ped within108 Most of them are industrial applications that will be developed within 109 109 the COACH framework. 110 110 Others consist in integrating the COACH framework as a driver of … … 138 138 \item $T2$ drives all the tasks ($T3$, $T4$, $T5$, $T6$) and is at the heart of 139 139 the COACH project. 140 \item The demonstrators develop ped in $T7$, of course strongly depend on the achievements140 \item The demonstrators developed in $T7$, of course strongly depend on the achievements 141 141 of the previous tasks ($T2$, $T3$, $T4$, $T5$, $T6$). 142 142 \item $T8$ and $T1$ depend on and impact all the other tasks. … … 144 144 This organisation offers enough robustness to insure the success of the 145 145 project, the only critical task in this chart being $T2$. \label{xcoach-problem} 146 However, the partners met 12 times (a one-day meeting per month) during the last year. 147 Ten meeting were dedicated to preliminary technical discussions, including a tentative specification 148 of {\tt xcoach}. The other meetings were dedicated to the preparation of the present proposal. 146 %However, the partners met 12 times (a one-day meeting per month) during the last year. 147 %Ten meeting were dedicated to preliminary technical discussions, including a tentative specification 148 %of {\tt xcoach}. The other meetings were dedicated to the preparation of the present proposal. 149 However, the partners had 10 one-day meetings where a preliminary draft of the 150 \xcoach format was defined. This makes this task less critical. 149 151 -
anr/section-project-management.tex
r346 r356 12 12 Each task leader has to report on the main high-lights, major 13 13 opportunities and problems according to the work-plan. 14 The redaction of the 6-month reports is the respons ability of the steering committee.14 The redaction of the 6-month reports is the responsibility of the steering committee. 15 15 Therefore, each Partner has the responsibility to monthly inform the task Leaders of the 16 16 current development of the \ST he is in charge of. … … 23 23 24 24 \item[Management of knowledge, Intellectual Property Right (IPR) and Results Exploitation] 25 The partners will have to work under eventual NDA constraints. 26 Prior Intellectual Property remains property of the concerned partners. 27 The exploitation of the results obtained in the project and by each partner involved in the consortium will 28 follow the rules written in the articles of the Consortium Agreement accepted and signed by 29 each partner at most 6 months after the project kick-off. 25 %The partners will have to work under eventual NDA constraints. 26 %Prior Intellectual Property remains property of the concerned partners. 27 %The exploitation of the results obtained in the project and by each partner involved in the consortium will 28 %follow the rules written in the articles of the Consortium Agreement accepted and signed by 29 %each partner at most 6 months after the project kick-off. 30 %To manage the exploitation and dissemination plan within the project, six 31 %monthly meetings will analyze the intentions from the consortium (patent, publication...). 32 The partners will sign and accept the Consortium Agreement at most 6 months 33 after the project kick-off. It will 34 1) eventually set NDA constraints on industrial demonstrators, 35 2) fix the intellectual properties of both prior and created intellectual properties, 36 3) define the rules of exploitation of the results obtained in the project. 37 \\ 30 38 To manage the exploitation and dissemination plan within the project, six 31 39 monthly meetings will analyze the intentions from the consortium (patent, publication...). … … 53 61 54 62 \item[Project follow-ups] 55 The basic communication between single project partners will be carried out by means of an Information System (web site), which will be developed and introduced at the very beginning of the project implementation. 63 The basic communication between single project partners will be carried out by 64 means of an Information System (web site), which will be developed and 65 introduced at the very beginning of the project implementation. 56 66 All scientific and administrative data related to the project will be collected and 57 67 treated within a specific e-management plate-form accessible directly by the project web -
anr/section-project-task-schedule.tex
r353 r356 92 92 Because all the HAS tools rely on it, the \xcoach format specification is a 93 93 crucial step. 94 There are no work-around but as mention ned in section~\ref{xcoach-problem}94 There are no work-around but as mentioned in section~\ref{xcoach-problem} 95 95 (page~\pageref{xcoach-problem}) the five academic partners have worked on it 96 96 for a full year and a preliminary document already exists. … … 108 108 Indeed the \altera \& \xilinx architectural templates being architecturally close of 109 109 the neutral architectural template, an efficient software/hardware partition 110 on the neutral architectural template is also anefficient on the other110 on the neutral architectural template is also efficient on the other 111 111 architectural templates. 112 112 The project will allow an experimental verification of this assumption. … … 134 134 % virtual prototyping. 135 135 \end{description} 136 \parlf 136 % 137 137 Finally the list of all the deliverables is presented on figure~\ref{all-delivrables}. 138 138 \begin{figure}[t]\leavevmode\center -
anr/section-ressources.tex
r353 r356 32 32 devra être justifiée. 33 33 \end{itemize}} 34 34 % 35 35 \def\resstablestyletitle#1{\begin{small}{\textit{#1}}\end{small}} 36 37 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 38 \subsection{Partner 1: \inria} 39 40 \begin{description} 41 \item [Equipment] 42 No specific equipment acquisition. 43 \item [Personnel costs] The faculty members involved in the project 44 are François Charot (INRIA researcher) and Steven Derrien (associate 45 professor). The non-permanent personal required is a PhD 46 student that will mainly work on ASIP generation. We are looking for 47 a profile with strong informatic skills and good knowledge in 48 computer architecture. 49 \parlf 50 The table below summarizes the manpower in \hommemois by tasks for both permanent and 51 non-permanent personnels. The detail by deliverables is given in 52 annexe~\ref{table-livrables-inria} (page \pageref{table-livrables-inria}). 53 The non-permanent personnels costs represent {48\%} of the personnal 54 costs. The requested funding for non permanent personnels is 100\% of 55 the total ANR requested funding. 56 \begin{center}\input{table_inria_cairn_short.tex}\end{center} 57 \item [Subcontracting] 58 No subcontracting costs. 59 \item [Travel] 60 The travel costs are associated to project meeting as well as participation to 61 conferences. The travel costs are estimated to {7,5\%} of the total 62 requested ANR funding. 63 \item [Expenses for inward billing] 64 The costs justified by internal invoicing procedures are evaluated to 4\% of the total 65 requested ANR funding. 66 \end{description} 67 68 69 \subsection{Partner 2: \lip} 70 71 \begin{description} 72 \item [Equipment] 73 No specific equipment acquisition. The costs for depreciation of 74 workstations is evaluated to 4\% of the total requested ANR funding. 75 \item [Personnel costs] The faculty members involved in the project 76 are Christophe Alias (INRIA researcher) and Paul Feautrier (emeritus 77 professor at ENS-Lyon). The non-permanent personel required is a 78 post-doc that will work on FIFO construction, then on extensions of 79 process construction and memory optimization to non-polyhedral 80 loops. We are looking for a candidate with both theoretical and 81 practical skills, that will be able to get a sufficient 82 understanding of the polyhedral techniques to produce a working 83 implementation. 84 \parlf 85 The table below summarizes the \hommemois by tasks for both permanent 86 and non-permanent personnels. 87 Annexe~\ref{table-livrables-lip} (page \pageref{table-livrables-lip}) 88 details this table at the deliverable level. 89 The effort of permanent personnels represents 61\% of 90 the total effort. The non-permanent personnels costs represents 91 52\% of the personal costs. The requested funding for non permanent 92 personnels is 100\% of the total ANR requested 93 funding. 94 \begin{center}\input{table_inria_compsys_short.tex}\end{center} 95 \item [Subcontracting] 96 No subcontracting costs. 97 \item [Travel] 98 The travel costs are associated to project meeting as well as 99 participation to conferences. The travel costs are estimated to 20\% 100 of the total requested ANR funding. 101 \item [Expenses for inward billing] 102 The costs justified by internal invoicing procedures are evaluated 103 to 4\% of the total requested ANR funding. 104 \end{description} 105 106 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 107 \subsection{Partner 3: \tima} 108 109 \begin{description} 110 \item [Equipment] 111 No specific equipment acquisition. 112 \item [Personnel costs] 113 The permanent personnels involved in the project are professor and associate professor 114 (Fr\'ed\'eric P\'etrot and Olivier Muller). 115 The non permanent personnels are Phd students and post-doc researchers. 116 Related costs are estimated in \hommemois. 117 One phd student (Adrien Prost-Boucle), funded by the French ministry of research, will 118 be working on the project. 119 One 100\% funded phd student will be hired in September 2011. A post-doc researcher will 120 be hired at the end of 2012 for one year. 121 The PhD student will mainly work on the evolution of UGH HLS tool. Thus, we are looking 122 for a profile with strong informatic skills and good knowledge in computer architecture. 123 The post-doc will mainly work on HPC. The required profile 124 will be more oriented on computer architecture and advanced digital design. 125 \parlf 126 The table below summarizes the man power in \hommemois by tasks for both permanent and 127 non-permanent personnels. The detail by deliverables is given in 128 annexe~\ref{table-livrables-tima} (page \pageref{table-livrables-tima}). 129 The effort of permanent personnels represents 50\% of the total effort. 130 The requested funding for non permanent personnels is 86\% of the total ANR requested 131 funding. 132 \begin{center}\input{table_tima_short.tex}\end{center} 133 \item [Subcontracting] 134 No subcontracting costs. 135 \item [Travel] 136 The travel costs are associated to project meeting as well as participation to 137 conferences. The travel costs are estimated to 10\% of the total requested ANR funding. 138 \item [Expenses for inward billing] 139 The costs justified by internal invoicing procedures are evaluated to 4\% of the total 140 requested ANR funding. 141 \end{description} 142 143 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 144 \subsection{Partner 4: \ubs} 145 146 \begin {description} 147 \item [Equipment] 148 In order to validate the design flow project, the Lab-STICC laboratory will buy FPGA 149 developpement boards. The cost for these FPGA boards is estimated to 3\% of the total 150 ANR funding. 151 \item [Personnel costs] 152 The faculty members involved in the project are associate professors (Philippe COUSSY, 153 Cyrille CHAVET) or research engineers (Dominique HELLER). All non-permanent personnel 154 costs are estimated in \hommemois for senior researchers (post-doc or research 155 engineers). 156 \parlf 157 The table below sumarizes the man power in \hommemois by tasks for both permanent and 158 non-permanent personnels. The detail by deliverables is given in 159 annexe~\ref{table-livrables-usb} (page \pageref{table-livrables-usb}). 160 The non-permanent personnels costs represent 50\% of the personnal costs. 161 The requested funding for non permanent personnels is about 83\% of the total ANR 162 requested funding. 163 \begin{center}\input{table_ubs_short.tex}\end{center} 164 \item [Subcontracting] 165 No subcontracting costs. 166 \item [Travel] 167 The travel costs are associated to management and meeting as well as participation to 168 conferences. The travel costs are estimated to 10\% of the total requested ANR funding. 169 \item [Expenses for inward billing] 170 The costs justified by internal invoicing procedures are evaluated to 4\% of the total 171 requested ANR funding. 172 \end {description} 173 174 175 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 176 \subsection{Partner 5: \upmc} 177 178 \begin{description} 179 \item[Equipment] 180 No specific equipment acquisition is required for this project. 181 The costs for depreciation of workstations and pre-existing FPGA boards are evaluated 182 to 7\% of the total requested ANR funding. 183 \item[Personnel costs] 184 The permanent personnels involved in the project are professors or assistant 185 processors (Alain Greiner and Ivan Aug\'e). 186 All non permanent personnel costs are estimated in \hommemois for senior researchers 187 (post-doc or research engineers). 188 The table below sumarizes the man power by tasks in \hommemois for both permanent and 189 non-permanent personnels. 190 The detail by deliverables is given in annexe~\ref{table-livrables-upmc} (page \pageref{table-livrables-upmc}). 191 The non-permanent personnels costs (24 \hommemois) represent 46\% of the personnal costs. 192 The requested funding for non permanent personnels is 79\% of the total ANR 193 requested funding. 194 \begin{center}\input{table_upmc_short.tex}\end{center} 195 \item[Subcontracting] 196 No subcontracting costs. 197 \item[Travel] 198 The travel costs are associated to management and coordination meeting as 199 well as participation to conferences. The travel costs are estimated 200 to 10\% of the total requested ANR funding. 201 \item[Expenses for inward billing] 202 The costs justified by internal invoicing procedures are evaluated to 4\% 203 of the total requested ANR funding. 204 \end{description} 205 206 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 207 \subsection{Partner 6: \mdslong} 208 209 \begin{description} 210 \item[Equipment] 211 No specific equipment acquisition is required for this project. 212 \item[Personnel costs] 36 % 37 \def\ressources#1#2#3#4#5{{% 38 \def\tmp{} 39 \begin{description} 40 \setlength{\itemsep}{1pt} 41 \setlength{\parskip}{0pt} 42 \setlength{\parsep}{0pt} 43 \item[Equipment] 44 \def\cont{#2} 45 \ifx\cont\tmp\def\cont{No specific equipment acquisition is required for this project.}\fi 46 \cont 47 \item[Personnel costs] 48 #3\\ 49 \begin{minipage}{\linewidth}\center\input{table_#1_short.tex}\end{minipage} 50 \item[Subcontracting] No subcontracting costs. 51 \item[Travel] 52 The travel costs are associated to project meeting as well as participation to 53 conferences. The travel costs are estimated to #4\% of the total requested ANR funding. 54 \item[Expenses for inward billing] 55 \def\cont{#5} 56 \ifx\cont\tmp\def\cont{None.}\else\def\cont{% 57 The costs justified by internal invoicing procedures are evaluated 58 to #5\% of the total requested ANR funding.}\fi 59 \cont 60 %\item[Other working costs] None 61 \end{description} 62 }} 63 64 \newcount\mycnt 65 \def\AcademicPersonalCost#1#2#3#4#5#6#7{ 66 \mycnt=#4\multiply\mycnt100\divide\mycnt#3 67 The #2 effort is \textbf{#3} \hommemois, the table below details it by tasks and the 68 table in annexe~\ref{table-livrables-#1} (page \pageref{table-livrables-#1}) 69 details it by deliverables. 70 The permanent personnels are #5. 71 The effort due to the non permanent personnels is \textbf{#4} \hommemois 72 (\textbf{\the\mycnt\%} of the total effort). 73 %All non permanent personnel costs are estimated in \hommemois for senior researchers (post-doc or research engineers). 74 The requested funding for non permanent personnels is \textbf{#6\%} of the total ANR 75 requested funding. 76 #7 77 } 78 \def\ressourcesForAcademic#1#2#3#4#5{ 79 \ressources{#1}{#2}{\AcademicPersonalCost{#1}#3}{#4}{#5} 80 } 81 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 82 83 The global effort is 358 \hommemois (\hommemoislong), 84 the part of academic partners is 236 \hommemois (66\% of the global effort) 85 and the part of the industrial partners is 122 \hommemois (\textbf{34\%} of the 86 global effort). 87 The tables of annexe~\ref{effort:by:livrable} gives this global effort by deliverables, 88 those of annexe~\ref{effort:by:partner:livrable} shows this global effort by partner and 89 deliverables.\\ 90 \textbf{NOTICE:} In these tables and in the following sections the units is the 91 \hommemois of a senior researcher (post-doc or research engineers). 92 93 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 94 \subsection{Partner 1: \mdslong} 95 \ressources{mds} 96 {} 97 { 213 98 \mds employees involved in the project are permanent managers, engineers and PhD graduates. 214 99 The man power detail in \hommemois by deliverables is given in 215 100 annexe~\ref{table-livrables-mds} (page \pageref{table-livrables-mds}). 216 and a sumary by task in the following table. 217 \begin{center}\input{table_mds_short.tex}\end{center} 218 \item[Subcontracting] 219 No subcontracting costs. 220 \item[Travel] 221 The travel costs are associated to project meeting as well as participation to 222 conferences. The travel costs are estimated to 2\% of the total requested ANR funding. 223 \item[Expenses for inward billing] none 224 \item[Other working costs] none 225 \end{description} 226 101 and a summary by task in the following table. 102 \mustbecompleted{\\MDS: Vous n'etes dans aucuns projets annexe 7.3 ?} 103 } 104 {2} 105 {} 106 % 107 % \begin{description} 108 % \item[Equipment] 109 % No specific equipment acquisition is required for this project. 110 % \item[Personnel costs] 111 % \mds employees involved in the project are permanent managers, engineers and PhD graduates. 112 % The man power detail in \hommemois by deliverables is given in 113 % annexe~\ref{table-livrables-mds} (page \pageref{table-livrables-mds}). 114 % and a sumary by task in the following table. 115 % \begin{center}\input{table_mds_short.tex}\end{center} 116 % \item[Subcontracting] 117 % No subcontracting costs. 118 % \item[Travel] 119 % The travel costs are associated to project meeting as well as participation to 120 % conferences. The travel costs are estimated to 2\% of the total requested ANR funding. 121 % \item[Expenses for inward billing] none 122 % \item[Other working costs] none 123 % \end{description} 124 125 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 126 \subsection{Partner 2: \upmc} 127 \ressourcesForAcademic 128 {upmc} 129 { In order to validate the COACH design flow, \upmc will buy FPGA development 130 boards (especially 1 PCI/E FPGA \xilinx board). 131 The cost for these boards is estimated to 4500 \euro (3\% of the total ANR funding).} 132 {{\upmc}{52}{24}{Alain Greiner and Ivan Aug\'e}{87}{ 133 We are looking for a profile with strong skills in SW development and good 134 knowledge in SoC design and virtual prototyping. 135 }} 136 {7}{3.5} 137 % 138 % \begin{description} 139 % \item[Equipment] 140 % In order to validate the COACH design flow, \upmc will buy FPGA development 141 % boards (especially 1 PCI/E FPGA \xilinx board). 142 % The cost for these boards is estimated to 6 k\euro (4\% of the total ANR funding). 143 % \item[Personnel costs] 144 % The permanent personnels involved in the project are professors or assistant 145 % professors (Alain Greiner and Ivan Aug\'e). 146 % All non permanent personnel costs are estimated in \hommemois for senior researchers 147 % (post-doc or research engineers). 148 % The table below sumarizes the man power by tasks in \hommemois for both permanent and 149 % non-permanent personnels. 150 % The detail by deliverables is given in annexe~\ref{table-livrables-upmc} (page \pageref{table-livrables-upmc}). 151 % The non-permanent personnels costs (24 \hommemois) represent 46\% of the personnal costs. 152 % The requested funding for non permanent personnels is 79\% of the total ANR 153 % requested funding. 154 % \begin{center}\input{table_upmc_short.tex}\end{center} 155 % \item[Subcontracting] 156 % No subcontracting costs. 157 % \item[Travel] 158 % The travel costs are associated to management and coordination meeting as 159 % well as participation to conferences. The travel costs are estimated 160 % to 10\% of the total requested ANR funding. 161 % \item[Expenses for inward billing] 162 % The costs justified by internal invoicing procedures are evaluated to 4\% 163 % of the total requested ANR funding. 164 % \end{description} 165 166 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 167 \def\t{\hspace*{.5cm}} 168 \subsection{Partner 3: \ubs} 169 \ressourcesForAcademic 170 {ubs} 171 { In order to validate the design flow project, the Lab-STICC laboratory will buy FPGA 172 development boards. The cost for these FPGA boards is estimated to 3\% of the total 173 ANR funding. 174 \mustbecompleted{INCOHERENCE avec SITE ANR} 175 } 176 {{\ubs}{48}{24}{Philippe COUSSY, Cyrille CHAVET and Dominique HELLER}{83}{ 177 \mustbecompleted{\\UBS: A) manque 1 profil ici, B) dans annexe 7.2 il ne faut que 5 178 publis de moins de 5 ans, C) Vous n'etes dans aucuns projets annexe 7.3 ?} 179 \mustbecompleted{\\UBS: ./gantt < anr.gant\\ 180 \t WARNING: ubs :D511 probleme sur l'an 1 (in table=7.0, in gantt=6.0 \\ 181 \t ERROR: ubs :D840 probleme sur l'an 1 (in table=0.5, in gantt=0.0} 182 }} 183 {10}{4} 184 185 % \begin {description} 186 % \item [Equipment] 187 % In order to validate the design flow project, the Lab-STICC laboratory will buy FPGA 188 % development boards. The cost for these FPGA boards is estimated to 3\% of the total 189 % ANR funding. 190 % \item [Personnel costs] 191 % The faculty members involved in the project are associate professors (Philippe COUSSY, 192 % Cyrille CHAVET) or research engineers (Dominique HELLER). All non-permanent personnel 193 % costs are estimated in \hommemois for senior researchers (post-doc or research 194 % engineers). 195 % \parlf 196 % The table below summarizes the man power in \hommemois by tasks for both permanent and 197 % non-permanent personnels. The detail by deliverables is given in 198 % annexe~\ref{table-livrables-usb} (page \pageref{table-livrables-usb}). 199 % The non-permanent personnels costs represent 50\% of the personnel costs. 200 % The requested funding for non permanent personnels is about 83\% of the total ANR 201 % requested funding. 202 % \begin{center}\input{table_ubs_short.tex}\end{center} 203 % \item [Subcontracting] 204 % No subcontracting costs. 205 % \item [Travel] 206 % The travel costs are associated to management and meeting as well as participation to 207 % conferences. The travel costs are estimated to 10\% of the total requested ANR funding. 208 % \item [Expenses for inward billing] 209 % The costs justified by internal invoicing procedures are evaluated to 4\% of the total 210 % requested ANR funding. 211 % \end {description} 212 213 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 214 \subsection{Partner 4: \liplong} 215 \ressourcesForAcademic 216 {inria_compsys}{} 217 {{\lip}{46}{22}{Christophe Alias and Paul Feautrier}{100}{ 218 \\We are looking for a candidate with both theoretical and 219 practical skills, that will be able to get a sufficient 220 understanding of the polyhedral techniques. 221 \mustbecompleted{\\LIP: DANS FIG.8 vous avez 28 hm. 46-28=18 --> 40\%\\ 222 IL FAUT ETRE <= 50\%, le max de non permanent est 23.} 223 \mustbecompleted{\\LIP: Vous n'etes dans aucuns projets annexe 7.3 ?} 224 \mustbecompleted{\\LIP: ./gantt < anr.gant\\ 225 \t WARNING: lip :D432 probleme sur l'an 2 (in table=7.0, in gantt=6.0 \\ 226 \t WARNING: lip :D432 probleme sur l'an 3 (in table=13.0, in gantt=12.0\\ 227 \t ERROR: lip :D730 probleme sur l'an 3 (in table=0.0, in gantt=3.0} 228 }} 229 {\mustbecompleted{(LIP: ca fait beaucoup) }20}{4} 230 % 231 % \begin{description} 232 % \item [Equipment] 233 % No specific equipment acquisition. The costs for depreciation of 234 % workstations is evaluated to 4\% of the total requested ANR funding. 235 % \item [Personnel costs] The faculty members involved in the project 236 % are Christophe Alias (INRIA researcher) and Paul Feautrier (emeritus 237 % professor at ENS-Lyon). The non-permanent personel required is a 238 % post-doc that will work on FIFO construction, then on extensions of 239 % process construction and memory optimization to non-polyhedral 240 % loops. We are looking for a candidate with both theoretical and 241 % practical skills, that will be able to get a sufficient 242 % understanding of the polyhedral techniques to produce a working 243 % implementation. 244 % \parlf 245 % The table below summarizes the \hommemois by tasks for both permanent 246 % and non-permanent personnels. 247 % Annexe~\ref{table-livrables-lip} (page \pageref{table-livrables-lip}) 248 % details this table at the deliverable level. 249 % The effort of permanent personnels represents 61\% of 250 % the total effort. The non-permanent personnels costs represents 251 % 52\% of the personal costs. The requested funding for non permanent 252 % personnels is 100\% of the total ANR requested 253 % funding. 254 % \begin{center}\input{table_inria_compsys_short.tex}\end{center} 255 % \item [Subcontracting] 256 % No subcontracting costs. 257 % \item [Travel] 258 % The travel costs are associated to project meeting as well as 259 % participation to conferences. The travel costs are estimated to 20\% 260 % of the total requested ANR funding. 261 % \item [Expenses for inward billing] 262 % The costs justified by internal invoicing procedures are evaluated 263 % to 4\% of the total requested ANR funding. 264 % \end{description} 265 266 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 267 \subsection{Partner 5: \tima} 268 \ressourcesForAcademic 269 {tima}{} 270 {{\tima}{48}{24}{Fr\'ed\'eric P\'etrot, Olivier Muller and Adrien Prost-Boucle}{86}{ 271 \\One 100\% funded phd student will be hired in September 2011, we are looking 272 for a profile with strong informatic skills and good knowledge in computer architecture. 273 A post-doc researcher will be hired at the end of 2012 for one year, the 274 required profile will be more oriented on computer architecture and 275 advanced digital design. 276 \mustbecompleted{\\TIMA: \begin{itemize} 277 \item chiffre delirant: dans figure 8 vous avez 52 hm ??? vous devez avoir 24. 278 \item vous dites ci dessus que vous embauchez pour 50 hm, hors l'effort 279 des non permanent est 24 ??? 280 \end{itemize}\mbox{}} 281 }} 282 {10}{4} 283 % 284 % \begin{description} 285 % \item [Equipment] 286 % No specific equipment acquisition. 287 % \item [Personnel costs] 288 % The permanent personnels involved in the project are professor and associate professor 289 % (Fr\'ed\'eric P\'etrot and Olivier Muller). 290 % The non permanent personnels are Phd students and post-doc researchers. 291 % Related costs are estimated in \hommemois. 292 % One phd student (Adrien Prost-Boucle), funded by the French ministry of research, will 293 % be working on the project. 294 % One 100\% funded phd student will be hired in September 2011. 295 % A post-doc researcher will be hired at the end of 2012 for one year. 296 % The PhD student will mainly work on the evolution of UGH HLS tool. Thus, we are looking 297 % for a profile with strong informatic skills and good knowledge in computer architecture. 298 % The post-doc will mainly work on HPC. The required profile 299 % will be more oriented on computer architecture and advanced digital design. 300 % \parlf 301 % The table below summarizes the man power in \hommemois by tasks for both permanent and 302 % non-permanent personnels. The detail by deliverables is given in 303 % annexe~\ref{table-livrables-tima} (page \pageref{table-livrables-tima}). 304 % The effort of permanent personnels represents 50\% of the total effort. 305 % The requested funding for non permanent personnels is 86\% of the total ANR requested 306 % funding. 307 % \begin{center}\input{table_tima_short.tex}\end{center} 308 % \item [Subcontracting] 309 % No subcontracting costs. 310 % \item [Travel] 311 % The travel costs are associated to project meeting as well as participation to 312 % conferences. The travel costs are estimated to 10\% of the total requested ANR funding. 313 % \item [Expenses for inward billing] 314 % The costs justified by internal invoicing procedures are evaluated to 4\% of the total 315 % requested ANR funding. 316 % \end{description} 317 318 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 319 \subsection{Partner 6: \inria} 320 \ressourcesForAcademic 321 {inria_cairn}{} 322 {{\inria}{42}{20}{ François Charot and Steven Derrien}{100}{ 323 We are looking for a profile with strong skills in SW development and good 324 knowledge in computer architecture. 325 \mustbecompleted{\\IRISA figure 8 vous avez 18 hm vous devez avoir 22.} 326 \mustbecompleted{\\IRISA: Vous n'etes dans aucuns projets annexe 7.3 ?} 327 \mustbecompleted{\\IRISA: ./gantt < anr.gant\\ 328 \t ERROR: inria :D420 probleme sur l'an 3 (in table=0.0, in gantt=3.0} 329 }} 330 {7.5}{4} 331 % 332 % \begin{description} 333 % \item [Equipment] 334 % No specific equipment acquisition. 335 % \item [Personnel costs] The faculty members involved in the project 336 % are François Charot (INRIA researcher) and Steven Derrien (associate 337 % professor). 338 % The non-permanent personal required is a PhD 339 % student that will mainly work on ASIP generation. We are looking for 340 % a profile with strong informatic skills and good knowledge in 341 % computer architecture. 342 % \parlf 343 % The table below summarizes the manpower in \hommemois by tasks for both permanent and 344 % non-permanent personnels. The detail by deliverables is given in 345 % annexe~\ref{table-livrables-inria} (page \pageref{table-livrables-inria}). 346 % The non-permanent personnels costs represent {48\%} of the personnal 347 % costs. The requested funding for non permanent personnels is 100\% of 348 % the total ANR requested funding. 349 % \begin{center}\input{table_inria_cairn_short.tex}\end{center} 350 % \item [Subcontracting] 351 % No subcontracting costs. 352 % \item [Travel] 353 % The travel costs are associated to project meeting as well as participation to 354 % conferences. The travel costs are estimated to {7,5\%} of the total 355 % requested ANR funding. 356 % \item [Expenses for inward billing] 357 % The costs justified by internal invoicing procedures are evaluated to 4\% of the total 358 % requested ANR funding. 359 % \end{description} 227 360 228 361 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 229 362 \subsection{Partner 7: \bull} 230 \ begin{description}231 \item[Equipment] 232 363 \ressources 364 {bull} 365 { Acquisition of a FPGA development board will represent the main equipment cost for 233 366 Bull in COACH. It is estimated at about 5\% (tbc) of the total funding. 234 \item[Personnel costs] 235 A permanent engineer will be assigned full time to the project for a duration of 36236 months as shown in the table below that summarizes the man power in \hommemois.237 The detailby deliverables is given in367 \mustbecompleted{INCOHERENCE avec SITE ANR} 368 } 369 { 370 The man power detail in \hommemois by deliverables is given in 238 371 annexe~\ref{table-livrables-bull} (page \pageref{table-livrables-bull}). 239 \begin{center}\input{table_bull_short.tex}\end{center} 240 \item[Subcontracting] 241 No subcontracting costs. 242 \item[Travel] 243 Application of a standard 10\% of the total funding to travel costs. 244 \item[Expenses for inward billing] 245 Costs justified by inward billing are estimated to about 5\% of the total funding. 246 \item[Other working costs] none 247 \end{description} 372 and a summary by task in the following table. 373 \bull employees involved in the project are a manager for 9 \hommemois 374 and an engineer for 27 \hommemois.} 375 {10}{5} 376 377 % \begin{description} 378 % \item[Equipment] 379 % Acquisition of a FPGA development board will represent the main equipment cost for 380 % Bull in COACH. It is estimated at about 5\% (tbc) of the total funding. 381 % \item[Personnel costs] 382 % A permanent engineer will be assigned full time to the project for a duration of 36 383 % months as shown in the table below that summarizes the man power in \hommemois. 384 % The detail by deliverables is given in 385 % annexe~\ref{table-livrables-bull} (page \pageref{table-livrables-bull}). 386 % \begin{center}\input{table_bull_short.tex}\end{center} 387 % \item[Subcontracting] 388 % No subcontracting costs. 389 % \item[Travel] 390 % Application of a standard 10\% of the total funding to travel costs. 391 % \item[Expenses for inward billing] 392 % Costs justified by inward billing are estimated to about 5\% of the total funding. 393 % \item[Other working costs] none 394 % \end{description} 248 395 249 396 250 397 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% 251 398 \subsection{Partner 8: \thales} 252 253 \begin{description} 254 \item[Equipment] 255 In order to validate the design flow,TRT will buy FPGA developpement boards. The cost 256 for these FPGA boards is estimated to 10 k\euro (6\% of the total ANR funding). 257 \item[Personnel costs] 258 The effort to adapt SPEAR DE to generate the input files to COACH framework is 259 estimated to 13 \hommemois. 260 The effort to describe and develop the application is estimated to 14 \hommemois. 261 Finally we need one man*month for the participation to the global specification in task 2. 262 This is summarized in the table below and detailed by deliverables in 399 \ressources 400 {thales} 401 { In order to validate the design flow,TRT will buy FPGA developpement boards. The cost 402 for these FPGA boards is estimated to 11 k\euro (6\% of the total ANR funding). 403 \mustbecompleted{INCOHERENCE avec SITE ANR} 404 } 405 { The man power detail in \hommemois by deliverables is given in 263 406 annexe~\ref{table-livrables-thales} (page \pageref{table-livrables-thales}). 264 \begin{center}\input{table_thales_short.tex}\end{center} 265 \item[Subcontracting] 266 No subcontracting costs. 267 \item[Travel] 268 The travel costs are associated to meeting, plenaries as well as participation to 269 conferences. The travel costs are estimated to 10 k\euro. The travel costs are estimated to 270 5\% of the total requested ANR funding. 271 \item[Expenses for inward billing] none 272 \item[Other working costs] none 273 \end{description} 407 and a summary by task in the following table. 408 \thales employees involved in the project are a manager for 18 \hommemois 409 and an engineer for 18 \hommemois.} 410 {5}{} 411 412 % \begin{description} 413 % \item[Equipment] 414 % In order to validate the design flow,TRT will buy FPGA developpement boards. The cost 415 % for these FPGA boards is estimated to 10 k\euro (6\% of the total ANR funding). 416 % \item[Personnel costs] 417 % The effort to adapt SPEAR DE to generate the input files to COACH framework is 418 % estimated to 13 \hommemois. 419 % The effort to describe and develop the application is estimated to 14 \hommemois. 420 % Finally we need one man*month for the participation to the global specification in task 2. 421 % This is summarized in the table below and detailed by deliverables in 422 % annexe~\ref{table-livrables-thales} (page \pageref{table-livrables-thales}). 423 % \begin{center}\input{table_thales_short.tex}\end{center} 424 % \item[Subcontracting] 425 % No subcontracting costs. 426 % \item[Travel] 427 % The travel costs are associated to meeting, plenaries as well as participation to 428 % conferences. The travel costs are estimated to 10 k\euro. The travel costs are estimated to 429 % 5\% of the total requested ANR funding. 430 % \item[Expenses for inward billing] none 431 % \item[Other working costs] none 432 % \end{description} 274 433 275 434 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% -
anr/task-backend.tex
r342 r356 22 22 cover respectively data and control dominated designs. 23 23 \end{objectif} 24 24 % 25 25 \begin{workpackage} 26 26 \subtask{Integration of UGH \& GAUT HLS tools to COACH} … … 89 89 \end{livrable} 90 90 \end{workpackage} 91 %%92 %% \subtask{Making HAS back-end to read \xcoach format}93 %% The goal of this \ST is to integrate the UGH and GAUT HLS tool to the COACH framework.94 %% by implementing the mechanism to read \xcoach format.95 %% \begin{livrable}96 %% \itemL{6}{12}{x}{\Stima}{UGH integration}{12:0:0}97 %% Release of the UGH software that reads \xcoach format.98 %% \itemL{6}{12}{x}{\Subs}{GAUT release reading \xcoach}{6:0:0}99 %% Release of the GAUT software that is able to read \xcoach format.100 %% \end{livrable}101 %% %102 %% \subtask{Making HAS back-end to write \xcoachplus format}103 %% The goal of this \ST is to integrate the UGH and GAUT HLS tool to the COACH framework.104 %% by implementing the mechanism to write \xcoachplus format.105 %% \begin{livrable}106 %% \itemL{12}{18}{x}{\Supmc}{UGH integration}{0:2:4.0}107 %% Release of the UGH software that writes \xcoachplus format.108 %% \itemL{12}{18}{x}{\Subs}{GAUT release writing \xcoachplus}{0:6:0}109 %% Release of the GAUT software that is able to read \xcoach format and to write \xcoachplus format.110 %% \end{livrable}111 %% %112 %% \subtask{Adapting HAS tools to the COACH communication schemes}113 %% \begin{livrable}114 %% \itemL{12}{18}{x}{\Supmc}{UGH update for COACH communications}{0:2:4.0}115 %% Release of the UGH software that interprets the API of task communication.116 %% \itemL{12}{18}{x}{\Subs}{GAUT update for COACH communications}{0:2:4.0}117 %% Release of the GAUT software that interprets the API of task communication.118 %% \end{livrable} -
anr/task-demonstrator.tex
r348 r356 55 55 \setMacroInAuxFile{trtAppSpecification} 56 56 This deliverable is a document that specifies the application. 57 \itemL{6}{12}{x}{\Sthales}{\thales demonstrator}{4:0:0} 58 This deliverable is the code of the application specified in the former 59 deliverable (\trtAppSpecification). 57 \itemV{6}{12}{x}{\Sthales}{\thales demonstrator} 58 The deliverable is the specification of the demonstrator in COACH input format 59 defined in the {\NOVERSuseModelSpecification} deliverable (milestone M2). 60 \itemL{12}{27}{x}{\Sthales}{\thales demonstrator}{3:2:2} 61 Validation of demonstrator for M4 milestone. 62 The deliverable is the specification of the demonstrator in COACH 63 milestone M4. 60 64 \end{livrable} 61 65 % … … 67 71 be able to partition the application on the architecture. 68 72 \begin{livrable} 69 \itemL{6}{ 18}{x}{\Sthales}{SPEAR-DE adaptation}{6:7:0}73 \itemL{6}{27}{x}{\Sthales}{SPEAR-DE adaptation}{6:7:3} 70 74 \setMacroInAuxFile{trtSpearde} 71 75 Adaptation of SPEAR-DE for COACH framework. … … 73 77 \end{livrable} 74 78 % 75 79 \subtask{\mds use case} 76 80 The goal of the \mds demonstrator will be to experiment and validate the good integration 77 81 of the COACH tools into an industrial SoC design flow for critical systems. This demonstrator will be based on … … 82 86 generic enough or at least customizable in order to be at the basis of the further deployement into 83 87 actual design flows. The objectives of this demonstrator are the following: 84 \begin{itemize} 85 \item Validate the IP-XACT packaging of the generated SoC 86 \item Experiment the integration of the generated SoC into the top level (TLM or RTL) of a bigger system 87 \item Bring a focus on flow capabilities for requirements traceability from system properties, down to sub-systems implementation 88 \end{itemize} 89 88 \begin{itemize} 89 \item Validate the IP-XACT packaging of the generated SoC. 90 \item Experiment the integration of the generated SoC into the top level 91 (TLM or RTL) of a bigger system. 92 \item Bring a focus on flow capabilities for requirements traceability 93 from system properties, down to sub-systems implementation. 94 \end{itemize} 90 95 \begin{livrable} 91 96 \itemV{0}{12}{d}{\Smds}{Use case} … … 97 102 This deliverable is the final demonstrator specified in (\mdsAppSpecification). 98 103 \end{livrable} 99 104 % 100 105 \subtask{Evaluation report} 101 106 In this sub-task, \mds, \thales and \bull will evaluate the COACH platform. … … 113 118 using the COACH milestone of T0+18. 114 119 \itemL{27}{36}{d+x}{\Smds}{Evaluation}{0:3:3} 115 \OtherPartner{18}{36}{Sbull}{0:4: 5}116 \OtherPartner{18}{36}{Sthales}{0:4: 5}120 \OtherPartner{18}{36}{Sbull}{0:4:4.5} 121 \OtherPartner{18}{36}{Sthales}{0:4:4.5} 117 122 This deliverable is a document that validates and evaluates the COACH final release 118 123 for the demonstrators. -
anr/task-dissemination.tex
r348 r356 64 64 % 65 65 \subtask{Reference user manuals} 66 \begin{livrable}67 \itemL{21}{27}{d}{\Stima}{CSG User manual}{0:.5:1}68 This user manual shows how to generate a complete HW/SW system by using the CSG tool.69 \itemL{21}{27}{d}{\Slip}{HAS front-end user manual}{0:.5:1}70 This user manual shows how to apply loop transformations to a task.71 \itemL{21}{27}{d}{\Sinria}{ASIP user manual}{0:1:1}72 This user manual shows how to customize a processor to obtain an ASIP.73 \itemL{21}{27}{d}{\Subs}{HLS user manual}{0:.5:1.5}74 This user manual shows how a task can be synthesized by using UGH and GAUT tools.75 \OtherPartner{12}{36}{\Subs}{0:2:2}76 \itemL{21}{27}{d}{\Smds}{Magillem frameworkuser manual}{0:1:1}77 This user manual describes how to use COACH within the IP-XACT based Magillem tool suite.78 \end{livrable}66 \begin{livrable} 67 \itemL{21}{27}{d}{\Stima}{CSG User manual}{0:.5:1} 68 This user manual shows how to generate a complete HW/SW system by using the CSG tool. 69 \itemL{21}{27}{d}{\Slip}{HAS front-end user manual}{0:.5:1} 70 This user manual shows how to apply loop transformations to a task. 71 \itemL{21}{27}{d}{\Sinria}{ASIP user manual}{0:1:1} 72 This user manual shows how to customize a processor to obtain an ASIP. 73 \itemL{21}{27}{d}{\Subs}{HLS user manual}{0:.5:1.5} 74 This user manual shows how a task can be synthesized by using UGH and GAUT tools. 75 \OtherPartner{12}{36}{\Subs}{0:2:2} 76 \itemL{21}{27}{d}{\Smds}{Magillem framework \ganttlf user manual}{0:1:1} 77 This user manual describes how to use COACH within the IP-XACT based Magillem tool suite. 78 \end{livrable} 79 79 % 80 80 \subtask{Publications and Communications} 81 \begin{livrable}82 \itemL{12}{36}{d}{\Smds}{Publication, communication}{0:2:3}83 \OtherPartner{12}{36}{\Sinria} {0:1:1}84 \OtherPartner{12}{36}{\Slip} {0:1:1}85 \OtherPartner{12}{36}{\Stima} {0:1:1}86 \OtherPartner{12}{36}{\Subs} {.5:1:1}87 \OtherPartner{12}{36}{\Supmc} {0:1:1}88 \OtherPartner{12}{36}{\Sbull} {0:.5:.5}89 \OtherPartner{12}{36}{\Sthales}{0:1:1}90 This deliverable groups the effort to make COACH better known. It consists91 mainly in writing/submitting papers and in presenting COACH in to trade92 show and workshop and organizing a final white paper.93 94 \end{livrable}81 \begin{livrable} 82 \itemL{12}{36}{d}{\Smds}{Publication, communication}{0:2:3} 83 \OtherPartner{12}{36}{\Sinria} {0:1:1} 84 \OtherPartner{12}{36}{\Slip} {0:1:1} 85 \OtherPartner{12}{36}{\Stima} {0:1:1} 86 \OtherPartner{12}{36}{\Subs} {.5:1:1} 87 \OtherPartner{12}{36}{\Supmc} {0:1:1} 88 \OtherPartner{12}{36}{\Sbull} {0:.5:.5} 89 \OtherPartner{12}{36}{\Sthales}{0:1:1} 90 This deliverable groups the effort to make COACH better known. It consists 91 mainly in writing/submitting papers and in presenting COACH in to trade 92 show and workshop and organizing a final white paper. 93 This white paper will facilitates the dissemination towards industrial prospects. 94 \end{livrable} 95 95 \end{workpackage} -
anr/task-frontend.tex
r335 r356 12 12 (C/C++) with as few constraints as possible, into a form suitable for 13 13 the HLS tools (i.e. HAS back-end tools of the COACH project). If the 14 target is an ASIP, the front end has to extract14 target is an ASIP, the front-end has to extract 15 15 patterns from the source code and convert them into the definition 16 16 of an extensible processor. If the target is a process network, the … … 36 36 instructions. 37 37 \end{livrable} 38 38 % 39 39 \subtask{Micro-architectural template models for ASIP} 40 40 In this sub-task, we provide micro-architectural template models for the two target … … 57 57 the different approaches} 58 58 \end{livrable} 59 59 % 60 60 \subtask{Automatic parallelization and memory optimization} 61 This sub-task aims at providing a source-level optimizer in front the62 HLS back-end tools. The optimizations are threefold:63 \begin{itemize}64 \item Extraction of parallelism in polyhedral loops and conversion65 into a process network.66 \item Minimization of intra-process local memory67 \item Construction of inter-process FIFOs68 \end{itemize}69 We will design these methods by using polyhedral techniques, as we did70 in the past for pure HPC optimizations. The program model is typically71 regular programs where loop bounds, conditions and array indices are72 affine functions. In a second part, we will extend the program model73 by using conservative approximations.61 This sub-task aims at providing a source-level optimizer in front the 62 HLS back-end tools. The optimizations are threefold: 63 \begin{itemize} 64 \item Extraction of parallelism in polyhedral loops and conversion 65 into a process network. 66 \item Minimization of intra-process local memory 67 \item Construction of inter-process FIFOs 68 \end{itemize} 69 We will design these methods by using polyhedral techniques, as we did 70 in the past for pure HPC optimizations. The program model is typically 71 regular programs where loop bounds, conditions and array indices are 72 affine functions. In a second part, we will extend the program model 73 by using conservative approximations. 74 74 \begin{livrable} 75 75 \itemV{0}{6}{d}{\Slip}{Method, Preliminary Definition} … … 99 99 demonstrator \STs. 100 100 \end{livrable} 101 101 % 102 102 \end{workpackage} 103 103 -
anr/task-hpc.tex
r336 r356 6 6 \let\UPMC\enable 7 7 \let\TIMA\enable 8 \let\THALES\enable9 8 \let\XILINX\enable 10 9 \end{taskinfo} … … 43 42 \itemL{21}{27}{x}{\Stima}{HPC API for Linux}{0:2:1.5} 44 43 \OtherPartner{21}{27}{\Supmc}{0:1.5:1.0} 45 \OtherPartner{21}{27}{\Sbull}{0:0. 0:0.5}44 \OtherPartner{21}{27}{\Sbull}{0:0.5:0.5} 46 45 \setMacroInAuxFile{hpcForLinux} 47 46 This deliverable groups all the software components to implement the … … 64 63 % It also includes appropriate SoC-FPGA OS drivers and a modification of the profiling library. 65 64 \begin{livrable} 66 \itemL{18}{36}{x}{\Stima}{Support for HPC environment set up}{0:3:3}65 \itemL{18}{36}{x}{\Stima}{Support for HPC \ganttlf environment set up}{0:3:3} 67 66 Modification of the CSG software to set-up the HPC environment. 68 67 The objective is to run easily HPC application and the main features are: … … 71 70 part of the HPC application. 72 71 \end{livrable} 73 % \itemL{18}{36}{x}{\Stima}{CSG module for \ganttlf dynamic reconfiguration}{0:4:12} 74 % This livrable is a CSG module allowing to partition the task graph along 75 % the dynamic partial reconfiguration regions. The resulting task-region assignement 76 % is directly used for generation of bitstreams. The module also produces reconfiguration 77 % management software to be run on the SoC-FPGA. 78 % \itemL{18}{30}{x}{\Stima}{Dynamic reconfiguration \ganttlf for DNA drivers}{0:3:3} 79 % \setMacroInAuxFile{hpcDynconfDriver} 80 % The drivers required by the DNA OS in order to manage dynamic partial 81 % reconfiguration inside the SoC-FPGA. 82 % \itemL{30}{36}{x}{\Supmc}{Dynamic reconfiguration \ganttlf for MUTEKH drivers}{0:0:1} 83 % Port of the {\hpcDynconfDriver} drivers on the MUTEKH OS. 84 % \itemL{24}{36}{x}{\Stima}{Profiler for \ganttlf dynamic reconfiguration}{0:0:6} 85 % Extension of the HPC partionning helper in order to integrate dynamic partial 86 % reconfiguration dedicated features (reconfiguration time of regions, variable 87 % number of coprocessors). 88 % \itemL{24}{36}{d}{\Sxilinx}{Optimisation for \xilinx \ganttlf dynamic reconfiguration}{0:0:2} 89 % \xilinx will work with \tima in order to better take into account during 90 % partitioning decisions specific constraints due to partial reconfiguration process. 91 % The deliverable is a document describing the \xilinx specific constraints. 92 % \end{livrable} 93 % %\item This \ST is the delivery of 2 PCI/X \mustbecompleted{FIXME: Stratix4} FPGA board 94 % % with its PCI/X IP. These boards are dedicated to the COACH HPC development. 95 % % They are based on \mustbecompleted{FIXME:stratix4} FPGA device of 400,000 LUT. 96 % % \begin{livrable} 97 % % \itemL{0}{6}{m}{\Saltera}{HPC development boards}{0:0:0} Two PCI/X FPGA boards. 72 % 98 73 \end{workpackage}
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