Changeset 110 for trunk/IPs/systemC/processor

trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Configuration.cpp

-                      r109
+                      r110
                 fromString<double>           (_simulator->getParam("debug_cycle_start")),
                 fromString<double>           (_simulator->getParam("debug_cycle_stop")),
+                fromString<double>           (_simulator->getParam("debug_cycle_idle")));
+                fromString<double>           (_simulator->getParam("debug_idle_cycle")),
+                fromString<uint32_t>         (_simulator->getParam("debug_idle_time")));
     log_init(fromString<bool>(_simulator->getParam("debug_have_log_file")),
 …
     delete _generator;
     delete _instance;
+//  simulation_destroy();
     delete _param_statistics;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Configuration/src/Simulator_fromFile.cpp

r108	r110
74	74	}
75	75	//--------------------------------------------
76		// Child : ~~Simulation~~
	76	// Child : Component
77	77	//--------------------------------------------
78	78	else
79	79	{
80		testNodeName (xml,"~~simulation~~");
	80	testNodeName (xml,"component");
81	81	testSingleton (xml,true);
82	82	}

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h

-                      r97
+                      r110
   private   : counter_t                      * _stat_percent_use_load_queue;
   private   : counter_t                      * _stat_percent_use_speculative_access_queue;
+  private   : counter_t                      * _stat_nb_inst_load;
+  private   : counter_t                      * _stat_nb_inst_load_commit_speculative;
+  private   : counter_t                      * _stat_nb_inst_load_commit_miss;
 //   private   : counter_t                      * _stat_nb_load_miss_speculation;
 …
 #ifdef STATISTICS
+  public  : void     statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void     statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void     statistics_deallocation   (void);
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit.cpp

-                      r88
+                      r110
         log_printf(INFO,Load_store_unit,FUNCTION,"Allocation of statistics");
         statistics_declaration(param_statistics);
+        statistics_allocation(param_statistics);
+      }
 #endif
 …
 #ifdef STATISTICS
     if (usage_is_set(_usage,USE_STATISTICS))
+      {
+        log_printf(INFO,Load_store_unit,FUNCTION,"Generate Statistics file");
+        delete _stat;
+      }
+      statistics_deallocation ();
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp

-                      r106
+                      r110
                               _load_queue[index_load]._exception = EXCEPTION_MEMORY_MISS_SPECULATION;
                               _load_queue[index_load]._write_rd  = 1; // write the good result
+#ifdef STATISTICS
+                              if (usage_is_set(_usage,USE_STATISTICS))
+                                (*_stat_nb_inst_load_commit_miss) ++;
+#endif
+                            }
 …
 #ifdef DEBUG_TEST
                       if (is_operation_memory_store_head(operation) == true)
                         throw ErrorMorpheo(_("Transaction in memory_in's interface, actual state of store_queue is \"STORE_QUEUE_NO_VALID_NO_SPECULATIVE\", also a previous store_head have been receiveid. But this operation is a store_head."));
+                        throw ERRORMORPHEO(FUNCTION,_("Transaction in memory_in's interface, actual state of store_queue is \"STORE_QUEUE_NO_VALID_NO_SPECULATIVE\", also a previous store_head have been receiveid. But this operation is a store_head."));
 #endif
                       // Test if have a new exception (priority : miss_speculation)
 …
 #ifdef DEBUG_TEST
                       if (is_operation_memory_store_head(operation) == false)
                         throw ErrorMorpheo(_("Transaction in memory_in's interface, actual state of store_queue is \"STORE_QUEUE_VALID_SPECULATIVE\", also a previous access with register and address have been receiveid. But this operation is a not store_head."));
+                        throw ERRORMORPHEO(FUNCTION,_("Transaction in memory_in's interface, actual state of store_queue is \"STORE_QUEUE_VALID_SPECULATIVE\", also a previous access with register and address have been receiveid. But this operation is a not store_head."));
 #endif
                       if (operation == OPERATION_MEMORY_STORE_HEAD_KO)
 …
                   case STORE_QUEUE_COMMIT                  :
+                    {
                       throw ErrorMorpheo("<Load_store_unit::function_speculative_load_commit_transition> Invalid state and operation");
+                      throw ERRORMORPHEO(FUNCTION,"<Load_store_unit::function_speculative_load_commit_transition> Invalid state and operation");
+                    }
+                  }
 …
                   // if the speculation is a miss, write_rd is re set at 1.
                   _load_queue [internal_MEMORY_OUT_PTR]._write_rd = 0;
+#ifdef STATISTICS
+                  if (usage_is_set(_usage,USE_STATISTICS))
+                    (*_stat_nb_inst_load_commit_speculative) ++;
+#endif
                   break;
+                }
 …
               case SELECT_LOAD_QUEUE :
+                {
                   throw ErrorMorpheo(_("Invalid selection"));
+                  throw ERRORMORPHEO(FUNCTION,_("Invalid selection"));
                   break;
+                }
 …
             _speculative_access_queue_control->pop();
+          }
+#ifdef STATISTICS
+            if (usage_is_set(_usage,USE_STATISTICS))
+              (*_stat_nb_inst_load) ++;
+#endif
+          }
         //================================================================
 …
 #ifdef DEBUG_TEST
                 if (not have_dcache_rsp(_load_queue [packet_id]._operation))
                   throw ErrorMorpheo(_("Receive of respons, but the corresponding operation don't wait a respons."));
+                  throw ERRORMORPHEO(FUNCTION,_("Receive of respons, but the corresponding operation don't wait a respons."));
 #endif
 …
                       case LOAD_QUEUE_WAIT_CHECK : _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT_CHECK; break;
                       case LOAD_QUEUE_WAIT       : _load_queue [packet_id]._state = LOAD_QUEUE_COMMIT      ; break;
                       default : throw ErrorMorpheo(_("Illegal state (dcache_rsp).")); break;
+                      default : throw ERRORMORPHEO(FUNCTION,_("Illegal state (dcache_rsp).")); break;
+                      }
+                  }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_statistics_allocation.cpp

-                      r108
+                      r110
 #undef  FUNCTION
 #define FUNCTION "Load_store_unit::statistics_declaration"
   void Load_store_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics)
+#define FUNCTION "Load_store_unit::statistics_allocation"
+  void Load_store_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
     log_printf(FUNC,Load_store_unit,FUNCTION,"Begin");
 …
     _stat->create_expr("percent_use_speculative_access_queue" , "/ * average_use_speculative_access_queue 100 " + toString(_param->_size_speculative_access_queue), false);
+    _stat_nb_inst_load                         = _stat->create_variable("nb_inst_load"                   );
+    _stat_nb_inst_load_commit_speculative      = _stat->create_variable("nb_inst_load_commit_speculative");
+    _stat_nb_inst_load_commit_miss             = _stat->create_variable("nb_inst_load_commit_miss"       );
+    _stat->create_expr_percent("percent_nb_inst_load_commit_speculative","nb_inst_load_commit_speculative", "nb_inst_load"                   , "Percent of load instruction with a speculative commit ");
+    _stat->create_expr_percent("percent_nb_inst_load_commit_miss"       ,"nb_inst_load_commit_miss"       , "nb_inst_load_commit_speculative", "Percent of load instruction with a miss speculative commit");
     log_printf(FUNC,Load_store_unit,FUNCTION,"End");
   };

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp

-                      r88
+                      r110
  * $Id$
+ *
  * [ Description ]
+ * [ Description ]
+ *
  */
 …
     log_function(Reservation_station,FUNCTION,_name.c_str());
     // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~
     // accept a new instructions when reservation_station is not full
 …
     PORT_WRITE(out_INSERT_ACK, internal_INSERT_ACK);
     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~
+    // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~
     uint32_t index_queue=0;
 …
+      {
         bool     val        = false;
+        uint32_t index_find = 0;;
+        uint32_t index_find = 0;
+        log_printf(TRACE,Reservation_station,FUNCTION,"  * RETIRE [%d]",i);
         for (; (
 …
+              (
 #ifdef  SYSTEMC_VHDL_COMPATIBILITY
                _queue_valid [index_queue]      and
+               _queue_valid [index_queue] and
 #endif
                _queue[index_find]._data_ra_val and
 …
                );
+//          cout << "========== Moore : " << endl
+//               << " * i           : " << i << endl
+//               << " * val         : " << val << endl
+//               << " * index_queue : " << index_queue << endl
+//               << " * index_find  : " << index_find << endl;
+            log_printf(
+#ifdef  SYSTEMC_VHDL_COMPATIBILITY
+                       TRACE,Reservation_station,FUNCTION,"    [%d] valid : %d, data ra %d, rb %d, rc %d - %d",
+                       index_find,
+                       _queue_valid [index_queue],
+#else
+                       TRACE,Reservation_station,FUNCTION,"    [%d] data ra %d, rb %d, rc %d - %d",
+                       index_find,
+#endif
+                       _queue[index_find]._data_ra_val,
+                       _queue[index_find]._data_rb_val,
+                       _queue[index_find]._data_rc_val,
+                       val);
+          }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest/src/test.cpp

-                      r108
+                      r110
   ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC                ,"out_PREDICT_ADDRESS_SRC                ",Tgeneral_data_t    ,_param->_nb_inst_decod);
   ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST               ,"out_PREDICT_ADDRESS_DEST               ",Tgeneral_data_t    ,_param->_nb_inst_decod);
 //   ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ," in_PREDICT_CAN_CONTINUE               ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ," in_PREDICT_CAN_CONTINUE               ",Tcontrol_t         ,_param->_nb_inst_decod);
   ALLOC1_SC_SIGNAL( in_CONTEXT_DECOD_ENABLE               ," in_CONTEXT_DECOD_ENABLE               ",Tcontrol_t         ,_param->_nb_context);
   ALLOC1_SC_SIGNAL( in_CONTEXT_DEPTH_VAL                  ," in_CONTEXT_DEPTH_VAL                  ",Tcontrol_t         ,_param->_nb_context);
 …
   INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_SRC                ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Decod,out_PREDICT_ADDRESS_DEST               ,_param->_nb_inst_decod);
 //   INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod, in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DECOD_ENABLE               ,_param->_nb_context);
   INSTANCE1_SC_SIGNAL(_Decod, in_CONTEXT_DEPTH_VAL                  ,_param->_nb_context);
 …
                 in_PREDICT_ACK          [i]->write((rand()%100)<percent_transaction_predict);
 //              in_PREDICT_CAN_CONTINUE [i]->write(0);
+                in_PREDICT_CAN_CONTINUE [i]->write(0);
+              }
+          }
 …
   delete [] out_PREDICT_ADDRESS_SRC                ;
   delete [] out_PREDICT_ADDRESS_DEST               ;
 //delete []  in_PREDICT_CAN_CONTINUE               ;
+  delete []  in_PREDICT_CAN_CONTINUE               ;
   delete []  in_CONTEXT_DECOD_ENABLE               ;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/include/Decod.h

r108	r110
119	119	public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_SRC ;//[nb_inst_decod]
120	120	public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_DEST ;//[nb_inst_decod]
121		//public : SC_IN (Tcontrol_t ) ** in_PREDICT_CAN_CONTINUE ;//[nb_inst_decod]
	121	public : SC_IN (Tcontrol_t ) ** in_PREDICT_CAN_CONTINUE ;//[nb_inst_decod]
122	122
123	123	// ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_allocation.cpp

r108	r110
124	124	ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_instruction_address );
125	125	ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_instruction_address );
126		// ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1 );
	126	ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1 );
127	127	}
128	128

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_deallocation.cpp

r108	r110
79	79	DELETE1_SIGNAL(out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod,_param->_size_instruction_address );
80	80	DELETE1_SIGNAL(out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod,_param->_size_instruction_address );
81		// DELETE1_SIGNAL( in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod,1 );
	81	DELETE1_SIGNAL( in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod,1 );
82	82
83	83	DELETE1_SIGNAL(in_CONTEXT_DECOD_ENABLE, _param->_nb_context,1);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp

-                      r108
+                      r110
     Tcontrol_t can_continue      [_param->_nb_context];
+//     Tcontrol_t can_continue_next [_param->_nb_context];
+//     Tcontrol_t have_decod_branch [_param->_nb_context];
+    Tcontrol_t have_decod_branch [_param->_nb_context];
     for (uint32_t i=0; i<_param->_nb_context; i++)
 …
         can_continue                      [i] = PORT_READ(in_CONTEXT_DECOD_ENABLE [i]);
+//      can_continue_next                 [i] = PORT_READ(in_CONTEXT_DECOD_ENABLE [i]);
+//         have_decod_branch                 [i] = false;
+        have_decod_branch                 [i] = false;
+      }
 …
                 log_printf(TRACE,Decod,FUNCTION,"  * IFETCH [%d][%d]",x,y);
                 log_printf(TRACE,Decod,FUNCTION,"    * decod_ack [%d] : %d",i,PORT_READ(in_DECOD_ACK [i]));
-//              can_continue [x] = can_continue_next [x];
                 decod_val  [i]    = true;                        // fetch_val and decod_enable
 …
                 Ttype_t      type      = _decod_instruction->_type;
+                Tdepth_t     depth     = (_param->_have_port_depth)?PORT_READ(in_CONTEXT_DEPTH [x]):0; // DEPTH_CURRENT
+                // Depth current. If have decod a branch and i can continue : depth = depth_next
+                Tdepth_t     depth     = (_param->_have_port_depth)?PORT_READ(in_CONTEXT_DEPTH [x]):0;
+                if ((_param->_nb_branch_speculated[x] > 0) and have_decod_branch [x])
+                  depth = (depth+1)%_param->_nb_branch_speculated[x];
                 if (_param->_have_port_context_id)
                 PORT_WRITE(out_DECOD_CONTEXT_ID    [i], x);
 …
                     log_printf(TRACE,Decod,FUNCTION,"      * address dest : %.8x (%.8x)",_decod_instruction->_address_next,_decod_instruction->_address_next<<2);
+                    predict_val [i]     = ifetch_ack  [x][y] // and decod_val [i]
+                    // test if have already decod an branch : one branch per context
+                    predict_val [i]     = not have_decod_branch [x] and ifetch_ack  [x][y] // and decod_val [i]
+                      ;
                     decod_val   [i]    &= PORT_READ(in_PREDICT_ACK [i]);// predict_ack and fetch_val and decod_enable
                     ifetch_ack  [x][y] &= PORT_READ(in_PREDICT_ACK [i]);// predict_ack and fetch_val and decod_enable and decod_ack
+                    decod_val   [i]    &= not have_decod_branch [x] and PORT_READ(in_PREDICT_ACK [i]);// predict_ack and fetch_val and decod_enable
+                    ifetch_ack  [x][y] &= not have_decod_branch [x] and PORT_READ(in_PREDICT_ACK [i]);// predict_ack and fetch_val and decod_enable and decod_ack
                     if (_param->_have_port_context_id)
 …
                     PORT_WRITE(out_PREDICT_ADDRESS_DEST                [i],_decod_instruction->_address_next      );
+                    //can_continue_next [x] = PORT_READ(in_PREDICT_CAN_CONTINUE [i]); // can continue is set if direction is "not take" (also, continue is sequential order)
+                    can_continue [x] = false; // one branch per context, the DS don't execute
+//                  can_continue_next [x] = false; // one branch per context, the DS don't execute
+//                     have_decod_branch [x] = true;
+                    // can continue is set if direction is "not take" (also, continue is sequential order)
+//                  can_continue [x] = false; // one branch per context, the DS don't execute
+                    can_continue [x]&= PORT_READ(in_PREDICT_CAN_CONTINUE [i]); // one branch per context, the DS don't execute
+                    have_decod_branch [x] = true;
+                  }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_statistics_allocation.cpp

r88	r110
33	33	_stat->create_expr_average_by_cycle ("average_nb_inst_decod","sum_inst_decod","","Average of decod instruction by cycle");
34	34	_stat->create_expr_percent ("percent_nb_inst_decod","average_nb_inst_decod", toString(_param->_nb_inst_decod), "Percent of decod instruction by cycle");
35
36
37	35
38	36	log_printf(FUNC,Decod,FUNCTION,"End");

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h

-                      r108
+                      r110
   private   : counter_t                     ** _stat_nb_inst;
   private   : counter_t                      * _stat_use_queue;
+  private   : counter_t                      * _stat_sum_inst_enable;
+  private   : counter_t                      * _stat_sum_transaction_decod_in;
+  private   : counter_t                      * _stat_average_occupation_bundle;
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_statistics_allocation.cpp

-                      r88
+                      r110
                       param_statistics);
+    _stat_sum_transaction_decod_in = _stat->create_variable("sum_transaction_decod_in");
+    _stat_sum_inst_enable          = _stat->create_variable("sum_inst_enable");
+    _stat_average_occupation_bundle= _stat->create_counter ("average_occupation_bundle", "", "Occupation average of instruction's bundle.");
+    _stat->create_expr                 ("average_occupation_bundle" ,"/ sum_inst_enable sum_transaction_decod_in");
+    _stat->create_expr_percent         ("percent_occupation_bundle" ,"average_occupation_bundle", toString(_param->_nb_inst_decod),"Percent of instruction's bundle occupation.");
     _stat_use_queue = _stat->create_variable ("use_queue");
     _stat_nb_inst   = new counter_t * [_param->_nb_context];
 …
         _stat->create_expr_average_by_cycle("average_inst_"+toString(i), "nb_inst_"+toString(i), "", toString(_("Average instruction number in decod_queue by cycle (context %d)"),i));
         _stat->create_expr_percent         ("percent_use_inst_"+toString(i) , "average_inst_"+toString(i), toString(_param->_size_queue), toString(_("Percent decod_queue's occupation (context %d)"),i));
+        _stat->create_expr_percent         ("percent_use_inst_"+toString(i) , "average_inst_"+toString(i), toString(_param->_nb_instruction_in_queue), toString(_("Percent decod_queue's occupation (context %d)"),i));
         if (i == 0)
 …
     _stat->create_expr_average_by_cycle("average_inst", expr_average_inst, "", _("Average instruction number in decod_queue by cycle (all context)"));
     _stat->create_expr_percent         ("percent_use_inst" , "average_inst", toString(_param->_size_queue), _("Percent decod_queue's occupation (all context)"));
+    _stat->create_expr_percent         ("percent_use_inst" , "average_inst", toString(_param->_nb_instruction_in_queue), _("Percent decod_queue's occupation (all context)"));
     _stat->create_expr_average_by_cycle("average_use_queue", "use_queue", "", _("Average slot decod_queue occupation by cycle."));
     _stat->create_expr_percent         ("percent_use_queue", "average_use_queue", toString(_param->_size_queue), _("Percent slot decod_queue occupation."));
+    _stat->create_expr_percent         ("percent_use_queue", "average_use_queue", toString(_param->_nb_instruction_in_queue), _("Percent slot decod_queue occupation."));
     log_end(Decod_queue,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_transition.cpp

-                      r109
+                      r110
                    entry = new decod_queue_entry_t (_param->_nb_inst_decod);
                    reg_QUEUE->push_back(entry);
+#ifdef STATISTICS
+                   if (usage_is_set(_usage,USE_STATISTICS))
+                     (*_stat_sum_transaction_decod_in) ++;
+#endif
+                 }
+#ifdef STATISTICS
+                if (usage_is_set(_usage,USE_STATISTICS))
+                  (*_stat_sum_inst_enable) ++;
+#endif
                 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_IN_CONTEXT_ID [i]):0;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/SelfTest/src/test.cpp

-                      r108
+                      r110
   ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC                ,"out_PREDICT_ADDRESS_SRC                ",Tgeneral_data_t    ,_param->_nb_inst_decod);
   ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST               ,"out_PREDICT_ADDRESS_DEST               ",Tgeneral_data_t    ,_param->_nb_inst_decod);
 //ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ," in_PREDICT_CAN_CONTINUE               ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ," in_PREDICT_CAN_CONTINUE               ",Tcontrol_t         ,_param->_nb_inst_decod);
   ALLOC1_SC_SIGNAL( in_DEPTH_MIN                          ," in_DEPTH_MIN                          ",Tdepth_t           ,_param->_nb_context);
 …
   INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_SRC                ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Decod_unit,out_PREDICT_ADDRESS_DEST               ,_param->_nb_inst_decod);
 //INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Decod_unit, in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
   if (_param->_have_port_depth)
 …
                 in_PREDICT_ACK          [i]->write((rand()%100)<percent_transaction_predict);
 //              in_PREDICT_CAN_CONTINUE [i]->write(0);
+                in_PREDICT_CAN_CONTINUE [i]->write(0);
+              }
+          }
 …
   DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC                ,_param->_nb_inst_decod);
   DELETE1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST               ,_param->_nb_inst_decod);
 //DELETE1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
+  DELETE1_SC_SIGNAL( in_PREDICT_CAN_CONTINUE               ,_param->_nb_inst_decod);
   DELETE1_SC_SIGNAL( in_DEPTH_MIN                          ,_param->_nb_context);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h

r108	r110
118	118	public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_SRC ;//[nb_inst_decod]
119	119	public : SC_OUT(Tgeneral_data_t ) ** out_PREDICT_ADDRESS_DEST ;//[nb_inst_decod]
120		//public : SC_IN (Tcontrol_t ) ** in_PREDICT_CAN_CONTINUE ;//[nb_inst_decod]
	120	public : SC_IN (Tcontrol_t ) ** in_PREDICT_CAN_CONTINUE ;//[nb_inst_decod]
121	121
122	122	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp

-                      r108
+                      r110
       ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC                ,"address_src"                ,Tgeneral_data_t    ,_param->_size_instruction_address    );
       ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST               ,"address_dest"               ,Tgeneral_data_t    ,_param->_size_instruction_address    );
 //    ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE               ,"can_continue"               ,Tcontrol_t         ,1                             );
+      ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE               ,"can_continue"               ,Tcontrol_t         ,1                             );
+    }
 …
           PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST"               ,
                               dest,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST"               );
 //        PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_CAN_CONTINUE"               ,
 //                            dest, "in_PREDICT_"+toString(i)+"_CAN_CONTINUE"               );
+          PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_CAN_CONTINUE"               ,
+                              dest, "in_PREDICT_"+toString(i)+"_CAN_CONTINUE"               );
+        }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_deallocation.cpp

r108	r110
78	78	DELETE1_SIGNAL(out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_decod,_param->_size_instruction_address);
79	79	DELETE1_SIGNAL(out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_decod,_param->_size_instruction_address);
80		// DELETE1_SIGNAL( in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod,1 );
	80	DELETE1_SIGNAL( in_PREDICT_CAN_CONTINUE ,_param->_nb_inst_decod,1 );
81	81
82	82	DELETE1_SIGNAL( in_DEPTH_MIN ,_param->_nb_context,_param->_size_depth);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_statistics_allocation.cpp

r81	r110
42	42	_stat->create_expr ("sum_use_queue" ,"+ + sum_use_queue_wait_rsp sum_use_queue_have_rsp sum_use_queue_error_wait_rsp");
43	43	_stat->create_expr_average_by_cycle("average_use_queue" ,"sum_use_queue" ,"","Average occupation of ifetch queue");
44		_stat->create_expr_percent ("percent_use_queue" ,"average_use_queue" ,toString(_param->_~~size~~_queue),"Percent of occupation of ifetch queue");
	44	_stat->create_expr_percent ("percent_use_queue" ,"average_use_queue" ,toString(_param->_nb_instruction_in_queue),"Percent of occupation of ifetch queue");
45	45	_stat->create_expr_percent ("percent_use_queue_wait_rsp" ,"sum_use_queue_wait_rsp" ,"sum_use_queue","Part of ifetch queue that wait the respons icache");
46	46	_stat->create_expr_percent ("percent_use_queue_have_rsp" ,"sum_use_queue_have_rsp" ,"sum_use_queue","Part of ifetch queue that wait the decod");

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Makefile.deps

-                      r81
+                      r110
 include                         $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue/Makefile.deps
 endif
 #ifndef Meta_Predictor
 #include                                $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Makefile.deps
 #endif
+ifndef Meta_Predictor
+include                         $(DIR_MORPHEO)/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Makefile.deps
+endif
 #-----[ Directory ]----------------------------------------
 …
 Direction_LIBRARY               =       -lDirection                     \
                                         $(Behavioural_LIBRARY)          \
                                         $(Direction_Glue_LIBRARY)
 #                                       $(Meta_Predictor_LIBRARY)
+                                        $(Direction_Glue_LIBRARY)       \
+                                        $(Meta_Predictor_LIBRARY)
 Direction_DIR_LIBRARY           =       -L$(Direction_DIR)/lib          \
                                         $(Behavioural_DIR_LIBRARY)      \
                                         $(Direction_Glue_DIR_LIBRARY)
 #                                       $(Meta_Predictor_DIR_LIBRARY)
+                                        $(Direction_Glue_DIR_LIBRARY)   \
+                                        $(Meta_Predictor_DIR_LIBRARY)
 #-----[ Rules ]--------------------------------------------
 …
                                 $(MAKE) Direction_Glue_library;         \
                                 $(MAKE) --directory=$(Direction_DIR) --makefile=Makefile;
 #                               $(MAKE) Meta_Predictor_library;         \
+                                $(MAKE) Meta_Predictor_library;         \
 Direction_library_clean :
 …
                                 $(MAKE) Direction_Glue_library_clean;   \
                                 $(MAKE) --directory=$(Direction_DIR) --makefile=Makefile clean;
 #                               $(MAKE) Meta_Predictor_library_clean;   \
+                                $(MAKE) Meta_Predictor_library_clean;   \

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/SelfTest/src/test.cpp

-                      r100
+                      r110
   ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                ," in_DECOD_ADDRESS_SRC                ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST               ," in_DECOD_ADDRESS_DEST               ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL(out_DECOD_CAN_CONTINUE               ,"out_DECOD_CAN_CONTINUE               ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   ALLOC1_SC_SIGNAL(out_DECOD_BTB_VAL                    ,"out_DECOD_BTB_VAL                    ",Tcontrol_t         ,_param->_nb_inst_branch_decod);
   ALLOC1_SC_SIGNAL( in_DECOD_BTB_ACK                    ," in_DECOD_BTB_ACK                    ",Tcontrol_t         ,_param->_nb_inst_branch_decod);
 …
   ALLOC1_SC_SIGNAL(out_DECOD_UPT_UPDATE_PREDICTION_ID   ,"out_DECOD_UPT_UPDATE_PREDICTION_ID   ",Tprediction_ptr_t  ,_param->_nb_inst_branch_decod);
   ALLOC1_SC_SIGNAL(out_DECOD_UPT_IS_ACCURATE            ,"out_DECOD_UPT_IS_ACCURATE            ",Tcontrol_t         ,_param->_nb_inst_branch_decod);
+  ALLOC1_SC_SIGNAL( in_DECOD_UPT_CAN_CONTINUE           ," in_DECOD_UPT_CAN_CONTINUE           ",Tcontrol_t         ,_param->_nb_inst_branch_decod);
   ALLOC1_SC_SIGNAL(out_UPDATE_BTB_VAL                  ,"out_UPDATE_BTB_VAL                  ",Tcontrol_t         ,_param->_nb_inst_branch_update);
 …
   INSTANCE2_SC_SIGNAL(_Prediction_unit_Glue, in_DECOD_ADDRESS_SRC                ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Prediction_unit_Glue, in_DECOD_ADDRESS_DEST               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit_Glue,out_DECOD_CAN_CONTINUE               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_DECOD_BTB_VAL                    ,_param->_nb_inst_branch_decod);
   INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_DECOD_BTB_ACK                    ,_param->_nb_inst_branch_decod);
 …
   INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_DECOD_UPT_UPDATE_PREDICTION_ID   ,_param->_nb_inst_branch_decod);
   INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_DECOD_UPT_IS_ACCURATE            ,_param->_nb_inst_branch_decod);
+  INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue, in_DECOD_UPT_CAN_CONTINUE           ,_param->_nb_inst_branch_decod);
   INSTANCE1_SC_SIGNAL(_Prediction_unit_Glue,out_UPDATE_BTB_VAL                  ,_param->_nb_inst_branch_update);
 …
   DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL(out_DECOD_CAN_CONTINUE               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   DELETE1_SC_SIGNAL(out_DECOD_BTB_VAL                    ,_param->_nb_inst_branch_decod);
   DELETE1_SC_SIGNAL( in_DECOD_BTB_ACK                    ,_param->_nb_inst_branch_decod);
 …
   DELETE1_SC_SIGNAL(out_DECOD_UPT_UPDATE_PREDICTION_ID   ,_param->_nb_inst_branch_decod);
   DELETE1_SC_SIGNAL(out_DECOD_UPT_IS_ACCURATE            ,_param->_nb_inst_branch_decod);
+  DELETE1_SC_SIGNAL( in_DECOD_UPT_CAN_CONTINUE           ,_param->_nb_inst_branch_decod);
   DELETE1_SC_SIGNAL(out_UPDATE_BTB_VAL                  ,_param->_nb_inst_branch_update);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/include/Prediction_unit_Glue.h

-                      r88
+                      r110
   public    : SC_IN (Taddress_t         ) ***  in_DECOD_ADDRESS_SRC                   ; //[nb_decod_unit][nb_inst_decod]
   public    : SC_IN (Taddress_t         ) ***  in_DECOD_ADDRESS_DEST                  ; //[nb_decod_unit][nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         ) *** out_DECOD_CAN_CONTINUE                  ; //[nb_decod_unit][nb_inst_decod]
   public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_BTB_VAL                       ; //[nb_inst_branch_decod]
 …
   public    : SC_OUT(Tprediction_ptr_t  )  ** out_DECOD_UPT_UPDATE_PREDICTION_ID      ; //[nb_inst_branch_decod]
   public    : SC_OUT(Tcontrol_t         )  ** out_DECOD_UPT_IS_ACCURATE               ; //[nb_inst_branch_decod]
+  public    : SC_IN (Tcontrol_t         )  **  in_DECOD_UPT_CAN_CONTINUE              ; //[nb_inst_branch_decod]
     // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue.cpp

-                      r88
+                      r110
                       << (*(in_DECOD_RAS_ADDRESS_POP             [i]   ))
 //                    << (*(in_DECOD_RAS_INDEX                   [i]   ))
+                      << (*(in_DECOD_UPT_ACK                     [i]   )) ;
+                      << (*(in_DECOD_UPT_ACK                     [i]   ))
+                      << (*(in_DECOD_UPT_CAN_CONTINUE            [i]   )) ;
+          }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_allocation.cpp

r98	r110
149	149	_ALLOC2_SIGNAL_IN ( in_DECOD_ADDRESS_SRC ,"address_src" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
150	150	_ALLOC2_SIGNAL_IN ( in_DECOD_ADDRESS_DEST ,"address_dest" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
	151	_ALLOC2_SIGNAL_OUT(out_DECOD_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1 ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
151	152	}
152	153
…	…
195	196	ALLOC1_SIGNAL_OUT(out_DECOD_UPT_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t ,_param->_size_depth );
196	197	ALLOC1_SIGNAL_OUT(out_DECOD_UPT_IS_ACCURATE ,"is_accurate" ,Tcontrol_t ,1);
	198	ALLOC1_SIGNAL_IN ( in_DECOD_UPT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1);
197	199	}
198	200	}

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_deallocation.cpp

-                      r88
+                      r110
         DELETE2_SIGNAL( in_DECOD_ADDRESS_SRC                ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1],_param->_size_instruction_address         );
         DELETE2_SIGNAL( in_DECOD_ADDRESS_DEST               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1],_param->_size_instruction_address         );
+        DELETE2_SIGNAL(out_DECOD_CAN_CONTINUE               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1],1);
         DELETE1_SIGNAL(out_DECOD_BTB_VAL            ,_param->_nb_inst_branch_decod,1);
         DELETE1_SIGNAL( in_DECOD_BTB_ACK            ,_param->_nb_inst_branch_decod,1);
 …
         DELETE1_SIGNAL(out_DECOD_UPT_UPDATE_PREDICTION_ID,_param->_nb_inst_branch_decod,_param->_size_depth);
         DELETE1_SIGNAL(out_DECOD_UPT_IS_ACCURATE         ,_param->_nb_inst_branch_decod,1);
+        DELETE1_SIGNAL( in_DECOD_UPT_CAN_CONTINUE        ,_param->_nb_inst_branch_decod,1);
         // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_decod.cpp

-                      r107
+                      r110
           //   * branch was not detected
           Tcontrol_t        miss_decod            = (branch_state == BRANCH_STATE_NONE);
+          Tcontrol_t        can_continue          = false;
           log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"  * DECOD [%d][%d]          : valid",decod_unit,i);
 …
+            {
               Tbranch_condition_t condition    = PORT_READ(in_DECOD_BRANCH_CONDITION            [decod_unit][i]);
               Tcontrol_t          direction    = PORT_READ(in_DECOD_BRANCH_DIRECTION            [decod_unit][i]);
+              Tcontrol_t          take;
               Taddress_t          address_src  = PORT_READ(in_DECOD_ADDRESS_SRC                 [decod_unit][i]);
               Taddress_t          address_dest = PORT_READ(in_DECOD_ADDRESS_DEST                [decod_unit][i]);
 …
                     log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"      * BRANCH_CONDITION_NONE_WITH_WRITE_STACK");
+                    take        = true ;
                     is_accurate = true ;//PORT_READ(in_DECOD_RAS_HIT [port]);
                     use_ras     = true ;
 …
                     log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"      * BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK");
+                    take        = true ;
                     is_accurate = false; // address unknow : in a register
                     use_ras     = true;
 …
                     log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"      * BRANCH_CONDITION_READ_STACK");
+                    take        = true ;
                     is_accurate = PORT_READ(in_DECOD_RAS_HIT [port]);
                     use_ras     = true;
 …
                     //   * READ_REGISTER_WITHOUT_WRITE_STACK : Take but destination is unknow - don't continue
+                    take        = true ;
                     is_accurate = false; // address unknow : in a register
 …
                     log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"      * BRANCH_CONDITION_FLAG");
+                    take        = PORT_READ(in_DECOD_BRANCH_DIRECTION [decod_unit][i]);
                     is_accurate = true; // address dest is know
 …
                     log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"      * BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK");
+                    take        = true;
                     is_accurate = true;
 …
+                  }
+                }
+              log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * take         : %d",take);
               if (use_btb)
 …
                   PORT_WRITE(out_DECOD_BTB_ADDRESS_DEST    [port],address_dest);
                   PORT_WRITE(out_DECOD_BTB_CONDITION       [port],condition);
                   PORT_WRITE(out_DECOD_BTB_LAST_TAKE       [port],direction);
+                  PORT_WRITE(out_DECOD_BTB_LAST_TAKE       [port],take);
                   PORT_WRITE(out_DECOD_BTB_MISS_PREDICTION [port],1);
                   PORT_WRITE(out_DECOD_BTB_IS_ACCURATE     [port],is_accurate);
 …
                   PORT_WRITE(out_DECOD_UPT_BTB_ADDRESS_DEST[port],address_dest);
                   PORT_WRITE(out_DECOD_UPT_BTB_CONDITION   [port],condition);
                   PORT_WRITE(out_DECOD_UPT_BTB_LAST_TAKE   [port],direction);
+                  PORT_WRITE(out_DECOD_UPT_BTB_LAST_TAKE   [port],take);
                   PORT_WRITE(out_DECOD_UPT_RAS_ADDRESS     [port],PORT_READ(in_DECOD_RAS_ADDRESS_POP [port]));
                   PORT_WRITE(out_DECOD_UPT_IS_ACCURATE     [port],is_accurate);
+                }
+              can_continue = false; // need update upt
+            }
+//        else
+//          {
+//               log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * hit");
+          else
+            {
+              log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * hit");
+              if (branch_state == BRANCH_STATE_SPEC_NTAKE)
+                can_continue = PORT_READ(in_DECOD_UPT_CAN_CONTINUE [port]);
+              else
+                // BRANCH_STATE_NONE       -> miss
+                // BRANCH_STATE_NSPEC_TAKE -> take
+                // BRANCH_STATE_SPEC_TAKE  -> take
+                can_continue = false;
 //            miss_decod = false;
 //            // Hit speculation
 //          }
+            }
           // in all case
+          log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * use_btb : %d",use_btb);
+          log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * use_ras : %d",use_ras);
+          log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * use_upt : %d",use_upt);
+          log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * can_continue : %d",can_continue);
+          log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * use_btb      : %d",use_btb);
+          log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * use_ras      : %d",use_ras);
+          log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * use_upt      : %d",use_upt);
           log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * btb_ack [%d] : %d",port,PORT_READ(in_DECOD_BTB_ACK [port]));
           log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * ras_ack [%d] : %d",port,PORT_READ(in_DECOD_RAS_ACK [port]));
 …
           if (_param->_have_port_depth)
           PORT_WRITE(out_DECOD_UPT_UPDATE_PREDICTION_ID [port],depth);
+          PORT_WRITE(out_DECOD_CAN_CONTINUE [decod_unit][i], can_continue);
           port ++; // have find port
+        }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/SelfTest/src/test.cpp

-                      r101
+                      r110
   ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                  ," in_DECOD_ADDRESS_SRC                  ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   ALLOC2_SC_SIGNAL( in_DECOD_ADDRESS_DEST                 ," in_DECOD_ADDRESS_DEST                 ",Taddress_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  ALLOC2_SC_SIGNAL(out_DECOD_CAN_CONTINUE                 ," in_DECOD_CAN_CONTINUE                 ",Tcontrol_t         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL                ," in_BRANCH_COMPLETE_VAL                ",Tcontrol_t         ,_param->_nb_inst_branch_complete);
 …
   INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_SRC                  ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   INSTANCE2_SC_SIGNAL(_Prediction_unit, in_DECOD_ADDRESS_DEST                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  INSTANCE2_SC_SIGNAL(_Prediction_unit,out_DECOD_CAN_CONTINUE                 ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   INSTANCE1_SC_SIGNAL(_Prediction_unit, in_BRANCH_COMPLETE_VAL                ,_param->_nb_inst_branch_complete);
 …
   DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_SRC                ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   DELETE2_SC_SIGNAL( in_DECOD_ADDRESS_DEST               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+  DELETE2_SC_SIGNAL(out_DECOD_CAN_CONTINUE               ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
   DELETE1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/src/test.cpp

-                      r107
+                      r110
 //ALLOC1_SC_SIGNAL(out_DECOD_DEPTH                    ,"out_DECOD_DEPTH                    ",Tdepth_t           ,_param->_nb_inst_decod);
   ALLOC1_SC_SIGNAL( in_DECOD_IS_ACCURATE              ," in_DECOD_IS_ACCURATE              ",Tcontrol_t         ,_param->_nb_inst_decod);
+  ALLOC1_SC_SIGNAL(out_DECOD_CAN_CONTINUE             ,"out_DECOD_CAN_CONTINUE             ",Tcontrol_t         ,_param->_nb_inst_decod);
   ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL            ," in_BRANCH_COMPLETE_VAL            ",Tcontrol_t         ,_param->_nb_inst_branch_complete);
 …
 //INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_DEPTH                    ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_IS_ACCURATE              ,_param->_nb_inst_decod);
+  INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_CAN_CONTINUE             ,_param->_nb_inst_decod);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_VAL            ,_param->_nb_inst_branch_complete);
   INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ACK            ,_param->_nb_inst_branch_complete);
 …
   delete []  in_DECOD_RAS_ADDRESS           ;
   delete []  in_DECOD_RAS_INDEX             ;
-  delete []  in_DECOD_MISS_IFETCH           ;
   delete []  in_DECOD_MISS_DECOD            ;
   delete []  in_DECOD_UPDATE_PREDICTION_ID  ;
 //delete [] out_DECOD_DEPTH                 ;
   delete []  in_DECOD_IS_ACCURATE           ;
+  delete [] out_DECOD_CAN_CONTINUE          ;
   // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   delete []  in_BRANCH_COMPLETE_VAL            ;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h

r109	r110
99	99	//public : SC_OUT(Tdepth_t ) ** out_DECOD_DEPTH ; //[nb_inst_decod]
100	100	public : SC_IN (Tcontrol_t ) ** in_DECOD_IS_ACCURATE ; //[nb_inst_decod]
	101	public : SC_OUT(Tcontrol_t ) ** out_DECOD_CAN_CONTINUE ; //[nb_inst_decod]
101	102
102	103	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp

r109	r110
92	92	// ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth);
93	93	ALLOC1_SIGNAL_IN ( in_DECOD_IS_ACCURATE ,"is_accurate" ,Tcontrol_t ,1);
	94	ALLOC1_SIGNAL_OUT(out_DECOD_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1);
94	95	}
95	96

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp

r109	r110
64	64	// delete [] out_DECOD_DEPTH ;
65	65	delete [] in_DECOD_IS_ACCURATE ;
	66	delete [] out_DECOD_CAN_CONTINUE ;
66	67
67	68	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_genMealy_decod.cpp

-                      r105
+                      r110
         event_state_t event_state = reg_EVENT_STATE [context];
         uint32_t      ptr_write   = reg_UPT_TOP     [context];
+        // can continue if next slot is empty
+        Tcontrol_t    can_continue= ((reg_UPDATE_PREDICTION_TABLE [context][(reg_UPT_TOP [context]+1)%_param->_size_upt_queue[context]]._state == UPDATE_PREDICTION_STATE_EMPTY) and
+                                     (reg_EVENT_STATE [context] == EVENT_STATE_OK));
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * context     : %d",context    );
 …
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * ptr_write   : %d",ptr_write  );
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * upt_state   : %s",toString(reg_UPDATE_PREDICTION_TABLE [context][ptr_write]._state).c_str());
+        log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * can_continue: %d",can_continue);
         // ack :
 …
         log_printf(TRACE,Update_Prediction_Table,FUNCTION,"  * ack         : %d",internal_DECOD_ACK [i]);
+        PORT_WRITE(out_DECOD_ACK [i], internal_DECOD_ACK [i]);
+        PORT_WRITE(out_DECOD_ACK          [i], internal_DECOD_ACK [i]);
+        PORT_WRITE(out_DECOD_CAN_CONTINUE [i], can_continue);
+      }
+      }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/include/Prediction_unit.h

-                      r101
+                      r110
   public    : SC_IN (Taddress_t         ) ***  in_DECOD_ADDRESS_SRC                   ; //[nb_decod_unit][nb_inst_decod]
   public    : SC_IN (Taddress_t         ) ***  in_DECOD_ADDRESS_DEST                  ; //[nb_decod_unit][nb_inst_decod]
+  public    : SC_OUT(Tcontrol_t         ) *** out_DECOD_CAN_CONTINUE                  ; //[nb_decod_unit][nb_inst_decod]
     // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 …
     // ~~~~~[ Interface : "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   public    : SC_IN (Tcontrol_t         )  **  in_EVENT_VAL                      ; //[nb_context]
   public    : SC_OUT(Tcontrol_t         )  ** out_EVENT_ACK                      ; //[nb_context]
   public    : SC_IN (Tevent_type_t      )  **  in_EVENT_TYPE                     ; //[nb_context]
   public    : SC_IN (Tdepth_t           )  **  in_EVENT_DEPTH                    ; //[nb_context]
+  public    : SC_IN (Tcontrol_t         )  **  in_EVENT_VAL                           ; //[nb_context]
+  public    : SC_OUT(Tcontrol_t         )  ** out_EVENT_ACK                           ; //[nb_context]
+  public    : SC_IN (Tevent_type_t      )  **  in_EVENT_TYPE                          ; //[nb_context]
+  public    : SC_IN (Tdepth_t           )  **  in_EVENT_DEPTH                         ; //[nb_context]
     // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_allocation.cpp

-                      r101
+                      r110
         _ALLOC2_SIGNAL_IN ( in_DECOD_ADDRESS_SRC                ,"address_src"                ,Taddress_t         ,_param->_size_address         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
         _ALLOC2_SIGNAL_IN ( in_DECOD_ADDRESS_DEST               ,"address_dest"               ,Taddress_t         ,_param->_size_address         ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+        _ALLOC2_SIGNAL_OUT(out_DECOD_CAN_CONTINUE               ,"can_continue"               ,Tcontrol_t         ,1                             ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1]);
+      }
+    }
 …
           COMPONENT_MAP(_component,src , "in_DECOD_"    +toString(i)+"_IS_ACCURATE"         ,
                                    dest,"out_DECOD_UPT_"+toString(i)+"_IS_ACCURATE"         );
+          COMPONENT_MAP(_component,src ,"out_DECOD_"    +toString(i)+"_CAN_CONTINUE"        ,
+                                   dest, "in_DECOD_UPT_"+toString(i)+"_CAN_CONTINUE"        );
           //out_DECOD_UPT_RAS_INDEX - component_map return_address_stack
 …
             PORT_MAP(_component,src , "in_DECOD_"+toString(i)+"_"+toString(j)+"_ADDRESS_DEST"               ,
                                 dest, "in_DECOD_"+toString(i)+"_"+toString(j)+"_ADDRESS_DEST"               );
+            PORT_MAP(_component,src ,"out_DECOD_"+toString(i)+"_"+toString(j)+"_CAN_CONTINUE"               ,
+                                dest,"out_DECOD_"+toString(i)+"_"+toString(j)+"_CAN_CONTINUE"               );
+          }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/src/Prediction_unit_deallocation.cpp

r101	r110
50	50	DELETE2_SIGNAL( in_DECOD_ADDRESS_SRC ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1],_param->_size_instruction_address );
51	51	DELETE2_SIGNAL( in_DECOD_ADDRESS_DEST ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1],_param->_size_instruction_address );
	52	DELETE2_SIGNAL(out_DECOD_CAN_CONTINUE ,_param->_nb_decod_unit,_param->_nb_inst_decod[it1],1);
52	53
53	54	DELETE1_SIGNAL( in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete,1);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/src/Front_end_allocation.cpp

-                      r108
+                      r110
           COMPONENT_MAP(_component,src ,"out_PREDICT_"+toString(j)+                "_ADDRESS_DEST"               ,
                                    dest, "in_DECOD_"  +toString(i)+"_"+toString(j)+"_ADDRESS_DEST"               );
 //        COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(j)+                "_CAN_CONTINUE"               ,
 //                                 dest,"out_DECOD_"  +toString(i)+"_"+toString(j)+"_CAN_CONTINUE"               );
+          COMPONENT_MAP(_component,src , "in_PREDICT_"+toString(j)+                "_CAN_CONTINUE"               ,
+                                   dest,"out_DECOD_"  +toString(i)+"_"+toString(j)+"_CAN_CONTINUE"               );
+        }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/main.cpp

-                      r108
+                      r110
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
 #define NB_PARAMS 16
 …
   uint32_t          _nb_rename_unit_select   = fromString<uint32_t         >(argv[x++]);
+  uint32_t          _nb_thread                          ;
+  uint32_t       ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context]
+  ALLOC2(_translate_num_context_to_num_thread,uint32_t,_nb_front_end,_nb_context[it1]);
+  _nb_thread = 0;
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    for (uint32_t j=0; j<_nb_context [i]; j++)
+      _translate_num_context_to_num_thread [i][j] = _nb_thread ++;
   int _return = EXIT_SUCCESS;
   try
 …
          _load_balancing          ,
          _nb_rename_unit_select   ,
+         _nb_thread                          ,
+         _translate_num_context_to_num_thread,
          true // is_toplevel
          );
 …
+    }
+  DELETE2(_translate_num_context_to_num_thread,_nb_front_end,_nb_context[it1]);
   delete [] _nb_context    ;
   delete [] _nb_inst_insert;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/src/test.cpp

-                      r108
+                      r110
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/SelfTest/include/test.h"
 #include "Behavioural/include/Allocation.h"
+#include "Behavioural/include/Simulation.h"
 #include "Common/include/Max.h"
 …
   morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
 #endif
+  simulation_init(0,0);
+  debug_idle_cycle = CYCLE_MAX;
   Tusage_t _usage = USE_ALL;
 …
   delete _Commit_unit;
 #ifdef STATISTICS
   delete _parameters_statistics;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h

-                      r109
+                      r110
 #ifdef STATISTICS
   public    : Stat                           * _stat;
+  public    : counter_t                     ** _stat_nb_inst_insert;
+  public    : counter_t                      * _stat_nb_inst_commit;
+  public    : counter_t                     ** _stat_nb_inst_insert               ;//[nb_rename_unit]
+  public    : counter_t                     ** _stat_nb_inst_retire               ;//[nb_rename_unit]
+  public    : counter_t                      * _stat_nb_inst_commit               ;
   public    : counter_t                      * _stat_nb_inst_commit_conflit_access;
+  public    : counter_t                     ** _stat_nb_inst_retire_ok;
+  public    : counter_t                     ** _stat_nb_inst_retire_ko;
+  public    : counter_t                     ** _stat_bank_nb_inst;// [nb_bank]
+  public    : counter_t                     ** _stat_nb_inst_retire_ok            ;//[nb_thread]
+  public    : counter_t                     ** _stat_nb_inst_retire_ko            ;//[nb_thread]
+  public    : counter_t                     ** _stat_nb_inst_type                 ;//[nb_type]
+  public    : counter_t                     ** _stat_bank_nb_inst                 ;//[nb_bank]
 #endif
 …
   private   : entry_t *                    ** internal_BANK_COMMIT_ENTRY           ;//[nb_bank][nb_bank_access_commit]
+  private   : uint32_t                        internal_BANK_RETIRE_HEAD            ;
   private   : Tcontrol_t                    * internal_BANK_RETIRE_VAL             ;//[nb_bank]
   private   : uint32_t                      * internal_BANK_RETIRE_NUM_RENAME_UNIT ;//[nb_bank]

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h

-                      r108
+                      r110
+  {
     //-----[ fields ]------------------------------------------------------------
+  public : uint32_t            _nb_front_end            ;
+  public : uint32_t          * _nb_context              ;//[nb_front_end]
+  public : uint32_t            _nb_rename_unit          ;
+  public : uint32_t            _size_queue              ;
+  public : uint32_t            _nb_bank                 ;
+  public : uint32_t          * _nb_inst_insert          ;//[nb_rename_unit]
+  public : uint32_t          * _nb_inst_retire          ;//[nb_rename_unit]
+  public : uint32_t            _nb_inst_commit          ;
+  public : uint32_t            _nb_inst_reexecute       ;
+  public : uint32_t            _nb_inst_branch_complete ;
+  public : uint32_t         ** _nb_branch_speculated    ;//[nb_front_end][nb_context]
+//public : uint32_t            _size_general_data       ;
+//public : uint32_t            _size_store_queue_ptr    ;
+//public : uint32_t            _size_load_queue_ptr     ;
+//public : uint32_t            _size_general_register   ;
+//public : uint32_t            _size_special_register   ;
+  public : Tpriority_t         _priority                ;
+  public : Tload_balancing_t   _load_balancing          ;
+  public : uint32_t            _nb_rename_unit_select   ;
+  public : const uint32_t      _nb_bank_access_commit   ;
+  public : const retire_ooo_t  _retire_ooo              ;
+  public : uint32_t            _nb_front_end                       ;
+  public : uint32_t          * _nb_context                         ;//[nb_front_end]
+  public : uint32_t            _nb_rename_unit                     ;
+  public : uint32_t            _size_queue                         ;
+  public : uint32_t            _nb_bank                            ;
+  public : uint32_t          * _nb_inst_insert                     ;//[nb_rename_unit]
+  public : uint32_t          * _nb_inst_retire                     ;//[nb_rename_unit]
+  public : uint32_t            _nb_inst_commit                     ;
+  public : uint32_t            _nb_inst_reexecute                  ;
+  public : uint32_t            _nb_inst_branch_complete            ;
+  public : uint32_t         ** _nb_branch_speculated               ;//[nb_front_end][nb_context]
+//public : uint32_t            _size_general_data                  ;
+//public : uint32_t            _size_store_queue_ptr               ;
+//public : uint32_t            _size_load_queue_ptr                ;
+//public : uint32_t            _size_general_register              ;
+//public : uint32_t            _size_special_register              ;
+  public : Tpriority_t         _priority                           ;
+  public : Tload_balancing_t   _load_balancing                     ;
+  public : uint32_t            _nb_rename_unit_select              ;
+  public : uint32_t            _nb_thread                          ;
+  public : uint32_t         ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context]
+  public : const uint32_t      _nb_bank_access_commit              ;
+  public : const retire_ooo_t  _retire_ooo                         ;
   public : uint32_t            _max_nb_context          ;
 …
 //public : bool             ** _have_port_depth         ;//[nb_front_end][nb_context]
+  public : bool              * _have_thread             ;//[nb_thread]
     //-----[ methods ]-----------------------------------------------------------
+  public : Parameters  (uint32_t            nb_front_end            ,
+                        uint32_t          * nb_context              ,
+                        uint32_t            nb_rename_unit          ,
+                        uint32_t            size_queue              ,
+                        uint32_t            nb_bank                 ,
+                        uint32_t          * nb_inst_insert          ,
+                        uint32_t          * nb_inst_retire          ,
+                        uint32_t            nb_inst_commit          ,
+                        uint32_t            nb_inst_reexecute       ,
+                        uint32_t            nb_inst_branch_complete ,
+                        uint32_t         ** nb_branch_speculated    ,
+                        uint32_t            size_nb_inst_decod      ,
+                        uint32_t            size_general_data       ,
+                        uint32_t            size_store_queue_ptr    ,
+                        uint32_t            size_load_queue_ptr     ,
+                        uint32_t            size_general_register   ,
+                        uint32_t            size_special_register   ,
+                        Tpriority_t         priority                ,
+                        Tload_balancing_t   load_balancing          ,
+                        uint32_t            nb_rename_unit_select   ,
+  public : Parameters  (uint32_t            nb_front_end                       ,
+                        uint32_t          * nb_context                         ,//[nb_front_end]
+                        uint32_t            nb_rename_unit                     ,
+                        uint32_t            size_queue                         ,
+                        uint32_t            nb_bank                            ,
+                        uint32_t          * nb_inst_insert                     ,//[nb_rename_unit]
+                        uint32_t          * nb_inst_retire                     ,//[nb_rename_unit]
+                        uint32_t            nb_inst_commit                     ,
+                        uint32_t            nb_inst_reexecute                  ,
+                        uint32_t            nb_inst_branch_complete            ,
+                        uint32_t         ** nb_branch_speculated               ,//[nb_front_end][nb_context]
+                        uint32_t            size_nb_inst_decod                 ,
+                        uint32_t            size_general_data                  ,
+                        uint32_t            size_store_queue_ptr               ,
+                        uint32_t            size_load_queue_ptr                ,
+                        uint32_t            size_general_register              ,
+                        uint32_t            size_special_register              ,
+                        Tpriority_t         priority                           ,
+                        Tload_balancing_t   load_balancing                     ,
+                        uint32_t            nb_rename_unit_select              ,
+                        uint32_t            nb_thread                          ,
+                        uint32_t         ** translate_num_context_to_num_thread, //[nb_front_end][nb_context]
                         bool                is_toplevel=false
                         );

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit.cpp

-                      r104
+                      r110
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+#include "Behavioural/include/Simulation.h"
 namespace morpheo                    {
 …
 #endif
+        // Init stop condition
+        while (_simulation_nb_instruction_commited.size() < _param->_nb_thread)
+          _simulation_nb_instruction_commited.push_back(0);
+      }
     log_end(Commit_unit,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_genMealy_retire.cpp

r105	r110
57	57	}
58	58	// Scan Top of each bank
	59	internal_BANK_RETIRE_HEAD = reg_NUM_BANK_HEAD;
59	60	for (uint32_t i=0; i<_param->_nb_bank; i++)
60	61	{
61		uint32_t num_bank = (~~reg_NUM_BANK~~_HEAD+i)%_param->_nb_bank;
	62	uint32_t num_bank = (internal_BANK_RETIRE_HEAD+i)%_param->_nb_bank;
62	63
63	64	if (not _rob[num_bank].empty())
…	…
167	168	PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_OLD [x][y], entry->num_reg_re_phy_old );
168	169	PORT_WRITE(out_RETIRE_NUM_REG_RE_PHY_NEW [x][y], entry->num_reg_re_phy_new );
	170
	171	// Event -> rob must be manage this event
	172	if ((state == ROB_END_BRANCH_MISS) or
	173	(state == ROB_END_LOAD_MISS))
	174	can_retire [x] = false;
169	175	}
170	176	}

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_allocation.cpp

-                      r109
+                      r110
     _stat_nb_inst_insert                = new counter_t * [_param->_nb_rename_unit];
+    _stat_nb_inst_retire_ok             = new counter_t * [_param->_nb_rename_unit];
+    _stat_nb_inst_retire_ko             = new counter_t * [_param->_nb_rename_unit];
+    _stat_nb_inst_retire                = new counter_t * [_param->_nb_rename_unit];
+    _stat_nb_inst_retire_ok             = new counter_t * [_param->_nb_thread];
+    _stat_nb_inst_retire_ko             = new counter_t * [_param->_nb_thread];
+    _stat_nb_inst_type                  = new counter_t * [_param->_nb_type];
     _stat_bank_nb_inst                  = new counter_t * [_param->_nb_bank];
+    {
       std::string sum_nb_inst_insert    = "0";
+      std::string sum_nb_inst_retire_ok = "0";
+      std::string sum_nb_inst_retire_ko = "0";
+      std::string sum_nb_inst_retire    = "0";
       for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+        {
           _stat_nb_inst_insert    [i] = _stat->create_variable("nb_inst_insert_"   +toString(i));
+          _stat_nb_inst_retire_ok [i] = _stat->create_variable("nb_inst_retire_ok_"+toString(i));
+          _stat_nb_inst_retire_ko [i] = _stat->create_variable("nb_inst_retire_ko_"+toString(i));
+          _stat_nb_inst_retire    [i] = _stat->create_variable("nb_inst_retire_"   +toString(i));
           _stat->create_expr_average_by_cycle("average_use_interface_insert_"+toString(i), "nb_inst_insert_"+toString(i), "", toString(_("Average instruction by cycle on insert interface (rename_unit %d)"),i));
           _stat->create_expr_average_by_cycle("average_use_interface_retire_"+toString(i), "+ nb_inst_retire_ok_"+toString(i)+" nb_inst_retire_ko_"+toString(i), "", toString(_("Average instruction by cycle on retire interface (rename_unit %d)"),i));
+          _stat->create_expr_average_by_cycle("average_use_interface_retire_"+toString(i), "nb_inst_retire_"+toString(i), "", toString(_("Average instruction by cycle on retire interface (rename_unit %d)"),i));
           _stat->create_expr_percent         ("percent_use_interface_insert_"+toString(i) , "average_use_interface_insert_"+toString(i), toString(_param->_nb_inst_insert [i]), toString(_("Percent usage of insert interface (rename_unit %d)"),i));
           _stat->create_expr_percent         ("percent_use_interface_retire_"+toString(i) , "average_use_interface_retire_"+toString(i), toString(_param->_nb_inst_retire [i]), toString(_("Percent usage of retire interface (rename_unit %d)"),i));
           sum_nb_inst_insert    = "+ nb_inst_insert_"+   toString(i) + " " +sum_nb_inst_insert;
+          sum_nb_inst_retire_ok = "+ nb_inst_retire_ok_"+toString(i) + " " +sum_nb_inst_retire_ok;
+          sum_nb_inst_retire_ko = "+ nb_inst_retire_ko_"+toString(i) + " " +sum_nb_inst_retire_ko;
+        }
+          sum_nb_inst_retire    = "+ nb_inst_retire_"+   toString(i) + " " +sum_nb_inst_retire;
+        }
       _stat->create_expr_average_by_cycle("average_inst_insert"   , sum_nb_inst_insert   , "", _("Average instruction insert by cycle"));
+      _stat->create_expr_average_by_cycle("average_inst_retire_ok", sum_nb_inst_retire_ok, "", _("Average instruction retire ok by cycle (IPC)"));
+      _stat->create_expr_average_by_cycle("average_inst_retire_ko", sum_nb_inst_retire_ko, "", _("Average instruction retire ko (event, miss) by cycle"));
+      _stat->create_expr_average_by_cycle("average_inst_retire"   , "+ "+sum_nb_inst_retire_ok+" "+sum_nb_inst_retire_ko, "", _("Average instruction retire by cycle"));
+      _stat->create_expr_average_by_cycle("average_inst_retire"   , sum_nb_inst_retire   , "", _("Average instruction retire by cycle"));
+    }
+      _stat->create_expr                 ("IPC_ok" , "average_inst_retire_ok", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok)");
+    {
+      std::string sum_nb_inst_retire_ok = "0";
+      std::string sum_nb_inst_retire_ko = "0";
+      for (uint32_t i=0; i<_param->_nb_thread; i++)
+        if (_param->_have_thread [i])
+          {
+            _stat_nb_inst_retire_ok [i] = _stat->create_variable("nb_inst_retire_ok_"+toString(i));
+            _stat_nb_inst_retire_ko [i] = _stat->create_variable("nb_inst_retire_ko_"+toString(i));
+            sum_nb_inst_retire_ok = "+ nb_inst_retire_ok_"+toString(i) + " " +sum_nb_inst_retire_ok;
+            sum_nb_inst_retire_ko = "+ nb_inst_retire_ko_"+toString(i) + " " +sum_nb_inst_retire_ko;
+            _stat->create_expr_average_by_cycle("average_inst_retire_ok_"+toString(i), sum_nb_inst_retire_ok, "", toString(_("Average instruction retire ok by cycle (IPC) (thread %d)"),i));
+            _stat->create_expr_average_by_cycle("average_inst_retire_ko_"+toString(i), sum_nb_inst_retire_ko, "", toString(_("Average instruction retire ko (event, miss) by cycle (thread %d)"),i));
+            _stat->create_expr                 ("IPC_ok_"+toString(i) , "average_inst_retire_ok_"+toString(i), TYPE_COUNTER, "inst/cycle", toString("Instruction Per Cycle (Instruction Ok) (thread %d)",i));
+            _stat->create_expr                 ("CPI_ok_"+toString(i) , "/ 1 IPC_ok_"+toString(i)            , TYPE_COUNTER, "cycle/inst", toString("Cycle Per Instruction (Instruction Ok) (thread %d)",i));
+            _stat->create_expr                 ("IPC_ko_"+toString(i) , "average_inst_retire_ko_"+toString(i), TYPE_COUNTER, "inst/cycle", toString("Instruction Per Cycle (Instruction Ko) (thread %d)",i));
+            _stat->create_expr                 ("CPI_ko_"+toString(i) , "/ 1 IPC_ko_"+toString(i)            , TYPE_COUNTER, "cycle/inst", toString("Cycle Per Instruction (Instruction Ko) (thread %d)",i));
+            _stat->create_expr                 ("IPC_all_"+toString(i), "+ IPC_ok_"+toString(i)+" IPC_ko_"+toString(i), TYPE_COUNTER, "inst/cycle", toString("Instruction Per Cycle (Instruction Ok and Ko) (thread %d)",i));
+            _stat->create_expr                 ("CPI_all_"+toString(i), "/ 1 IPC_all_"+toString(i)           , TYPE_COUNTER, "cycle/inst", toString("Cycle Per Instruction (Instruction Ok and Ko) (thread %d)",i));
+          }
+      _stat->create_expr                 ("IPC_ok" , "/ "+sum_nb_inst_retire_ok+" cycle", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok)");
       _stat->create_expr                 ("CPI_ok" , "/ 1 IPC_ok"            , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok)");
       _stat->create_expr                 ("IPC_ko" , "average_inst_retire_ko", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ko)");
+      _stat->create_expr                 ("IPC_ko" , "/ "+sum_nb_inst_retire_ko+" cycle", TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ko)");
       _stat->create_expr                 ("CPI_ko" , "/ 1 IPC_ko"            , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ko)");
       _stat->create_expr                 ("IPC_all", "average_inst_retire"   , TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok and Ko)");
+      _stat->create_expr                 ("IPC_all", "+ IPC_ok IPC_ko"       , TYPE_COUNTER, "inst/cycle", "Instruction Per Cycle (Instruction Ok and Ko)");
       _stat->create_expr                 ("CPI_all", "/ 1 IPC_all"           , TYPE_COUNTER, "cycle/inst", "Cycle Per Instruction (Instruction Ok and Ko)");
+    }
+    {
+      std::string sum_nb_inst_type = "0";
+      for (uint32_t i=0; i<_param->_nb_type; i++)
+        if (is_type_valid(i))
+          {
+            _stat_nb_inst_type [i] = _stat->create_variable("nb_inst_type_"+toString(i));
+            sum_nb_inst_type = "+ nb_inst_type_"+toString(i) + " " +sum_nb_inst_type;
+          }
+      for (uint32_t i=0; i<_param->_nb_type; i++)
+        if (is_type_valid(i))
+          {
+            std::string name = toString(static_cast<type_t>(i)).c_str();
+//          _stat->create_expr_average_by_cycle("average_inst_type_"+toString(name), "nb_inst_type_"+toString(i), "", toString(_("Average instruction retire ok by cycle (type %s)"),name.c_str()));
+            _stat->create_expr_percent         ("percent_inst_type_"+toString(name), "nb_inst_type_"+toString(i), sum_nb_inst_type, toString(_("Percent instruction retire ok by cycle (type %s)"),name.c_str()));
+          }
+    }
     _stat_nb_inst_commit = _stat->create_variable("nb_inst_commit");

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_statistics_deallocation.cpp

-                      r98
+                      r110
     delete [] _stat_nb_inst_insert;
+    delete [] _stat_nb_inst_retire;
     delete [] _stat_nb_inst_retire_ok;
     delete [] _stat_nb_inst_retire_ko;
+    delete [] _stat_nb_inst_type;
     delete [] _stat_bank_nb_inst;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_transition.cpp

-                      r109
+                      r110
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
+#include "Behavioural/include/Simulation.h"
 namespace morpheo                    {
 …
+                {
                   log_printf(TRACE,Commit_unit,FUNCTION,"  * INSERT            [%d][%d]",x,y);
-#ifdef STATISTICS
-                  if (usage_is_set(_usage,USE_STATISTICS))
-                    (*_stat_nb_inst_insert [x]) ++;
-#endif
                   // get information
 …
+                        }
+                    }
+#ifdef STATISTICS
+                  if (usage_is_set(_usage,USE_STATISTICS))
+                    (*_stat_nb_inst_insert [x]) ++;
+#endif
                   // Push in rob
 …
         // ===================================================================
         for (uint32_t i=0; i<_param->_nb_bank; i++)
+          if (internal_BANK_RETIRE_VAL [i])
+            {
+              uint32_t x = internal_BANK_RETIRE_NUM_RENAME_UNIT [i];
+              uint32_t y = internal_BANK_RETIRE_NUM_INST        [i];
+              log_printf(TRACE,Commit_unit,FUNCTION,"  * RETIRE            [%d][%d]",x,y);
+          {
+            uint32_t num_bank = (internal_BANK_RETIRE_HEAD+i)%_param->_nb_bank;
+            if (internal_BANK_RETIRE_VAL [num_bank])
+              {
+                uint32_t x = internal_BANK_RETIRE_NUM_RENAME_UNIT [num_bank];
+                uint32_t y = internal_BANK_RETIRE_NUM_INST        [num_bank];
+                log_printf(TRACE,Commit_unit,FUNCTION,"  * RETIRE            [%d][%d]",x,y);
 #ifdef DEBUG_TEST
+              if (not PORT_READ(in_RETIRE_ACK [x][y]))
+                throw ERRORMORPHEO(FUNCTION,_("Retire : retire_ack must be set.\n"));
+#endif
+              entry_t *  entry        =  _rob [i].front();
+              rob_state_t state = entry->state;
+#ifdef STATISTICS
+              if (usage_is_set(_usage,USE_STATISTICS))
+                {
+                  if (state == ROB_END_OK)
+                    (*_stat_nb_inst_retire_ok [x]) ++;
+                  else
+                    (*_stat_nb_inst_retire_ko [x]) ++;
+                }
+#endif
+              Tcontext_t front_end_id = entry->front_end_id;
+              Tcontext_t context_id   = entry->context_id  ;
+              Ttype_t    type         = entry->type        ;
+              if ((state == ROB_END_OK         ) or
+//                (state == ROB_END_KO         ) or
+                  (state == ROB_END_BRANCH_MISS) or
+                  (state == ROB_END_LOAD_MISS  )//  or
+//                (state == ROB_END_MISS       ) or
+//                (state == ROB_END_EXCEPTION  )
+                  )
+                {
+//                reg_PC_PREVIOUS           [front_end_id][context_id] = reg_PC_CURRENT [front_end_id][context_id];
+                  reg_PC_CURRENT            [front_end_id][context_id] = reg_PC_NEXT    [front_end_id][context_id];
+                  reg_PC_CURRENT_IS_DS      [front_end_id][context_id] = entry->type == TYPE_BRANCH;
+                  reg_PC_CURRENT_IS_DS_TAKE [front_end_id][context_id] = entry->no_sequence;
+                  reg_PC_NEXT               [front_end_id][context_id] = (entry->no_sequence)?(entry->address_next):(reg_PC_CURRENT [front_end_id][context_id]+1);
+                if (not PORT_READ(in_RETIRE_ACK [x][y]))
+                  throw ERRORMORPHEO(FUNCTION,_("Retire : retire_ack must be set.\n"));
+#endif
+                entry_t *  entry        =  _rob [num_bank].front();
+                rob_state_t state = entry->state;
+                Tcontext_t front_end_id = entry->front_end_id;
+                Tcontext_t context_id   = entry->context_id  ;
+                uint32_t   num_thread   = _param->_translate_num_context_to_num_thread [front_end_id][context_id];
+                Ttype_t    type         = entry->type        ;
+                bool       retire_ok    = false;
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * front_end_id : %d",front_end_id );
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * context_id   : %d",context_id   );
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * num_thread   : %d",num_thread   );
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * type         : %s",toString(type).c_str());
+                log_printf(TRACE,Commit_unit,FUNCTION,"    * state        : %s",toString(state).c_str());
+                if ((state == ROB_END_OK         ) or
+//                  (state == ROB_END_KO         ) or
+                    (state == ROB_END_BRANCH_MISS) or
+                    (state == ROB_END_LOAD_MISS  )//  or
+//                  (state == ROB_END_MISS       ) or
+//                  (state == ROB_END_EXCEPTION  )
+                    )
+                  {
+                    log_printf(TRACE,Commit_unit,FUNCTION,"    * retire_ok");
+                    retire_ok = true;
+//                  reg_PC_PREVIOUS           [front_end_id][context_id] = reg_PC_CURRENT [front_end_id][context_id];
+                    reg_PC_CURRENT            [front_end_id][context_id] = reg_PC_NEXT    [front_end_id][context_id];
+                    reg_PC_CURRENT_IS_DS      [front_end_id][context_id] = entry->type == TYPE_BRANCH;
+                    reg_PC_CURRENT_IS_DS_TAKE [front_end_id][context_id] = entry->no_sequence;
+                    reg_PC_NEXT               [front_end_id][context_id] = (entry->no_sequence)?(entry->address_next):(reg_PC_CURRENT [front_end_id][context_id]+1);
 //                   if (entry->address_next != reg_PC_NEXT [front_end_id][context_id])
 //                     throw ERRORMORPHEO(FUNCTION,toString(_("Retire : Instruction's address_next (%.8x) is different of commit_unit's address_next (%.8x)"),entry->address_next,reg_PC_NEXT [front_end_id][context_id]));
+                }
+              if ((state == ROB_END_BRANCH_MISS) or
+                  (state == ROB_END_LOAD_MISS))
+                {
+                  reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT;
+                  reg_EVENT_FLUSH [front_end_id][context_id] = true;
+                }
+              // Update nb_inst
+              reg_NB_INST_COMMIT_ALL [front_end_id][context_id] --;
+              if (type == TYPE_MEMORY)
+                reg_NB_INST_COMMIT_MEM [front_end_id][context_id] --;
+              reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank;
+              _rob [i].pop_front();
+              delete entry;
+              // Transaction on retire interface : reset watch dog timer.
+              _nb_cycle_idle [front_end_id][context_id] = 0;
+            }
+                  }
+                if ((state == ROB_END_BRANCH_MISS) or
+                    (state == ROB_END_LOAD_MISS))
+                  {
+                    reg_EVENT_STATE [front_end_id][context_id] = EVENT_STATE_EVENT;
+                    reg_EVENT_FLUSH [front_end_id][context_id] = true;
+                  }
+                // Update nb_inst
+                reg_NB_INST_COMMIT_ALL [front_end_id][context_id] --;
+                if (type == TYPE_MEMORY)
+                  reg_NB_INST_COMMIT_MEM [front_end_id][context_id] --;
+                reg_NUM_BANK_HEAD = (reg_NUM_BANK_HEAD+1)%_param->_nb_bank;
+                _rob [num_bank].pop_front();
+                delete entry;
+                // Transaction on retire interface : reset watch dog timer.
+                _nb_cycle_idle [front_end_id][context_id] = 0;
+                // Increase stop condition
+                if (retire_ok)
+                  _simulation_nb_instruction_commited [num_thread] ++;
+#ifdef STATISTICS
+                if (usage_is_set(_usage,USE_STATISTICS))
+                  {
+                    (*_stat_nb_inst_retire [x]) ++;
+                    if (retire_ok)
+                      {
+                        (*_stat_nb_inst_retire_ok [num_thread]) ++;
+                        (*_stat_nb_inst_type      [type]      ) ++;
+                      }
+                    else
+                      (*_stat_nb_inst_retire_ko [num_thread]) ++;
+                  }
+#endif
+              }
+          }
         // ===================================================================
 …
         for (uint32_t j=0; j<_param->_nb_context [i]; j++)
+          {
             log_printf(TRACE,Commit_unit,FUNCTION,"    * [%d][%d]",i,j);
+            log_printf(TRACE,Commit_unit,FUNCTION,"    * [%d][%d] - %d",i,j,_param->_translate_num_context_to_num_thread [i][j]);
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_STATE  : %s",toString(reg_EVENT_STATE [i][j]).c_str());
             log_printf(TRACE,Commit_unit,FUNCTION,"      * EVENT_FLUSH  : %d",reg_EVENT_FLUSH [i][j]);
 …
           log_printf(TRACE,Commit_unit,FUNCTION,"      * Bank [%d] size : %d, ptr : %d",num_bank,(int)_rob[num_bank].size(), reg_BANK_PTR [i]);
-          uint32_t x=0;
           for (std::list<entry_t*>::iterator it=_rob[num_bank].begin();
                it!=_rob[num_bank].end();
                it++)
+            {
+              log_printf(TRACE,Commit_unit,FUNCTION,"        [%.4d] %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s - %d",
+                         x,
+              log_printf(TRACE,Commit_unit,FUNCTION,"        [%.4d][%.4d] (%.4d) %.4d %.4d %.4d %.4d, %.3d %.3d, %.1d, %.1d %.4d, %.1d %.4d, %s",
+                         num_bank                       ,
+                         (*it)->ptr                     ,
+                         ((num_bank << _param->_shift_num_bank) | (*it)->ptr),
                          (*it)->front_end_id            ,
                          (*it)->context_id              ,
 …
                          (*it)->use_load_queue          ,
                          (*it)->load_queue_ptr_write    ,
+                         toString((*it)->state).c_str() ,
+                         (*it)->ptr                     );
+              log_printf(TRACE,Commit_unit,FUNCTION,"               %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ",
+                         toString((*it)->state).c_str() );
+              log_printf(TRACE,Commit_unit,FUNCTION,"                     %.1d %.2d %.6d, %.1d %.2d %.6d, %.1d %.1d %.6d, %.1d %.2d %.6d %.6d, %.1d %.1d %.6d %.6d ",
                          (*it)->read_ra                 ,
                          (*it)->num_reg_ra_log          ,
 …
                          (*it)->num_reg_re_phy_new      );
               log_printf(TRACE,Commit_unit,FUNCTION,"               %.2d %.2d %.1d %.1d %.1d - %.8x (%.8x) %.8x (%.8x)",
+              log_printf(TRACE,Commit_unit,FUNCTION,"                     %.2d %.2d %.1d %.1d %.1d - %.8x (%.8x) %.8x (%.8x)",
                          (*it)->exception_use ,
                          (*it)->exception     ,
 …
                          (*it)->address_next<<2
                          );
-              x++;
+            }
+        }
 …
     for (uint32_t i=0; i<_param->_nb_front_end; i++)
       for (uint32_t j=0; j<_param->_nb_context [i]; j++)
         if (_nb_cycle_idle [i][j] >= debug_cycle_idle)
           throw ERRORMORPHEO(FUNCTION,toString(_("Context [%d][%d] is idle since %.0f cycles.\n"),i,j,_nb_cycle_idle [i][j]));
+        if (_nb_cycle_idle [i][j] >= debug_idle_cycle)
+          throw ERRORMORPHEO(FUNCTION,toString(_("Thread [%d] is idle since %.0f cycles.\n"),_param->_translate_num_context_to_num_thread[i][j],_nb_cycle_idle [i][j]));
     log_end(Commit_unit,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters.cpp

-                      r108
+                      r110
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Parameters.h"
+#include "Behavioural/include/Allocation.h"
 #include "Common/include/Max.h"
 #include "Common/include/BitManipulation.h"
 …
 #undef  FUNCTION
 #define FUNCTION "Commit_unit::Parameters"
+  Parameters::Parameters (uint32_t            nb_front_end            ,
+                          uint32_t          * nb_context              ,
+                          uint32_t            nb_rename_unit          ,
+                          uint32_t            size_queue              ,
+                          uint32_t            nb_bank                 ,
+                          uint32_t          * nb_inst_insert          ,
+                          uint32_t          * nb_inst_retire          ,
+                          uint32_t            nb_inst_commit          ,
+                          uint32_t            nb_inst_reexecute       ,
+                          uint32_t            nb_inst_branch_complete ,
+                          uint32_t         ** nb_branch_speculated    ,
+                          uint32_t            size_nb_inst_decod      ,
+                          uint32_t            size_general_data       ,
+                          uint32_t            size_store_queue_ptr    ,
+                          uint32_t            size_load_queue_ptr     ,
+                          uint32_t            size_general_register   ,
+                          uint32_t            size_special_register   ,
+                          Tpriority_t         priority                ,
+                          Tload_balancing_t   load_balancing          ,
+                          uint32_t            nb_rename_unit_select   ,
+  Parameters::Parameters (uint32_t            nb_front_end                       ,
+                          uint32_t          * nb_context                         ,
+                          uint32_t            nb_rename_unit                     ,
+                          uint32_t            size_queue                         ,
+                          uint32_t            nb_bank                            ,
+                          uint32_t          * nb_inst_insert                     ,
+                          uint32_t          * nb_inst_retire                     ,
+                          uint32_t            nb_inst_commit                     ,
+                          uint32_t            nb_inst_reexecute                  ,
+                          uint32_t            nb_inst_branch_complete            ,
+                          uint32_t         ** nb_branch_speculated               ,
+                          uint32_t            size_nb_inst_decod                 ,
+                          uint32_t            size_general_data                  ,
+                          uint32_t            size_store_queue_ptr               ,
+                          uint32_t            size_load_queue_ptr                ,
+                          uint32_t            size_general_register              ,
+                          uint32_t            size_special_register              ,
+                          Tpriority_t         priority                           ,
+                          Tload_balancing_t   load_balancing                     ,
+                          uint32_t            nb_rename_unit_select              ,
+                          uint32_t            nb_thread                          ,
+                          uint32_t         ** translate_num_context_to_num_thread,
                           bool                is_toplevel):
     _nb_bank_access_commit (1              ),
 …
     log_begin(Commit_unit,FUNCTION);
+    _nb_front_end             = nb_front_end           ;
+    _nb_context               = nb_context             ;
+    _nb_rename_unit           = nb_rename_unit         ;
+    _size_queue               = size_queue             ;
+    _nb_bank                  = nb_bank                ;
+    _nb_inst_insert           = nb_inst_insert         ;
+    _nb_inst_retire           = nb_inst_retire         ;
+    _nb_inst_commit           = nb_inst_commit         ;
+    _nb_inst_reexecute        = nb_inst_reexecute      ;
+    _nb_inst_branch_complete  = nb_inst_branch_complete;
+    _nb_branch_speculated     = nb_branch_speculated   ;
+    _priority                 = priority               ;
+    _load_balancing           = load_balancing         ;
+    _nb_rename_unit_select    = nb_rename_unit_select  ;
+    _nb_front_end                        = nb_front_end                       ;
+    _nb_context                          = nb_context                         ;
+    _nb_rename_unit                      = nb_rename_unit                     ;
+    _size_queue                          = size_queue                         ;
+    _nb_bank                             = nb_bank                            ;
+    _nb_inst_insert                      = nb_inst_insert                     ;
+    _nb_inst_retire                      = nb_inst_retire                     ;
+    _nb_inst_commit                      = nb_inst_commit                     ;
+    _nb_inst_reexecute                   = nb_inst_reexecute                  ;
+    _nb_inst_branch_complete             = nb_inst_branch_complete            ;
+    _nb_branch_speculated                = nb_branch_speculated               ;
+    _priority                            = priority                           ;
+    _load_balancing                      = load_balancing                     ;
+    _nb_rename_unit_select               = nb_rename_unit_select              ;
+    _nb_thread                           = nb_thread                          ;
+    _translate_num_context_to_num_thread = translate_num_context_to_num_thread;
     _size_rename_unit_id      = log2(_nb_rename_unit);
 …
     _have_port_rename_unit_id = _size_rename_unit_id > 0;
     _array_size_depth               = new uint32_t * [_nb_front_end];
+    ALLOC2(_array_size_depth,uint32_t,_nb_front_end,_nb_context [it1]);
     for (uint32_t i=0; i<_nb_front_end; i++)
+      {
+        _array_size_depth      [i]      = new uint32_t [_nb_context [i]];
+        for (uint32_t j=0; j<_nb_context [i]; j++)
+          _array_size_depth      [i][j] = (_nb_branch_speculated [i][j] == 0)?0:log2(_nb_branch_speculated [i][j]);
+      }
+      for (uint32_t j=0; j<_nb_context [i]; j++)
+        _array_size_depth      [i][j] = (_nb_branch_speculated [i][j] == 0)?0:log2(_nb_branch_speculated [i][j]);
     test();
+    ALLOC1(_have_thread,bool,_nb_thread);
+    for (uint32_t i=0; i<_nb_thread; i++)
+      _have_thread[i] = false;
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      for (uint32_t j=0; j<_nb_context [i]; j++)
+        _have_thread[_translate_num_context_to_num_thread [i][j]] = true;
     if (is_toplevel)
 …
     log_begin(Commit_unit,FUNCTION);
+    for (uint32_t i=0; i<_nb_front_end; i++)
+      {
+        delete [] _array_size_depth [i];
+      }
+    delete [] _array_size_depth;
+    DELETE1(_have_thread     ,_nb_thread);
+    DELETE2(_array_size_depth,_nb_front_end,_nb_context [it1]);
     log_end(Commit_unit,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Parameters_msg_error.cpp

-                      r88
+                      r110
     if (_nb_rename_unit_select > _nb_rename_unit)
       test.error("nb_rename_unit must be >= nb_rename_unit_select.\n");
+      test.error(_("nb_rename_unit must be >= nb_rename_unit_select.\n"));
     if (not is_multiple(_size_queue, _nb_bank))
       test.error("nb_bank must be a multiple of size_queue.\n");
+      test.error(_("nb_bank must be a multiple of size_queue.\n"));
     if (_nb_inst_reexecute != 1)
+      test.error("nb_inst_reexecute must be set at 1. Anothers value is unsupported.\n");
+      test.error(_("nb_inst_reexecute must be set at 1. Anothers value is unsupported.\n"));
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+      for (uint32_t j=0; j<_nb_context[i]; ++j)
+        if (_translate_num_context_to_num_thread [i][j] >= _nb_thread)
+          test.error(toString(_("num_thread [%d][%d] (%d) is >= at nb_thread (%d).\n"),i,j,_translate_num_context_to_num_thread [i][j],_nb_thread));
+    for (uint32_t i=0; i<_nb_front_end; ++i)
+      for (uint32_t j=0; j<_nb_context[i]-1; ++j)
+        for (uint32_t x=i; x<_nb_front_end; ++x)
+          for (uint32_t y=j+1; y<_nb_context[i]; ++y)
+            if (_translate_num_context_to_num_thread [i][j] == _translate_num_context_to_num_thread [x][y])
+              test.error(toString(_("To context [%d][%d] and [%d][%d], num_thread is the same (%d).\n"),i,j,x,y,_translate_num_context_to_num_thread [i][j]));
     if (_size_queue == 1)
       test.information ("Instructions are issued In-Order.\n");
+      test.information (_("Instructions are issued In-Order.\n"));
     else
       test.information ("Instructions are issued Out-Of-Order.\n");
+      test.information (_("Instructions are issued Out-Of-Order.\n"));
     log_end(Commit_unit,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/SelfTest/src/test.cpp

r88	r110
333	333	}
334	334
335		bool test_size = issue_queue.size() <= ~~_param->_size_queue~~;
	335	bool test_size = issue_queue.size() <= (_param->_size_queue+_param->_size_reexecute_queue);
336	336	TEST(bool,test_size,true);
337	337

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Issue_queue.h

-                      r88
+                      r110
     // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   private   : std::list<entry_t*>           * _issue_queue;
+  private   : std::list<entry_t*>             _reexecute_queue;
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   private   : Tcontrol_t                    * internal_BANK_IN_ACK              ;//[nb_bank]
-  private   : bool                          * internal_BANK_IN_IS_REEXECUTE     ;//[nb_bank]
   private   : uint32_t                      * internal_BANK_IN_NUM_RENAME_UNIT  ;//[nb_bank]
   private   : uint32_t                      * internal_BANK_IN_NUM_INST         ;//[nb_bank]
+  private   : Tcontrol_t                    * internal_BANK_OUT_VAL             ;//[nb_bank]
+  private   : uint32_t                      * internal_BANK_OUT_NUM_INST        ;//[nb_bank]
+  private   : Tcontrol_t                    * internal_ISSUE_OUT_VAL            ;//[nb_inst_issue]
+  private   : Tcontrol_t                    * internal_ISSUE_OUT_FROM_REEXECUTE ;//[nb_inst_issue]
+  private   : uint32_t                      * internal_ISSUE_OUT_NUM_BANK       ;//[nb_inst_issue]
+  private   : entry_t *                     * internal_ISSUE_OUT_ENTRY          ;//[nb_inst_issue]
+  private   : Tcontrol_t                    * internal_REEXECUTE_ACK            ;//[nb_inst_reexecute]
 #endif
 …
   public  : void        transition                (void);
   public  : void        genMoore                  (void);
-  public  : void        genMealy                  (void);
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/include/Parameters.h

-                      r88
+                      r110
   public : bool           ** _table_routing           ;//[nb_rename_unit][nb_inst_issue]
   public : bool           ** _table_issue_type        ;//[nb_inst_issue][nb_type]
+  public : uint32_t          _size_reexecute_queue    ;
   public : uint32_t          _nb_bank_select_out      ;
+//public : uint32_t          _nb_bank_select_out      ;
   public : uint32_t          _max_nb_inst_rename      ;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue.cpp

-                      r88
+                      r110
 # endif
-        log_printf(INFO,Issue_queue,FUNCTION,_("<%s> : Method - genMealy"),_name.c_str());
-        SC_METHOD (genMealy);
-        dont_initialize ();
-        sensitive << (*(in_CLOCK)).neg(); // need internal register
-        for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
-          sensitive << (*(in_REEXECUTE_VAL  [i]))
-                    << (*(in_REEXECUTE_TYPE [i]));
-        for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
-          for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
-            sensitive // << (*(in_ISSUE_IN_VAL  [i][j]))
-                      << (*(in_ISSUE_IN_TYPE [i][j]));
-# ifdef SYSTEMCASS_SPECIFIC
-        // List dependency information
-        for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
-          for (uint32_t x=0; x<_param->_nb_inst_reexecute; x++)
+            {
-              (*(out_REEXECUTE_ACK [i])) (*(in_REEXECUTE_VAL  [x]));
-              (*(out_REEXECUTE_ACK [i])) (*(in_REEXECUTE_TYPE [x]));
+            }
-        for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
-          for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+            {
-              for (uint32_t x=0; x<_param->_nb_inst_reexecute; x++)
+                {
-                  (*(out_ISSUE_IN_ACK [i][j])) (*(in_REEXECUTE_VAL  [x]));
-                  (*(out_ISSUE_IN_ACK [i][j])) (*(in_REEXECUTE_TYPE [x]));
+                }
-              for (uint32_t x=0; x<_param->_nb_rename_unit; x++)
-                for (uint32_t y=0; y<_param->_nb_inst_rename[x]; y++)
+                  {
-                    (*(out_ISSUE_IN_ACK [i][j])) (*(in_ISSUE_IN_VAL  [x][y]));
-                    (*(out_ISSUE_IN_ACK [i][j])) (*(in_ISSUE_IN_TYPE [x][y]));
+                  }
+            }
-# endif
 #endif
+      }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_allocation.cpp

-                      r88
+                      r110
+      {
     // ~~~~~[ Registers ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     _issue_queue = new std::list<entry_t*> [_param->_nb_bank];
+    _issue_queue     = new std::list<entry_t*> [_param->_nb_bank];
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+    internal_BANK_IN_ACK             = new Tcontrol_t [_param->_nb_bank];
+    internal_BANK_IN_IS_REEXECUTE    = new bool       [_param->_nb_bank];
+    internal_BANK_IN_NUM_RENAME_UNIT = new uint32_t   [_param->_nb_bank];
+    internal_BANK_IN_NUM_INST        = new uint32_t   [_param->_nb_bank];
+    internal_BANK_OUT_VAL            = new Tcontrol_t [_param->_nb_bank];
+    internal_BANK_OUT_NUM_INST       = new uint32_t   [_param->_nb_bank];
+    ALLOC1(internal_BANK_IN_ACK             ,Tcontrol_t,_param->_nb_bank);
+    ALLOC1(internal_BANK_IN_NUM_RENAME_UNIT ,uint32_t  ,_param->_nb_bank);
+    ALLOC1(internal_BANK_IN_NUM_INST        ,uint32_t  ,_param->_nb_bank);
+    ALLOC1(internal_ISSUE_OUT_VAL           ,Tcontrol_t,_param->_nb_inst_issue);
+    ALLOC1(internal_ISSUE_OUT_FROM_REEXECUTE,Tcontrol_t,_param->_nb_inst_issue);
+    ALLOC1(internal_ISSUE_OUT_NUM_BANK      ,uint32_t  ,_param->_nb_inst_issue);
+    ALLOC1(internal_ISSUE_OUT_ENTRY         ,entry_t * ,_param->_nb_inst_issue);
+    ALLOC1(internal_REEXECUTE_ACK           ,Tcontrol_t,_param->_nb_inst_reexecute);
+      }
 …
     _priority_out = new generic::priority::Priority (_name+"_priority_out"  ,
                                                      _param->_priority      ,
                                                      _param->_nb_bank_select_out,
                                                      _param->_nb_bank_select_out);
+                                                     _param->_nb_bank,
+                                                     _param->_nb_bank);
     _priority_reg = new generic::priority::Priority (_name+"_priority_reg",
                                                      PRIORITY_ROUND_ROBIN ,
+    _priority_reg = new generic::priority::Priority (_name+"_priority_reg"  ,
+                                                     _param->_priority      ,
                                                      _param->_nb_bank,
                                                      _param->_nb_bank);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_deallocation.cpp

-                      r88
+                      r110
         // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+        delete [] internal_BANK_IN_ACK            ;
+        delete [] internal_BANK_IN_IS_REEXECUTE   ;
+        delete [] internal_BANK_IN_NUM_RENAME_UNIT;
+        delete [] internal_BANK_IN_NUM_INST       ;
+        delete [] internal_BANK_OUT_VAL           ;
+        delete [] internal_BANK_OUT_NUM_INST      ;
+        DELETE1(internal_BANK_IN_ACK             ,_param->_nb_bank);
+        DELETE1(internal_BANK_IN_NUM_RENAME_UNIT ,_param->_nb_bank);
+        DELETE1(internal_BANK_IN_NUM_INST        ,_param->_nb_bank);
+        DELETE1(internal_ISSUE_OUT_VAL           ,_param->_nb_inst_issue);
+        DELETE1(internal_ISSUE_OUT_FROM_REEXECUTE,_param->_nb_inst_issue);
+        DELETE1(internal_ISSUE_OUT_NUM_BANK      ,_param->_nb_inst_issue);
+        DELETE1(internal_ISSUE_OUT_ENTRY         ,_param->_nb_inst_issue);
+        DELETE1(internal_REEXECUTE_ACK           ,_param->_nb_inst_reexecute);
+      }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_genMoore.cpp

-                      r88
+                      r110
     log_function(Issue_queue,FUNCTION,_name.c_str());
+    for (uint32_t i=0; i<_param->_nb_bank; i++)
+      internal_BANK_OUT_VAL [i] = false;
+    std::list<generic::priority::select_t> * select = _priority_out->select(); // same select for all issue
+    uint32_t num_bank_offset = 0;
+    for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+    // ===================================================================
+    // =====[ REEXECUTE_UNIT ]============================================
+    // ===================================================================
+    for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i)
+      {
+//      log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_OUT [%d]",i);
+        Tcontrol_t val      = false;
+        uint32_t   num_bank = 0;
+        // find a non empty bank
+        for (std::list<generic::priority::select_t>::iterator it=select->begin();
+             it!=select->end();
+             it++)
+          {
+            num_bank=num_bank_offset+it->grp;
+//          log_printf(TRACE,Issue_queue,FUNCTION,"    * Bank [%d]",num_bank);
+        log_printf(TRACE,Issue_queue,FUNCTION,"  * REEXECUTE [%d]",i);
+        internal_REEXECUTE_ACK [i] = (_reexecute_queue.size()+i) < _param->_size_reexecute_queue;
+        log_printf(TRACE,Issue_queue,FUNCTION,"    * ACK : %d",internal_REEXECUTE_ACK [i]);
+        PORT_WRITE(out_REEXECUTE_ACK [i], internal_REEXECUTE_ACK [i]);
+      }
+    // ===================================================================
+    // =====[ ISSUE_IN ]==================================================
+    // ===================================================================
+    {
+      Tcontrol_t ack [_param->_nb_rename_unit][_param->_max_nb_inst_rename];
+      // Initialisation
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
+        internal_BANK_IN_ACK  [i] = false;
+      for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+        for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+          ack [i][j] = false;
+      std::list<generic::priority::select_t> * select_reg = _priority_reg->select(); // same select for all issue
+      // issue_in interface
+      std::list<generic::priority::select_t> * select_in = _priority_in ->select(); // same select for all issue
+      for (std::list<generic::priority::select_t>::iterator it=select_in ->begin();
+           it!=select_in ->end();
+           it++)
+        {
+          // Get num interface
+          uint32_t num_rename_unit = it->grp;
+          uint32_t num_inst_rename = it->elt;
+          log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_IN [%d][%d]",num_rename_unit,num_inst_rename);
+          // scan all bank
+          for (std::list<generic::priority::select_t>::iterator it=select_reg->begin();
+               it!=select_reg->end();
+               it++)
+            {
+              uint32_t num_bank  = it->grp;
+              log_printf(TRACE,Issue_queue,FUNCTION,"    * BANK [%d]",num_bank);
+              // test if bank is not busy (full or previous access)
+              if (not internal_BANK_IN_ACK [num_bank] and (_issue_queue[num_bank].size() < _param->_size_bank))
+                {
+                  log_printf(TRACE,Issue_queue,FUNCTION,"    * find");
+                  // find
+                  ack [num_rename_unit][num_inst_rename] = true;
+                  internal_BANK_IN_ACK             [num_bank] = true;
+                  internal_BANK_IN_NUM_RENAME_UNIT [num_bank] = num_rename_unit;
+                  internal_BANK_IN_NUM_INST        [num_bank] = num_inst_rename;
+                  break; // Stop scan
+                }
+              else
+                log_printf(TRACE,Issue_queue,FUNCTION,"    * not find");
+            }
+        }
+      for (uint32_t i=0; i<_param->_nb_rename_unit; i++)
+        for (uint32_t j=0; j<_param->_nb_inst_rename[i]; j++)
+          PORT_WRITE(out_ISSUE_IN_ACK [i][j],ack [i][j]);
+    }
+    // ===================================================================
+    // =====[ ISSUE_OUT ]=================================================
+    // ===================================================================
+    {
+      Tcontrol_t val [_param->_nb_inst_issue];
+      for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+        val [i] = 0;
+      // From Reexecute_queue
+//       uint32_t num_reexecute_entry = 0;
+      for (std::list<entry_t*>::iterator it=_reexecute_queue.begin();
+           it!=_reexecute_queue.end();
+           ++it)
+        {
+          entry_t* entry = (*it);
+          for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+            // test if no previous transaction and can accept this type
+            if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
+              {
+                // find a issue port
+                val [i] = 1;
+            if (not _issue_queue [num_bank].empty())
+              {
+//              log_printf(TRACE,Issue_queue,FUNCTION,"      * Not Empty !!!");
+                val = true;
+                internal_BANK_OUT_NUM_INST [num_bank] = i;
+                break; // quit scearch loop
+              }
+          }
+        PORT_WRITE(out_ISSUE_OUT_VAL [i], val);
+        if (val)
+          {
+            // have find a bank with a data
+            internal_BANK_OUT_VAL [num_bank] = true;
+            entry_t* entry = _issue_queue [num_bank].front();
+            if (_param->_have_port_context_id)
+            PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [i], entry->_context_id           );
+            if (_param->_have_port_front_end_id)
+            PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [i], entry->_front_end_id         );
+            if (_param->_have_port_rob_ptr  )
+            PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [i], entry->_packet_id            );
+            PORT_WRITE(out_ISSUE_OUT_OPERATION             [i], entry->_operation            );
+            PORT_WRITE(out_ISSUE_OUT_TYPE                  [i], entry->_type                 );
+            PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write);
+            if (_param->_have_port_load_queue_ptr)
+            PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [i], entry->_load_queue_ptr_write );
+            PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [i], entry->_has_immediat         );
+            PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [i], entry->_immediat             );
+            PORT_WRITE(out_ISSUE_OUT_READ_RA               [i], entry->_read_ra              );
+            PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [i], entry->_num_reg_ra           );
+            PORT_WRITE(out_ISSUE_OUT_READ_RB               [i], entry->_read_rb              );
+            PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [i], entry->_num_reg_rb           );
+            PORT_WRITE(out_ISSUE_OUT_READ_RC               [i], entry->_read_rc              );
+            PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [i], entry->_num_reg_rc           );
+            PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [i], entry->_write_rd             );
+            PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [i], entry->_num_reg_rd           );
+            PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [i], entry->_write_re             );
+            PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [i], entry->_num_reg_re           );
+          }
+        num_bank_offset += _param->_nb_bank_select_out;
+      }
+                if (_param->_have_port_context_id)
+                PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [i], entry->_context_id           );
+                if (_param->_have_port_front_end_id)
+                PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [i], entry->_front_end_id         );
+                if (_param->_have_port_rob_ptr  )
+                PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [i], entry->_packet_id            );
+                PORT_WRITE(out_ISSUE_OUT_OPERATION             [i], entry->_operation            );
+                PORT_WRITE(out_ISSUE_OUT_TYPE                  [i], entry->_type                 );
+                PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write);
+                if (_param->_have_port_load_queue_ptr)
+                PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [i], entry->_load_queue_ptr_write );
+                PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [i], entry->_has_immediat         );
+                PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [i], entry->_immediat             );
+                PORT_WRITE(out_ISSUE_OUT_READ_RA               [i], entry->_read_ra              );
+                PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [i], entry->_num_reg_ra           );
+                PORT_WRITE(out_ISSUE_OUT_READ_RB               [i], entry->_read_rb              );
+                PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [i], entry->_num_reg_rb           );
+                PORT_WRITE(out_ISSUE_OUT_READ_RC               [i], entry->_read_rc              );
+                PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [i], entry->_num_reg_rc           );
+                PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [i], entry->_write_rd             );
+                PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [i], entry->_num_reg_rd           );
+                PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [i], entry->_write_re             );
+                PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [i], entry->_num_reg_re           );
+                internal_ISSUE_OUT_FROM_REEXECUTE [i] = true;
+//              internal_ISSUE_OUT_NUM_BANK       [i] = num_reexecute_entry;
+                internal_ISSUE_OUT_ENTRY          [i] = entry;
+                break; // stop scan
+              }
+//           num_reexecute_entry ++;
+        }
+      // From Issue_queue
+      std::list<generic::priority::select_t> * select = _priority_out->select(); // same select for all issue
+      for (std::list<generic::priority::select_t>::iterator it=select->begin();
+           it!=select->end();
+           it++)
+        {
+          uint32_t num_bank=it->grp;
+//        log_printf(TRACE,Issue_queue,Issue_queue,FUNCTION,"    * Bank [%d]",num_bank);
+          // Have instruction ?
+          if (not _issue_queue [num_bank].empty())
+            {
+//            log_printf(TRACE,Issue_queue,Issue_queue,FUNCTION,"      * Not Empty !!!");
+              entry_t* entry = _issue_queue [num_bank].front();
+              for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+                // test if no previous transaction and can accept this type
+                if ((val[i] == 0) and _param->_table_issue_type [i][entry->_type])
+                  {
+                    // find a issue port
+                    val [i] = 1;
+                    if (_param->_have_port_context_id)
+                    PORT_WRITE(out_ISSUE_OUT_CONTEXT_ID            [i], entry->_context_id           );
+                    if (_param->_have_port_front_end_id)
+                    PORT_WRITE(out_ISSUE_OUT_FRONT_END_ID          [i], entry->_front_end_id         );
+                    if (_param->_have_port_rob_ptr  )
+                    PORT_WRITE(out_ISSUE_OUT_PACKET_ID             [i], entry->_packet_id            );
+                    PORT_WRITE(out_ISSUE_OUT_OPERATION             [i], entry->_operation            );
+                    PORT_WRITE(out_ISSUE_OUT_TYPE                  [i], entry->_type                 );
+                    PORT_WRITE(out_ISSUE_OUT_STORE_QUEUE_PTR_WRITE [i], entry->_store_queue_ptr_write);
+                    if (_param->_have_port_load_queue_ptr)
+                    PORT_WRITE(out_ISSUE_OUT_LOAD_QUEUE_PTR_WRITE  [i], entry->_load_queue_ptr_write );
+                    PORT_WRITE(out_ISSUE_OUT_HAS_IMMEDIAT          [i], entry->_has_immediat         );
+                    PORT_WRITE(out_ISSUE_OUT_IMMEDIAT              [i], entry->_immediat             );
+                    PORT_WRITE(out_ISSUE_OUT_READ_RA               [i], entry->_read_ra              );
+                    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RA            [i], entry->_num_reg_ra           );
+                    PORT_WRITE(out_ISSUE_OUT_READ_RB               [i], entry->_read_rb              );
+                    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RB            [i], entry->_num_reg_rb           );
+                    PORT_WRITE(out_ISSUE_OUT_READ_RC               [i], entry->_read_rc              );
+                    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RC            [i], entry->_num_reg_rc           );
+                    PORT_WRITE(out_ISSUE_OUT_WRITE_RD              [i], entry->_write_rd             );
+                    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RD            [i], entry->_num_reg_rd           );
+                    PORT_WRITE(out_ISSUE_OUT_WRITE_RE              [i], entry->_write_re             );
+                    PORT_WRITE(out_ISSUE_OUT_NUM_REG_RE            [i], entry->_num_reg_re           );
+                    internal_ISSUE_OUT_FROM_REEXECUTE [i] = false;
+                    internal_ISSUE_OUT_NUM_BANK       [i] = num_bank;
+                    internal_ISSUE_OUT_ENTRY          [i] = entry;
+                    break; // stop scan
+                  }
+            }
+        }
+      for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
+        {
+          internal_ISSUE_OUT_VAL [i] = val [i];
+          PORT_WRITE(out_ISSUE_OUT_VAL [i], internal_ISSUE_OUT_VAL [i]);
+        }
+    }
     log_end(Issue_queue,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Issue_queue_transition.cpp

-                      r109
+                      r110
         for (uint32_t i=0; i<_param->_nb_bank; i++)
           _issue_queue [i].clear();
+        _reexecute_queue.clear();
+      }
     else
 …
         // =====[ ISSUE_IN ]==================================================
         // ===================================================================
         for (uint32_t i=0; i<_param->_nb_bank; i++)
           if (internal_BANK_IN_ACK [i])
+            {
+              entry_t * entry = NULL;
+              if (internal_BANK_IN_IS_REEXECUTE [i])
+                {
+                  uint32_t y = internal_BANK_IN_NUM_INST [i];
+                  if (PORT_READ(in_REEXECUTE_VAL [y]))
+                    {
+                      log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_IN [%d] - Transaction with REEXECUTE [%d]",i,y);
+              uint32_t x = internal_BANK_IN_NUM_RENAME_UNIT [i];
+              uint32_t y = internal_BANK_IN_NUM_INST [i];
+              if (PORT_READ(in_ISSUE_IN_VAL[x][y]))
+                {
+                  log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_IN [%d] - Transaction with ISSUE_IN [%d][%d]",i,x,y);
 #ifdef STATISTICS
+                      if (usage_is_set(_usage,USE_STATISTICS))
+                        (*_stat_nb_inst_reexecute) ++;
+#endif
+                      entry = new entry_t
+                        (
+                         (_param->_have_port_context_id    )?PORT_READ(in_REEXECUTE_CONTEXT_ID            [y]):0,
+                         (_param->_have_port_front_end_id  )?PORT_READ(in_REEXECUTE_FRONT_END_ID          [y]):0,
+                         (_param->_have_port_rob_ptr       )?PORT_READ(in_REEXECUTE_PACKET_ID             [y]):0,
+                                                             PORT_READ(in_REEXECUTE_OPERATION             [y]),
+                                                             PORT_READ(in_REEXECUTE_TYPE                  [y]),
+                                                             PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [y]),
+                         (_param->_have_port_load_queue_ptr)?PORT_READ(in_REEXECUTE_LOAD_QUEUE_PTR_WRITE  [y]):0,
+                                                             PORT_READ(in_REEXECUTE_HAS_IMMEDIAT          [y]),
+                                                             PORT_READ(in_REEXECUTE_IMMEDIAT              [y]),
+                                                             PORT_READ(in_REEXECUTE_READ_RA               [y]),
+                                                             PORT_READ(in_REEXECUTE_NUM_REG_RA            [y]),
+                                                             PORT_READ(in_REEXECUTE_READ_RB               [y]),
+                                                             PORT_READ(in_REEXECUTE_NUM_REG_RB            [y]),
+                                                             PORT_READ(in_REEXECUTE_READ_RC               [y]),
+                                                             PORT_READ(in_REEXECUTE_NUM_REG_RC            [y]),
+                                                             PORT_READ(in_REEXECUTE_WRITE_RD              [y]),
+                                                             PORT_READ(in_REEXECUTE_NUM_REG_RD            [y]),
+                                                             PORT_READ(in_REEXECUTE_WRITE_RE              [y]),
+                                                             PORT_READ(in_REEXECUTE_NUM_REG_RE            [y])
+                         );
+                    }
+                }
+              else
+                {
+                  uint32_t x = internal_BANK_IN_NUM_RENAME_UNIT [i];
+                  uint32_t y = internal_BANK_IN_NUM_INST [i];
+                  if (PORT_READ(in_ISSUE_IN_VAL[x][y]))
+                    {
+                      log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_IN [%d] - Transaction with ISSUE_IN [%d][%d]",i,x,y);
+                  if (usage_is_set(_usage,USE_STATISTICS))
+                    (*_stat_nb_inst_issue_in [x]) ++;
+#endif
+                  entry_t * entry = new entry_t
+                    (
+                     (_param->_have_port_context_id    )?PORT_READ(in_ISSUE_IN_CONTEXT_ID            [x][y]):0,
+                     (_param->_have_port_front_end_id  )?PORT_READ(in_ISSUE_IN_FRONT_END_ID          [x][y]):0,
+                     (_param->_have_port_rob_ptr       )?PORT_READ(in_ISSUE_IN_PACKET_ID             [x][y]):0,
+                                                         PORT_READ(in_ISSUE_IN_OPERATION             [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_TYPE                  [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]),
+                     (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  [x][y]):0,
+                                                         PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT          [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_IMMEDIAT              [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_READ_RA               [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_NUM_REG_RA            [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_READ_RB               [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_NUM_REG_RB            [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_READ_RC               [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_NUM_REG_RC            [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_WRITE_RD              [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_NUM_REG_RD            [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_WRITE_RE              [x][y]),
+                                                         PORT_READ(in_ISSUE_IN_NUM_REG_RE            [x][y])
+                     );
+                  _issue_queue [i].push_back(entry);
+                }
+            }
+        // ===================================================================
+        // =====[ REEXECUTE_UNIT ]============================================
+        // ===================================================================
+        for (uint32_t i=0; i<_param->_nb_inst_reexecute; ++i)
+          if (PORT_READ(in_REEXECUTE_VAL [i]) and internal_REEXECUTE_ACK [i])
+            {
+              log_printf(TRACE,Issue_queue,FUNCTION,"  * REEXECUTE [%d]",i);
 #ifdef STATISTICS
+                      if (usage_is_set(_usage,USE_STATISTICS))
+                        (*_stat_nb_inst_issue_in [x]) ++;
+#endif
+                      entry = new entry_t
+                        (
+                         (_param->_have_port_context_id    )?PORT_READ(in_ISSUE_IN_CONTEXT_ID            [x][y]):0,
+                         (_param->_have_port_front_end_id  )?PORT_READ(in_ISSUE_IN_FRONT_END_ID          [x][y]):0,
+                         (_param->_have_port_rob_ptr       )?PORT_READ(in_ISSUE_IN_PACKET_ID             [x][y]):0,
+                                                             PORT_READ(in_ISSUE_IN_OPERATION             [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_TYPE                  [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_STORE_QUEUE_PTR_WRITE [x][y]),
+                         (_param->_have_port_load_queue_ptr)?PORT_READ(in_ISSUE_IN_LOAD_QUEUE_PTR_WRITE  [x][y]):0,
+                                                             PORT_READ(in_ISSUE_IN_HAS_IMMEDIAT          [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_IMMEDIAT              [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_READ_RA               [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_NUM_REG_RA            [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_READ_RB               [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_NUM_REG_RB            [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_READ_RC               [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_NUM_REG_RC            [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_WRITE_RD              [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_NUM_REG_RD            [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_WRITE_RE              [x][y]),
+                                                             PORT_READ(in_ISSUE_IN_NUM_REG_RE            [x][y])
+                         );
+                    }
+                }
+              if (entry != NULL)
+                _issue_queue [i].push_back(entry);
+            }
+              if (usage_is_set(_usage,USE_STATISTICS))
+                (*_stat_nb_inst_reexecute) ++;
+#endif
+              entry_t * entry = new entry_t
+                (
+                 (_param->_have_port_context_id    )?PORT_READ(in_REEXECUTE_CONTEXT_ID            [i]):0,
+                 (_param->_have_port_front_end_id  )?PORT_READ(in_REEXECUTE_FRONT_END_ID          [i]):0,
+                 (_param->_have_port_rob_ptr       )?PORT_READ(in_REEXECUTE_PACKET_ID             [i]):0,
+                                                     PORT_READ(in_REEXECUTE_OPERATION             [i]),
+                                                     PORT_READ(in_REEXECUTE_TYPE                  [i]),
+                                                     PORT_READ(in_REEXECUTE_STORE_QUEUE_PTR_WRITE [i]),
+                 (_param->_have_port_load_queue_ptr)?PORT_READ(in_REEXECUTE_LOAD_QUEUE_PTR_WRITE  [i]):0,
+                                                     PORT_READ(in_REEXECUTE_HAS_IMMEDIAT          [i]),
+                                                     PORT_READ(in_REEXECUTE_IMMEDIAT              [i]),
+                                                     PORT_READ(in_REEXECUTE_READ_RA               [i]),
+                                                     PORT_READ(in_REEXECUTE_NUM_REG_RA            [i]),
+                                                     PORT_READ(in_REEXECUTE_READ_RB               [i]),
+                                                     PORT_READ(in_REEXECUTE_NUM_REG_RB            [i]),
+                                                     PORT_READ(in_REEXECUTE_READ_RC               [i]),
+                                                     PORT_READ(in_REEXECUTE_NUM_REG_RC            [i]),
+                                                     PORT_READ(in_REEXECUTE_WRITE_RD              [i]),
+                                                     PORT_READ(in_REEXECUTE_NUM_REG_RD            [i]),
+                                                     PORT_READ(in_REEXECUTE_WRITE_RE              [i]),
+                                                     PORT_READ(in_REEXECUTE_NUM_REG_RE            [i])
+                 );
+              _reexecute_queue.push_back(entry);
+            }
         // ===================================================================
         // =====[ ISSUE_OUT ]=================================================
         // ===================================================================
+        for (uint32_t i=0; i<_param->_nb_bank; i++)
+          {
+//          log_printf(TRACE,Issue_queue,FUNCTION,"  * internal_BANK_OUT [%d] val %d, num_inst %d",i,internal_BANK_OUT_VAL [i],internal_BANK_OUT_NUM_INST [i]);
+            if (internal_BANK_OUT_VAL [i])
+              {
+#ifdef STATISTICS
+                if (usage_is_set(_usage,USE_STATISTICS))
+                  (*_stat_nb_inst_issue_out) ++;
+#endif
+                uint32_t x = internal_BANK_OUT_NUM_INST [i];
+//              log_printf(TRACE,Issue_queue,FUNCTION,"    * ISSUE_OUT_ACK : %d",PORT_READ(in_ISSUE_OUT_ACK [x]));
+                if (PORT_READ(in_ISSUE_OUT_ACK [x]))
+                  {
+                    log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_OUT [%d] - Transaction with ISSUE_OUT [%d]",i,x);
+                    entry_t * entry =  _issue_queue [i].front();
+                    _issue_queue [i].pop_front();
+                    delete entry;
+                  }
+              }
+          }
+        for (uint32_t i=0; i<_param->_nb_inst_issue; ++i)
+          if (internal_ISSUE_OUT_VAL [i] and PORT_READ(in_ISSUE_OUT_ACK [i]))
+            {
+              entry_t * entry    = internal_ISSUE_OUT_ENTRY    [i];
+              if (internal_ISSUE_OUT_FROM_REEXECUTE [i])
+                {
+                  log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_OUT [%d] - From Reexecute_queue",i);
+                  _reexecute_queue.remove(entry);
+                }
+              else
+                {
+                  // front ...
+                  uint32_t  num_bank = internal_ISSUE_OUT_NUM_BANK [i];
+                  log_printf(TRACE,Issue_queue,FUNCTION,"  * ISSUE_OUT [%d] - From issue_queue [%d]",i,num_bank);
+                  _issue_queue [num_bank].remove(entry);
+                }
+              delete entry;
+            }
+      }
+#if defined(DEBUG) and defined(DEBUG_Issue_queue) and (DEBUG >= DEBUG_TRACE)
     log_printf(TRACE,Issue_queue,FUNCTION,"  * Dump Issue_queue");
     for (uint32_t i=0; i<_param->_nb_bank; i++)
+      {
-#ifdef STATISTICS
-        if (usage_is_set(_usage,USE_STATISTICS))
-          *(_stat_bank_nb_inst [i]) += _issue_queue[i].size();
-#endif
         log_printf(TRACE,Issue_queue,FUNCTION,"    * Bank [%d] size : %d",i,(int)_issue_queue[i].size());
 …
                 ++j;
+              }
+      }
+    {
+      log_printf(TRACE,Issue_queue,FUNCTION,"    * Reexecute_queue - size : %d",(int)_reexecute_queue.size());
+      uint32_t i = 0;
+      for (std::list<entry_t*>::iterator it=_reexecute_queue.begin();it!=_reexecute_queue.end(); ++it)
+        {
+          log_printf(TRACE,Issue_queue,FUNCTION,"      [%.4d] %.2d %.2d %.4d, %.2d %.3d, %.2d %.2d, %.1d %.8x, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d, %.1d %.4d",
+                     i,
+                     (*it)->_context_id           ,
+                     (*it)->_front_end_id         ,
+                     (*it)->_packet_id            ,
+                     (*it)->_type                 ,
+                     (*it)->_operation            ,
+                     (*it)->_store_queue_ptr_write,
+                     (*it)->_load_queue_ptr_write ,
+                     (*it)->_has_immediat         ,
+                     (*it)->_immediat             ,
+                     (*it)->_read_ra              ,
+                     (*it)->_num_reg_ra           ,
+                     (*it)->_read_rb              ,
+                     (*it)->_num_reg_rb           ,
+                     (*it)->_read_rc              ,
+                     (*it)->_num_reg_rc           ,
+                     (*it)->_write_rd             ,
+                     (*it)->_num_reg_rd           ,
+                     (*it)->_write_re             ,
+                     (*it)->_num_reg_re           );
+          ++i;
+        }
+    }
+#endif
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      for (uint32_t i=0; i<_param->_nb_bank; i++)
+        *(_stat_bank_nb_inst [i]) += _issue_queue[i].size();
+#endif
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Issue_queue/src/Parameters.cpp

-                      r109
+                      r110
     _table_routing            = table_routing        ;
     _table_issue_type         = table_issue_type     ;
+    _size_reexecute_queue     = nb_inst_reexecute    ;
     log_printf(TRACE,Issue_queue,FUNCTION,"  * table_routing [nb_rename_unit][nb_inst_issue]");
 …
     _max_nb_inst_rename       = max<uint32_t>(_nb_inst_rename,_nb_rename_unit);
-    _nb_bank_select_out       = _nb_bank/nb_inst_issue;
     _size_bank                = _size_queue / _nb_bank;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/SelfTest/src/test.cpp

r88	r110
26	26	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
27	27	// _usage = usage_unset(_usage,USE_POSITION );
28		_usage = usage_unset(_usage,USE_STATISTICS );
	28	// _usage = usage_unset(_usage,USE_STATISTICS );
29	29	// _usage = usage_unset(_usage,USE_INFORMATION );
30	30

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/include/OOO_Engine_Glue.h

-                      r88
+                      r110
 #ifdef STATISTICS
   public    : Stat                           * _stat;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_registerfile;
+//private   : counter_t                      * _stat_nb_inst_issue_stall_by_rename_unit ;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_commit_unit ;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_issue_queue ;
 #endif
 …
   public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW        ;//[nb_rename_unit][nb_inst_insert]
   public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_VAL                       ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_ISSUE_QUEUE_ACK                       ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontext_t         ) *** out_INSERT_ISSUE_QUEUE_CONTEXT_ID                ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontext_t         ) *** out_INSERT_ISSUE_QUEUE_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Toperation_t       ) *** out_INSERT_ISSUE_QUEUE_OPERATION                 ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Ttype_t            ) *** out_INSERT_ISSUE_QUEUE_TYPE                      ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tgeneral_data_t    ) *** out_INSERT_ISSUE_QUEUE_IMMEDIAT                  ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RA                   ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RA                ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RB                   ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RB                ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RC                   ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RC                ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_WRITE_RD                  ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RD                ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_WRITE_RE                  ;//[nb_rename_unit][nb_inst_rename]
   public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ;//[nb_rename_unit][nb_inst_rename]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_VAL                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_IN (Tcontrol_t         ) ***  in_INSERT_ISSUE_QUEUE_ACK                       ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontext_t         ) *** out_INSERT_ISSUE_QUEUE_CONTEXT_ID                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontext_t         ) *** out_INSERT_ISSUE_QUEUE_FRONT_END_ID              ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Toperation_t       ) *** out_INSERT_ISSUE_QUEUE_OPERATION                 ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Ttype_t            ) *** out_INSERT_ISSUE_QUEUE_TYPE                      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE     ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tlsq_ptr_t         ) *** out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE      ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT              ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_data_t    ) *** out_INSERT_ISSUE_QUEUE_IMMEDIAT                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RA                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RA                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RB                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RB                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_READ_RC                   ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RC                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_WRITE_RD                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tgeneral_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RD                ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tcontrol_t         ) *** out_INSERT_ISSUE_QUEUE_WRITE_RE                  ;//[nb_rename_unit][nb_inst_insert]
+  public    : SC_OUT(Tspecial_address_t ) *** out_INSERT_ISSUE_QUEUE_NUM_REG_RE                ;//[nb_rename_unit][nb_inst_insert]
 //     // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_genMealy_insert_valack.cpp

r109	r110
59	59	commit_unit_ack and
60	60	not rename_unit_no_execute);
61
	61
62	62	PORT_WRITE(out_INSERT_VAL [x] ,val );
63	63	PORT_WRITE(out_INSERT_RENAME_UNIT_ACK [i][j],rename_unit_ack);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_statistics_allocation.cpp

-                      r88
+                      r110
                       "OOO_Engine_Glue",
                       param_statistics);
+    _stat_nb_inst_issue_stall_by_registerfile = _stat->create_variable("nb_inst_issue_stall_by_registerfile");
+//  _stat_nb_inst_issue_stall_by_rename_unit  = _stat->create_variable("nb_inst_issue_stall_by_rename_unit" );
+    _stat_nb_inst_issue_stall_by_commit_unit  = _stat->create_variable("nb_inst_issue_stall_by_commit_unit" );
+    _stat_nb_inst_issue_stall_by_issue_queue  = _stat->create_variable("nb_inst_issue_stall_by_issue_queue" );
+//     std::string nb_inst_issue_stall = "+ + nb_inst_issue_stall_by_registerfile nb_inst_issue_stall_by_rename_unit + nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue";
+    std::string nb_inst_issue_stall = "+ nb_inst_issue_stall_by_registerfile + nb_inst_issue_stall_by_commit_unit nb_inst_issue_stall_by_issue_queue";
+    _stat->create_expr_percent ("percent_issue_stall_by_registerfile", "nb_inst_issue_stall_by_registerfile", nb_inst_issue_stall, _("Percent of instruction stalled by RegisterFile"));
+//  _stat->create_expr_percent ("percent_issue_stall_by_rename_unit" , "nb_inst_issue_stall_by_rename_unit" , nb_inst_issue_stall, _("Percent of instruction stalled by Rename_Unit") );
+    _stat->create_expr_percent ("percent_issue_stall_by_commit_unit" , "nb_inst_issue_stall_by_commit_unit" , nb_inst_issue_stall, _("Percent of instruction stalled by Commit_Unit") );
+    _stat->create_expr_percent ("percent_issue_stall_by_issue_queue" , "nb_inst_issue_stall_by_issue_queue" , nb_inst_issue_stall, _("Percent of instruction stalled by Issue_Queue") );
     log_end(OOO_Engine_Glue,FUNCTION);

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/OOO_Engine_Glue/src/OOO_Engine_Glue_transition.cpp

-                      r88
+                      r110
     log_begin(OOO_Engine_Glue,FUNCTION);
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+        uint32_t x=0;
+        for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
+          for (uint32_t j=0; j<_param->_nb_inst_insert[i]; ++j)
+            {
+              if (PORT_READ(in_INSERT_RENAME_UNIT_VAL [i][j]))
+                {
+                  if (PORT_READ(in_INSERT_ACK [x]) == 0)
+                    (*_stat_nb_inst_issue_stall_by_registerfile) ++;
+                  if (PORT_READ(in_INSERT_COMMIT_UNIT_ACK [i][j]) == 0)
+                    (*_stat_nb_inst_issue_stall_by_commit_unit ) ++;
+                  if (PORT_READ(in_INSERT_ISSUE_QUEUE_ACK [i][j]) == 0)
+                    (*_stat_nb_inst_issue_stall_by_issue_queue ) ++;
+                }
+              x++;
+            }
+      }
+#endif
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
     end_cycle ();

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/configuration.cfg

r81	r110
5	5	2 4 *2 # size_store_queue [0] [nb_load_store_queue]
6	6	1 4 *2 # size_load_queue [0] [nb_load_store_queue]
	7	1 4 *4 # nb_inst_memory [0] [nb_load_store_queue]
7	8	0 0 +1 # link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
8	9	1 4 *4 # nb_inst_insert

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/SelfTest/src/main.cpp

-                      r88
+                      r110
   err (_(" * size_store_queue                 [nb_load_store_queue]     (uint32_t)\n"));
   err (_(" * size_load_queue                  [nb_load_store_queue]     (uint32_t)\n"));
+  err (_(" * nb_inst_memory                   [nb_load_store_queue]     (uint32_t)\n"));
   err (_(" * link_load_store_unit_with_thread [nb_front_end][nb_context](uint32_t)\n"));
   err (_(" * nb_inst_insert                                             (uint32_t)\n"));
 …
   uint32_t    _nb_load_store_queue              = fromString<uint32_t>(argv[x++]);
   if (argc != static_cast<int>(2+NB_PARAMS+_nb_front_end+2*_nb_load_store_queue+nb_thread))
+  if (argc != static_cast<int>(2+NB_PARAMS+_nb_front_end+3*_nb_load_store_queue+nb_thread))
     usage (argc, argv);
   uint32_t  * _size_store_queue                 = new uint32_t [_nb_load_store_queue];
   uint32_t  * _size_load_queue                  = new uint32_t [_nb_load_store_queue];
+  uint32_t  * _nb_inst_memory                   = new uint32_t [_nb_load_store_queue];
   for (uint32_t i=0; i<_nb_load_store_queue; i++)
 …
   for (uint32_t i=0; i<_nb_load_store_queue; i++)
     _size_load_queue  [i] = atoi(argv[x++]);
+  for (uint32_t i=0; i<_nb_load_store_queue; i++)
+    _nb_inst_memory   [i] = atoi(argv[x++]);
   uint32_t ** _link_load_store_unit_with_thread = new uint32_t * [_nb_front_end];
 …
          _size_store_queue                ,
          _size_load_queue                 ,
+         _nb_inst_memory                  ,
          _link_load_store_unit_with_thread,
          _nb_inst_insert                  ,

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/include/Parameters.h

-                      r88
+                      r110
   public : uint32_t  * _size_store_queue                ; //[nb_load_store_queue]
   public : uint32_t  * _size_load_queue                 ; //[nb_load_store_queue]
+  public : uint32_t  * _nb_inst_memory                  ; //[nb_load_store_queue]
   public : uint32_t ** _link_load_store_unit_with_thread; //[nb_front_end][nb_context]
   public : uint32_t    _nb_inst_insert                  ;
   public : uint32_t    _nb_inst_retire                  ;
+  public : uint32_t    _max_size_store_queue            ;
+  public : uint32_t    _max_size_load_queue             ;
 //public : uint32_t    _size_front_end_id               ;
 …
                         uint32_t  * size_store_queue                ,
                         uint32_t  * size_load_queue                 ,
+                        uint32_t  * nb_inst_memory                  ,
                         uint32_t ** link_load_store_unit_with_thread,
                         uint32_t    nb_inst_insert                  ,

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_insert.cpp

-                      r81
+                      r110
   void Load_Store_pointer_unit::genMealy_insert (void)
+  {
+    log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
+    log_begin(Load_Store_pointer_unit,FUNCTION);
+    log_function(Load_Store_pointer_unit,FUNCTION,_name.c_str());
+    bool use_lsq [_param->_nb_load_store_queue];
+    // TODO : limité à nb_inst_memory le nombre d'accès par lsq !!!
+    uint32_t   nb_use_lsq            [_param->_nb_load_store_queue];
+    Tlsq_ptr_t STORE_QUEUE_PTR_WRITE [_param->_nb_load_store_queue];
+    bool       STORE_QUEUE_USE       [_param->_nb_load_store_queue][_param->_max_size_store_queue];
+    Tlsq_ptr_t STORE_QUEUE_NB_USE    [_param->_nb_load_store_queue];
+    Tlsq_ptr_t LOAD_QUEUE_PTR_WRITE  [_param->_nb_load_store_queue];
+    bool       LOAD_QUEUE_USE        [_param->_nb_load_store_queue][_param->_max_size_load_queue];
     for (uint32_t i=0; i<_param->_nb_load_store_queue; i++)
+      use_lsq [i] = false;
+      {
+        nb_use_lsq            [i] = _param->_nb_inst_memory[i];
+        STORE_QUEUE_PTR_WRITE [i] = reg_STORE_QUEUE_PTR_WRITE [i];
+        STORE_QUEUE_NB_USE    [i] = reg_STORE_QUEUE_NB_USE    [i];
+        LOAD_QUEUE_PTR_WRITE  [i] = reg_LOAD_QUEUE_PTR_WRITE  [i];
+        for (uint32_t j=0; j<_param->_size_store_queue[i]; j++)
+          STORE_QUEUE_USE [i][j] = reg_STORE_QUEUE_USE [i][j];
+        for (uint32_t j=0; j<_param->_size_load_queue[i]; j++)
+          LOAD_QUEUE_USE  [i][j] = reg_LOAD_QUEUE_USE  [i][j];
+      }
     for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
+      {
+        log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * INSERT [%d]",i);
         Tcontrol_t ack                   = false;
-        Tlsq_ptr_t store_queue_ptr_write = 0;
-        Tlsq_ptr_t load_queue_ptr_write  = 0;
         if ( (PORT_READ(in_INSERT_VAL  [i]) == true       ) and
              (PORT_READ(in_INSERT_TYPE [i]) == TYPE_MEMORY))
+          {
+            log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * type is memory");
             Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_INSERT_FRONT_END_ID [i]):0;
             Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_INSERT_CONTEXT_ID   [i]):0;
             uint32_t   lsq          = _param->_link_load_store_unit_with_thread[front_end_id][context_id];
+            log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * front_end_id : %d",front_end_id);
+            log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * context_id   : %d",context_id  );
+            log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * lsq          : %d",lsq         );
             // Test if a previous instruction use the same lsq
             // Authorize once memory access by load store unit
             if (use_lsq [lsq] == false)
+            if (nb_use_lsq [lsq] > 0)
+              {
                 use_lsq [lsq] = true;
+                nb_use_lsq [lsq] --;
                 uint32_t   ptr;
+                store_queue_ptr_write   = reg_STORE_QUEUE_PTR_WRITE [lsq];
+                load_queue_ptr_write    = reg_LOAD_QUEUE_PTR_WRITE  [lsq];
+                PORT_WRITE(out_INSERT_STORE_QUEUE_PTR_WRITE [i], STORE_QUEUE_PTR_WRITE [lsq]);
+                if (_param->_have_port_load_queue_ptr)
+                PORT_WRITE(out_INSERT_LOAD_QUEUE_PTR_WRITE  [i], LOAD_QUEUE_PTR_WRITE  [lsq]);
+                log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * sq_ptr_write : %d",STORE_QUEUE_PTR_WRITE [lsq]);
+                log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * lq_ptr_write : %d",LOAD_QUEUE_PTR_WRITE [lsq]);
                 // operation became of decod_stage. Also operation is != store_head_ok and store_head_ko
                 if (is_operation_memory_store(PORT_READ(in_INSERT_OPERATION [i])))
+                  {
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * USE_STORE_QUEUE");
                     internal_INSERT_OPERATION_USE [i] = OPERATION_USE_STORE_QUEUE;
+                    ptr = reg_STORE_QUEUE_PTR_WRITE [lsq];
+                    ptr = STORE_QUEUE_PTR_WRITE [lsq];
+                    ack = not STORE_QUEUE_USE [lsq][ptr] and (static_cast<uint32_t>(STORE_QUEUE_NB_USE [lsq]+1) < _param->_size_store_queue[lsq]);
+                    ack = not reg_STORE_QUEUE_USE [lsq][ptr] and (static_cast<uint32_t>(reg_STORE_QUEUE_NB_USE [lsq]+1) < _param->_size_store_queue[lsq]);
+                    if (ack)
+                      {
+                        STORE_QUEUE_PTR_WRITE [lsq]      = (ptr+1)%_param->_size_store_queue[lsq];
+                        STORE_QUEUE_NB_USE    [lsq]      ++;
+                        STORE_QUEUE_USE       [lsq][ptr] = true;
+                      }
+                  }
                 else
+                  {
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * USE_LOAD_QUEUE");
                     internal_INSERT_OPERATION_USE [i] = OPERATION_USE_LOAD_QUEUE;
+                    ptr = reg_LOAD_QUEUE_PTR_WRITE [lsq];
+                    ptr = LOAD_QUEUE_PTR_WRITE [lsq];
+                    ack = (not LOAD_QUEUE_USE [lsq][ptr]);
+                    ack = (not reg_LOAD_QUEUE_USE [lsq][ptr]);
+                    if (ack)
+                      {
+                        LOAD_QUEUE_PTR_WRITE [lsq]      = (ptr+1)%_param->_size_load_queue[lsq];
+                        LOAD_QUEUE_USE       [lsq][ptr] = true;
+                      }
+                  }
+                log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * ptr          : %d",ptr         );
+                log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * ack          : %d",ack         );
                 internal_INSERT_LSQ [i] = lsq;
 …
         internal_INSERT_ACK [i] = ack;
         PORT_WRITE(out_INSERT_ACK                   [i], ack);
-        PORT_WRITE(out_INSERT_STORE_QUEUE_PTR_WRITE [i], store_queue_ptr_write);
-        if (_param->_have_port_load_queue_ptr)
-        PORT_WRITE(out_INSERT_LOAD_QUEUE_PTR_WRITE  [i], load_queue_ptr_write );
+      }
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End");
+    log_end(Load_Store_pointer_unit,FUNCTION);
   };

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_genMealy_retire.cpp

-                      r88
+                      r110
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
     bool use_lsq [_param->_nb_load_store_queue];
     for (uint32_t i=0; i<_param->_nb_load_store_queue; i++)
       use_lsq [i] = false;
+//     bool use_lsq [_param->_nb_load_store_queue];
+//     for (uint32_t i=0; i<_param->_nb_load_store_queue; i++)
+//       use_lsq [i] = false;
     for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
+      {
         Tcontrol_t ack = false;
+        Tcontrol_t ack = true; // always accept
         Tcontrol_t use_sq  = PORT_READ(in_RETIRE_USE_STORE_QUEUE [i]);
         Tcontrol_t use_lq  = PORT_READ(in_RETIRE_USE_LOAD_QUEUE  [i]);
 …
             // Test if a previous instruction use the same lsq
             // Authorize once memory access by load store unit
             if (use_lsq [lsq] == false)
+//          // Authorize once memory access by load store unit
+//          if (use_lsq [lsq] == false)
+              {
                 use_lsq [lsq] = true;
                 ack = true;
+//              use_lsq [lsq] = true;
+//              ack = true;
                 uint32_t   ptr;
 …
         else
+          {
             ack = true;
+//          ack = true;
             internal_RETIRE_OPERATION_USE [i] = OPERATION_USE_NONE;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Load_Store_pointer_unit_transition.cpp

-                      r81
+                      r110
   void Load_Store_pointer_unit::transition (void)
+  {
+    log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"Begin");
+    log_begin(Load_Store_pointer_unit,FUNCTION);
+    log_function(Load_Store_pointer_unit,FUNCTION,_name.c_str());
     if (PORT_READ(in_NRESET) == 0)
 …
           if (PORT_READ(in_INSERT_VAL [i]) and internal_INSERT_ACK [i])
+            {
 //            log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"INSERT [%d]",i);
+              log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * INSERT [%d]",i);
               switch (internal_INSERT_OPERATION_USE [i])
 …
                 case OPERATION_USE_STORE_QUEUE :
+                  {
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * use STORE_QUEUE");
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * use STORE_QUEUE");
                     uint32_t   lsq = internal_INSERT_LSQ [i];
                     Tlsq_ptr_t ptr = internal_INSERT_PTR [i];
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * lsq : %d",lsq);
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * ptr : %d",ptr);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * lsq : %d",lsq);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * ptr : %d",ptr);
                     reg_STORE_QUEUE_PTR_WRITE [lsq]      = (ptr+1)%_param->_size_store_queue[lsq];
 …
                 case OPERATION_USE_LOAD_QUEUE :
+                  {
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * use LOAD_QUEUE");
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * use LOAD_QUEUE");
                     uint32_t   lsq = internal_INSERT_LSQ [i];
                     Tlsq_ptr_t ptr = internal_INSERT_PTR [i];
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * lsq : %d",lsq);
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * ptr : %d",ptr);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * lsq : %d",lsq);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * ptr : %d",ptr);
                     reg_LOAD_QUEUE_PTR_WRITE [lsq]      = (ptr+1)%_param->_size_load_queue[lsq];
 …
           if (PORT_READ(in_RETIRE_VAL [i]) and internal_RETIRE_ACK [i])
+            {
 //            log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"RETIRE [%d]",i);
+              log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * RETIRE [%d]",i);
               switch (internal_RETIRE_OPERATION_USE [i])
 …
                 case OPERATION_USE_STORE_QUEUE :
+                  {
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * use STORE_QUEUE");
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * use STORE_QUEUE");
                     uint32_t   lsq = internal_RETIRE_LSQ [i];
                     Tlsq_ptr_t ptr = internal_RETIRE_PTR [i];
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * lsq : %d",lsq);
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * ptr : %d",ptr);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * lsq : %d",lsq);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * ptr : %d",ptr);
 //                  reg_STORE_QUEUE_PTR_WRITE [lsq]      = ((ptr==0)?_param->_size_store_queue[lsq]:ptr)-1;
 …
                 case OPERATION_USE_LOAD_QUEUE :
+                  {
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * use LOAD_QUEUE");
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * use LOAD_QUEUE");
                     uint32_t   lsq = internal_RETIRE_LSQ [i];
                     Tlsq_ptr_t ptr = internal_RETIRE_PTR [i];
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * lsq : %d",lsq);
 //                  log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * ptr : %d",ptr);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * lsq : %d",lsq);
+                    log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * ptr : %d",ptr);
 //                  reg_LOAD_QUEUE_PTR_WRITE [lsq]      = ((ptr==0)?_param->_size_load_queue[lsq]:ptr)-1;
 …
+      }
+    // ===================================================================
+    // =====[ OTHER ]=====================================================
+    // ===================================================================
+//     for (uint32_t i=0; i<_param->_nb_load_store_queue; i++)
+//       {
+//      std::string str;
+//      log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"LOAD_STORE_QUEUE [%d]",i);
+//      log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * STORE_QUEUE_PTR_WRITE : %d",reg_STORE_QUEUE_PTR_WRITE [i]);
+//      log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * STORE_QUEUE_NB_USE    : %d",reg_STORE_QUEUE_NB_USE    [i]);
+//      str = "";
+//      for (uint32_t j=0; j<_param->_size_store_queue[i]; j++)
+//        str += toString(reg_STORE_QUEUE_USE [i][j]) + " ";
+//      log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * %s",str.c_str());
+//      log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * LOAD_QUEUE_PTR_WRITE  : %d",reg_LOAD_QUEUE_PTR_WRITE [i]);
+//      str = "";
+//      for (uint32_t j=0; j<_param->_size_load_queue[i]; j++)
+//        str += toString(reg_LOAD_QUEUE_USE [i][j]) + " ";
+//      log_printf(TRACE,Load_Store_pointer_unit,FUNCTION," * %s",str.c_str());
+//       }
+#if (DEBUG >= DEBUG_TRACE) and (DEBUG_Commit_unit == true)
+    {
+      log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"  * Dump Load_Store_pointer Unit");
+      for (uint32_t i=0; i<_param->_nb_load_store_queue; ++i)
+        {
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"    * Load_Store_unit [%d]",i);
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"      * reg_STORE_QUEUE_NB_USE    : %d", reg_STORE_QUEUE_NB_USE   [i]);
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"      * reg_STORE_QUEUE_PTR_WRITE : %d", reg_STORE_QUEUE_PTR_WRITE[i]);
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"      * reg_STORE_QUEUE_USE       :");
+          for (uint32_t j=0; j<_param->_size_store_queue [i]; ++j)
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"        [%d] %d",j,reg_STORE_QUEUE_USE [i][j]);
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"      * reg_LOAD_QUEUE_PTR_WRITE  : %d", reg_LOAD_QUEUE_PTR_WRITE [i]);
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"      * reg_LOAD_QUEUE_USE        :");
+          for (uint32_t j=0; j<_param->_size_load_queue [i]; ++j)
+          log_printf(TRACE,Load_Store_pointer_unit,FUNCTION,"        [%d] %d",j,reg_LOAD_QUEUE_USE [i][j]);
+        }
+    }
+#endif
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
 …
 #endif
     log_printf(FUNC,Load_Store_pointer_unit,FUNCTION,"End");
+    log_end(Load_Store_pointer_unit,FUNCTION);
   };

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Load_Store_pointer_unit/src/Parameters.cpp

-                      r88
+                      r110
   Parameters::Parameters (uint32_t    nb_front_end                    ,
                           uint32_t  * nb_context                      ,
 //                           uint32_t    size_front_end_id               ,
 //                           uint32_t    size_context_id                 ,
+//                        uint32_t    size_front_end_id               ,
+//                        uint32_t    size_context_id                 ,
                           uint32_t    nb_load_store_queue             ,
                           uint32_t  * size_store_queue                ,
                           uint32_t  * size_load_queue                 ,
+                          uint32_t  * nb_inst_memory                  ,
                           uint32_t ** link_load_store_unit_with_thread,
                           uint32_t    nb_inst_insert                  ,
 …
     _size_store_queue                 = size_store_queue                ;
     _size_load_queue                  = size_load_queue                 ;
+    _nb_inst_memory                   = nb_inst_memory                  ;
     _link_load_store_unit_with_thread = link_load_store_unit_with_thread;
     _nb_inst_insert                   = nb_inst_insert                  ;
     _nb_inst_retire                   = nb_inst_retire                  ;
     test();
+    _max_size_store_queue             = max<uint32_t>(_size_store_queue,_nb_load_store_queue);
+    _max_size_load_queue              = max<uint32_t>(_size_load_queue ,_nb_load_store_queue);
     if (is_toplevel)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/include/Free_List_unit.h

-                      r109
+                      r110
 #ifdef STATISTICS
   public    : Stat                           * _stat;
+  private   : counter_t                      * _stat_nb_inst_pop     ;
+  private   : counter_t                      * _stat_nb_inst_pop_gpr ;
+  private   : counter_t                      * _stat_nb_inst_pop_spr ;
+  private   : counter_t                      * _stat_nb_inst_push_gpr;
+  private   : counter_t                      * _stat_nb_inst_push_spr;
+  private   : counter_t                     ** _stat_bank_gpr_nb_elt ; //[nb_bank]
+  private   : counter_t                     ** _stat_bank_spr_nb_elt ; //[nb_bank]
 #endif
 …
 #ifdef STATISTICS
+  public  : void        statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
 #endif
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit.cpp

-                      r88
+                      r110
         log_printf(INFO,Free_List_unit,FUNCTION,"Allocation of statistics");
         statistics_declaration(param_statistics);
+        statistics_allocation(param_statistics);
+      }
 #endif
 …
 #ifdef STATISTICS
     if (usage_is_set(_usage,USE_STATISTICS))
+      {
+        log_printf(INFO,Free_List_unit,FUNCTION,"Generate Statistics file");
+        delete _stat;
+      }
+      statistics_deallocation ();
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_statistics_allocation.cpp

-                      r108
+                      r110
 #undef  FUNCTION
 #define FUNCTION "Free_List_unit::statistics_declaration"
   void Free_List_unit::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics)
+#define FUNCTION "Free_List_unit::statistics_allocation"
+  void Free_List_unit::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
     log_printf(FUNC,Free_List_unit,FUNCTION,"Begin");
 …
                       "Free_List_unit",
                       param_statistics);
+    std::string sum_bank_gpr_nb_elt = "0";
+    _stat_bank_gpr_nb_elt = new counter_t * [_param->_nb_bank];
+    for (uint32_t i=0; i<_param->_nb_bank; ++i)
+      {
+        std::string str = "bank_gpr_nb_elt_"+toString(i);
+        sum_bank_gpr_nb_elt = "+ "+str+" "+sum_bank_gpr_nb_elt;
+        _stat_bank_gpr_nb_elt [i]  = _stat->create_variable(str);
+        _stat->create_expr_average_by_cycle("average_occupation_bank_gpr_"+toString(i), str, "", toString(_("Average free list occupation (bank %d)"),i));
+        _stat->create_expr_percent         ("percent_occupation_bank_gpr_"+toString(i) , "average_occupation_bank_gpr_"+toString(i), toString(_param->_bank_gpr_nb_slot), toString(_("Percent free list occupation (bank %d)"),i));
+      }
+    _stat->create_expr_average_by_cycle("average_occupation_bank_gpr", sum_bank_gpr_nb_elt, "", _("Average free list occupation (bank all)"));
+    _stat->create_expr_percent         ("percent_occupation_bank_gpr", "average_occupation_bank_gpr", toString(_param->_bank_gpr_nb_slot*_param->_nb_bank), _("Percent free list occupation (bank all)"));
+    std::string sum_bank_spr_nb_elt = "0";
+    _stat_bank_spr_nb_elt = new counter_t * [_param->_nb_bank];
+    for (uint32_t i=0; i<_param->_nb_bank; ++i)
+      {
+        std::string str = "bank_spr_nb_elt_"+toString(i);
+        sum_bank_spr_nb_elt = "+ "+str+" "+sum_bank_spr_nb_elt;
+        _stat_bank_spr_nb_elt [i]  = _stat->create_variable(str);
+        _stat->create_expr_average_by_cycle("average_occupation_bank_spr_"+toString(i), str, "", toString(_("Average free list occupation (bank %d)"),i));
+        _stat->create_expr_percent         ("percent_occupation_bank_spr_"+toString(i) , "average_occupation_bank_spr_"+toString(i), toString(_param->_bank_spr_nb_slot), toString(_("Percent free list occupation (bank %d)"),i));
+      }
+    _stat->create_expr_average_by_cycle("average_occupation_bank_spr", sum_bank_spr_nb_elt, "", _("Average free list occupation (bank all)"));
+    _stat->create_expr_percent         ("percent_occupation_bank_spr", "average_occupation_bank_spr", toString(_param->_bank_spr_nb_slot*_param->_nb_bank), _("Percent free list occupation (bank all)"));
+    _stat_nb_inst_pop      = _stat->create_variable("nb_inst_pop"     );
+    _stat_nb_inst_pop_gpr  = _stat->create_variable("nb_inst_pop_gpr" );
+    _stat_nb_inst_pop_spr  = _stat->create_variable("nb_inst_pop_spr" );
+    _stat_nb_inst_push_gpr = _stat->create_variable("nb_inst_push_gpr");
+    _stat_nb_inst_push_spr = _stat->create_variable("nb_inst_push_spr");
+    _stat->create_expr_average_by_cycle("average_use_interface_pop"     , "nb_inst_pop"     , "", _("Average instruction per cycle on pop interface"));
+    _stat->create_expr_average_by_cycle("average_use_interface_pop_gpr" , "nb_inst_pop_gpr" , "", _("Average instruction per cycle on pop interface for gpr"));
+    _stat->create_expr_average_by_cycle("average_use_interface_pop_spr" , "nb_inst_pop_spr" , "", _("Average instruction per cycle on pop interface for spr"));
+    _stat->create_expr_average_by_cycle("average_use_interface_push_gpr", "nb_inst_push_gpr", "", _("Average instruction per cycle on push_gpr interface"));
+    _stat->create_expr_average_by_cycle("average_use_interface_push_spr", "nb_inst_push_spr", "", _("Average instruction per cycle on push_spr interface"));
+    _stat->create_expr_percent         ("percent_inst_pop_need_gpr"     , "nb_inst_pop_gpr" , "nb_inst_pop", _("Percent of pop instruction that need gpr"));
+    _stat->create_expr_percent         ("percent_inst_pop_need_spr"     , "nb_inst_pop_spr" , "nb_inst_pop", _("Percent of pop instruction that need spr"));
     log_printf(FUNC,Free_List_unit,FUNCTION,"End");
   };

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Free_List_unit/src/Free_List_unit_transition.cpp

-                      r109
+                      r110
               log_printf(TRACE,Free_List_unit,FUNCTION,"  * POP [%d]",i);
+#ifdef STATISTICS
+              (*_stat_nb_inst_pop) ++;
+#endif
               if (PORT_READ(in_POP_GPR_VAL [i]))
+                _gpr_list [internal_POP_GPR_BANK[i]].pop_front();
+                {
+#ifdef STATISTICS
+                  (*_stat_nb_inst_pop_gpr) ++;
+#endif
+                  _gpr_list [internal_POP_GPR_BANK[i]].pop_front();
+                }
               if (PORT_READ(in_POP_SPR_VAL [i]))
+                _spr_list [internal_POP_SPR_BANK[i]].pop_front();
+                {
+#ifdef STATISTICS
+                  (*_stat_nb_inst_pop_spr) ++;
+#endif
+                  _spr_list [internal_POP_SPR_BANK[i]].pop_front();
+                }
+            }
 …
               log_printf(TRACE,Free_List_unit,FUNCTION,"    * num_reg : %d",PORT_READ(in_PUSH_GPR_NUM_REG [i]));
+#ifdef STATISTICS
+              (*_stat_nb_inst_push_gpr) ++;
+#endif
               _gpr_list [internal_PUSH_GPR_BANK[i]].push_back(PORT_READ(in_PUSH_GPR_NUM_REG [i]));
+            }
 …
               log_printf(TRACE,Free_List_unit,FUNCTION,"    * num_reg : %d",PORT_READ(in_PUSH_SPR_NUM_REG [i]));
+#ifdef STATISTICS
+              (*_stat_nb_inst_push_spr) ++;
+#endif
               _spr_list [internal_PUSH_SPR_BANK[i]].push_back(PORT_READ(in_PUSH_SPR_NUM_REG [i]));
+            }
+#ifdef STATISTICS
+          for (uint32_t i=0; i<_param->_nb_bank; ++i)
+            {
+              (*(_stat_bank_gpr_nb_elt [i])) += _gpr_list[i].size();
+              (*(_stat_bank_spr_nb_elt [i])) += _spr_list[i].size();
+            }
+#endif
 #if (DEBUG >= DEBUG_TRACE) and (DEBUG_Free_List_unit == true)
 …
         if (1)
           for (uint32_t i=0; i<_param->_nb_bank; ++i)
+          {
+            {
             for (std::list<Tgeneral_address_t>::iterator it1=_gpr_list[i].begin();
                  it1!=_gpr_list[i].end();

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h

-                      r98
+                      r110
 #ifdef STATISTICS
   public    : Stat                           * _stat;
+  private   : counter_t                      * _stat_nb_inst_issue_rename_select;
+  private   : counter_t                      * _stat_nb_inst_issue_rename_select_req;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_commit           ;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_rat_rename       ;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_rat_insert       ;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_free_list        ;
+  private   : counter_t                      * _stat_nb_inst_issue_stall_by_stat_list        ;
 #endif
 …
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+#ifdef STATISTICS
+  private   : Tcontrol_t                    * internal_INSERT_RENAME_ACK; //[nb_inst_insert]
+#endif
 #endif
 …
 #ifdef STATISTICS
+  public  : void        statistics_declaration    (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_allocation     (morpheo::behavioural::Parameters_Statistics * param_statistics);
+  public  : void        statistics_deallocation   (void);
 #endif
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp

-                      r88
+                      r110
         log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation of statistics");
         statistics_declaration(param_statistics);
+        statistics_allocation(param_statistics);
+      }
 #endif
 …
 #ifdef STATISTICS
     if (usage_is_set(_usage,USE_STATISTICS))
+      {
+        log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Generate Statistics file");
+        delete _stat;
+      }
+      statistics_deallocation ();
 #endif

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp

-                      r98
+                      r110
+    }
+#ifdef STATISTICS
+    ALLOC1(internal_INSERT_RENAME_ACK, Tcontrol_t,_param->_nb_inst_insert);
+#endif
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 #ifdef POSITION
     if (usage_is_set(_usage,USE_POSITION))

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp

-                      r98
+                      r110
         DELETE1_SIGNAL( in_RETIRE_STAT_LIST_ACK,_param->_nb_inst_retire,1);
+#ifdef STATISTICS
+        DELETE1(internal_INSERT_RENAME_ACK, _param->_nb_inst_insert);
+#endif
+      }
     // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert_valack.cpp

-                      r88
+                      r110
         log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * stat_list_ack  (r): %d",stat_list_ack );
+#ifdef STATISTICS
+        internal_INSERT_RENAME_ACK [i] = rename_ack;
+#endif
         PORT_WRITE(out_INSERT_RENAME_ACK     [i], rename_ack    );

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp

-                      r88
+                      r110
         Tcontrol_t stat_list_ack = PORT_READ(in_RETIRE_STAT_LIST_ACK [i]);
+        PORT_WRITE(out_RETIRE_ACK           [i], rat_ack and stat_list_ack);
+        PORT_WRITE(out_RETIRE_RAT_VAL       [i], val and stat_list_ack);
+        PORT_WRITE(out_RETIRE_STAT_LIST_VAL [i], val and rat_ack);
+        Tcontrol_t ack           = (true
+//                                     and val
+                                    and rat_ack
+                                    and stat_list_ack
+                                    );
+        Tcontrol_t rat_val       = (true
+                                    and val
+//                                     and rat_ack
+                                    and stat_list_ack
+                                    );
+        Tcontrol_t stat_list_val = (true
+                                    and val
+                                    and rat_ack
+//                                     and stat_list_ack
+                                    );
+        PORT_WRITE(out_RETIRE_ACK           [i], ack          );
+        PORT_WRITE(out_RETIRE_RAT_VAL       [i], rat_val      );
+        PORT_WRITE(out_RETIRE_STAT_LIST_VAL [i], stat_list_val);
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"  * inst_insert [%d]",i);
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * val            (r): %d",val           );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * ack            (w): %d",ack           );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rat_val        (w): %d",rat_val       );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * rat_ack        (r): %d",rat_ack       );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * stat_list_val  (w): %d",stat_list_val );
+        log_printf(TRACE,Register_translation_unit_Glue,FUNCTION,"    * stat_list_ack  (r): %d",stat_list_ack );
+      }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_statistics_allocation.cpp

-                      r108
+                      r110
 #undef  FUNCTION
 #define FUNCTION "Register_translation_unit_Glue::statistics_declaration"
   void Register_translation_unit_Glue::statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics)
+#define FUNCTION "Register_translation_unit_Glue::statistics_allocation"
+  void Register_translation_unit_Glue::statistics_allocation (morpheo::behavioural::Parameters_Statistics * param_statistics)
+  {
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
 …
                       "Register_translation_unit_Glue",
                       param_statistics);
+    _stat_nb_inst_issue_rename_select        = _stat->create_variable("nb_inst_issue_rename_select");
+    _stat_nb_inst_issue_rename_select_req    = _stat->create_variable("nb_inst_issue_rename_select_req");
+    _stat_nb_inst_issue_stall_by_commit      = _stat->create_variable("nb_inst_issue_stall_by_commit");
+    _stat_nb_inst_issue_stall_by_rat_rename  = _stat->create_variable("nb_inst_issue_stall_by_rat_rename");
+    _stat_nb_inst_issue_stall_by_rat_insert  = _stat->create_variable("nb_inst_issue_stall_by_rat_insert");
+    _stat_nb_inst_issue_stall_by_free_list   = _stat->create_variable("nb_inst_issue_stall_by_free_list");
+    _stat_nb_inst_issue_stall_by_stat_list   = _stat->create_variable("nb_inst_issue_stall_by_stat_list");
+//  std::string nb_inst_issue_stall = "+ + + nb_inst_issue_stall_by_commit nb_inst_issue_stall_by_rat_rename + nb_inst_issue_stall_by_rat_insert nb_inst_issue_stall_by_free_list + nb_inst_issue_stall_by_stat_list nb_inst_issue_stall_by_rename_select";
+    std::string nb_inst_issue_stall = "+ + + nb_inst_issue_stall_by_commit nb_inst_issue_stall_by_rat_rename + nb_inst_issue_stall_by_rat_insert nb_inst_issue_stall_by_free_list nb_inst_issue_stall_by_stat_list";
+    _stat->create_expr_average_by_cycle("average_req_interface_insert", "nb_inst_issue_rename_select_req", "", _("Average instruction by cycle on issue interface (request)"));
+    _stat->create_expr_average_by_cycle("average_use_interface_insert", "nb_inst_issue_rename_select"    , "", _("Average instruction by cycle on issue interface"));
+//  _stat->create_expr_percent ("percent_issue_stall_by_rename_select", "nb_inst_issue_stall_by_rename_select", nb_inst_issue_stall, _("Percent of instruction stalled by Rename_Select"));
+    _stat->create_expr_percent ("percent_issue_stall_by_commit"       , "nb_inst_issue_stall_by_commit", nb_inst_issue_stall, _("Percent of instruction stalled by Commit_unit or Issue_queue or RegisterFile"));
+    _stat->create_expr_percent ("percent_issue_stall_by_rat_rename"   , "nb_inst_issue_stall_by_rat_rename", nb_inst_issue_stall, _("Percent of instruction stalled by Rat_Rename"));
+    _stat->create_expr_percent ("percent_issue_stall_by_rat_insert"   , "nb_inst_issue_stall_by_rat_insert", nb_inst_issue_stall, _("Percent of instruction stalled by Rat_Insert"));
+    _stat->create_expr_percent ("percent_issue_stall_by_free_list"    , "nb_inst_issue_stall_by_free_list", nb_inst_issue_stall, _("Percent of instruction stalled by Free_List"));
+    _stat->create_expr_percent ("percent_issue_stall_by_stat_list"    , "nb_inst_issue_stall_by_stat_list", nb_inst_issue_stall, _("Percent of instruction stalled by Stat_List"));
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End");

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_transition.cpp

-                      r81
+                      r110
     log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin");
+#ifdef STATISTICS
+    if (usage_is_set(_usage,USE_STATISTICS))
+      {
+        for (uint32_t i=0; i<_param->_nb_inst_insert; ++i)
+          // Test request
+          if (PORT_READ(in_INSERT_RENAME_VAL [i]))
+            {
+              (* _stat_nb_inst_issue_rename_select_req) ++;
+              if (internal_INSERT_RENAME_ACK [i])
+                (* _stat_nb_inst_issue_rename_select)++;
+              if (PORT_READ(in_INSERT_INSERT_ACK     [i]) == 0)
+                (*_stat_nb_inst_issue_stall_by_commit    ) ++;
+              if (PORT_READ(in_INSERT_RAT_RENAME_ACK [i]) == 0)
+                (*_stat_nb_inst_issue_stall_by_rat_rename) ++;
+              if (PORT_READ(in_INSERT_RAT_INSERT_ACK [i]) == 0)
+                (*_stat_nb_inst_issue_stall_by_rat_insert) ++;
+              if (PORT_READ(in_INSERT_FREE_LIST_ACK  [i]) == 0)
+                (*_stat_nb_inst_issue_stall_by_free_list ) ++;
+              if (PORT_READ(in_INSERT_STAT_LIST_ACK  [i]) == 0)
+                (*_stat_nb_inst_issue_stall_by_stat_list ) ++;
+            }
+      }
+#endif
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)
     end_cycle ();

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_select/src/Rename_select_genMealy.cpp

-                      r108
+                      r110
     for (uint32_t i=0; i<_param->_nb_inst_rename; i++)
+      {
         log_printf(TRACE,Rename_select,FUNCTION,"  * inst_rename [%d]",i);
+        log_printf(TRACE,Rename_select,FUNCTION,"  * RENAME_OUT [%d]",i);
         // Scan all instruction until find
 …
                 log_printf(TRACE,Rename_select,FUNCTION,"      * rename_out_ack       : %d",PORT_READ(in_RENAME_OUT_ACK[i]));
                 Tcontext_t     front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_IN_FRONT_END_ID [x][y]):0;
                 Tcontext_t     context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_IN_CONTEXT_ID   [x][y]):0;
+                Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_RENAME_IN_FRONT_END_ID [x][y]):0;
+                Tcontext_t context_id   = (_param->_have_port_context_id  )?PORT_READ(in_RENAME_IN_CONTEXT_ID   [x][y]):0;
+                Tcontrol_t     no_execute   = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]));
+                Tcontrol_t read_ra  = (PORT_READ(in_RENAME_IN_READ_RA  [x][y]));
+                Tcontrol_t read_rb  = (PORT_READ(in_RENAME_IN_READ_RB  [x][y]));
+                Tcontrol_t read_rc  = (PORT_READ(in_RENAME_IN_READ_RC  [x][y]));
+                Tcontrol_t write_rd = (PORT_READ(in_RENAME_IN_WRITE_RD [x][y]));
+                Tcontrol_t write_re = (PORT_READ(in_RENAME_IN_WRITE_RE [x][y]));
+                Tcontrol_t no_execute   = (PORT_READ(in_RENAME_IN_NO_EXECUTE [x][y]));
+                Tcontrol_t read_ra      = (PORT_READ(in_RENAME_IN_READ_RA    [x][y]));
+                Tcontrol_t read_rb      = (PORT_READ(in_RENAME_IN_READ_RB    [x][y]));
+                Tcontrol_t read_rc      = (PORT_READ(in_RENAME_IN_READ_RC    [x][y]));
+                Tcontrol_t write_rd     = (PORT_READ(in_RENAME_IN_WRITE_RD   [x][y]));
+                Tcontrol_t write_re     = (PORT_READ(in_RENAME_IN_WRITE_RE   [x][y]));
                 // Attention, j'ai enlevé event_state de la liste de sensibilité

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_insert_valack.cpp

r88	r110
25	25	log_function(Rename_unit_Glue,FUNCTION,_name.c_str());
26	26
27		// // Transaction must be in-order
	27	// // Transaction must be in-order - made in rename_select
28	28	// Tcontrol_t previous_transaction = true;
29	29

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Rename_unit_Glue/src/Rename_unit_Glue_genMealy_retire_valack.cpp

-                      r88
+                      r110
     log_function(Rename_unit_Glue,FUNCTION,_name.c_str());
     // Transaction must be in-order
     Tcontrol_t previous_transaction = true;
+    // Transaction must be in-order - made in commit_unit
+//     Tcontrol_t previous_transaction = true;
     for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
 …
         Tcontrol_t REGISTER_TRANSLATION_ACK     = PORT_READ(in_RETIRE_REGISTER_TRANSLATION_ACK     [i]);
         Tcontrol_t ACK                          = (previous_transaction         and
+        Tcontrol_t ACK                          = (// previous_transaction         and
                                                    LOAD_STORE_QUEUE_POINTER_ACK and
                                                    REGISTER_TRANSLATION_ACK     );
         Tcontrol_t LOAD_STORE_QUEUE_POINTER_VAL = (previous_transaction         and
+        Tcontrol_t LOAD_STORE_QUEUE_POINTER_VAL = (// previous_transaction         and
                                                    VAL                          and
                                                    REGISTER_TRANSLATION_ACK     );
         Tcontrol_t REGISTER_TRANSLATION_VAL     = (previous_transaction         and
+        Tcontrol_t REGISTER_TRANSLATION_VAL     = (// previous_transaction         and
                                                    VAL                          and
                                                    LOAD_STORE_QUEUE_POINTER_ACK );
 …
         PORT_WRITE(out_RETIRE_REGISTER_TRANSLATION_VAL     [i], REGISTER_TRANSLATION_VAL    );
+        previous_transaction = VAL and ACK;
+//      previous_transaction = VAL and ACK;
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"  * retire [%d]",i);
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * val (commit_unit)            (r) : %d",VAL                         );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * ack (commit_unit)            (w) : %d",ACK                         );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * register_translation_val     (w) : %d",REGISTER_TRANSLATION_VAL    );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * register_translation_ack     (r) : %d",REGISTER_TRANSLATION_ACK    );
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * load_store_queue_pointer_val (w) : %d",LOAD_STORE_QUEUE_POINTER_VAL);
+        log_printf(TRACE,Rename_unit_Glue,FUNCTION,"    * load_store_queue_pointer_ack (r) : %d",LOAD_STORE_QUEUE_POINTER_ACK);
+      }

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-min.cfg

r88	r110
8	8	2 2 +1 # size_store_queue [0] [nb_load_store_queue]
9	9	1 1 +1 # size_load_queue [0] [nb_load_store_queue]
	10	1 1 +1 # nb_inst_memory [0] [nb_load_store_queue]
10	11	0 0 +1 # link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
11	12	1 1 +1 # rename_select_priority

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_1a.cfg

r88	r110
8	8	8 8 +1 # size_store_queue [0] [nb_load_store_queue]
9	9	8 8 +1 # size_load_queue [0] [nb_load_store_queue]
	10	8 8 +1 # nb_inst_memory [0] [nb_load_store_queue]
10	11	0 0 +1 # link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
11	12	1 1 +1 # rename_select_priority

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4a.cfg

r88	r110
8	8	8 8 +1 # size_store_queue [0] [nb_load_store_queue]
9	9	8 8 +1 # size_load_queue [0] [nb_load_store_queue]
	10	4 4 +1 # nb_inst_memory [0] [nb_load_store_queue]
10	11	0 0 +1 # link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
11	12	0 0 +1 # link_load_store_unit_with_thread [0][1] [nb_front_end][nb_context]

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/config-thread_4b.cfg

r88	r110
10	10	8 8 +1 # size_load_queue [0] [nb_load_store_queue]
11	11	4 4 +1 # size_load_queue [1] [nb_load_store_queue]
	12	4 4 +1 # nb_inst_memory [0] [nb_load_store_queue]
	13	2 2 +1 # nb_inst_memory [1] [nb_load_store_queue]
12	14	0 0 +1 # link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]
13	15	1 1 +1 # link_load_store_unit_with_thread [0][1] [nb_front_end][nb_context]

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/SelfTest/src/main.cpp

-                      r88
+                      r110
   err (_(" * size_store_queue                  [nb_load_store_queue]      (uint32_t         )\n"));
   err (_(" * size_load_queue                   [nb_load_store_queue]      (uint32_t         )\n"));
+  err (_(" * nb_inst_memory                    [nb_load_store_queue]      (uint32_t         )\n"));
   err (_(" * link_load_store_unit_with_thread  [nb_front_end][nb_context] (uint32_t         )\n"));
   err (_(" * rename_select_priority                                       (Tpriority_t      )\n"));
 …
   uint32_t             _nb_load_store_queue               = fromString<uint32_t         >(argv[x++]);
   if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_front_end+2*_nb_load_store_queue+_sum_nb_context))
+  if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_front_end+3*_nb_load_store_queue+_sum_nb_context))
     usage (argc, argv);
   uint32_t           * _size_store_queue                  = new uint32_t [_nb_load_store_queue];
   uint32_t           * _size_load_queue                   = new uint32_t [_nb_load_store_queue];
+  uint32_t           * _nb_inst_memory                    = new uint32_t [_nb_load_store_queue];
   for (uint32_t i=0; i<_nb_load_store_queue; i++)
 …
   for (uint32_t i=0; i<_nb_load_store_queue; i++)
     _size_load_queue  [i] = fromString<uint32_t>(argv[x++]);
+  for (uint32_t i=0; i<_nb_load_store_queue; i++)
+    _nb_inst_memory   [i] = fromString<uint32_t>(argv[x++]);
   uint32_t          ** _link_load_store_unit_with_thread  = new uint32_t * [_nb_front_end];
 …
          _size_store_queue                 ,
          _size_load_queue                  ,
+         _nb_inst_memory                   ,
          _link_load_store_unit_with_thread ,
          _rename_select_priority           ,
 …
   delete [] _size_store_queue;
   delete [] _size_load_queue ;
+  delete [] _nb_inst_memory  ;
   delete [] _nb_context      ;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/include/Parameters.h

-                      r88
+                      r110
   public : uint32_t           * _size_store_queue                 ;//[nb_load_store_queue]
   public : uint32_t           * _size_load_queue                  ;//[nb_load_store_queue]
+  public : uint32_t           * _nb_inst_memory                   ;//[nb_load_store_queue]
   public : uint32_t          ** _link_load_store_unit_with_thread ;//[nb_front_end][nb_context]
   public : Tpriority_t          _rename_select_priority           ;
 …
                         uint32_t           * size_store_queue                 ,
                         uint32_t           * size_load_queue                  ,
+                        uint32_t           * nb_inst_memory                   ,
                         uint32_t          ** link_load_store_unit_with_thread ,
                         Tpriority_t          rename_select_priority           ,

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/src/Parameters.cpp

-                      r97
+                      r110
                           uint32_t           * size_store_queue                 ,
                           uint32_t           * size_load_queue                  ,
+                          uint32_t           * nb_inst_memory                   ,
                           uint32_t          ** link_load_store_unit_with_thread ,
                           Tpriority_t          rename_select_priority           ,
 …
     _size_store_queue                  = size_store_queue                 ;
     _size_load_queue                   = size_load_queue                  ;
+    _nb_inst_memory                    = nb_inst_memory                   ;
     _link_load_store_unit_with_thread  = link_load_store_unit_with_thread ;
     _rename_select_priority            = rename_select_priority           ;
 …
        _size_store_queue                ,
        _size_load_queue                 ,
+       _nb_inst_memory                  ,
        _link_load_store_unit_with_thread,
        _nb_inst_insert                  ,

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/configuration.cfg

r108	r110
54	54	2 2 +1 # size_store_queue [0][0] [nb_rename_unit][nb_load_store_queue]
55	55	1 1 +1 # size_load_queue [0][0] [nb_rename_unit][nb_load_store_queue]
	56	1 1 +1 # nb_inst_memory [0][0] [nb_rename_unit][nb_load_store_queue]
56	57	0 0 +1 # link_load_store_unit_with_thread [0][0] [nb_front_end][nb_context]

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/main.cpp

-                      r108
+                      r110
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h"
+#include "Behavioural/include/Allocation.h"
 #define NB_PARAMS 23
 …
   err (_(" * size_store_queue                  [nb_rename_unit][nb_load_store_queue] (uint32_t         )\n"));
   err (_(" * size_load_queue                   [nb_rename_unit][nb_load_store_queue] (uint32_t         )\n"));
+  err (_(" * nb_inst_memory                    [nb_rename_unit][nb_load_store_queue] (uint32_t         )\n"));
   err (_(" * link_load_store_unit_with_thread  [nb_front_end][nb_context]            (uint32_t         )\n"));
 …
+    }
   if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+11*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+2*_sum_nb_load_store_queue))
+  if (argc != static_cast<int>(2+NB_PARAMS+3*_nb_front_end+2*_sum_nb_context+11*_nb_rename_unit+_nb_execute_loop+_nb_rename_unit*_nb_inst_issue+12*_nb_inst_issue+3*_sum_nb_load_store_queue))
     usage (argc, argv);
 …
       for (uint32_t j=0; j<_nb_load_store_queue[i]; j++)
         _size_load_queue [i][j] = fromString<uint32_t>(argv[x++]);
+    }
+  uint32_t           ** _nb_inst_memory                   = new uint32_t * [_nb_rename_unit];
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    {
+      _nb_inst_memory  [i] = new uint32_t [_nb_load_store_queue[i]];
+      for (uint32_t j=0; j<_nb_load_store_queue[i]; j++)
+        _nb_inst_memory  [i][j] = fromString<uint32_t>(argv[x++]);
+    }
 …
+        }
+    }
+  uint32_t          _nb_thread                          ;
+  uint32_t       ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context]
+  ALLOC2(_translate_num_context_to_num_thread,uint32_t,_nb_front_end,_nb_context[it1]);
+  _nb_thread = 0;
+  for (uint32_t i=0; i<_nb_front_end; i++)
+    for (uint32_t j=0; j<_nb_context [i]; j++)
+      _translate_num_context_to_num_thread [i][j] = _nb_thread ++;
   int _return = EXIT_SUCCESS;
 …
          _size_store_queue                 ,
          _size_load_queue                  ,
+         _nb_inst_memory                   ,
          _link_load_store_unit_with_thread ,
          _implement_group                  ,
+         _nb_thread                          ,
+         _translate_num_context_to_num_thread,
          true //is_toplevel
          );
 …
+    }
+  DELETE2(_translate_num_context_to_num_thread,_nb_front_end,_nb_context[it1]);
   for (uint32_t i=0; i<_nb_front_end; i++)
+    {
 …
     delete [] _link_load_store_unit_with_thread [i];
   delete [] _link_load_store_unit_with_thread;
+  for (uint32_t i=0; i<_nb_rename_unit; i++)
+    delete [] _nb_inst_memory  [i];
+  delete [] _nb_inst_memory ;
   for (uint32_t i=0; i<_nb_rename_unit; i++)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/src/test.cpp

-                      r108
+                      r110
 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/SelfTest/include/test.h"
 #include "Behavioural/include/Allocation.h"
+#include "Behavioural/include/Simulation.h"
 void test (string name,
 …
   morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
 #endif
+  simulation_init(0,0);
+  debug_idle_cycle = CYCLE_MAX;
   Tusage_t _usage = USE_ALL;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/Parameters.h

-                      r108
+                      r110
   public : uint32_t           ** _size_store_queue                 ;//[nb_rename_unit][nb_load_store_queue]
   public : uint32_t           ** _size_load_queue                  ;//[nb_rename_unit][nb_load_store_queue]
+  public : uint32_t           ** _nb_inst_memory                   ;//[nb_rename_unit][nb_load_store_queue]
   public : uint32_t           ** _link_load_store_unit_with_thread ;//[nb_front_end][nb_context]
     // SPR
   public : bool              *** _implement_group                  ;//[nb_front_end][nb_context][NB_GROUP]
+    // Others
+  public : uint32_t              _nb_thread                          ;
+  public : uint32_t           ** _translate_num_context_to_num_thread; //[nb_front_end][nb_context]
   public : std::vector<uint32_t>*_link_front_end_with_rename_unit              ;//[nb_rename_unit]
 …
                         uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
                         uint32_t           ** size_load_queue                  ,//[nb_rename_unit][nb_load_store_queue]
+                        uint32_t           ** nb_inst_memory                   ,//[nb_rename_unit][nb_load_store_queue]
                         uint32_t           ** link_load_store_unit_with_thread ,//[nb_front_end][nb_context]
                         // SPR
                         bool              *** implement_group                  ,//[nb_front_end][nb_context][NB_GROUP]
+                        // Others
+                        uint32_t              nb_thread                          ,
+                        uint32_t           ** translate_num_context_to_num_thread, //[nb_front_end][nb_context]
                         bool                  is_toplevel=false
                         );

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/Parameters.cpp

-                      r108
+                      r110
                           uint32_t           ** size_store_queue                 ,//[nb_rename_unit][nb_load_store_queue]
                           uint32_t           ** size_load_queue                  ,//[nb_rename_unit][nb_load_store_queue]
+                          uint32_t           ** nb_inst_memory                   ,//[nb_rename_unit][nb_load_store_queue]
                           uint32_t           ** link_load_store_unit_with_thread ,//[nb_front_end][nb_context]
                           // SPR
                           bool              *** implement_group                  ,//[nb_front_end][nb_context][NB_GROUP]
+                          // Others
+                          uint32_t              nb_thread                          ,
+                          uint32_t           ** translate_num_context_to_num_thread, //[nb_front_end][nb_context]
                           bool                  is_toplevel
 …
     _size_store_queue                  = size_store_queue                 ;
     _size_load_queue                   = size_load_queue                  ;
+    _nb_inst_memory                    = nb_inst_memory                   ;
     _link_load_store_unit_with_thread  = link_load_store_unit_with_thread ;
     _implement_group                   = implement_group                  ;
+    _nb_thread                           = nb_thread                          ;
+    _translate_num_context_to_num_thread = translate_num_context_to_num_thread;
     test();
 …
        _size_store_queue                              [i],
        _size_load_queue                               [i],
+       _nb_inst_memory                                [i],
        _rename_unit_link_load_store_unit_with_thread  [i],
        _rename_select_priority                        [i],
 …
        _commit_priority         ,
        _commit_load_balancing   ,
+       _nb_rename_unit_select
+       _nb_rename_unit_select   ,
+       _nb_thread                          ,
+       _translate_num_context_to_num_thread
        );

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/SelfTest/src/test.cpp

-                      r88
+                      r110
 #include "Behavioural/Core/SelfTest/include/test.h"
 #include "Behavioural/include/Allocation.h"
+#include "Behavioural/include/Simulation.h"
 void test (string name,
 …
   morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,CYCLE_MAX);
 #endif
+  simulation_init(0,0);
+  debug_idle_cycle = CYCLE_MAX;
   Tusage_t _usage = USE_ALL;

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/include/Parameters.h

-                      r97
+                      r110
   public : uint32_t            *** _ooo_engine_size_store_queue                   ;//[nb_ooo_engine][nb_rename_unit][ooo_engine_nb_load_store_unit]
   public : uint32_t            *** _ooo_engine_size_load_queue                    ;//[nb_ooo_engine][nb_rename_unit][ooo_engine_nb_load_store_unit]
+  public : uint32_t            *** _ooo_engine_nb_inst_memory                     ;//[nb_ooo_engine][nb_rename_unit][ooo_engine_nb_load_store_unit]
   public : uint32_t            *** _ooo_engine_link_load_store_unit_with_context  ;//[nb_ooo_engine][ooo_engine_nb_front_end][nb_context]
   public : bool               **** _ooo_engine_implement_group                    ;//[nb_ooo_engine][ooo_engine_nb_front_end][nb_context][NB_GROUP]
+  public : uint32_t            *** _ooo_engine_translate_num_context_to_num_thread;//[nb_ooo_engine][ooo_engine_nb_front_end][nb_context]
   // translate for execute_loop

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/src/Parameters.cpp

-                      r109
+                      r110
+        }
+    ALLOC3(_ooo_engine_translate_num_context_to_num_thread,uint32_t         ,_nb_ooo_engine,_ooo_engine_nb_front_end[it1],_ooo_engine_nb_context[it1][it2]);
+    for (uint32_t i=0; i<_nb_ooo_engine; ++i)
+      for (uint32_t j=0; j<_ooo_engine_nb_front_end[i]; ++j)
+        {
+          uint32_t num_front_end = _translate_ooo_engine_num_front_end [i][j];
+          for (uint32_t k=0; k<_ooo_engine_nb_context[i][j]; ++k)
+            {
+              uint32_t num_thread = _link_thread_with_context[num_front_end][k];
+              _ooo_engine_translate_num_context_to_num_thread [i][j][k] = num_thread;
+            }
+        }
     ALLOC2(_ooo_engine_nb_inst_execute                    ,uint32_t         ,_nb_ooo_engine,_ooo_engine_nb_execute_loop[it1]);
 …
     ALLOC3(_ooo_engine_size_store_queue                   ,uint32_t         ,_nb_ooo_engine,_nb_rename_unit[it1],_ooo_engine_nb_load_store_unit[it1][it2]);
     ALLOC3(_ooo_engine_size_load_queue                    ,uint32_t         ,_nb_ooo_engine,_nb_rename_unit[it1],_ooo_engine_nb_load_store_unit[it1][it2]);
+    ALLOC3(_ooo_engine_nb_inst_memory                     ,uint32_t         ,_nb_ooo_engine,_nb_rename_unit[it1],_ooo_engine_nb_load_store_unit[it1][it2]);
     ALLOC3(_ooo_engine_link_load_store_unit_with_context  ,uint32_t         ,_nb_ooo_engine,_ooo_engine_nb_front_end[it1],_ooo_engine_nb_context[it1][it2]);
 …
               _ooo_engine_size_store_queue [i][j][k] = _size_store_queue[num_load_store_unit];
               _ooo_engine_size_load_queue  [i][j][k] = _size_load_queue [num_load_store_unit];
+              _ooo_engine_nb_inst_memory   [i][j][k] = _nb_inst_memory  [num_load_store_unit];
+            }
 …
        _ooo_engine_size_store_queue                  [i],
        _ooo_engine_size_load_queue                   [i],
+       _ooo_engine_nb_inst_memory                    [i],
        _ooo_engine_link_load_store_unit_with_context [i],
+       _ooo_engine_implement_group                   [i]
+       _ooo_engine_implement_group                   [i],
+       _nb_thread                                       ,
+       _ooo_engine_translate_num_context_to_num_thread[i]
        );

trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Simulation.h

-                      r88
+                      r110
 namespace behavioural          {
+extern double                _simulation_nb_cycle;
+// extern double                _simulation_nb_instruction;
+// extern std::vector<double> * _simulation_nb_instruction_commited;
+  // Warning, now no mutek to protect this variable
+//   class Simulation
+//   {
+//   private : const  uint32_t _num_context;
+//   public  :  Simulation (void);
+//   public  : ~Simulation (void);
+//   public  : void end_cycle (double nb_instruction_commited);
+//   };
+extern double              _simulation_nb_cycle;
+extern double              _simulation_nb_instruction;
+extern std::vector<double> _simulation_nb_instruction_commited;
   bool simulation_test_end (void);
   void simulation_init     (double nb_cycle,
                             double nb_instruction);
 }; // end namespace behavioural
 }; // end namespace morpheo

trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h

-                      r109
+                      r110
 #define MORPHEO_MAJOR_VERSION "0"
 #define MORPHEO_MINOR_VERSION "2"
 #define MORPHEO_REVISION      "109"
+#define MORPHEO_REVISION      "110"
 #define MORPHEO_CODENAME      "Castor"
 #define MORPHEO_DATE_DAY      "16"
+#define MORPHEO_DATE_DAY      "19"
 #define MORPHEO_DATE_MONTH    "02"
 #define MORPHEO_DATE_YEAR     "2009"

trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Simulation.cpp

-                      r88
+                      r110
 namespace behavioural          {
+  static bool            simulation_initialized;
+//   static uint32_t       _simulation_num_context_next;
+  double                _simulation_nb_cycle;
+//   double                _simulation_nb_instruction;
+//   std::vector<double> * _simulation_nb_instruction_commited;
+//   Simulation::Simulation (void):
+//     _num_context (_simulation_num_context_next)
+//   {
+//     // Test if is first context create
+//     if (_simulation_num_context_next == 0)
+//       _simulation_nb_instruction_commited = new std::vector<double>;
+//     _simulation_num_context_next ++;
+//   }
+//   Simulation::~Simulation (void)
+//   {
+//     _simulation_num_context_next --;
+//     // Test if is last context destroy
+//     if (_simulation_num_context_next == 0)
+//       delete _simulation_nb_instruction_commited;
+//   }
+  static bool          simulation_initialized;
+  double              _simulation_nb_cycle;
+  double              _simulation_nb_instruction;
+  std::vector<double> _simulation_nb_instruction_commited;
   void simulation_init (double nb_cycle,
 …
     if (not simulation_initialized)
+      {
 //         _simulation_num_context_next = 0;
         _simulation_nb_cycle         = nb_cycle       ;
 //         _simulation_nb_instruction   = nb_instruction;
+        _simulation_nb_cycle                = nb_cycle;
+        _simulation_nb_instruction          = nb_instruction;
+//      _simulation_nb_instruction_commited = new std::vector<double>;
-        if (nb_instruction != 0)
-          throw ERRORMORPHEO("simulation_init",_("Stop Condition on number instruction is not yet implemented"));
         simulation_initialized = true;
+      }
 …
           _simulation_nb_cycle = nb_cycle;
 //         if (_simulation_nb_instruction < nb_instruction)
 //           _simulation_nb_instruction = nb_instruction;
+        if (_simulation_nb_instruction < nb_instruction)
+          _simulation_nb_instruction = nb_instruction;
+      }
+  }

trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Simulation_test_end.cpp

-                      r88
+                      r110
     // Test if a stop condition is activate
     if ((_simulation_nb_cycle == 0)//  and
 //         (_simulation_nb_instruction == 0)
+    if ((_simulation_nb_cycle == 0) and
+        (_simulation_nb_instruction == 0)
+        )
       return false;
     bool end_cycle = true;
 //     bool end_inst  = true;
+    bool end_cycle;
+    bool end_inst ;
     if (_simulation_nb_cycle != 0)
       end_cycle = (_simulation_nb_cycle <= sc_simulation_time());
+    else
+      end_cycle = true;
+//     if (_simulation_nb_instruction != 0)
+//       {
+//         std::vector<double>::iterator it=_simulation_nb_instruction_commited->begin();
+    if (_simulation_nb_instruction != 0)
+      {
+        end_inst = true;
+        std::vector<double>::iterator it=_simulation_nb_instruction_commited.begin();
+//         // Scan all context and test if all can finish
+//         while (end_inst and it!=_simulation_nb_instruction_commited->end())
+//           {
+//             end_inst &= (*it <= _simulation_nb_instruction);
+//             it ++;
+//           }
+//       }
+        // Scan all context and test if all can finish
+        while (end_inst and it!=_simulation_nb_instruction_commited.end())
+          {
+            end_inst &= (_simulation_nb_instruction <= *it);
+            it ++;
+          }
+      }
+    else
+      end_inst = true;
+    return end_cycle // and end_inst
+      ;
+    return end_cycle and end_inst;
+  }

trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_alloc_operand.cpp

-                      r81
+                      r110
 namespace morpheo {
 namespace behavioural {
+#undef FUNCTION
+#define FUNCTION "Stat::alloc_operand"
   counter_t * Stat::alloc_operand (counter_type_t type, std::string varname, std::string unit, std::string description)
+  {
     if (not is_valid_var (varname))
       throw(ERRORMORPHEO("Stat::alloc_operand",_("Variable is not valid.")));
+      throw(ERRORMORPHEO(FUNCTION,toString(_("<%s> : Variable \"%s\" is not valid."),_name_instance.c_str(),varname.c_str())));
     counter_t * counter = new counter_t;

trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Stat_create_expr.cpp

-                      r85
+                      r110
 namespace behavioural {
+#undef  FUNCTION
+#define FUNCTION "Stat::create_expr"
   void Stat::create_expr (std::string varname,
                           std::string expr,
 …
+  {
     if (is_valid_var (varname))
       throw(ERRORMORPHEO("Stat::create_expr",_("Variable is not valid.")));
+      throw(ERRORMORPHEO(FUNCTION,toString(_("<%s> Variable \"%s\" is not valid."),_name_instance.c_str(),varname.c_str())));
     expr_t expression;

trunk/IPs/systemC/processor/Morpheo/Common/include/Debug.h

-                      r109
+                      r110
   extern double            debug_cycle_start;
   extern double            debug_cycle_stop ;
+  extern double            debug_cycle_idle;
+  extern double            debug_idle_cycle;
+  extern uint32_t          debug_idle_time;
   void        debug_init    (void);
 …
                              double            cycle_start,
                              double            cycle_stop ,
+                             double            cycle_idle);
+                             double            idle_cycle ,
+                             uint32_t          idle_time  );
 #ifdef SYSTEMC

trunk/IPs/systemC/processor/Morpheo/Common/src/Debug.cpp

-                      r109
+                      r110
 double            debug_cycle_start;
 double            debug_cycle_stop ;
+double            debug_cycle_idle;
+double            debug_idle_cycle ;
+uint32_t          debug_idle_time  ;
 #undef  FUNCTION
 …
                  double            cycle_start,
                  double            cycle_stop ,
+                 double            cycle_idle)
+                 double            idle_cycle ,
+                 uint32_t          idle_time  )
+{
   if (not debug_initialized)
 …
 # endif
 #endif
+      debug_cycle_idle = cycle_idle;
+      debug_idle_cycle = idle_cycle;
+      debug_idle_time  = idle_time ;
       debug_initialized = true;

trunk/IPs/systemC/processor/Morpheo/Files/Instance_debug.cfg

-                      r109
+                      r110
   <thread id="0">
     <parameter name="size_ifetch_queue"                     value="16" />
     <parameter name="nb_inst_fetch"                         value="4" />
+    <parameter name="size_ifetch_queue"                     value="32" />
+    <parameter name="nb_inst_fetch"                         value="8" />
     <parameter name="ras_size_queue"                        value="8" />
     <parameter name="upt_size_queue"                        value="8" />
 …
   <decod_bloc id="0">
     <parameter name="size_decod_queue"                      value="8" />
+    <parameter name="size_decod_queue"                      value="16"/>
     <parameter name="nb_inst_decod"                         value="4" />
     <parameter name="nb_context_select"                     value="1" />
 …
   <rename_bloc id="0">
     <parameter name="nb_inst_insert"                        value="4" />
     <parameter name="nb_inst_retire"                        value="1" />
+    <parameter name="nb_inst_retire"                        value="4" />
     <parameter name="rename_select_priority"                value="1" />
     <parameter name="rename_select_load_balancing"          value="1" />
     <parameter name="rename_select_nb_front_end_select"     value="1" />
     <parameter name="nb_general_register"                   value="64"/>
     <parameter name="nb_special_register"                   value="16" />
     <parameter name="nb_reg_free"                           value="4" />
     <parameter name="nb_rename_unit_bank"                   value="4" />
+    <parameter name="nb_general_register"                   value="256"/>
+    <parameter name="nb_special_register"                   value="128" />
+    <parameter name="nb_reg_free"                           value="8" />
+    <parameter name="nb_rename_unit_bank"                   value="8" />
     <parameter name="size_read_counter"                     value="4" />
   </rename_bloc>
 …
   </read_bloc>
   <write_bloc id="0,1,2,3">
+  <write_bloc id="0,1,2,3,4,5,6">
     <parameter name="size_write_queue"                      value="4" />
     <parameter name="size_execute_queue"                    value="4" />
 …
     <parameter name="nb_inst_issue"                         value="4" />
     <parameter name="nb_inst_reexecute"                     value="1" />
     <parameter name="nb_inst_commit"                        value="1" />
+    <parameter name="nb_inst_commit"                        value="4" />
     <parameter name="nb_inst_branch_complete"               value="1" />
     <parameter name="nb_rename_unit_select"                 value="1" />
     <parameter name="nb_execute_loop_select"                value="1" />
     <parameter name="size_re_order_buffer"                  value="32" />
     <parameter name="nb_re_order_buffer_bank"               value="4" />
+    <parameter name="nb_re_order_buffer_bank"               value="8" />
     <parameter name="commit_priority"                       value="1" />
     <parameter name="commit_load_balancing"                 value="1" />
 …
   <execute_loop id="0">
     <parameter name="nb_read_unit"                          value="4" />
     <parameter name="nb_write_unit"                         value="4" />
+    <parameter name="nb_write_unit"                         value="7" />
     <parameter name="nb_execute_unit"                       value="4" />
     <parameter name="nb_gpr_bank"                           value="1" />
 …
   <link name="link_write_unit_with_write_bloc"         src="2"     dest="0.2" />
   <link name="link_write_unit_with_write_bloc"         src="3"     dest="0.3" />
+  <link name="link_write_unit_with_write_bloc"         src="4"     dest="0.4" />
+  <link name="link_write_unit_with_write_bloc"         src="5"     dest="0.5" />
+  <link name="link_write_unit_with_write_bloc"         src="6"     dest="0.6" />
   <link name="link_decod_bloc_with_thread"             src="0"     dest="0"   />
   <link name="link_rename_bloc_with_front_end"         src="0"     dest="0"   />
 …
   <link name="link_write_bloc_and_load_store_unit"     src="0.0"   dest="1"   />
   <link name="link_write_bloc_and_load_store_unit"     src="1.0"   dest="1"   />
+  <link name="link_write_bloc_and_load_store_unit"     src="2.0"   dest="1"   />
+  <link name="link_write_bloc_and_load_store_unit"     src="3.0"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="0.0"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="1.0"   dest="1"   />
+  <link name="link_write_bloc_and_load_store_unit"     src="2.0"   dest="0"   />
+  <link name="link_write_bloc_and_load_store_unit"     src="3.0"   dest="0"   />
+  <link name="link_write_bloc_and_load_store_unit"     src="4.0"   dest="0"   />
+  <link name="link_write_bloc_and_load_store_unit"     src="5.0"   dest="0"   />
+  <link name="link_write_bloc_and_load_store_unit"     src="6.0"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="0.0"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="1.0"   dest="0"   />
   <link name="link_write_bloc_and_functionnal_unit"    src="2.0"   dest="1"   />
   <link name="link_write_bloc_and_functionnal_unit"    src="3.0"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="0.1"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="1.1"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="4.0"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="5.0"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="6.0"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="0.1"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="1.1"   dest="0"   />
   <link name="link_write_bloc_and_functionnal_unit"    src="2.1"   dest="1"   />
   <link name="link_write_bloc_and_functionnal_unit"    src="3.1"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="0.2"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="1.2"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="2.2"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="3.2"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="4.1"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="5.1"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="6.1"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="0.2"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="1.2"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="2.2"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="3.2"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="4.2"   dest="0"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="5.2"   dest="1"   />
+  <link name="link_write_bloc_and_functionnal_unit"    src="6.2"   dest="1"   />
   <link name="link_thread_and_functionnal_unit"        src="0.0"   dest="1"   />
   <link name="link_thread_and_functionnal_unit"        src="0.1"   dest="1"   />

trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.gen

-                      r109
+                      r110
 <parameters >
   <parameter name="size_data"                             min="32"  max="64"   step="* 2" default="32"  level="..." description="..." />
   <parameter name="dispatch_priority"                     min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="dispatch_load_balancing"               min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="dispatch_priority"                     min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="dispatch_load_balancing"               min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_icache_port"                        min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="icache_port_priority"                  min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="icache_port_load_balancing"            min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="icache_port_priority"                  min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="icache_port_load_balancing"            min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_dcache_port"                        min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="dcache_port_priority"                  min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="dcache_port_load_balancing"            min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="dcache_port_priority"                  min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="dcache_port_load_balancing"            min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_thread"                             min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="size_ifetch_queue"                     min="1"   max="16"   step="* 2" default="2"   level="..." description="..." />
+  <parameter name="nb_thread"                             min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="size_ifetch_queue"                     min="1"   max="32"   step="* 2" default="2"   level="..." description="..." />
   <parameter name="nb_inst_fetch"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="implement_group"                                                       default="0"   level="..." description="..." />
 …
   <parameter name="ufpt_size_queue"                       min="1"   max="8"    step="* 2" default="2"   level="..." description="..." />
   <parameter name="nb_decod_bloc"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="size_decod_queue"                      min="1"   max="8"    step="* 2" default="2"   level="..." description="..." />
   <parameter name="nb_inst_decod"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_context_select"                     min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="nb_decod_bloc"                         min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="size_decod_queue"                      min="1"   max="32"   step="+ 1" default="2"   level="..." description="..." />
+  <parameter name="nb_inst_decod"                         min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="nb_context_select"                     min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="context_select_priority"               min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="context_select_load_balancing"         min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
 …
   <parameter name="rename_select_nb_front_end_select"     min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_general_register"                   min="64"  max="1024" step="* 2" default="64"  level="..." description="..." />
   <parameter name="nb_special_register"                   min="4"   max="64"   step="* 2" default="4"   level="..." description="..." />
+  <parameter name="nb_special_register"                   min="4"   max="512"  step="* 2" default="4"   level="..." description="..." />
   <parameter name="nb_reg_free"                           min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_rename_unit_bank"                   min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
 …
   <parameter name="size_read_queue"                       min="1"   max="8"    step="* 2" default="2"   level="..." description="..." />
   <parameter name="size_reservation_station"              min="1"   max="8"    step="* 2" default="2"   level="..." description="..." />
   <parameter name="nb_inst_retire_reservation_station"    min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="nb_inst_retire_reservation_station"    min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_write_bloc"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
 …
   <parameter name="speculative_load"                      min="0"   max="3"    step="+ 1" default="2"   level="..." description="..." />
   <parameter name="nb_bypass_memory"                      min="0"   max="8"    step="+ 1" default="0"   level="..." description="..." />
   <parameter name="nb_cache_port"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_inst_memory"                        min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="nb_cache_port"                         min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="nb_inst_memory"                        min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_functionnal_unit"                   min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
 …
   <parameter name="dir_pht_size_counter"                  min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="dir_pht_nb_counter"                    min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="dir_pht_size_address_share"            min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="dir_pht_size_address_share"            min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_ooo_engine"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_rename_unit"                        min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="nb_ooo_engine"                         min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="nb_rename_unit"                        min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_inst_issue"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_inst_reexecute"                     min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
 …
   <parameter name="size_re_order_buffer"                  min="1"   max="256"  step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_re_order_buffer_bank"               min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="commit_priority"                       min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="commit_load_balancing"                 min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="commit_priority"                       min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="commit_load_balancing"                 min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="size_issue_queue"                      min="1"   max="8"    step="* 2" default="2"   level="..." description="..." />
   <parameter name="nb_issue_queue_bank"                   min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
 …
   <parameter name="issue_load_balancing"                  min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="size_reexecute_queue"                  min="1"   max="8"    step="* 2" default="2"   level="..." description="..." />
   <parameter name="reexecute_priority"                    min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="reexecute_load_balancing"              min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="reexecute_priority"                    min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="reexecute_load_balancing"              min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_execute_loop"                       min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_read_unit"                          min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="nb_execute_loop"                       min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="nb_read_unit"                          min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_execute_unit"                       min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_write_unit"                         min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="nb_write_unit"                         min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <parameter name="nb_gpr_bank"                           min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_gpr_port_read_by_bank"              min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
 …
   <parameter name="nb_spr_port_read_by_bank"              min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="nb_spr_port_write_by_bank"             min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="execution_unit_to_write_unit_priority" min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
   <parameter name="read_unit_to_execution_unit_priority"  min="1"   max="8"    step="* 2" default="1"   level="..." description="..." />
+  <parameter name="execution_unit_to_write_unit_priority" min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
+  <parameter name="read_unit_to_execution_unit_priority"  min="1"   max="8"    step="+ 1" default="1"   level="..." description="..." />
   <link name="link_context_with_thread"                   src="thread"           dest="context"      description="..." />

trunk/IPs/systemC/processor/Morpheo/Files/Morpheo.sim

-                      r109
+                      r110
 <parameters >
+  <parameter  name="use_systemc"                            value="1" />
+  <parameter  name="use_vhdl"                               value="0" />
+  <parameter  name="use_vhdl_testbench"                     value="0" />
+  <parameter  name="use_vhdl_testbench_assert"              value="0" />
+  <parameter  name="use_position"                           value="0" />
+  <parameter  name="use_statistics"                         value="1" />
+  <parameter  name="use_information"                        value="0" />
+  <parameter  name="use_header"                             value="0" />
+  <parameter  name="use_systemc"                            value="1"       />
+  <parameter  name="use_vhdl"                               value="0"       />
+  <parameter  name="use_vhdl_testbench"                     value="0"       />
+  <parameter  name="use_vhdl_testbench_assert"              value="0"       />
+  <parameter  name="use_position"                           value="0"       />
+  <parameter  name="use_statistics"                         value="1"       />
+  <parameter  name="use_information"                        value="0"       />
+  <parameter  name="use_header"                             value="0"       />
+  <parameter  name="statistics_cycle_start"                 value="5"       />
+  <parameter  name="statistics_period"                      value="0"       />
   <parameter  name="statistics_cycle_start"                 value="0" />
   <parameter  name="statistics_period"                      value="0" />
+  <parameter  name="simulation_nb_cycle"                    value="600000"  />
+  <parameter  name="simulation_nb_instruction"              value="0"       />
+  <parameter  name="simulation_nb_cycle"                    value="60000" />
+  <parameter  name="simulation_nb_instruction"              value="0"   />
+  <parameter  name="directory_statistics"                   value="."       />
+  <parameter  name="directory_vhdl"                         value="."       />
+  <parameter  name="directory_position"                     value="."       />
+  <parameter  name="directory_log"                          value="."       />
+  <parameter  name="directory_statistics"                   value="." />
+  <parameter  name="directory_vhdl"                         value="." />
+  <parameter  name="directory_position"                     value="." />
+  <parameter  name="directory_log"                          value="." />
+  <parameter  name="debug_level"                            value="0"/>
+  <parameter  name="debug_cycle_start"                      value="1000" />
+  <parameter  name="debug_cycle_stop"                       value="1200" />
+  <parameter  name="debug_cycle_idle"                       value="100" />
+  <parameter  name="debug_have_log_file"                    value="0" />
+  <parameter  name="debug_level"                            value="3"       />
+  <parameter  name="debug_cycle_start"                      value="1600"    />
+  <parameter  name="debug_cycle_stop"                       value="1750"    />
+  <parameter  name="debug_idle_cycle"                       value="100"     />
+  <parameter  name="debug_idle_time"                        value="3"       />
+  <parameter  name="debug_have_log_file"                    value="0"       />
   <simulation component="Counter"                           value="systemc" />
   <simulation component="Priority"                          value="systemc" />
   <simulation component="Queue_Control"                     value="systemc" />
   <simulation component="Queue"                             value="systemc" />
   <simulation component="RegisterFile_Monolithic"           value="systemc" />
   <simulation component="RegisterFile_Multi_Banked"         value="systemc" />
   <simulation component="RegisterFile"                      value="systemc" />
   <simulation component="Select_Priority_Fixed"             value="systemc" />
   <simulation component="Select"                            value="systemc" />
   <simulation component="Shifter"                           value="systemc" />
   <simulation component="Sort"                              value="systemc" />
   <simulation component="Victim_Pseudo_LRU"                 value="systemc" />
   <simulation component="Victim"                            value="systemc" />
   <simulation component="Execute_loop_Glue"                 value="systemc" />
   <simulation component="Functionnal_unit"                  value="systemc" />
   <simulation component="Load_store_unit"                   value="systemc" />
   <simulation component="Read_queue"                        value="systemc" />
   <simulation component="Reservation_station"               value="systemc" />
   <simulation component="Read_unit"                         value="systemc" />
   <simulation component="Execute_queue"                     value="systemc" />
   <simulation component="Write_queue"                       value="systemc" />
   <simulation component="Write_unit"                        value="systemc" />
   <simulation component="Execution_unit_to_Write_unit"      value="systemc" />
   <simulation component="Read_unit_to_Execution_unit"       value="systemc" />
   <simulation component="Register_unit_Glue"                value="systemc" />
   <simulation component="Register_unit"                     value="systemc" />
   <simulation component="Execute_loop"                      value="systemc" />
   <simulation component="Commit_unit"                       value="systemc" />
   <simulation component="Issue_queue"                       value="systemc" />
   <simulation component="OOO_Engine_Glue"                   value="systemc" />
   <simulation component="Reexecute_unit"                    value="systemc" />
   <simulation component="Load_Store_pointer_unit"           value="systemc" />
   <simulation component="Dependency_checking_unit"          value="systemc" />
   <simulation component="Free_List_unit"                    value="systemc" />
   <simulation component="Register_Address_Translation_unit" value="systemc" />
   <simulation component="Register_translation_unit_Glue"    value="systemc" />
   <simulation component="Stat_List_unit"                    value="systemc" />
   <simulation component="Register_translation_unit"         value="systemc" />
   <simulation component="Rename_unit_Glue"                  value="systemc" />
   <simulation component="Rename_select"                     value="systemc" />
   <simulation component="Rename_unit"                       value="systemc" />
   <simulation component="Special_Register_unit"             value="systemc" />
   <simulation component="OOO_Engine"                        value="systemc" />
   <simulation component="Context_State"                     value="systemc" />
   <simulation component="Decod"                             value="systemc" />
   <simulation component="Decod_queue"                       value="systemc" />
   <simulation component="Decod_unit"                        value="systemc" />
   <simulation component="Front_end_Glue"                    value="systemc" />
   <simulation component="Address_management"                value="systemc" />
   <simulation component="Ifetch_queue"                      value="systemc" />
   <simulation component="Ifetch_unit_Glue"                  value="systemc" />
   <simulation component="Ifetch_unit"                       value="systemc" />
   <simulation component="Branch_Target_Buffer_Glue"         value="systemc" />
   <simulation component="Branch_Target_Buffer_Register"     value="systemc" />
   <simulation component="Branch_Target_Buffer"              value="systemc" />
   <simulation component="Direction_Glue"                    value="systemc" />
   <simulation component="Direction"                         value="systemc" />
   <simulation component="Prediction_unit_Glue"              value="systemc" />
   <simulation component="Return_Address_Stack"              value="systemc" />
   <simulation component="Update_Prediction_Table"           value="systemc" />
   <simulation component="Prediction_unit"                   value="systemc" />
   <simulation component="Front_end"                         value="systemc" />
   <simulation component="Icache_Access"                     value="systemc" />
   <simulation component="Dcache_Access"                     value="systemc" />
   <simulation component="Core_Glue"                         value="systemc" />
   <simulation component="Core"                              value="systemc" />
   <simulation component="TopLevel"                          value="systemc" />
+  <component  name="Counter"                                simulation="systemc" debug="0" />
+  <component  name="Priority"                               simulation="systemc" debug="0" />
+  <component  name="Queue_Control"                          simulation="systemc" debug="0" />
+  <component  name="Queue"                                  simulation="systemc" debug="0" />
+  <component  name="RegisterFile_Monolithic"                simulation="systemc" debug="0" />
+  <component  name="RegisterFile_Multi_Banked"              simulation="systemc" debug="0" />
+  <component  name="RegisterFile"                           simulation="systemc" debug="0" />
+  <component  name="Select_Priority_Fixed"                  simulation="systemc" debug="0" />
+  <component  name="Select"                                 simulation="systemc" debug="0" />
+  <component  name="Shifter"                                simulation="systemc" debug="0" />
+  <component  name="Sort"                                   simulation="systemc" debug="0" />
+  <component  name="Victim_Pseudo_LRU"                      simulation="systemc" debug="0" />
+  <component  name="Victim"                                 simulation="systemc" debug="0" />
+  <component  name="Execute_loop_Glue"                      simulation="systemc" debug="0" />
+  <component  name="Functionnal_unit"                       simulation="systemc" debug="0" />
+  <component  name="Load_store_unit"                        simulation="systemc" debug="0" />
+  <component  name="Read_queue"                             simulation="systemc" debug="0" />
+  <component  name="Reservation_station"                    simulation="systemc" debug="0" />
+  <component  name="Read_unit"                              simulation="systemc" debug="0" />
+  <component  name="Execute_queue"                          simulation="systemc" debug="0" />
+  <component  name="Write_queue"                            simulation="systemc" debug="0" />
+  <component  name="Write_unit"                             simulation="systemc" debug="0" />
+  <component  name="Execution_unit_to_Write_unit"           simulation="systemc" debug="0" />
+  <component  name="Read_unit_to_Execution_unit"            simulation="systemc" debug="0" />
+  <component  name="Register_unit_Glue"                     simulation="systemc" debug="0" />
+  <component  name="Register_unit"                          simulation="systemc" debug="0" />
+  <component  name="Execute_loop"                           simulation="systemc" debug="0" />
+  <component  name="Commit_unit"                            simulation="systemc" debug="0" />
+  <component  name="Issue_queue"                            simulation="systemc" debug="0" />
+  <component  name="OOO_Engine_Glue"                        simulation="systemc" debug="0" />
+  <component  name="Reexecute_unit"                         simulation="systemc" debug="0" />
+  <component  name="Load_Store_pointer_unit"                simulation="systemc" debug="0" />
+  <component  name="Dependency_checking_unit"               simulation="systemc" debug="0" />
+  <component  name="Free_List_unit"                         simulation="systemc" debug="0" />
+  <component  name="Register_Address_Translation_unit"      simulation="systemc" debug="0" />
+  <component  name="Register_translation_unit_Glue"         simulation="systemc" debug="0" />
+  <component  name="Stat_List_unit"                         simulation="systemc" debug="0" />
+  <component  name="Register_translation_unit"              simulation="systemc" debug="0" />
+  <component  name="Rename_unit_Glue"                       simulation="systemc" debug="0" />
+  <component  name="Rename_select"                          simulation="systemc" debug="0" />
+  <component  name="Rename_unit"                            simulation="systemc" debug="0" />
+  <component  name="Special_Register_unit"                  simulation="systemc" debug="0" />
+  <component  name="OOO_Engine"                             simulation="systemc" debug="0" />
+  <component  name="Context_State"                          simulation="systemc" debug="0" />
+  <component  name="Decod"                                  simulation="systemc" debug="0" />
+  <component  name="Decod_queue"                            simulation="systemc" debug="0" />
+  <component  name="Decod_unit"                             simulation="systemc" debug="0" />
+  <component  name="Front_end_Glue"                         simulation="systemc" debug="0" />
+  <component  name="Address_management"                     simulation="systemc" debug="0" />
+  <component  name="Ifetch_queue"                           simulation="systemc" debug="0" />
+  <component  name="Ifetch_unit_Glue"                       simulation="systemc" debug="0" />
+  <component  name="Ifetch_unit"                            simulation="systemc" debug="0" />
+  <component  name="Branch_Target_Buffer_Glue"              simulation="systemc" debug="0" />
+  <component  name="Branch_Target_Buffer_Register"          simulation="systemc" debug="0" />
+  <component  name="Branch_Target_Buffer"                   simulation="systemc" debug="0" />
+  <component  name="Direction_Glue"                         simulation="systemc" debug="0" />
+  <component  name="Direction"                              simulation="systemc" debug="0" />
+  <component  name="Prediction_unit_Glue"                   simulation="systemc" debug="0" />
+  <component  name="Return_Address_Stack"                   simulation="systemc" debug="0" />
+  <component  name="Update_Prediction_Table"                simulation="systemc" debug="0" />
+  <component  name="Prediction_unit"                        simulation="systemc" debug="0" />
+  <component  name="Front_end"                              simulation="systemc" debug="0" />
+  <component  name="Icache_Access"                          simulation="systemc" debug="0" />
+  <component  name="Dcache_Access"                          simulation="systemc" debug="0" />
+  <component  name="Core_Glue"                              simulation="systemc" debug="0" />
+  <component  name="Core"                                   simulation="systemc" debug="0" />
+  <component  name="TopLevel"                               simulation="systemc" debug="0" />
 </parameters>

trunk/IPs/systemC/processor/Morpheo/Script/SelfTest.sh

-                      r105
+                      r110
 declare    test_ko="Test KO";
 declare    test_ok="Test OK";
+declare    test_unknow="???????";
 declare    tmp="${MORPHEO_HOME}/tmp/SelfTest";
 declare    path="${MORPHEO_TOPLEVEL}/IPs/systemC/processor/Morpheo/";
 …
     "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Direction_Glue"
     "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction"
 #   "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue"
+    "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Meta_Predictor_Glue"
 #   "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/Two_Level_Branch_Predictor_Glue"
 #   "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table"
 #   "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table"
 #   "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor"
 #   "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor"
+    "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor/Two_Level_Branch_Predictor"
+    "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Direction/Meta_Predictor"
     "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue"
     "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Return_Address_Stack"
 …
         "result")
             for x in "systemc" "vhdl"; do
+                echo "${x}";
+                color=34;
+                echo "[1;${color}m * ${x}[1;0m";
                 for i in ${tmp}/*.${x}; do
                     if test -f ${i}; then
 …
                         case "${res_test}" in
                             "${test_ok}") color=32;
+                            "${test_ok}") res_test=${test_ok};     color=32;
                                 ;;
                             "${test_ko}") color=31;
+                            "${test_ko}") res_test=${test_ko};     color=31;
                                 ;;
                             *)            color=39;
+                            *)            res_test=${test_unknow}; color=39;
                                 ;;
                         esac
                         echo "[1;${color}m * ${res_test} - ${component}[1;0m";
+                        echo "[1;${color}m   * ${res_test} - ${component}[1;0m";
                     fi;
                 done;

trunk/IPs/systemC/processor/Morpheo/TopLevel/include/Morpheo.h

-                      r97
+                      r110
 #include "Common/include/Debug.h"
 #include <iostream>
+#include <csignal>
+#include <unistd.h>
 namespace morpheo {
 …
 #ifdef SYSTEMC
   public  : bool        simulation_end            (void);
+  private : void        signal_init               (void);
+//private : void        signal_handler            (int value);
 #endif
   };
+  void signal_handler (int value);
 }; // end namespace morpheo

trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo.cpp

-                      r97
+                      r110
 #endif
+      }
+#ifdef SYSTEMC
+    // Stop alarm
+    signal_init();
+#endif
     log_end(Morpheo,FUNCTION);
   };
 …
+  {
     log_begin(Morpheo,FUNCTION);
+#ifdef SYSTEMC
+    // Stop alarm
+    alarm(0);
+#endif
 #ifdef STATISTICS

trunk/IPs/systemC/processor/Morpheo/TopLevel/src/Morpheo_transition.cpp

-                      r88
+                      r110
+  {
     log_begin(Morpheo,FUNCTION);
+    // Re init the alarm
+    alarm(debug_idle_time);
 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)

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