|
|
@646
|
11 years |
haoliu |
(RWT) merging the lastest modification in trunk:
Modification in …
|
|
|
@645
|
11 years |
devigne |
Invalidation from memcache on a non-coherent line can cause a …
|
|
|
@644
|
11 years |
devigne |
Problem of concurrency in MEMC on r_write_to_cc_send_nline register. …
|
|
|
@643
|
11 years |
porquet |
add my .gdbinit file
it provides a few helpers, especially useful for …
|
|
|
@642
|
11 years |
porquet |
commit the proper soclib.conf to use with this platform
it specifies …
|
|
|
@641
|
11 years |
porquet |
make the framebuffer being optional (via --framebuffer)
|
|
|
@640
|
11 years |
porquet |
add framebuffer component
|
|
|
@639
|
11 years |
porquet |
remove unused simhelper
|
|
|
@638
|
11 years |
porquet |
add a way to specify the rom image we want to use
|
|
|
@637
|
11 years |
porquet |
add the possibility to specify args for execution (gdb and trace)
|
|
|
@636
|
11 years |
porquet |
use vci_icu and vci_timer instead of vci_xicu
|
|
|
@635
|
11 years |
porquet |
cc_vcache_v4: enable ondemand debugging (via xtn commands)
|
|
|
@620
|
11 years |
alain |
Introducing the "giet_tsar" os (without virtual memory) in the softs …
|
|
|
@615
|
11 years |
devigne |
Bug fixed: bad syncro enums states between .h and .cpp for debug... …
|
|
|
@612
|
11 years |
almaless |
memc: merge all the config interface access except the IRQ one.
|
|
|
@611
|
11 years |
almaless |
tested using ALMOS
|
|
|
@610
|
11 years |
devigne |
Bug fixed : wrong shift in the fields of a flit DSPIN MULTI_INVAL and CLACK
|
|
|
@604
|
11 years |
devigne |
Merge with the latest trunk (concurrent access to a register …
|
|
|
@577
|
11 years |
devigne |
Merge with the lastest version of trunk (Compliance with MappingTable?)
|
|
|
@545
|
11 years |
haoliu |
RWT - VCI_MEM_CACHE cosmetic
|
|
|
@544
|
11 years |
haoliu |
ODCCP merge the components with the version 543 in trunk.
|
|
|
@543
|
11 years |
haoliu |
ODCCP vci_mem_cache.cpp cosmetic
|
|
|
@542
|
11 years |
haoliu |
RWT - merged the vci_mem_cache.h file for the llsc table.
|
|
|
@541
|
11 years |
devigne |
cosmetic : deleting debug
|
|
|
@540
|
11 years |
haoliu |
RWT - merged the vci_mem_cache with the last
modification of the llsc …
|
|
|
@539
|
11 years |
haoliu |
RWT - Bug fixed in vci_mem_cache:
The alloc_trt fsm is modified for …
|
|
|
@538
|
11 years |
haoliu |
RWT - bug fixed in vci_cc_vcache_wrapper:
Add the treatment of late …
|
|
|
@526
|
11 years |
haoliu |
(RWT)Merged the modification for the table llsc in memcache.
|
|
|
@525
|
11 years |
haoliu |
bug fixed in the component memcache(RWT):
There was some confusions …
|
|
|
@515
|
11 years |
haoliu |
bug fixed in vci_cc_vcache_wrapper(RWT),
when we have to modify the …
|
|
|
@513
|
11 years |
haoliu |
bug fix in vci_cc_vcache_wrapper(RWT)
In DCACHE_CC_INVAL state, the …
|
|
|
@495
|
11 years |
haoliu |
This version for RWT has merged with the lastest version of classic …
|
|
|
@494
|
11 years |
devigne |
Merge with the lastest version of trunk
|
|
|
@492
|
11 years |
devigne |
generic_tlb : pte flag CC => NCC
vci_cc_vcache_wrapper : Fixing …
|
|
|
@479
|
11 years |
devigne |
Merge with the lastest version of Trunk
Modification in vci_mem_cache …
|
|
|
@477
|
11 years |
lgarcia |
Reintroducing RWT branch merging the last modifications of the
trunk …
|
|
|
@476
|
11 years |
lgarcia |
Erasing RWT branch to start a newly created branch with
the last …
|
|
|
@474
|
11 years |
devigne |
Introducing NON INCLUSIVITY property in the vci_mem_cache (ODCCP)
…
|
|
|
@470
|
11 years |
cfuguet |
Erasing v5 development branch components as they have been
merged into …
|
|
|
@467
|
11 years |
cfuguet |
Modifications in branches/v5 tsar_generic_xbar:
- Adding …
|
|
|
@466
|
11 years |
cfuguet |
Modifications in branches/v5 vci_mem_cache:
- Replacing the third …
|
|
|
@463
|
11 years |
cfuguet |
Modification in vci_cc_vcache_wrapper:
- Optimization in …
|
|
|
@462
|
11 years |
cfuguet |
Modification in vci_cc_vcache_wrapper:
- Optimization in …
|
|
|
@461
|
11 years |
cfuguet |
Bugfix in vci_cc_vcache_wrapper:
- In the states DCACHE/ICACHE …
|
|
|
@460
|
11 years |
devigne |
Introducing merged components between the last trunk TSAR version
and …
|
|
|
@459
|
11 years |
devigne |
Erasing ODCCP branch to ease the merge of this branch with the trunk
|
|
|
@458
|
11 years |
lgarcia |
Cosmetic (suppression of warning in memcache and vcache)
|
|
|
@457
|
11 years |
lgarcia |
fixing merging bug in vci_mem_cache.cpp
|
|
|
@456
|
11 years |
lgarcia |
Introduction of RWT branch
New components :
-dspin_rwt_param (Cleanup …
|
|
|
@455
|
11 years |
cfuguet |
Merged
/trunk/modules/vci_mem_cache:449 with
…
|
|
|
@454
|
11 years |
haoliu |
modified CC_RECEIVE FSM and CC_CHECK FSM (icache and dcache) for new …
|
|
|
@453
|
11 years |
devigne |
Rename dspin_dhccp_param into dspin_odccp_param
|
|
|
@452
|
11 years |
devigne |
Introduction of ODCCP branch
New components :
-dspin_odccp_param …
|
|
|
@448
|
11 years |
cfuguet |
Modification in branches/v5/platforms/tsar_generic_xbar:
- Adding a …
|
|
|
@447
|
11 years |
cfuguet |
Adding tsar_generic_xbar platform in branches/v5/platforms:
- This …
|
|
|
@446
|
11 years |
cfuguet |
Modifications in vci_cc_vcache_wrapper:
- Merging the states …
|
|
|
@445
|
11 years |
cfuguet |
Bugfix in vci_mem_cache:
- Adding missing "strings" for …
|
|
|
@444
|
11 years |
cfuguet |
Modifications in branches/v5/modules/vci_cc_vcache_wrapper:
- …
|
|
|
@443
|
11 years |
cfuguet |
Merging branch/v5/vci_cc_vcache_wrapper with trunk modifications
to …
|
|
|
@442
|
11 years |
cfuguet |
Modifications in branches/v5/communication/dspin_dhccp_param:
- …
|
|
|
@441
|
11 years |
cfuguet |
Modifications in branches/v5/vci_mem_cache:
- Changing name of CC …
|
|
|
@440
|
11 years |
cfuguet |
Merging branch/v5/vci_mem_cache with trunk modifications to
start the …
|
|
|
@420
|
11 years |
porquet |
various modifications to the platform
- make simulation parameters a …
|
|
|
@419
|
11 years |
porquet |
modifications in Makefile
- I can't stand this banner anymore
- rule …
|
|
|
@418
|
11 years |
porquet |
just for me
|
|
|
@414
|
11 years |
porquet |
oups in segmentation.h
|
|
|
@410
|
11 years |
porquet |
add a new platform tsarv4
- mono mipsel32
- xicu, blockdevice, tty
…
|
|
|
@407
|
11 years |
porquet |
add missing header (for ::read, ::write, etc.)
|
|
|
@380
|
12 years |
simerabe |
Another bugfix
|
|
|
@371
|
12 years |
joannou |
Create TsarV4 branch from trunk as of now
|
|
|
@370
|
12 years |
joannou |
In tsarv5_generic_mmu :
* top.cpp : go look for hard_config.h in …
|
|
|
@369
|
12 years |
joannou |
Bugfix in vci_cc_vcache_wrapper v5 :
forgot to copy the nline when …
|
|
|
@367
|
12 years |
cfuguet |
Modification in v5/vci_mem_cache
Aligning to left the SRCID into the …
|
|
|
@366
|
12 years |
joannou |
In vci_cc_vcache_wrapper v5,
* now using the new generic_cache_tsar …
|
|
|
@364
|
12 years |
haoliu |
Bug fix in dcache fsm, in dcache_xtn_dc_inval_go state,
set the slot …
|
|
|
@363
|
12 years |
joannou |
In tsarv5_generic_mmu platform, in tsar cluster, added l_width to …
|
|
|
@362
|
12 years |
cfuguet |
Bugfix in vci_mem_cache:
In function "copy()" of the xram_transaction …
|
|
|
@360
|
12 years |
joannou |
In tsarv5_generic_mmu platform (tsarcluster):
* connected vci to dspin …
|
|
|
@359
|
12 years |
joannou |
bugfix : correctly updating the r_preempt register
|
|
|
@358
|
12 years |
simerabe |
bugfix : preempt in case of broadcast, palloc in case of single flit
|
|
|
@357
|
12 years |
simerabe |
fixbug : test on eop in case of single_flit coherence request
|
|
|
@356
|
12 years |
cfuguet |
Modifying comments in the dspin_dhccp_param to comply the type …
|
|
|
@355
|
12 years |
joannou |
In vci_cc_vcache_wrapper v5
- added check for p_dspin_in.write in …
|
|
|
@354
|
12 years |
cfuguet |
Bugfix in branches/v5/vci_mem_cache
Adding missing condition in …
|
|
|
@353
|
12 years |
cfuguet |
Bugfix in branches/v5/vci_mem_cache
Adding missing fifo get in case of …
|
|
|
@351
|
12 years |
joannou |
Got rid of intermediate v5 version. _dspin_coherence versions changed …
|
|
|
@350
|
12 years |
alain |
Introducing Platform tsarv5_dspin_array,
that can be used for TSAR …
|
|
|
@346
|
12 years |
alain |
New contructors for vci_mem_cache & vci_cc_vcache,
as we don't need …
|
|
|
@345
|
12 years |
alain |
Introducing the cluster component in tsarv5_generic_mmu platform.
|
|
|
@344
|
12 years |
alain |
Introducing the tsarv5_generic_mmu platform.
|
|
|
@343
|
12 years |
cfuguet |
Using the Xicu SOFT IRQs (IPIs). Adding them on the Xicu
constructor
|
|
|
@342
|
12 years |
joannou |
Introducing tsar_generic_mmu_dspin_coherence platform (ring dspin for …
|
|
|
@341
|
12 years |
joannou |
In vci_cc_vcache_wrapper_dspin_coherence, DCACHE_TLB_PTE1_MISS and …
|
|
|
@339
|
12 years |
cfuguet |
Erasing always false condition in the if statement of the …
|
|
|
@338
|
12 years |
joannou |
* In vci_cc_vcache_wrapper_dspin_coherence, modified both states
…
|
|
|
@336
|
12 years |
cfuguet |
Bug fix in the vci_cc_vcache_wrapper and vci_mem_cache components
(and …
|
|
|
@335
|
12 years |
joannou |
Added llsc table initialization in both vci_mem_cache and …
|
|
|
@333
|
12 years |
joannou |
- In vci_cc_vcache_wrapper_dspin_coherence : initializing …
|
|
|
@332
|
12 years |
joannou |
Updated top.cpp in tsar_mono_mmu_dspin_coherence to respect new file …
|
|
|
@331
|
12 years |
joannou |
Renaming all files form vci_cc_vcache_wrapper_dspin_coherence and …
|
|
|