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Diff Rev Age Author Log Message
(edit) @646   10 years haoliu (RWT) merging the lastest modification in trunk: Modification in …
(edit) @645   10 years devigne Invalidation from memcache on a non-coherent line can cause a …
(edit) @644   10 years devigne Problem of concurrency in MEMC on r_write_to_cc_send_nline register. …
(edit) @643   10 years porquet add my .gdbinit file it provides a few helpers, especially useful for …
(edit) @642   10 years porquet commit the proper soclib.conf to use with this platform it specifies …
(edit) @641   10 years porquet make the framebuffer being optional (via --framebuffer)
(edit) @640   10 years porquet add framebuffer component
(edit) @639   10 years porquet remove unused simhelper
(edit) @638   10 years porquet add a way to specify the rom image we want to use
(edit) @637   10 years porquet add the possibility to specify args for execution (gdb and trace)
(edit) @636   10 years porquet use vci_icu and vci_timer instead of vci_xicu
(edit) @635   10 years porquet cc_vcache_v4: enable ondemand debugging (via xtn commands)
(edit) @620   10 years alain Introducing the "giet_tsar" os (without virtual memory) in the softs …
(edit) @615   10 years devigne Bug fixed: bad syncro enums states between .h and .cpp for debug... …
(edit) @612   10 years almaless memc: merge all the config interface access except the IRQ one.
(edit) @611   10 years almaless tested using ALMOS
(edit) @610   10 years devigne Bug fixed : wrong shift in the fields of a flit DSPIN MULTI_INVAL and CLACK
(edit) @604   10 years devigne Merge with the latest trunk (concurrent access to a register …
(edit) @577   10 years devigne Merge with the lastest version of trunk (Compliance with MappingTable?)
(edit) @545   10 years haoliu RWT - VCI_MEM_CACHE cosmetic
(edit) @544   10 years haoliu ODCCP merge the components with the version 543 in trunk.
(edit) @543   10 years haoliu ODCCP vci_mem_cache.cpp cosmetic
(edit) @542   10 years haoliu RWT - merged the vci_mem_cache.h file for the llsc table.
(edit) @541   10 years devigne cosmetic : deleting debug
(edit) @540   10 years haoliu RWT - merged the vci_mem_cache with the last modification of the llsc …
(edit) @539   10 years haoliu RWT - Bug fixed in vci_mem_cache: The alloc_trt fsm is modified for …
(edit) @538   10 years haoliu RWT - bug fixed in vci_cc_vcache_wrapper: Add the treatment of late …
(edit) @526   10 years haoliu (RWT)Merged the modification for the table llsc in memcache.
(edit) @525   10 years haoliu bug fixed in the component memcache(RWT): There was some confusions …
(edit) @515   10 years haoliu bug fixed in vci_cc_vcache_wrapper(RWT), when we have to modify the …
(edit) @513   10 years haoliu bug fix in vci_cc_vcache_wrapper(RWT) In DCACHE_CC_INVAL state, the …
(edit) @495   11 years haoliu This version for RWT has merged with the lastest version of classic …
(edit) @494   11 years devigne Merge with the lastest version of trunk
(edit) @492   11 years devigne generic_tlb : pte flag CC => NCC vci_cc_vcache_wrapper : Fixing …
(edit) @479   11 years devigne Merge with the lastest version of Trunk Modification in vci_mem_cache …
(edit) @477   11 years lgarcia Reintroducing RWT branch merging the last modifications of the trunk …
(edit) @476   11 years lgarcia Erasing RWT branch to start a newly created branch with the last …
(edit) @474   11 years devigne Introducing NON INCLUSIVITY property in the vci_mem_cache (ODCCP) …
(edit) @470   11 years cfuguet Erasing v5 development branch components as they have been merged into …
(edit) @467   11 years cfuguet Modifications in branches/v5 tsar_generic_xbar: - Adding …
(edit) @466   11 years cfuguet Modifications in branches/v5 vci_mem_cache: - Replacing the third …
(edit) @463   11 years cfuguet Modification in vci_cc_vcache_wrapper: - Optimization in …
(edit) @462   11 years cfuguet Modification in vci_cc_vcache_wrapper: - Optimization in …
(edit) @461   11 years cfuguet Bugfix in vci_cc_vcache_wrapper: - In the states DCACHE/ICACHE …
(edit) @460   11 years devigne Introducing merged components between the last trunk TSAR version and …
(edit) @459   11 years devigne Erasing ODCCP branch to ease the merge of this branch with the trunk
(edit) @458   11 years lgarcia Cosmetic (suppression of warning in memcache and vcache)
(edit) @457   11 years lgarcia fixing merging bug in vci_mem_cache.cpp
(edit) @456   11 years lgarcia Introduction of RWT branch New components : -dspin_rwt_param (Cleanup …
(edit) @455   11 years cfuguet Merged /trunk/modules/vci_mem_cache:449 with …
(edit) @454   11 years haoliu modified CC_RECEIVE FSM and CC_CHECK FSM (icache and dcache) for new …
(edit) @453   11 years devigne Rename dspin_dhccp_param into dspin_odccp_param
(edit) @452   11 years devigne Introduction of ODCCP branch New components : -dspin_odccp_param …
(edit) @448   11 years cfuguet Modification in branches/v5/platforms/tsar_generic_xbar: - Adding a …
(edit) @447   11 years cfuguet Adding tsar_generic_xbar platform in branches/v5/platforms: - This …
(edit) @446   11 years cfuguet Modifications in vci_cc_vcache_wrapper: - Merging the states …
(edit) @445   11 years cfuguet Bugfix in vci_mem_cache: - Adding missing "strings" for …
(edit) @444   11 years cfuguet Modifications in branches/v5/modules/vci_cc_vcache_wrapper: - …
(edit) @443   11 years cfuguet Merging branch/v5/vci_cc_vcache_wrapper with trunk modifications to …
(edit) @442   11 years cfuguet Modifications in branches/v5/communication/dspin_dhccp_param: - …
(edit) @441   11 years cfuguet Modifications in branches/v5/vci_mem_cache: - Changing name of CC …
(edit) @440   11 years cfuguet Merging branch/v5/vci_mem_cache with trunk modifications to start the …
(edit) @420   11 years porquet various modifications to the platform - make simulation parameters a …
(edit) @419   11 years porquet modifications in Makefile - I can't stand this banner anymore - rule …
(edit) @418   11 years porquet just for me
(edit) @414   11 years porquet oups in segmentation.h
(edit) @410   11 years porquet add a new platform tsarv4 - mono mipsel32 - xicu, blockdevice, tty …
(edit) @407   11 years porquet add missing header (for ::read, ::write, etc.)
(edit) @380   11 years simerabe Another bugfix
(edit) @371   11 years joannou Create TsarV4 branch from trunk as of now
(edit) @370   11 years joannou In tsarv5_generic_mmu : * top.cpp : go look for hard_config.h in …
(edit) @369   11 years joannou Bugfix in vci_cc_vcache_wrapper v5 : forgot to copy the nline when …
(edit) @367   11 years cfuguet Modification in v5/vci_mem_cache Aligning to left the SRCID into the …
(edit) @366   11 years joannou In vci_cc_vcache_wrapper v5, * now using the new generic_cache_tsar …
(edit) @364   11 years haoliu Bug fix in dcache fsm, in dcache_xtn_dc_inval_go state, set the slot …
(edit) @363   11 years joannou In tsarv5_generic_mmu platform, in tsar cluster, added l_width to …
(edit) @362   11 years cfuguet Bugfix in vci_mem_cache: In function "copy()" of the xram_transaction …
(edit) @360   11 years joannou In tsarv5_generic_mmu platform (tsarcluster): * connected vci to dspin …
(edit) @359   11 years joannou bugfix : correctly updating the r_preempt register
(edit) @358   11 years simerabe bugfix : preempt in case of broadcast, palloc in case of single flit
(edit) @357   11 years simerabe fixbug : test on eop in case of single_flit coherence request
(edit) @356   11 years cfuguet Modifying comments in the dspin_dhccp_param to comply the type …
(edit) @355   11 years joannou In vci_cc_vcache_wrapper v5 - added check for p_dspin_in.write in …
(edit) @354   11 years cfuguet Bugfix in branches/v5/vci_mem_cache Adding missing condition in …
(edit) @353   11 years cfuguet Bugfix in branches/v5/vci_mem_cache Adding missing fifo get in case of …
(edit) @351   11 years joannou Got rid of intermediate v5 version. _dspin_coherence versions changed …
(edit) @350   11 years alain Introducing Platform tsarv5_dspin_array, that can be used for TSAR …
(edit) @346   11 years alain New contructors for vci_mem_cache & vci_cc_vcache, as we don't need …
(edit) @345   11 years alain Introducing the cluster component in tsarv5_generic_mmu platform.
(edit) @344   11 years alain Introducing the tsarv5_generic_mmu platform.
(edit) @343   11 years cfuguet Using the Xicu SOFT IRQs (IPIs). Adding them on the Xicu constructor
(edit) @342   11 years joannou Introducing tsar_generic_mmu_dspin_coherence platform (ring dspin for …
(edit) @341   11 years joannou In vci_cc_vcache_wrapper_dspin_coherence, DCACHE_TLB_PTE1_MISS and …
(edit) @339   11 years cfuguet Erasing always false condition in the if statement of the …
(edit) @338   11 years joannou * In vci_cc_vcache_wrapper_dspin_coherence, modified both states …
(edit) @336   11 years cfuguet Bug fix in the vci_cc_vcache_wrapper and vci_mem_cache components (and …
(edit) @335   11 years joannou Added llsc table initialization in both vci_mem_cache and …
(edit) @333   11 years joannou - In vci_cc_vcache_wrapper_dspin_coherence : initializing …
(edit) @332   11 years joannou Updated top.cpp in tsar_mono_mmu_dspin_coherence to respect new file …
(edit) @331   11 years joannou Renaming all files form vci_cc_vcache_wrapper_dspin_coherence and …
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